CN112928208B - High-voltage high-resistance polycrystalline silicon resistance model with asymmetric voltage bias effect - Google Patents

Abstract

The present invention discloses a high-voltage and high-resistance polysilicon resistor model with an asymmetric voltage bias effect, comprising a first connecting terminal (N1), a second connecting terminal (N2), a first parasitic resistor (R1), and a second parasitic resistor (R2). The model also comprises a first polysilicon resistor (R3) and a second polysilicon resistor (R4), which are used for forward or reverse conduction when different voltages are applied to the first connecting terminal (N1) and the second connecting terminal (N2).

Description

A high-voltage and high-resistance polysilicon resistor model with asymmetric voltage bias effect

Technical Field

The invention relates to a high-voltage and high-resistance polysilicon resistor model, in particular to a high-voltage and high-resistance polysilicon resistor model with an asymmetric voltage bias effect.

Background technique

High-voltage and high-resistance polysilicon resistors are a high-precision model often used in high-voltage BCD (Bipolar CMOSDMOS) integration processes. They are widely used in ADC circuits and power supply circuits. As a commonly used resistor, the accuracy requirements of its model are also relatively high, and factors related to voltage bias effects are usually taken into account in the model.

The voltage across an ideal resistor is proportional to the current flowing through it, and its resistance is independent of voltage. But in reality, the conductive particles of the resistor are dispersed and there is contact resistance inside, so a nonlinear relationship occurs, that is, the current and voltage are not strictly proportional, and the resistance decreases as the voltage increases. Figures 1 and 2 show the IV relationship and RV relationship of a polysilicon resistor with a block resistance Rsh of 10K, where Figure 1 is an IV relationship diagram of a high-voltage and high-resistance polysilicon resistor, that is, a characteristic diagram of the bias voltage of a high-voltage resistor and its current, with the voltage swept from -20V to 20V; Figure 2 is an RV relationship diagram of a high-voltage and high-resistance polysilicon resistor (positive pressure), that is, the bias voltage of a high-voltage resistor and the actual resistance corresponding to different voltages, with the voltage ranging from 0 to 20V.

Figure 3 is the RV relationship diagram of high-voltage and high-resistance polysilicon (positive and negative voltage), that is, the resistance change when the resistor bias voltage is swept from negative voltage to positive voltage, and the voltage is from -20V to 20V. Theoretically, whether it is positive bias voltage or negative bias voltage, the resistance value of the resistor should be symmetrical with the voltage, but in actual measurement, it is found that the resistance value of the resistor will be asymmetric. This phenomenon is more common in high-resistance polysilicon resistors, especially when biased at high voltage. Its reasons are more complicated, including self-heating effect and other factors such as differences in the surface structure of the resistor. This effect becomes more obvious as the resistor width W decreases and the resistor length L increases.

The existing SPICE high-voltage high-resistance resistor model can include the relationship between resistance and voltage, and has quadratic coefficients that can be fitted, as shown in Figure 4, R1, R2 are the parasitic resistances at both ends of the resistor, R3 is the polysilicon resistor, Rend is the total parasitic resistance, and Rsh is the block resistance value.

The correction formula of high voltage and high resistance resistance with voltage is:

Where VC1 and VC2 are the 1st and 2nd order voltage correction coefficients respectively, and dV is the absolute value of the voltage difference across the resistor.

FIG5 is a comparison chart of simulation and measured data RV of high-voltage and high-resistance polysilicon of the existing model, with the voltage ranging from -20V to 20V, where the solid line is the simulation curve and the dotted line is the measured curve.

It can be seen that the existing SPICE resistor model generally takes into account the situation where the positive and negative voltage biases at both ends are symmetrical, and does not take into account the special situation of asymmetric voltage characteristics.

Summary of the invention

In order to overcome the above-mentioned deficiencies in the prior art, the object of the present invention is to provide a high-voltage and high-resistance polysilicon resistor model with an asymmetric voltage bias effect, so as to improve the resistance characteristics of the asymmetric voltage bias effect.

To achieve the above-mentioned purpose, the present invention proposes a high-voltage and high-resistance polysilicon resistor model with an asymmetric voltage bias effect, comprising a first connecting terminal (N1), a second connecting terminal (N2), a first parasitic resistor (R1), and a second parasitic resistor (R2). The model also comprises a first polysilicon resistor (R3) and a second polysilicon resistor (R4), which are used for forward or reverse conduction when different voltages are applied to the first connecting terminal (N1) and the second connecting terminal (N2).

Preferably, the model further comprises a first controlled switch (SW1) and a second controlled switch (SW2), which are used to selectively connect the first polysilicon resistor (R3) or the second polysilicon resistor (R4) when different voltages are applied to the first connection terminal (N1) and the second connection terminal (N2).

Preferably, the first connection terminal (N1), the first parasitic resistor (R1), the first polysilicon resistor (R3), the second polysilicon resistor (R4), the second parasitic resistor (R2) and the second connection terminal (N2) are cascaded in sequence.

Preferably, the first controlled switch (SW1) is connected in parallel with a first polysilicon resistor (R3), and the second controlled switch (SW2) is connected in parallel with a second polysilicon resistor (R4).

Preferably, when the voltage of the first connection terminal (N1) is greater than the voltage of the second connection terminal (N2), the first controlled switch (SW1) is set to an on state, the second controlled switch (SW2) is set to an off state, and the second polysilicon resistor (R4) is connected.

Preferably, when the voltage of the second connection terminal (N2) is greater than the voltage of the first connection terminal (N1), the second controlled switch (SW2) is in an on state, the first controlled switch (SW1) is in an off state, and the first polysilicon resistor (R3) is connected.

Compared with the prior art, the high-voltage and high-resistance polysilicon resistor model of the present invention with an asymmetric voltage bias effect achieves the purpose of improving the resistance characteristics of the asymmetric voltage bias effect by changing the polysilicon resistor R3 in the prior art from one to two, namely R3 and R4, and adding a bidirectional selection path, which is formed by controlled switches SW1 and SW2 connected in parallel with the polysilicon resistors R3 and R4 respectively.

BRIEF DESCRIPTION OF THE DRAWINGS

FIG1 is an IV relationship diagram of a high voltage and high resistance polysilicon resistor in the prior art (voltage is swept from -20V to 20V);

FIG2 is a RV relationship diagram of a high-voltage high-resistance polysilicon resistor in the prior art (voltage is swept from 0V to 20V);

FIG3 is a RV relationship diagram of a high-voltage high-resistance polysilicon resistor in the prior art (voltage is swept from -20V to 20V);

FIG4 is an equivalent circuit diagram of a conventional model of high-voltage and high-resistance polysilicon;

FIG5 is a comparison chart of simulation and measured data RV of high voltage and high resistance polysilicon of the existing model;

FIG6 is an equivalent circuit diagram of a high-voltage and high-resistance polysilicon resistor model with an asymmetric voltage bias effect according to the present invention;

FIG. 7 is a comparison diagram of equivalent circuit simulation and measured data in an embodiment of the present invention.

Detailed ways

The following describes the implementation of the present invention through specific examples and in conjunction with the accompanying drawings. Those skilled in the art can easily understand other advantages and effects of the present invention from the contents disclosed in this specification. The present invention can also be implemented or applied through other different specific examples, and the details in this specification can also be modified and changed in various ways based on different viewpoints and applications without departing from the spirit of the present invention.

Fig. 6 is an equivalent circuit diagram of a high-voltage high-resistance polysilicon resistor model with an asymmetric voltage bias effect of the present invention. As shown in Fig. 6, a high-voltage high-resistance polysilicon resistor model with an asymmetric voltage bias effect of the present invention includes: a first connection terminal N1, a second connection terminal N2, a first parasitic resistor R1, a second parasitic resistor R2, a first polysilicon resistor R3, a second polysilicon resistor R4, a first controlled switch SW1, and a second controlled switch SW2.

Among them, the first connecting terminal N1 and the second connecting terminal N2 are used to connect the resistance model of the present invention with the external circuit; the first parasitic resistor R1 and the second parasitic resistor R2 are used to simulate the parasitic resistance at the connecting terminal, and without loss of generality, the two terminals are placed symmetrically; the first polysilicon resistor R3 and the second polysilicon resistor R4 are used to set the polysilicon resistors respectively when different voltages are applied to the two terminals; the first controlled switch SW1 and the second controlled switch SW2 are used to selectively connect different polysilicon resistors when different voltages are applied to the two terminals.

The first connection terminal N1, the first parasitic resistor R1, the first polysilicon resistor R3, the second polysilicon resistor R4, the second parasitic resistor R2 and the second connection terminal N2 are cascaded in sequence, the first controlled switch SW1 is connected in parallel with the first polysilicon resistor R3, and the second controlled switch SW2 is connected in parallel with the second polysilicon resistor R4.

That is to say, FIG. 6 is an improvement on the existing high-voltage and high-resistance resistor equivalent circuit of FIG. 4 , in which the polysilicon resistor R3 is changed from one to two, namely, the first polysilicon resistor R3 and the second polysilicon resistor R4, and a bidirectional selection path is added, which is formed by connecting the first controlled switch SW1 and the second controlled switch SW2 in parallel with the first polysilicon resistor R3 and the second polysilicon resistor R4 respectively.

The first connection terminal N1 and the second connection terminal N2 are the left and right ends of the resistor respectively. When the N1 voltage is greater than the N2 voltage, the equivalent circuit automatically sets the first controlled switch SW1 to on, the second controlled switch SW2 to off, and the second polysilicon resistor R4 is connected. When the N2 voltage is greater than the N1 voltage, the second controlled switch SW2 is on, the first controlled switch SW1 is off, and the first polysilicon resistor R3 is connected.

A correction term for the voltage difference between the polysilicon resistance corresponding to the first controlled switch SW1 and the voltage N1 and N2 is added, and the formula is the same as that in Formula 1, and the voltage coefficients are VC1 and VC2;

A correction term is added for the voltage difference between the polysilicon resistance corresponding to the second controlled switch SW2 and the voltage N1 and N2. The formula is the same as that in Formula 1, and the voltage coefficients are VC3 and VC4.

The function of the improved circuit is realized through SPICE. By using the Max and Min functions in the SPICE language, it is possible to select a path composed of controlled switches according to the voltage difference between N1 and N2.

V(N2, N1) is the voltage difference between the two ends. When V(N2, N1)>0, that is, the voltage of N2 is higher than that of N1, Max(V(N2, N1), 0) = V(N2, N1), Min(V(N2, N1), 0) = 0, the second controlled switch SW2 is in the on state, the second polysilicon resistor R4 is bypassed, and the first controlled switch SW1 is in the off state, the first polysilicon resistor R3 is connected, and the above formula is equivalent to

When V(N2, N1)<0, that is, the voltage of N1 is higher than that of N2, Max(V(N2, N1), 0) = 0, Min(V(N2, N1), 0) = V(N2, N1), the first controlled switch SW1 is in the on state, the first polysilicon resistor R3 is bypassed, and the second controlled switch SW2 is in the off state, the second polysilicon resistor R4 is connected, and the above formula is equivalent to

Through the improved equivalent circuit, the new equivalent circuit is simulated and compared with the measured data. By fitting and debugging the voltage coefficients VC1, VC2, VC3, and VC4, the effect shown in Figure 7 can be obtained.

As can be seen from FIG7 , the simulation results (solid line) and the measured values (dotted line) are in good agreement, indicating that the resistance characteristics of this type of asymmetric voltage bias effect can be better improved and described through the improved equivalent circuit.

The above embodiments are merely illustrative of the principles and effects of the present invention, and are not intended to limit the present invention. Any person skilled in the art may modify and alter the above embodiments without violating the spirit and scope of the present invention. Therefore, the scope of protection of the present invention shall be as set forth in the claims.

Claims (4)

1. The utility model provides an asymmetric voltage bias effect's high pressure high resistance polycrystalline silicon resistance model, includes first connecting terminal (N1), second connecting terminal (N2), first parasitic resistance (R1), second parasitic resistance (R2), its characterized in that: the model further comprises a first polysilicon resistor (R3), a second polysilicon resistor (R4), a first controlled switch (SW 1) and a second controlled switch (SW 2), wherein the first connecting terminal (N1), the first parasitic resistor (R1), the first polysilicon resistor (R3), the second polysilicon resistor (R4), the second parasitic resistor (R2) and the second connecting terminal (N2) are sequentially cascaded; the first polysilicon resistor (R3) and the second polysilicon resistor (R4) are used for conducting arrangement in the forward direction or the reverse direction when different voltages are applied to the first connecting terminal (N1) and the second connecting terminal (N2); the first controlled switch (SW 1) and the second controlled switch (SW 2) are used to selectively access the first polysilicon resistor (R3) or the second polysilicon resistor (R4) when different voltages are applied to the first connection terminal (N1) and the second connection terminal (N2).

2. The asymmetric voltage bias effect high voltage high resistance polysilicon resistor model of claim 1, wherein: the first controlled switch (SW 1) is connected in parallel with a first polysilicon resistor (R3), and the second controlled switch (SW 2) is connected in parallel with a second polysilicon resistor (R4).

3. The asymmetric voltage bias effect high voltage high resistance polysilicon resistor model of claim 2, wherein: when the voltage of the first connecting terminal (N1) is larger than that of the second connecting terminal (N2), the first controlled switch (SW 1) is set to be in an on state, the second controlled switch (SW 2) is set to be in an off state, and the second polysilicon resistor (R4) is connected.

4. A high voltage high resistance polysilicon resistor model with asymmetric voltage bias effect as set forth in claim 3, wherein: when the voltage of the second connection terminal (N2) is larger than that of the first connection terminal (N1), the second controlled switch (SW 2) is in an on state, the first controlled switch (SW 1) is in an off state, and the first polysilicon resistor (R3) is connected.