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CN112615541A - Bus type energy storage element equalization circuit, system and method based on zero-current PWM bidirectional DC-DC CUK converter - Google Patents

Bus type energy storage element equalization circuit, system and method based on zero-current PWM bidirectional DC-DC CUK converter Download PDF

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CN112615541A
CN112615541A CN202011564219.6A CN202011564219A CN112615541A CN 112615541 A CN112615541 A CN 112615541A CN 202011564219 A CN202011564219 A CN 202011564219A CN 112615541 A CN112615541 A CN 112615541A
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power switch
resonant
capacitor
inductor
current
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CN112615541B (en
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凌睿
何欣驰
夏增豪
易琪淋
王攀
刘姝
邓策亮
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Chongqing University
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    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M3/00—Conversion of DC power input into DC power output
    • H02M3/02—Conversion of DC power input into DC power output without intermediate conversion into AC
    • H02M3/04—Conversion of DC power input into DC power output without intermediate conversion into AC by static converters
    • H02M3/10—Conversion of DC power input into DC power output without intermediate conversion into AC by static converters using discharge tubes with control electrode or semiconductor devices with control electrode
    • H02M3/145—Conversion of DC power input into DC power output without intermediate conversion into AC by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal
    • H02M3/155—Conversion of DC power input into DC power output without intermediate conversion into AC by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only
    • H02M3/156—Conversion of DC power input into DC power output without intermediate conversion into AC by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only with automatic control of output voltage or current, e.g. switching regulators
    • H02M3/158—Conversion of DC power input into DC power output without intermediate conversion into AC by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only with automatic control of output voltage or current, e.g. switching regulators including plural semiconductor devices as final control devices for a single load
    • H02M3/1584—Conversion of DC power input into DC power output without intermediate conversion into AC by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only with automatic control of output voltage or current, e.g. switching regulators including plural semiconductor devices as final control devices for a single load with a plurality of power processing stages connected in parallel
    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02J—CIRCUIT ARRANGEMENTS OR SYSTEMS FOR SUPPLYING OR DISTRIBUTING ELECTRIC POWER; SYSTEMS FOR STORING ELECTRIC ENERGY
    • H02J7/00—Circuit arrangements for charging or depolarising batteries or for supplying loads from batteries
    • H02J7/0013—Circuit arrangements for charging or depolarising batteries or for supplying loads from batteries acting upon several batteries simultaneously or sequentially
    • H02J7/0014—Circuits for equalisation of charge between batteries
    • H02J7/0016—Circuits for equalisation of charge between batteries using shunting, discharge or bypass circuits
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02B—CLIMATE CHANGE MITIGATION TECHNOLOGIES RELATED TO BUILDINGS, e.g. HOUSING, HOUSE APPLIANCES OR RELATED END-USER APPLICATIONS
    • Y02B70/00—Technologies for an efficient end-user side electric power management and consumption
    • Y02B70/10—Technologies improving the efficiency by using switched-mode power supplies [SMPS], i.e. efficient power electronics conversion e.g. power factor correction or reduction of losses in power supplies or efficient standby modes

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  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Dc-Dc Converters (AREA)

Abstract

本发明提出了一种基于零电流PWM双向DC‑DC CUK变换器总线式储能元件均衡电路、系统及方法，包括：第一均衡电路正极输出端连接均衡总线正极端，第一均衡电路负极输出端连接均衡总线负极端，第二均衡电路正极输出端连接均衡总线正极端，第二均衡电路负极输出端连接均衡总线负极端，第N均衡电路正极输出端连接均衡总线正极端，第N均衡电路负极输出端连接均衡总线负极端，所述N为正整数。通过在均衡总线中使用均衡电路，实现了能量在总线中的平衡，使均衡总线系统运行更加稳定、更加流畅，能量损耗更小。

Figure 202011564219

The invention proposes a zero-current PWM bidirectional DC-DC CUK converter bus-type energy storage element equalization circuit, system and method, including: a positive output end of a first equalizing circuit is connected to a positive terminal of the equalizing bus, and a negative output of the first equalizing circuit is output The terminal is connected to the negative terminal of the balance bus, the positive output terminal of the second balance circuit is connected to the positive terminal of the balance bus, the negative output terminal of the second balance circuit is connected to the negative terminal of the balance bus, the positive output terminal of the Nth balance circuit is connected to the positive terminal of the balance bus, and the Nth balance circuit is connected to the positive terminal of the balance bus. The negative output terminal is connected to the negative terminal of the balanced bus, and the N is a positive integer. By using the equalizing circuit in the equalizing bus, the balance of energy in the bus is realized, so that the balanced bus system runs more stably and smoothly, and the energy loss is smaller.

Figure 202011564219

Description

Bus type energy storage element equalization circuit, system and method based on zero-current PWM bidirectional DC-DC CUK converter
Technical Field
The invention relates to the field of electronic circuits, in particular to a bus type energy storage element equalization circuit, system and method based on a zero-current PWM bidirectional DC-DC CUK converter.
Background
The direct current converter generally adopts a PWM control mode, the switching tube works in a hard switching state, and the bidirectional DC-DC CUK converter is a typical direct current converter, is widely applied to a bus type energy storage element equalization circuit, and has a structure shown in FIG. 10. Since the actual switching transistor is not an ideal device, the voltage of the switch does not immediately drop to zero at the time of switching on, but has a fall time, and its current does not immediately rise to the load current, and also has a rise time. During this time, there is an overlap between the current and voltage, resulting in losses known as turn-on losses. When the switch tube is turned off, the voltage of the switch tube does not immediately rise from zero to the power supply voltage, but has a rise time, and the current thereof does not immediately drop to zero and also has a fall time. During this time, there is also an overlap between the current and voltage, creating losses known as turn-off losses. The switching-on loss and the switching-off loss are called as switching losses together, under a certain condition, the switching loss of a switching tube in each switching period is constant, the total switching loss of a converter is in direct proportion to the switching frequency, the higher the switching frequency is, the larger the total switching loss is, the lower the efficiency of the converter is, and the lower the balance efficiency of the bus type energy storage element balance system is further caused. The presence of the switch therefore limits the increase in the switching frequency of the converter, and hence the miniaturization and lightening of the converter and of the equalizing system.
Disclosure of Invention
The invention aims to at least solve the technical problems in the prior art, and particularly innovatively provides a bus type energy storage element balancing circuit, a balancing system and a method based on a zero-current PWM bidirectional DC-DC CUK converter.
In order to achieve the above object, the present invention provides a bus type energy storage element equalization circuit based on a zero current PWM bidirectional DC-DC CUK converter, comprising:
the first inductor, the fourth inductor, the first a capacitor, the first b capacitor, the second capacitor, the first power switch, the second power switch, the first auxiliary switch, the first resonance inductor, the second resonance inductor and the first resonance capacitor;
one end of a first inductor is connected with the anode of an energy storage element, the other end of the first inductor is connected with the drain of a first power switch, one end of a first resonance capacitor is connected with the drain of a first auxiliary switch, the other end of the first resonance capacitor is connected with the cathode of the energy storage element, the other end of the first resonance capacitor is also connected with the source of the first power switch, one end of the first resonance inductor is connected with the drain of the first auxiliary switch, one end of a first a capacitor is connected with the source of the first auxiliary switch, the other end of the first a capacitor is connected with one end of a second resonance inductor, the other end of the second resonance inductor is connected with the source of a second power switch, one end of a first b capacitor is connected with the source of the first power switch, the other end of the first b capacitor is connected with the drain of the second power switch, one end of the second capacitor is connected with the source of the second power switch, and, and the other end of the fourth inductor is connected with the drain electrode of the second power switch.
Preferably, the method further comprises the following steps: a first diode, a second diode, a first resonant diode; the positive electrode of the first diode is connected with the source electrode of the first power switch, the negative electrode of the first diode is connected with the drain electrode of the first power switch, the positive electrode of the second diode is connected with the source electrode of the second power switch, the negative electrode of the second diode is connected with the drain electrode of the second power switch, the positive electrode of the first resonance diode is connected with the source electrode of the first auxiliary switch, and the negative electrode of the first resonance diode is connected with the drain electrode of the first auxiliary switch.
Preferably, the method further comprises the following steps: the second inductance is set to be a constant value,
one end of the second inductor is connected with the negative electrode of the power supply, and the other end of the second inductor is connected with the source electrode of the first power switch.
Preferably, the method further comprises the following steps: the third inductance is set at the first end of the first inductance,
one end of the third inductor is connected with a source electrode of the second power switch, and the other end of the third inductor is connected with one end of the second capacitor.
Preferably, the energy storage element comprises a battery or a super capacitor.
The invention also discloses a bus type energy storage element balancing system based on the zero-current PWM bidirectional DC-DC CUK converter, which comprises the following components: the positive output end of the first equalizing circuit is connected with the positive end of the equalizing bus, the negative output end of the first equalizing circuit is connected with the negative end of the equalizing bus, the positive output end of the second equalizing circuit is connected with the positive end of the equalizing bus, the negative output end of the second equalizing circuit is connected with the negative end of the equalizing bus, the positive output end of the Nth equalizing circuit is connected with the positive end of the equalizing bus, the negative output end of the Nth equalizing circuit is connected with the negative end of the equalizing bus, and N is a positive integer.
The invention also discloses a working method of the bus type energy storage element equalizing circuit based on the zero-current PWM bidirectional DC-DC CUK converter, which comprises the following steps:
the equalizing circuit is divided into six stages when supplying power from the left side to the right side,
s1, in the stage of t0-t1, the first auxiliary switch and the first power switch are both turned off, and the input current flows through the first resonant inductor and the second resonant inductor, -iLr1＝iLr2＝Ii，
Wherein iLr1And iLr1Respectively representing the currents through the first and second resonant inductances, IiRepresenting the input current, which can be considered as a constant value when the first inductance value is properly selected;
both the input current and the output current flow through a freewheeling diode, i, of the second power switchD2＝Ii+Io；
Wherein iD2Representing the current flowing through a freewheeling diode of the second power switch, IoThe output current is represented, and when the fourth inductance value is properly selected, the output current can be regarded as a fixed value;
when the first power switch is switched from off to on, the stage is finished;
s2, at the stage of t1-t2, the first power switch is turned on, the first auxiliary switch is kept turned off, the current flowing through the first resonant inductor and the second resonant inductor is linearly reduced from the input current value under the action of the first a capacitor and the first b capacitor, and is reversely increased to the output current value after being reduced to zero,
Figure BDA0002861163850000031
wherein L isr1And Lr2Respectively representing a first and a second resonant inductance value, UCaAnd UCbRespectively representing the terminal voltage of the first a capacitor and the terminal voltage of the first b capacitor, when the first a capacitance value and the first b capacitance value are properly selected, U is setCaAnd UCbCan be regarded as constant, and UCa+UCb＝Ui+Uo，UiAnd UoRespectively representing the input voltage and the output voltage of the equalizing circuit, iS1Representing the current, R, flowing through the first power switchS1Representing the on-resistance of the first power switch, iD2Representing the current through the second diode, RD2Representing the on-resistance of a freewheeling diode of the second power switch; neglecting the tube voltage drop, solving the equation (1) to obtain,
Figure BDA0002861163850000041
Figure BDA0002861163850000042
where t e [ t ∈ ]1,t2]When i isS1＝Ii+IoWhen the current flowing through the freewheeling diode of the second power switch is cut off automatically, and the stage is finished;
s3, in the stage of t2-t3, the first power switch keeps on, the first auxiliary switch keeps off, the output current flows through the first resonance inductor and the second resonance inductor, iLr1＝-iLr2＝Io，iLr1Indicating flow through firstCurrent of resonant inductor, iLr2Representing the current through the second resonant inductor,
both the input current and the output current flow through a first power switch, iS1＝Ii+Io；iS1Representing the current flowing through the first power switch,
when the first auxiliary switch is switched from off to on, the circuit enters a resonance mode from a PWM mode, and the stage is finished;
s4, in the stage of t3-t4, the first power switch is kept on, the first auxiliary switch is turned on to make the circuit generate resonance, a condition is created for the soft turn-off of the first power switch, the first resonance inductor, the first resonance capacitor, the first power switch and the first auxiliary switch form a first resonance loop, and meanwhile the second resonance inductor, the first resonance capacitor, the first a capacitor, the first b capacitor, the second diode and the first auxiliary switch also form a second resonance loop,
Figure BDA0002861163850000043
Figure BDA0002861163850000044
wherein u isCrRepresenting the voltage at the first resonant capacitor terminal, CrRepresenting a first resonance capacitance value, iSrRepresenting the value of the current, R, flowing through the first auxiliary switchSrRepresenting the on-resistance of the first auxiliary switch; neglecting the tube pressure drop, solving the equations (3) and (4) to obtain,
Figure BDA0002861163850000051
Figure BDA0002861163850000052
Figure BDA0002861163850000053
where t e [ t ∈ ]3,t4]，ω1Representing the overall equivalent resonant angular frequency of the two resonant tanks,
Figure BDA0002861163850000054
UCr0the terminal voltage of the first resonance capacitor at the moment t 3;
when the current flowing through the second diode resonates back to zero from a positive value, the second resonant circuit stops resonating, and the stage is finished;
s5 at t4-t5, the first power switch and the first auxiliary switch are kept on, the second resonant circuit stops resonating, the first resonant circuit continues resonating,
Figure BDA0002861163850000055
Figure BDA0002861163850000056
neglecting the tube pressure drop, solving the equations (8) and (9) to obtain,
Figure BDA0002861163850000057
uCr(t)＝(Ii+Io-IS11)Z1sin[ω2(t-t4)]+UCr1cos[ω2(t-t4)] (11)
where t e [ t ∈ ]4,t5]，ω2Representing the resonance angular frequency of the first resonant tank,
Figure BDA0002861163850000058
Z1representing the impedance of the first resonant tank,
Figure BDA0002861163850000059
UCr1terminal voltage, I, of the first resonant capacitor at time t4S11Current at time t4 for the first power switch;
when i isS1<When 0, the first power switch is turned off to realize zero-current switching of the first power switch, and when i isSr<When 0, the first auxiliary switch is turned off, so that zero-current switching of the first auxiliary switch can be realized;
s6, during the period t5-t6, the first power switch is turned off, the first resonant tank stops the resonant behavior, the second resonant tank starts resonating again,
Figure BDA0002861163850000061
Figure BDA0002861163850000062
neglecting the tube pressure drop, solving the equations (12) and (13) to obtain,
Figure BDA0002861163850000063
uCr(t)＝UCa+UCb+(Ii+Io)Z2sin[ω3(t-t5)]+[UCr2-(UCa+UCb)]cos[ω3(t-t4)] (15)
where t e [ t ∈ ]5,t6]，ω3Representing the resonance angular frequency of the second resonant tank,
Figure BDA0002861163850000064
Z2representing the impedance of the second resonant tank,
Figure BDA0002861163850000065
UCr2the terminal voltage of the first resonance capacitor at the moment t 5;
when i isD2＝Ii+IoWhen the second resonant circuit stops resonating, the phase is finished, the circuit enters the PWM mode from the resonant mode, the phase is finished, and the first phase is returned.
The input voltage to output voltage relationship is derived as follows,
the average voltage value of the fourth inductor is zero in one period, so the average value of the voltage at the second power switch end in one period is equal to the output voltage,
Figure BDA0002861163850000066
wherein, TsRepresenting a PWM control period, wherein the voltage of a second power switch end is zero in a first stage (t0-t1), a second stage (t1-t2), a fourth stage (t3-t4) and a sixth stage (t5-t6), the voltage of the second power switch end in the third stage (t2-t3) is the sum of the voltage of a first a capacitor and the voltage of a first b capacitor, the voltage of the second power switch end in the fifth stage (t4-t5) is the difference value of the voltage of a first resonant capacitor and the sum of the voltage of the first a capacitor and the voltage of the first b capacitor, and the current of a first resonant inductor is near the maximum value at the moment of t4, the voltage of the second resonant capacitor at the moment is approximately equal to zero, U is equal to zero at the moment of t 35Cr10, from which it can be obtained,
Figure BDA0002861163850000071
wherein, Delta T3And Δ T5Respectively representing the time intervals, T, of the third and fifth phasesLCIs the resonance period of the first resonant tank,
Figure BDA0002861163850000072
ω2ΔT5＝ω2(t5-t4) Approximately pi, under the condition of realizing soft switching, the peak value of the current of the first power switch is generally expected to be as small as possible, so that I is providedS11≈2(Ii+Io) (ii) a The output voltage and can be obtained from equation (17)The relationship of the input voltage(s) is,
Figure BDA0002861163850000073
as can be seen from equation (18), when the circuit parameters are determined, the output voltage can be changed by changing the PWM period and the third stage time.
In summary, due to the adoption of the technical scheme, the invention has the beneficial effects that:
1 the circuit introduces a resonance circuit to realize the soft switching of a switching tube and reduce the switching loss;
2 the converter can adopt constant frequency control, namely PWM control;
3 the circuit can be applied to a higher-frequency switching tube to realize the miniaturization and the light weight of a converter and an equalizing system;
4 the two-way flow analysis of the circuit energy is consistent;
5 the circuit can be used in a balance network, each balance circuit can realize independent work, and mutual interference is small.
Additional aspects and advantages of the invention will be set forth in part in the description which follows and, in part, will be obvious from the description, or may be learned by practice of the invention.
Drawings
The above and/or additional aspects and advantages of the present invention will become apparent and readily appreciated from the following description of the embodiments, taken in conjunction with the accompanying drawings of which:
FIG. 1 is a schematic diagram of a bus type energy storage element equalization system connection based on a zero current PWM bidirectional DC-DC CUK converter according to the present invention;
FIG. 2 is a schematic diagram of a bus type energy storage element equalization circuit connection of the zero current PWM-based bidirectional DC-DC CUK converter according to the present invention;
FIG. 3 is a first stage of operation of a bus type energy storage element equalization circuit based on a zero current PWM bidirectional DC-DC CUK converter according to the present invention;
FIG. 4 is a second phase of operation of the bus type energy storage element equalization circuit based on the zero current PWM bidirectional DC-DC CUK converter of the present invention;
FIG. 5 is a third stage of operation of the bus type energy storage element equalization circuit based on the zero current PWM bidirectional DC-DC CUK converter according to the present invention;
FIG. 6 shows a fourth phase of operation of the bus type energy storage element equalization circuit based on the zero current PWM bidirectional DC-DC CUK converter according to the present invention;
FIG. 7 is a fifth phase of operation of the bus type energy storage element equalization circuit based on the zero current PWM bidirectional DC-DC CUK converter according to the present invention;
FIG. 8 shows a sixth phase of operation of the bus based energy storage component equalization circuit of the present invention based on a zero current PWM bi-directional DC-DC CUK converter;
FIG. 9 is a timing diagram of a bus based energy storage element equalization circuit for a zero current PWM bi-directional DC-DC CUK converter;
FIG. 10 is a schematic diagram of a bus type energy storage element equalization circuit connection of the zero current PWM based bidirectional DC-DC CUK converter of the present invention;
FIG. 11 is a schematic diagram of a bus type energy storage element equalization circuit connection of the zero current PWM based bidirectional DC-DC CUK converter of the present invention;
FIG. 12 is a schematic diagram of a bus type energy storage element equalization circuit connection of the zero current PWM based bidirectional DC-DC CUK converter of the present invention;
FIG. 13 is a schematic diagram of a bus type energy storage element equalization circuit connection of the zero current PWM based bidirectional DC-DC CUK converter of the present invention;
FIG. 14 is a schematic diagram of a bus type energy storage element equalization circuit connection of the zero current PWM based bidirectional DC-DC CUK converter of the present invention;
FIG. 15 is a schematic diagram of a bus type energy storage element equalization circuit connection of the zero current PWM based bidirectional DC-DC CUK converter of the present invention;
FIG. 16 is a schematic diagram of a bus type energy storage element equalization circuit connection of the zero current PWM based bidirectional DC-DC CUK converter of the present invention;
FIG. 17 is a schematic diagram of the bus type energy storage element equalization circuit connection of the zero current PWM based bidirectional DC-DC CUK converter.
Detailed Description
Reference will now be made in detail to embodiments of the present invention, examples of which are illustrated in the accompanying drawings, wherein like or similar reference numerals refer to the same or similar elements or elements having the same or similar function throughout. The embodiments described below with reference to the accompanying drawings are illustrative only for the purpose of explaining the present invention, and are not to be construed as limiting the present invention.
As shown in fig. 1, the present invention provides a bus type energy storage element equalization system based on a zero current PWM bidirectional DC-DC CUK converter, which is characterized by comprising: the positive output end of the first equalizing circuit is connected with the positive end of the equalizing bus, the negative output end of the first equalizing circuit is connected with the negative end of the equalizing bus, the positive output end of the second equalizing circuit is connected with the positive end of the equalizing bus, the negative output end of the second equalizing circuit is connected with the negative end of the equalizing bus, the positive output end of the Nth equalizing circuit is connected with the positive end of the equalizing bus, the negative output end of the Nth equalizing circuit is connected with the negative end of the equalizing bus, and N is a positive integer.
By using the converter in the balanced bus, the balance of energy in the bus is realized, so that the balanced bus system runs more stably and smoothly, and the energy loss is less.
As shown in fig. 2 and 10, the present invention provides a bus type energy storage element equalization circuit based on a zero current PWM bidirectional DC-DC CUK converter, including: the first inductor, the fourth inductor, the first a capacitor, the first b capacitor, the second capacitor, the first power switch, the second power switch, the first auxiliary switch, the first resonance inductor, the second resonance inductor and the first resonance capacitor;
one end of a first inductor is connected with the anode of an energy storage element, the other end of the first inductor is connected with the drain of a first power switch, one end of a first resonance capacitor is connected with the drain of a first auxiliary switch, the other end of the first resonance capacitor is connected with the cathode of the energy storage element, the other end of the first resonance capacitor is also connected with the source of the first power switch, one end of the first resonance inductor is connected with the drain of the first auxiliary switch, one end of a first a capacitor is connected with the source of the first auxiliary switch, the other end of the first a capacitor is connected with one end of a second resonance inductor, the other end of the second resonance inductor is connected with the source of a second power switch, one end of a first b capacitor is connected with the source of the first power switch, the other end of the first b capacitor is connected with the drain of the second power switch, one end of the second capacitor is connected with the source of the second power switch, and, and the other end of the fourth inductor is connected with the drain electrode of the second power switch.
The beneficial effects of the above technical scheme are: a controllable resonant circuit is added to the circuit, soft switching of all switch tubes is achieved, the overall efficiency and energy density of the equalizing circuit are improved, and the bidirectional flow analysis of the circuit energy is consistent.
The bus type energy storage element equalization circuit based on the zero-current PWM bidirectional DC-DC CUK converter preferably further comprises: a first diode, a second diode, a first resonant diode; the positive electrode of the first diode is connected with the source electrode of the first power switch, the negative electrode of the first diode is connected with the drain electrode of the first power switch, the positive electrode of the second diode is connected with the source electrode of the second power switch, the negative electrode of the second diode is connected with the drain electrode of the second power switch, the positive electrode of the first resonance diode is connected with the source electrode of the first auxiliary switch, and the negative electrode of the first resonance diode is connected with the drain electrode of the first auxiliary switch.
The beneficial effects of the above technical scheme are: the first diode, the second diode and the first resonant diode can improve the switching speed of the corresponding power switch.
The bus type energy storage element equalization circuit based on the zero-current PWM bidirectional DC-DC CUK converter preferably further comprises: the second inductance is set to be a constant value,
one end of the second inductor is connected with the negative electrode of the power supply, and the other end of the second inductor is connected with the source electrode of the first power switch.
The beneficial effects of the above technical scheme are: the circuit can be applied to a balance network, each balance circuit can work independently, and mutual interference is small.
The bus type energy storage element equalization circuit based on the zero-current PWM bidirectional DC-DC CUK converter preferably further comprises: the third inductance is set at the first end of the first inductance,
one end of the third inductor is connected with a source electrode of the second power switch, and the other end of the third inductor is connected with one end of the second capacitor.
The beneficial effects of the above technical scheme are: the circuit can be applied to a balance network, each balance circuit can work independently, and mutual interference is small.
The power supply from the left side to the right side of the circuit is the same as the power supply from the right side to the left side in principle. The circuit is divided into six stages from the left side to the right side for power supply (the second power switch is constantly turned off),
FIG. 3 illustrates a first phase (t0-t1) of the operation of the equalization circuit;
at this stage, the first auxiliary switch and the first power switch are both turned off, and the input current flows through the first resonant inductor and the second resonant inductor, -iLr1＝iLr2＝Ii，
Wherein iLr1And iLr1Respectively representing the currents through the first and second resonant inductances, IiRepresenting the input current, which can be considered as a constant value when the first inductance value is properly selected;
both the input current and the output current flow through a freewheeling diode, i, of the second power switchD2＝Ii+Io；
Wherein iD2Representing the current flowing through a freewheeling diode of the second power switch, IoThe output current is represented, and when the fourth inductance value is properly selected, the output current can be regarded as a fixed value;
when the first power switch is switched from off to on, the stage is finished;
FIG. 4 is a second phase of operation of the equalization circuit (t1-t 2);
at this stage, the first power switch is turned on, the first auxiliary switch is kept turned off, the current flowing through the first resonant inductor and the second resonant inductor is linearly reduced from the input current value under the action of the first a capacitor and the first b capacitor, and is reversely increased to the output current value after being reduced to zero,
Figure BDA0002861163850000121
wherein L isr1And Lr2Respectively representing a first and a second resonant inductance value, UCaAnd UCaRespectively representing the terminal voltage of the first a capacitor and the terminal voltage of the first b capacitor, when the first a capacitance value and the first b capacitance value are properly selected, U is setCaAnd UCaCan be regarded as constant, and UCa+UCb＝Ui+Uo，UiAnd UoRespectively representing the input voltage and the output voltage of the equalizing circuit, iS1Representing the current, R, flowing through the first power switchS1Representing the on-resistance, R, of the first power switchD2Representing the on-resistance of a freewheeling diode of the second power switch; neglecting the tube voltage drop, solving the equation (1) to obtain,
Figure BDA0002861163850000122
Figure BDA0002861163850000123
where t e [ t ∈ ]1,t2]When i isS1＝Ii+IoWhen the current flowing through the freewheeling diode of the second power switch is cut off automatically, and the stage is finished;
FIG. 5 is a third stage (t2-t3) of operation of the equalization circuit;
at this stage, the first power switch is kept on, the first auxiliary switch is kept off, and the output current flows through the first resonant inductor and the second resonant inductor iLr1＝-iLr2＝Io，
Both the input current and the output current flow through a first power switch, iS1＝Ii+Io；
When the first auxiliary switch is switched from off to on, the circuit enters a resonance mode from a PWM mode, and the stage is finished;
FIG. 6 is a fourth stage (t3-t4) of operation of the equalization circuit;
at this stage, the first power switch is kept on, the first auxiliary switch is turned on to make the circuit generate resonance, thereby creating conditions for soft turn-off of the first power switch, the first resonance inductor, the first resonance capacitor, the first power switch and the first auxiliary switch form a first resonance loop, and simultaneously the second resonance inductor, the first resonance capacitor, the first a capacitor, the first b capacitor, the second diode and the first auxiliary switch also form a second resonance loop,
Figure BDA0002861163850000131
Figure BDA0002861163850000132
wherein u isCrRepresenting the voltage at the first resonant capacitor terminal, CrRepresenting a first resonance capacitance value, iSrRepresenting the value of the current, R, flowing through the first auxiliary switchSrRepresenting the on-resistance of the first auxiliary switch; neglecting the tube pressure drop, solving the equations (3) and (4) to obtain,
Figure BDA0002861163850000133
Figure BDA0002861163850000134
Figure BDA0002861163850000135
where t e [ t ∈ ]3,t4]，
Figure BDA0002861163850000136
Le1＝Lr1||Lr2，
Figure BDA0002861163850000137
Figure BDA0002861163850000138
UCr0The terminal voltage of the first resonance capacitor at the moment t 3;
when the current flowing through the second diode resonates back to zero from a positive value, the second resonant circuit stops resonating, and the stage is finished;
FIG. 7 is a fifth stage (t4-t5) of operation of the equalization circuit;
at this stage, the first power switch and the first auxiliary switch are kept on, the second resonant circuit stops resonating, the first resonant circuit continues resonating,
Figure BDA0002861163850000141
Figure BDA0002861163850000142
neglecting the tube pressure drop, solving the equations (8) and (9) to obtain,
Figure BDA0002861163850000143
uCr(t)＝(Ii+Io-IS11)Z5sin[ω2(t-t4)]+UCr1cos[ω2(t-t4)] (11)
where t e [ t ∈ ]4,t5]，
Figure BDA0002861163850000144
UCr1IS11 IS the current of the first power switch at the time t4, which IS the terminal voltage of the first resonant capacitor at the time t 4;
when i isS1<When 0, the first power switch is turned off to realize zero-current switching of the first power switch, and when i isSr<When 0, the first auxiliary switch is turned off, so that zero-current switching of the first auxiliary switch can be realized;
FIG. 8 is a sixth phase (t5-t6) of operation of the equalization circuit;
at this stage, the first power switch is turned off, the first resonant tank stops its resonant behavior, the second resonant tank starts resonating again,
Figure BDA0002861163850000145
Figure BDA0002861163850000146
neglecting the tube pressure drop, solving the equations (12) and (13) to obtain,
Figure BDA0002861163850000147
uCr(t)＝UCa+UCb+(Ii+Io)Z6sin[ω3(t-t5)]+[UCr2-(UCa+UCb)]cos[ω3(t-t4)] (15)
where t e [ t ∈ ]5,t6]，
Figure BDA0002861163850000151
UCr2The terminal voltage of the first resonance capacitor at the moment t 5;
when i isD2＝Ii+IoWhen the second resonant circuit stops resonating, the phase is finished, the circuit enters the PWM mode from the resonant mode, the phase is finished, and the first phase is returned.
The input voltage to output voltage relationship is derived as follows,
the average voltage value of the fourth inductor is zero in one period, so the average value of the voltage at the second power switch end in one period is equal to the output voltage,
Figure BDA0002861163850000152
the voltage of the second power switch in the first stage (t0-t1), the second stage (t1-t2), the fourth stage (t3-t4) and the sixth stage (t5-t6) is zero, the voltage of the second power switch in the third stage (t2-t3) is the sum of the terminal voltages of the first a capacitor and the first b capacitor, the voltage of the second power switch in the fifth stage (t4-t5) is the difference value of the terminal voltage of the first resonant capacitor and the sum of the terminal voltages of the first a capacitor and the first b capacitor, and at the time t4, the current of the first resonant inductor is near the maximum value, the terminal voltage of the second resonant capacitor at the time is approximately equal to zero, the U-shaped resonant capacitor is approximately equal to zero, and the U-shapedCr10, from which it can be obtained,
Figure BDA0002861163850000153
wherein, Delta T3And Δ T5Respectively representing the time intervals, T, of the third and fifth phasesLCIs the resonance period of the first resonant tank,
Figure BDA0002861163850000154
ωΔT5approximately equals pi, under the condition of realizing soft switching, the peak-to-peak value of the first power switch current is generally expected to be as small as possible, so I is providedS11≈2(Ii+Io) (ii) a The output voltage versus input voltage can be derived from equation (17),
Figure BDA0002861163850000155
as can be seen from equation (18), when the circuit parameters are determined, the output voltage can be changed by changing the PWM period and the third-stage time;
fig. 9 is a timing diagram of a bus type energy storage element equalizing circuit based on a zero-current PWM bidirectional DC-DC CUK converter, and the equalizing circuit is controlled by the timing diagram.
FIG. 10 is a schematic diagram of a bus type energy storage element equalization circuit connection of a zero current PWM based bidirectional DC-DC CUK converter according to an embodiment of the present invention;
FIG. 11 is a schematic diagram of a bus type energy storage element equalization circuit connection of a zero current PWM based bidirectional DC-DC CUK converter according to an embodiment of the present invention;
one end of a second inductor is connected with the negative electrode of the energy storage element, the other end of the second inductor is connected with the source electrode of a first power switch, one end of a first resonance inductor is connected with the source electrode of a first auxiliary switch, the other end of the first resonance inductor is connected with the positive electrode of the energy storage element, the other end of the first resonance inductor is also connected with the drain electrode of the first power switch, one end of a first capacitor is connected with the source electrode of the first power switch, the other end of the first a capacitor is connected with one end of a second resonance inductor, the other end of the second resonance inductor is connected with the source electrode of a second power switch, one end of a first b capacitor is connected with the source electrode of the first power switch, one end of a second capacitor is connected with the drain electrode of the second power switch, and the other end of the second capacitor is connected with one end of a third inductor, and the other end of the third inductor is connected with the source electrode of the second power switch.
FIG. 12 is a schematic diagram of a bus based energy storage component equalization circuit connection for a zero current PWM bi-directional DC-DC CUK converter in accordance with an embodiment of the present invention;
one end of a first inductor is connected with the anode of an energy storage element, the other end of the first inductor is connected with the drain of a first power switch, one end of a first resonance capacitor is connected with the drain of a first auxiliary switch, the other end of the first resonance capacitor is connected with the cathode of the energy storage element, the other end of the first resonance capacitor is also connected with the source of the first power switch, one end of the first resonance inductor is connected with the source of the first auxiliary switch, one end of a first a capacitor is connected with the source of the first auxiliary switch, the other end of the first a capacitor is connected with one end of a second resonance inductor, the other end of the second resonance inductor is connected with the source of a second power switch, one end of a first b capacitor is connected with the source of the first power switch, one end of a second capacitor is connected with the drain of the second power switch, and the other end of the second capacitor is connected with one end of a third inductor, and the other end of the third inductor is connected with the source electrode of the second power switch.
FIG. 13 is a schematic diagram of a bus based energy storage component equalization circuit connection for a zero current PWM bi-directional DC-DC CUK converter in accordance with an embodiment of the present invention;
one end of a second inductor is connected with the negative electrode of the energy storage element, the other end of the first inductor is connected with the source electrode of a first power switch, one end of a first resonance inductor is connected with the source electrode of a first auxiliary switch, the other end of the first resonance inductor is connected with the positive electrode of the energy storage element, the other end of the first resonance inductor is also connected with the drain electrode of the first power switch, one end of a first capacitor is connected with the source electrode of the first power switch, the other end of the first a capacitor is connected with one end of a second resonance inductor, the other end of the second resonance inductor is connected with the source electrode of a second power switch, one end of a first b capacitor is connected with the source electrode of the first power switch, one end of a second capacitor is connected with the source electrode of the second power switch, and the other end of the second capacitor is connected with one end of a fourth inductor, and the other end of the fourth inductor is connected with the drain electrode of the second power switch.
FIG. 14 is a schematic diagram of a bus type energy storage element equalization circuit connection of a zero current PWM based bidirectional DC-DC CUK converter according to an embodiment of the present invention;
one end of a first inductor is connected with the anode of an energy storage element, the other end of the first inductor is connected with the drain electrode of a first power switch, one end of a second inductor is connected with the cathode of the energy storage element, the other end of the first inductor is connected with the source electrode of the first power switch, one end of a first resonance inductor is connected with the source electrode of the first auxiliary switch, the other end of the first resonance inductor is connected with the drain electrode of the first power switch, one end of a first a capacitor is connected with the source electrode of the first auxiliary switch, the other end of the first a capacitor is connected with one end of a second resonance inductor, the other end of the second resonance inductor is connected with the source electrode of the second power switch, one end of a first b capacitor is connected with the drain electrode of the second power switch, the other end of the first b capacitor is connected with the source electrode of the first power switch, and one end of the second capacitor is connected with the, the other end of the second capacitor is connected with one end of a third inductor, and the other end of the third inductor is connected with a source electrode of a second power switch.
FIG. 15 is a schematic diagram of a bus based energy storage component equalization circuit connection for a zero current PWM bi-directional DC-DC CUK converter in accordance with an embodiment of the present invention;
one end of a first inductor is connected with the anode of an energy storage element, the other end of the first inductor is connected with the drain electrode of a first power switch, one end of a second inductor is connected with the cathode of the energy storage element, the other end of the first inductor is connected with the source electrode of the first power switch, one end of a first resonance inductor is connected with the source electrode of the first auxiliary switch, the other end of the first resonance inductor is connected with the drain electrode of the first power switch, one end of a first a capacitor is connected with the source electrode of the first auxiliary switch, the other end of the first a capacitor is connected with one end of a second resonance inductor, the other end of the second resonance inductor is connected with the source electrode of the second power switch, one end of a first b capacitor is connected with the drain electrode of the second power switch, the other end of the first b capacitor is connected with the source electrode of the first power switch, and one end of the second capacitor is connected with the, the other end of the second capacitor is connected with one end of a fourth inductor, and the other end of the fourth inductor is connected with the drain electrode of the second power switch.
FIG. 16 is a schematic diagram of a bus based energy storage component equalization circuit connection for a zero current PWM bi-directional DC-DC CUK converter in accordance with an embodiment of the present invention;
one end of a first inductor is connected with the anode of an energy storage element, the other end of the first inductor is connected with the drain of a first power switch, one end of a first resonance capacitor is connected with the drain of a first auxiliary switch, the other end of the first resonance capacitor is connected with the cathode of the energy storage element, the other end of the first resonance capacitor is also connected with the source of the first power switch, one end of the first resonance inductor is connected with the source of the first auxiliary switch, the other end of a first a capacitor is connected with the source of the first auxiliary switch, the other end of the first a capacitor is connected with one end of a second resonance inductor, the other end of the second resonance inductor is connected with the source of a second power switch, one end of a first b capacitor is connected with the drain of the second power switch, the other end of the first b capacitor is connected with the source of the first power switch, one end of a third inductor is connected with the source of the second power switch, the other end of the second capacitor is connected with one end of a fourth inductor, and the other end of the fourth inductor is connected with the drain electrode of the second power switch.
FIG. 17 is a schematic diagram of a bus based energy storage component equalization circuit connection for a zero current PWM bi-directional DC-DC CUK converter in accordance with an embodiment of the present invention;
one end of a second inductor is connected with the negative electrode of the energy storage element, the other end of the first inductor is connected with the source electrode of a first power switch, one end of a first resonance inductor is connected with the source electrode of a first auxiliary switch, the other end of the first resonance inductor is connected with the positive electrode of the energy storage element, the other end of the first resonance inductor is also connected with the drain electrode of the first power switch, one end of a first capacitor is connected with the source electrode of the first power switch, the other end of the first a capacitor is connected with one end of a second resonance inductor, the other end of the second resonance inductor is connected with the source electrode of a second power switch, one end of a first b capacitor is connected with the source electrode of the first power switch, one end of a third inductor is connected with the source electrode of the second power switch, and the other end of the third inductor is connected with one end of the second capacitor, the other end of the second capacitor is connected with one end of a fourth inductor, and the other end of the fourth inductor is connected with the drain electrode of the second power switch.
While embodiments of the invention have been shown and described, it will be understood by those of ordinary skill in the art that: various changes, modifications, substitutions and alterations can be made to the embodiments without departing from the principles and spirit of the invention, the scope of which is defined by the claims and their equivalents.

Claims (7)

1.一种基于零电流PWM双向DC-DC CUK变换器总线式储能元件均衡电路，其特征在于，包括：1. based on zero-current PWM bidirectional DC-DC CUK converter bus type energy storage element equalization circuit, it is characterized in that, comprising: 第一电感、第四电感、第一a电容、第一b电容、第二电容、第一功率开关、第二功率开关、第一辅助开关、第一谐振电感、第二谐振电感、第一谐振电容；The first inductor, the fourth inductor, the first a capacitor, the first b capacitor, the second capacitor, the first power switch, the second power switch, the first auxiliary switch, the first resonant inductor, the second resonant inductor, the first resonant capacitance; 第一电感一端连接储能元件正极，所述第一电感另一端连接第一功率开关漏极，第一谐振电容一端连接第一辅助开关漏极，所述第一谐振电容另一端连接储能元件负极，所述第一谐振电容另一端还连接第一功率开关源极，第一谐振电感一端连接第一功率开关漏极，所述第一谐振电感另一端连接第一辅助开关源极，第一a电容一端连接第一辅助开关源极，所述第一a电容另一端连接第二谐振电感一端，所述第二谐振电感另一端连接第二功率开关源极，第一b电容一端连接第一功率开关源极，所述第一b电容另一端连接第二功率开关的漏极，第二电容一端连接第二功率开关源极，所述第二电容另一端连接第四电感一端，所述第四电感另一端连接第二功率开关漏极。One end of the first inductor is connected to the positive electrode of the energy storage element, the other end of the first inductor is connected to the drain of the first power switch, one end of the first resonant capacitor is connected to the drain of the first auxiliary switch, and the other end of the first resonant capacitor is connected to the energy storage element negative, the other end of the first resonant capacitor is also connected to the source of the first power switch, one end of the first resonant inductor is connected to the drain of the first power switch, the other end of the first resonant inductor is connected to the source of the first auxiliary switch, the first One end of the a capacitor is connected to the first auxiliary switch source, the other end of the first a capacitor is connected to one end of the second resonant inductor, the other end of the second resonant inductor is connected to the second power switch source, and one end of the first b capacitor is connected to the first The source of the power switch, the other end of the first b capacitor is connected to the drain of the second power switch, one end of the second capacitor is connected to the source of the second power switch, the other end of the second capacitor is connected to one end of the fourth inductor, the first The other end of the four inductors is connected to the drain of the second power switch. 2.根据权利要求1所述的基于零电流PWM双向DC-DC CUK变换器总线式储能元件均衡电路，其特征在于，还包括：第一二极管、第二二极管、第一谐振二极管；所述第一二极管正极连接第一功率开关源极，所述第一二极管负极连接第一功率开关漏极，所述第二二极管正极连接第二功率开关源极，所述第二二极管负极连接第二功率开关漏极，所述第一谐振二极管正极连接第一辅助开关源极，所述第一谐振二极管负极连接第一辅助开关漏极。2. The zero-current PWM bidirectional DC-DC CUK converter bus-type energy storage element equalization circuit according to claim 1, further comprising: a first diode, a second diode, a first resonance a diode; the anode of the first diode is connected to the source of the first power switch, the cathode of the first diode is connected to the drain of the first power switch, the anode of the second diode is connected to the source of the second power switch, The cathode of the second diode is connected to the drain of the second power switch, the anode of the first resonant diode is connected to the source of the first auxiliary switch, and the cathode of the first resonant diode is connected to the drain of the first auxiliary switch. 3.根据权利要求1所述的基于零电流PWM双向DC-DC CUK变换器总线式储能元件均衡电路，其特征在于，还包括：第二电感，3. The zero-current PWM bidirectional DC-DC CUK converter bus-type energy storage element equalization circuit according to claim 1, characterized in that, further comprising: a second inductance, 所述第二电感一端连接电源负极，所述第二电感另一端连接第一功率开关源极。One end of the second inductor is connected to the negative electrode of the power supply, and the other end of the second inductor is connected to the source electrode of the first power switch. 4.根据权利要求1所述的基于零电流PWM双向DC-DC CUK变换器总线式储能元件均衡电路，其特征在于，还包括：第三电感，4. The zero-current PWM bidirectional DC-DC CUK converter bus-type energy storage element equalization circuit according to claim 1, characterized in that, further comprising: a third inductance, 所述第三电感一端连接第二功率开关源极，所述第三电感另一端连接第二电容一端。One end of the third inductor is connected to the source of the second power switch, and the other end of the third inductor is connected to one end of the second capacitor. 5.根据权利要求1所述的基于零电流PWM双向DC-DC CUK变换器总线式储能元件均衡电路，其特征在于，所述储能元件包括电池或者超级电容。5 . The zero-current PWM bidirectional DC-DC CUK converter bus-type energy storage element equalization circuit according to claim 1 , wherein the energy storage element comprises a battery or a super capacitor. 6 . 6.一种基于零电流PWM双向DC-DC CUK变换器总线式储能元件均衡系统，其特征在于，包括：第一均衡电路正极输出端连接均衡总线正极端，第一均衡电路负极输出端连接均衡总线负极端，第二均衡电路正极输出端连接均衡总线正极端，第二均衡电路负极输出端连接均衡总线负极端，第N均衡电路正极输出端连接均衡总线正极端，第N均衡电路负极输出端连接均衡总线负极端，所述N为正整数。6. A bus-type energy storage element balancing system based on a zero-current PWM bidirectional DC-DC CUK converter, characterized in that it comprises: the positive output terminal of the first balancing circuit is connected to the positive terminal of the balancing bus, and the negative output terminal of the first balancing circuit is connected to the positive terminal of the balancing bus. The negative terminal of the balance bus, the positive output terminal of the second balance circuit is connected to the positive terminal of the balance bus, the negative output terminal of the second balance circuit is connected to the negative terminal of the balance bus, the positive output terminal of the Nth balance circuit is connected to the positive terminal of the balance bus, and the negative output terminal of the Nth balance circuit is connected to the positive terminal of the balance bus. The terminal is connected to the negative terminal of the balanced bus, and the N is a positive integer. 7.一种基于零电流PWM双向DC-DC CUK变换器总线式储能元件均衡电路的工作方法，其特征在于，包括：7. a working method based on zero current PWM bidirectional DC-DC CUK converter bus type energy storage element equalization circuit, is characterized in that, comprises: 该均衡电路从左侧向右侧供电时分为六个阶段，The equalization circuit is divided into six stages when power is supplied from the left to the right, S1，在t0-t1的阶段，第一辅助开关、第一功率开关均关断，输入电流流过第一谐振电感和第二谐振电感，-iLr1＝iLr2＝Ii，S1, in the stage of t0-t1, the first auxiliary switch and the first power switch are both turned off, and the input current flows through the first resonant inductor and the second resonant inductor, -i Lr1 =i Lr2 =I i , 其中，iLr1和iLr1分别表示流过第一谐振电感和第二谐振电感的电流，Ii表示输入电流，当第一电感值选择适当时，输入电流可视为定值；Wherein, i Lr1 and i Lr1 represent the current flowing through the first resonant inductor and the second resonant inductor respectively, and I i represent the input current, when the first inductance value is properly selected, the input current can be regarded as a fixed value; 输入电流和输出电流均流过第二功率开关续流二极管，iD2＝Ii+Io；Both the input current and the output current flow through the freewheeling diode of the second power switch, i D2 =I i +I o ; 其中，iD2表示流过第二功率开关续流二极管的电流，Io表示输出电流，当第四电感值选择适当时，输出电流可视为定值；Wherein, i D2 represents the current flowing through the freewheeling diode of the second power switch, I o represents the output current, and when the fourth inductance value is properly selected, the output current can be regarded as a fixed value; 当第一功率开关由关断切换至导通时，此阶段结束；This stage ends when the first power switch is switched from off to on; S2，在t1-t2的阶段，第一功率开关导通，第一辅助开关保持关断，在第一a电容和第一b电容的作用下，流过第一谐振电感和第二谐振电感的电流从输入电流值开始线性减小，减小到零后又反向增加至输出电流值，S2, in the stage of t1-t2, the first power switch is turned on, and the first auxiliary switch is kept off. Under the action of the first a capacitor and the first b capacitor, the power flowing through the first resonant inductor and the second resonant inductor The current decreases linearly from the input current value, decreases to zero and then reversely increases to the output current value,
Figure FDA0002861163840000031
Figure FDA0002861163840000031
 其中Lr1和Lr2分别表示第一谐振电感值和第二谐振电感值，UCa和UCb分别表示第一a电容端电压和第一b电容端电压，当第一a电容值和第一b电容值选取适当，UCa和UCb可视为定值，且UCa+UCb＝Ui+Uo，Ui和Uo分别表示均衡电路的输入电压和输出电压，iS1表示流过第一功率开关的电流，RS1表示第一功率开关的导通电阻，iD2表示流过第二二极管的电流，RD2表示第二功率开关续流二极管的导通电阻；忽略管压降，求解(1)式，可得，Wherein L r1 and L r2 respectively represent the first resonant inductance value and the second resonant inductance value, U Ca and U Cb respectively represent the first a capacitor terminal voltage and the first b capacitor terminal voltage, when the first a capacitor value and the first The capacitance value of b is appropriately selected, U Ca and U Cb can be regarded as fixed values, and U Ca + U Cb = U i + U o , U i and U o respectively represent the input voltage and output voltage of the equalizing circuit, i S1 represents the current The current passing through the first power switch, R S1 represents the on-resistance of the first power switch, i D2 represents the current flowing through the second diode, and R D2 represents the on-resistance of the freewheeling diode of the second power switch; pressure drop, solve equation (1), we can get,
Figure FDA0002861163840000032
Figure FDA0002861163840000032
Figure FDA0002861163840000033
Figure FDA0002861163840000033
 其中t∈[t1,t2]，当iS1＝Ii+Io时，流过第二功率开关续流二极管的电流自动断流，此阶段结束；Where t∈[t 1 , t 2 ], when i S1 =I i +I o , the current flowing through the freewheeling diode of the second power switch is automatically cut off, and this stage ends; S3，在t2-t3的阶段，第一功率开关保持导通，第一辅助开关保持关断，输出电流流过第一谐振电感和第二谐振电感，iLr1＝-iLr2＝Io，iLr1表示流过第一谐振电感的电流，iLr2表示流过第二谐振电感的电流，S3, in the stage of t2-t3, the first power switch is kept on, the first auxiliary switch is kept off, the output current flows through the first resonant inductor and the second resonant inductor, i Lr1 =-i Lr2 =I o , i Lr1 represents the current flowing through the first resonant inductor, i Lr2 represents the current flowing through the second resonant inductor, 输入电流和输出电流均流过第一功率开关，iS1＝Ii+Io；iS1表示流过第一功率开关的电流，Both the input current and the output current flow through the first power switch, i S1 =I i +I o ; i S1 represents the current flowing through the first power switch, 当第一辅助开关由关断切换至导通时，电路由PWM模式进入谐振模式，此阶段结束；When the first auxiliary switch is switched from off to on, the circuit enters the resonance mode from the PWM mode, and this stage ends; S4，在t3-t4的阶段，第一功率开关保持开通，通过打开第一辅助开关使电路产生谐振，为第一功率开关软关断创造条件，第一谐振电感、第一谐振电容、第一功率开关、第一辅助开关构成第一谐振回路，同时第二谐振电感、第一谐振电容、第一a电容、第一b电容、第二二极管、第一辅助开关也构成第二谐振回路，S4, in the stage of t3-t4, the first power switch is kept on, and the circuit is resonated by opening the first auxiliary switch to create conditions for the soft turn-off of the first power switch. The first resonant inductor, the first resonant capacitor, the first resonant The power switch and the first auxiliary switch form the first resonant circuit, while the second resonant inductor, the first resonant capacitor, the first a capacitor, the first b capacitor, the second diode, and the first auxiliary switch also form the second resonant circuit ,
Figure FDA0002861163840000041
Figure FDA0002861163840000041
Figure FDA0002861163840000042
Figure FDA0002861163840000042
 其中uCr表示第一谐振电容端电压，Cr表示第一谐振电容值，iSr表示流过第一辅助开关的电流值，RSr表示第一辅助开关的导通电阻；忽略管压降，求解(3)(4)式，可得，where u Cr represents the terminal voltage of the first resonant capacitor, Cr represents the value of the first resonant capacitor, i Sr represents the current value flowing through the first auxiliary switch , and R Sr represents the on-resistance of the first auxiliary switch; ignoring the tube voltage drop, Solving equations (3) and (4), we can get,
Figure FDA0002861163840000043
Figure FDA0002861163840000043
Figure FDA0002861163840000044
Figure FDA0002861163840000044
Figure FDA0002861163840000045
Figure FDA0002861163840000045
 其中t∈[t3,t4]，ω1表示两个谐振回路的整体等效谐振角频率，
Figure FDA0002861163840000046
UCr0为第一谐振电容在t3时刻的端电压；where t∈[t 3 ,t 4 ], ω 1 denotes the overall equivalent resonant angular frequency of the two resonant circuits,
Figure FDA0002861163840000046
U Cr0 is the terminal voltage of the first resonant capacitor at time t3; 当流过第二二极管的电流从正值谐振回零时，第二谐振回路停止谐振，此阶段结束；When the current flowing through the second diode resonates from a positive value back to zero, the second resonant circuit stops resonating, and this stage ends; S5在t4-t5的阶段，第一功率开关、第一辅助开关保持开通，第二谐振回路停止谐振，第一谐振回路继续谐振，S5 In the stage of t4-t5, the first power switch and the first auxiliary switch are kept on, the second resonant circuit stops resonating, and the first resonant circuit continues to resonate,
Figure FDA0002861163840000051
Figure FDA0002861163840000051
Figure FDA0002861163840000052
Figure FDA0002861163840000052
 忽略管压降，求解(8)(9)式，可得，Neglecting the pressure drop in the pipe, solving equations (8) and (9), we can get,
Figure FDA0002861163840000053
Figure FDA0002861163840000053
 uCr(t)＝(Ii+Io-IS11)Z1sin[ω2(t-t4)]+UCr1cos[ω2(t-t4)] (11)u Cr (t)=(I i +I o -I S11 )Z 1 sin[ω 2 (tt 4 )]+U Cr1 cos[ω 2 (tt 4 )] (11) 其中t∈[t4,t5]，ω2表示第一谐振回路的谐振角频率，
Figure FDA0002861163840000054
Z1表示第一谐振回路阻抗，
Figure FDA0002861163840000055
UCr1为第一谐振电容在t4时刻的端电压，IS11为第一功率开关在t4时刻的电流；where t∈[t 4 ,t 5 ], ω 2 represents the resonant angular frequency of the first resonant tank,
Figure FDA0002861163840000054
Z 1 represents the impedance of the first resonant tank,
Figure FDA0002861163840000055
U Cr1 is the terminal voltage of the first resonant capacitor at time t4, and I S11 is the current of the first power switch at time t4; 当iS1<0时，关断第一功率开关可以实现第一功率开关的零电流开关，当iSr<0时，关断第一辅助开关，可以实现第一辅助开关的零电流开关；When i S1 <0, turning off the first power switch can realize zero-current switching of the first power switch; when i Sr <0, turning off the first auxiliary switch can realize zero-current switching of the first auxiliary switch; S6，在t5-t6的阶段，第一功率开关关断，第一谐振回路停止谐振行为，第二谐振回路再次开始谐振，S6, in the stage of t5-t6, the first power switch is turned off, the first resonant tank stops resonating behavior, and the second resonant tank starts resonating again,
Figure FDA0002861163840000056
Figure FDA0002861163840000056
Figure FDA0002861163840000057
Figure FDA0002861163840000057
 忽略管压降，求解(12)(13)式，可得，Ignoring the pipe pressure drop, solving equations (12) and (13), we can get,
Figure FDA0002861163840000058
Figure FDA0002861163840000058
 uCr(t)＝UCa+UCb+(Ii+Io)Z2sin[ω3(t-t5)]+[UCr2-(UCa+UCb)]cos[ω3(t-t4)] (15)u Cr (t)=U Ca +U Cb +(I i +I o )Z 2 sin[ω 3 (tt 5 )]+[U Cr2 -(U Ca +U Cb )]cos[ω 3 (tt 4 )] (15) 其中t∈[t5,t6]，ω3表示第二谐振回路的谐振角频率，
Figure FDA0002861163840000061
Z2表示第二谐振回路阻抗，
Figure FDA0002861163840000062
UCr2为第一谐振电容在t5时刻的端电压；where t∈[t 5 ,t 6 ], ω 3 represents the resonant angular frequency of the second resonant tank,
Figure FDA0002861163840000061
Z 2 represents the second resonant tank impedance,
Figure FDA0002861163840000062
U Cr2 is the terminal voltage of the first resonant capacitor at time t5; 当iD2＝Ii+Io时，第二谐振电路停止谐振，此阶段结束，电路由谐振模式进入PWM模式，此阶段结束，回到第一阶段。When i D2 =I i +I o , the second resonant circuit stops resonating, this stage ends, the circuit enters the PWM mode from the resonance mode, this stage ends, and returns to the first stage. 输入电压与输出电压关系的推导如下，The derivation of the relationship between input voltage and output voltage is as follows, 在一个周期内，第四电感的平均电压值为零，因此第二功率开关端电压在一个周期内的平均值等于输出电压，In one cycle, the average voltage value of the fourth inductor is zero, so the average value of the second power switch terminal voltage in one cycle is equal to the output voltage,
Figure FDA0002861163840000063
Figure FDA0002861163840000063
 其中，Ts表示PWM控制周期，第一阶段(t0-t1)、第二阶段(t1-t2)、第四阶段(t3-t4)、第六阶段(t5-t6)第二功率开关端电压为零，第三阶段(t2-t3)第二功率开关端电压为第一a电容和第一b电容的端电压之和，第五阶段(t4-t5)第二功率开关端电压为第一谐振电容端电压与第一a电容和第一b电容的端电压之和的差值，且在t4时刻，第一谐振电感电流在最大值附近，此时刻第二谐振电容的端电压约等于零，UCr1＝0，由此可得，Among them, T s represents the PWM control period, the first stage (t0-t1), the second stage (t1-t2), the fourth stage (t3-t4), the sixth stage (t5-t6) The second power switch terminal voltage In the third stage (t2-t3), the terminal voltage of the second power switch is the sum of the terminal voltages of the first a capacitor and the first b capacitor, and in the fifth stage (t4-t5), the second power switch terminal voltage is the first The difference between the terminal voltage of the resonant capacitor and the sum of the terminal voltages of the first a capacitor and the first b capacitor, and at time t4, the current of the first resonant inductor is near the maximum value, and the terminal voltage of the second resonant capacitor is approximately zero at this time, U Cr1 =0, it can be obtained,
Figure FDA0002861163840000064
Figure FDA0002861163840000064
 其中，ΔT3和ΔT5分别表示第三阶段和第五阶段的时间间隔，TLC为第一谐振回路的谐振周期，
Figure FDA0002861163840000065
ω2ΔT5＝ω2(t5-t4)≈π，在实现软切换条件下，一般希望第一功率开关电流的峰值尽量小，因此有IS11≈2(Ii+Io)；由式(17)可以得出输出电压与输入电压的关系，Among them, ΔT 3 and ΔT 5 represent the time interval of the third stage and the fifth stage respectively, T LC is the resonance period of the first resonant circuit,
Figure FDA0002861163840000065
ω 2 ΔT 5 =ω 2 (t 5 -t 4 )≈π, under the condition of realizing soft switching, it is generally hoped that the peak value of the first power switch current is as small as possible, so I S11 ≈2(I i +I o ); From equation (17), the relationship between the output voltage and the input voltage can be obtained,
Figure FDA0002861163840000071
Figure FDA0002861163840000071
 由式(18)可以看出，当电路参数确定后，可以通过改变PWM周期、第三阶段时间来改变输出电压。It can be seen from equation (18) that when the circuit parameters are determined, the output voltage can be changed by changing the PWM cycle and the third stage time.
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