CN111240682A - Method and device, device, and storage medium for processing instruction data - Google Patents

Abstract

The embodiment of the present application discloses a method, device, device, and storage medium for processing instruction data, wherein the method includes: if it is determined that there are fields of the same type between the instructions before compilation, when compiling, the same type of field is The field is stored to the specified encoding position; according to the type of each said pre-compiled instruction and the attribute information of the same type of field, the corresponding opcode is generated; the said opcode is stored in the compiled instruction; output the compiled instructions.

Description

Method and device, device, and storage medium for processing instruction data

technical field

The embodiments of the present application relate to a computer system, and relate to, but are not limited to, a method, apparatus, device, and storage medium for processing instruction data.

Background technique

A network processor is a processor specially used for network data processing. It is mainly used in network products such as switches and routers, and is mostly used to process packets in the network. It has high processing performance, programmable, flexible expansion, and short development cycle. Advantage. It is precisely because the processing of network business data is different from ordinary system programs and its characteristic requirements that the instruction set design of network processors must have the characteristics of high instruction execution efficiency, strong instruction expansibility, and rich instruction sets.

At the same time, on the basis of satisfying the forwarding performance, it is necessary to reduce the complexity of logic design, reduce chip resources and reduce power consumption. These feature requirements not only need to be considered separately from each process of instruction set design, but also to consider all processes as a whole. Therefore, the design and processing of the instruction set of the network processor is very complicated.

SUMMARY OF THE INVENTION

In view of this, the embodiments of the present application provide a method, apparatus, device, and storage medium for processing instruction data to solve at least one problem existing in the prior art.

The technical solutions of the embodiments of the present application are implemented as follows:

In a first aspect, an embodiment of the present application provides a method for processing instruction data. The method includes: if it is determined that there are fields of the same type between instructions before compilation, when compiling, storing the fields of the same type to a specified encoding position; according to the type of each said pre-compiled instruction and the attribute information of the same type of field, generate a corresponding opcode; store the opcode in the compiled instruction; output the compiled instruction.

In a second aspect, an embodiment of the present application provides a method for processing instruction data. The method includes: determining an opcode in a compiled instruction; determining, according to the opcode, the type of the instruction and the number of attribute information of the field; according to the attribute information of the field, determine the field of the corresponding type from the specified coding position in the instruction; obtain the corresponding operand according to the field of the corresponding type, and output the operand.

In a third aspect, an embodiment of the present application provides an apparatus for processing instruction data, the apparatus comprising: a first storage unit configured to, if it is determined that there are fields of the same type between instructions before compilation, when compiling, store the Fields of the same type are stored in a designated coding position; a generating unit is configured to generate a corresponding opcode according to the type of each said pre-compiled instruction and the attribute information of the fields of the same type; a second storage unit is configured as The operation code is stored in the compiled instruction; the first output unit is configured to output the compiled instruction.

In a fourth aspect, an embodiment of the present application provides an apparatus for processing instruction data, the apparatus includes: a first determination unit configured to determine an operation code in a compiled instruction; a second determination unit configured to an operation code, to determine the type of the instruction and the attribute information of the field in the instruction; a third determination unit, configured to determine the corresponding type of field from the specified encoding position in the instruction according to the attribute information of the field; The second output unit is configured to obtain the corresponding operand according to the field of the corresponding type, and output the operand.

In a fifth aspect, an embodiment of the present application provides a computer device, the computer device including at least: a processor and a storage medium configured to store executable instructions, wherein the processor is configured to execute the stored executable instructions, the The executable instructions are configured to execute the method for processing instruction data provided by the above embodiments.

In a sixth aspect, the embodiments of the present application provide a computer-readable storage medium, where computer-executable instructions are stored in the computer-executable instructions, and the computer-executable instructions are configured to execute the instruction data processing method provided by the foregoing embodiments. A step of.

Embodiments of the present application provide a method, device, device, and storage medium for processing instruction data, wherein the method includes: if it is determined that there are fields of the same type between instructions before compilation, when compiling The field is stored to the specified coding position; according to the type of each said pre-compiled instruction and the attribute information of the same type of field, the corresponding opcode is generated; the said opcode is stored in the compiled instruction; output the compiled instructions. In this way, the operation code is directly associated with the type of the instruction and the quantity and type of the instruction source operand, so that the classification and acquisition of the instruction source operand can be completed according to the instruction operation code.

Description of drawings

FIG. 1 is a schematic flow chart 1 of a method for processing instruction data provided by an embodiment of the present application;

2 is a second schematic flowchart of a method for processing instruction data provided by an embodiment of the present application;

3 is a schematic flowchart of a method for processing instruction source operands of a network processor according to an embodiment of the present application;

4 is a schematic diagram of the composition and structure of an apparatus for processing an instruction source operand of a network processor provided by an embodiment of the present application;

FIG. 5 is a schematic diagram 1 of the composition structure of an apparatus for processing instruction data provided by an embodiment of the present application;

FIG. 6 is a second schematic diagram of the composition and structure of an apparatus for processing instruction data provided by an embodiment of the present application;

FIG. 7 is a schematic structural diagram of a computer device according to an embodiment of the present application.

Detailed ways

In the related art, when designing an instruction set of a network processor, several key technologies such as instruction encoding, storage, acquisition, and decoding need to be considered. Instruction encoding and decoding are the basis of instruction set design, and directly determine the complexity of instruction set processing. At the same time, in order to be able to process various business data in the network, it is necessary to design a variety of commands with different functions and a large-capacity command space. Therefore, if the instruction encoding and decoding does not have a corresponding good design scheme, it will often lead to high complexity of the logic design, and will occupy a large amount of chip memory, and the power consumption is also high.

The instruction set design of the traditional network processor adopts the instruction pipeline decoding technology similar to that of the Reduced Instruction Set Computer (Reduced Instruction Set Computer, RISC), and the instruction encoding adopts the fixed-length method for encoding. Since the operation code field of the instruction is only encoded according to the functional operation of each instruction, when the source operand is obtained in the decoding stage, the type of each instruction needs to be judged first, and then the source operand recorded by each instruction needs to be encoded in the instruction encoding. In the position, get the field information such as the number and address of the source operand.

The number of instructions based on network processors is very large. Obtaining source operands in this way not only requires additional chip memory resources to store the source operand information of each instruction, but also greatly increases the logic complexity of the chip core. .

In order to make the purposes, technical solutions and advantages of the embodiments of the present application more clear, the specific technical solutions of the invention will be described in further detail below with reference to the accompanying drawings in the embodiments of the present application. The following examples are used to illustrate the present application, but are not intended to limit the scope of the present application.

An embodiment of the present application provides a method for processing instruction data. The method is applied to a computer device. The functions implemented by the method can be implemented by calling a program code by a processor in the computer device. Of course, the program code can be stored in a computer storage medium. , it can be seen that the computer device includes at least a processor and a storage medium.

FIG. 1 is a schematic flow chart 1 of a method for processing instruction data provided by an embodiment of the present application. As shown in FIG. 1 , the method includes:

Step S11 , if it is determined that there are fields of the same type between the instructions before compilation, during compilation, the fields of the same type are stored in a specified encoding position.

Here, at least one instruction is acquired from a preset instruction set. Since the function and role of each instruction are preset, fields of the same type between the instructions before compilation can be determined according to the acquired instruction, and then the compilation unit is used for compilation. When , each instruction can be divided into several segments according to corresponding rules, each segment occupies a preset position and corresponding byte length, and the preset position and corresponding byte length are set as the corresponding coding position, When compiling, the same type of fields between each instruction can be stored in the specified coding position, and the specified coding position can be preset as required. For example, there are instruction A and instruction B in the instruction set, instruction A has fields A1, A2, A3, and instruction B has fields B1, B2, B3, if A3 and B3 are fields of the same type, the compilation unit will put the A3 field of instruction A , and the B3 field of instruction B are placed in the same bit positions of their respective codes.

Step S12: Generate a corresponding operation code according to the type of each pre-compiled instruction and the attribute information of the field of the same type.

Here, the opcode is used to indicate the operation to be performed by the instruction, and the length of the opcode can be fixed or variable. In the embodiment of the present application, the type of the instruction before compilation and the attribute information of the field of the same type can be obtained, the type of the instruction before compilation and the attribute information of the field of the same type can be marked respectively, and the corresponding opcode. Here, the types of instructions may be: logical calculation instructions, data upload/download instructions, jump instructions, and some special instructions, etc., which can be preset as required. Fields of the same type can be different source operands, destination operands, or other fields.

Step S13, the operation code is stored in the compiled instruction.

Here, the compiling unit may store the opcodes generated according to the above steps to the corresponding coding positions in the compiled instructions.

Step S14, outputting the compiled instruction.

In the embodiment of the present application, if it is determined that there are fields of the same type between the instructions before compilation, during compilation, the fields of the same type are stored in the specified encoding position, and the type of each instruction before compilation and the attributes of the fields of the same type are stored. information, generate a corresponding opcode, store the opcode in the compiled instruction, and output the compiled instruction. The command operation code can be directly associated with the type of the instruction and the attribute information of the field, so as to realize the classification and acquisition of the corresponding operand of the field according to the instruction operation code.

The embodiment of the present application also provides another method for processing instruction data, and the method includes:

Step S101 , if it is determined that there are fields of the same type between the instructions before compilation, during compilation, the fields of the same type are stored in a specified encoding position.

Step S102, if it is determined that the fields of the same type include source operand fields, determine the number and type of the source operand fields.

Here, an instruction may include one or more source operand fields. In this embodiment of the present application, if it is determined that fields of the same type include source operand fields, the number and type of source operand fields are determined.

Step S103: Generate a corresponding opcode according to the type of each pre-compiled instruction and the quantity and type of the source operand fields.

Here, the type of the instruction before compilation and the number and type of the source operand field can be obtained, the type of the instruction before compilation, the number and type of the source operand field are marked respectively, and the corresponding identification code is generated according to the identification code generated by the mark. opcode. Mark the number and type of source operand fields respectively, including: determining the number and type of source operands, and generating a marker according to the number and type of source operands. For example: the form that does not require a source operand or an immediate value is marked as 000; the form of a register that only needs to operate a condition is marked as 001, etc.

The above steps S102 to S103 provide a way of implementing the step "generate a corresponding operation code according to the type of each of the pre-compiled instructions and the attribute information of the same type field". In this manner, if it is determined that the fields of the same type include source operand fields, the number and type of the source operand fields are determined, according to the type of each of the precompiled instructions, the number of the source operand fields and type to generate the corresponding opcode. The command operation code can be directly associated with the type of the instruction and the quantity and type of the source operand field, so as to realize the classification and acquisition of the instruction source operand according to the instruction operation code.

Step S104, the operation code is stored in the compiled instruction.

Step S105, outputting the compiled instruction.

The embodiment of the present application also provides another method for processing instruction data, and the method includes:

Step S201 , according to the function to be performed by each pre-compiled instruction, classify the pre-compiled instructions to obtain a classification result.

Here, the instructions before compilation can be classified into at least one type according to the function to be performed by the instruction. Wherein, the classification results may be: logical calculation instructions, data upload/download instructions, jump instructions, some special instructions, and the like.

Step S202 , if it is determined that there are fields of the same type between the instructions before compilation, during compilation, the fields of the same type are stored in a specified encoding position.

Step S203, if it is determined that the fields of the same type include source operand fields, determine the number and type of the source operand fields according to the classification result.

Here, it may be determined whether the instruction requires source operands according to the function to be performed by the instruction before compilation, and if source operands are required, the number and type of the required source operands may be determined. For example, the instructions are divided into logical calculation instructions, data upload/download instructions, and jump instructions. Among them, logical calculation instructions usually have purpose registers, common register source operand one, common register source operand two or immediate data source operand two fields, etc.; data upload/download instructions usually have purpose registers, condition register source operations Number 2, memory source operand 1 or memory source operand 2, immediate source operand 2, etc.; jump instructions usually have labels, condition register source operand 2, etc.; special instructions usually complete network service query. Tables, co-processing, etc., do not require source operands. Among them, source operand 1 refers to the source operand in the first position when there is one operand, or when there are two operands; source operand 2 refers to the source operand in the second position when there are two operands source operand.

Step S204 , generating a corresponding opcode according to the type of each pre-compiled instruction and the quantity and type of the source operand fields.

Step S205, the operation code is stored in the compiled instruction.

Step S206, outputting the compiled instruction.

The embodiment of the present application also provides another method for processing instruction data, and the method includes:

Step S301 , according to the function to be performed by each pre-compiled instruction, classify the pre-compiled instructions to obtain a classification result.

Step S302, if it is determined that there are fields of the same type between the instructions before compilation, during compilation, the fields of the same type are stored in a specified encoding position.

Step S303, if it is determined that the fields of the same type include source operand fields, determine the number and type of the source operand fields according to the classification result.

Step S304 , marking the type of each of the pre-compiled instructions, and generating a first identification code corresponding to each of the pre-compiled instructions.

Here, marking the type of the instruction means that the compiling unit generates a corresponding identification code according to the type of the instruction. For example, the instructions can be divided into four types: logical calculation instructions, data upload/download instructions, jump instructions and special instructions, and then generate four corresponding tags according to the four types, which are corresponding to the logical calculation instructions. The first identification code one is 00, the data upload/download type instruction corresponds to the first identification code two 01, the jump type instruction corresponds to the first identification code three 10, and the special type instruction corresponds to the first identification code four 11. The above identification code is used as the first part of the encoding of the opcode field of the corresponding instruction.

Step S305: Generate a corresponding second identification code according to the number and type of the source operand fields.

Here, according to the number and type of source operands, the four types of instructions are divided into logical calculation instructions, data upload/download instructions, jump instructions and special instructions are divided into eight types as an example. Respectively: the instruction that does not require a source operand or a source operand in the form of an immediate value is type 1; the instruction that only needs to operate a source operand in the form of a condition register is type 2; only needs to operate a source operation in the form of a normal register. Number instructions are type three; instructions that only need to operate a source operand in the form of memory are type four; instructions that need to operate a source operand in the form of an ordinary register and a source operand in the form of memory are type five; Instructions with source operands in the form of ordinary registers and one source operand in the form of condition registers are type six; instructions that need to operate two source operands in the form of ordinary registers are type seven; instructions that need to operate a source operand in the form of memory and a Instructions with source operands in the form of condition registers are of type eight.

The compiling unit classifies the instruction according to the quantity and type of the source operand, obtains the classification result, and obtains the corresponding identification code for the classification result. Taking the above eight types as an example, type one corresponds to the second identification code 1000, type two corresponds to the second identification code two 001, type three corresponds to the second identification code three 010, type four corresponds to the second identification code four 011, and type five corresponds to the second identification code four 011. Corresponding to the second identification code five 100, type six corresponds to the second identification code six 101, type seven corresponds to the second identification code seven 110, and type eight corresponds to the second identification code eight 111. The above identification code is used as the second part of the encoding of the opcode field of the corresponding instruction.

Step S306, combining the first identification code and the second identification code to generate a corresponding operation code.

Here, the first part of the operation code field encoding generated by the above steps and the second part of the operation code field encoding can be combined to generate the corresponding operation code.

The above-mentioned steps S304 to S306 provide a way of implementing the steps of "generating a corresponding opcode according to the type of each of the pre-compiled instructions, the number and type of the source operand fields". In this manner, the command operation code can be directly associated with the type of the instruction and the number and type of the source operand fields, so as to realize the classification and acquisition of the instruction source operand according to the instruction operation code.

Step S307, the operation code is stored in the compiled instruction.

Step S308, outputting the compiled instruction.

FIG. 2 is a second schematic flowchart of a method for processing instruction data provided by an embodiment of the present application. As shown in FIG. 2 , the method includes:

In step S21, the operation code in the compiled instruction is determined.

Here, after receiving the compiled instruction, the decoding unit may determine the corresponding operation code from the compiled instruction.

Step S22: Determine the type of the instruction and attribute information of a field in the instruction according to the operation code.

Here, the decoding unit obtains the compiled instruction, can parse the corresponding operation code from the instruction, and determines the type of the instruction and the attribute information of the fields in the instruction according to the operation code.

Step S23 , according to the attribute information of the field, determine the corresponding type of field from the specified coding position in the instruction.

Here, a field is a designated encoding position stored in the compiled instruction, and the decoding unit can directly determine a field of a corresponding type from the designated encoding position according to the attribute information of the field.

Step S24: Acquire the corresponding operand according to the field of the corresponding type, and output the operand.

Here, after the corresponding type of field is determined based on the above steps, the corresponding operand can be directly obtained from the corresponding register, and the obtained operand can be processed accordingly.

In the embodiment of the present application, the operation code in the compiled instruction is determined, the type of the instruction and the attribute information of the field in the instruction are determined according to the operation code, and the corresponding type is determined from the specified coding position in the instruction according to the attribute information of the field. field, obtain the corresponding operand according to the field of the corresponding type, and output the operand. The decoding unit can directly intercept the corresponding operand from the compiled instruction, without determining the type of the instruction, and then determining the corresponding operand according to the type of the instruction, which can reduce the judgment steps and reduce the complexity of the operand processing.

The embodiment of the present application also provides another method for processing instruction data, and the method includes:

Step S401, determining the operation code in the compiled instruction.

Step S402, if it is detected that the instruction needs to obtain the source operand field, parse the operation code corresponding to the instruction that needs to obtain the source operand field, and obtain the analysis result.

Here, the decoding unit determines whether the source operand needs to be obtained according to the operation code, and when the source operand needs to be obtained, it parses the operation code corresponding to the instruction that needs to obtain the source operand field to obtain the analysis result.

Step S403: Determine the type of the instruction and attribute information of the source operand field according to the parsing result.

Here, since the operation code includes the first identification code and the second identification code, the type of the instruction can be determined according to the first identification code, and the attribute information of the source operand field can be determined according to the second identification code.

The above steps S402 to S403 provide a way of implementing the steps of "determining the type of the instruction and the attribute information of the fields in the instruction according to the operation code". In this method, if it is detected that the instruction needs to obtain the source operand field, the operation code corresponding to the instruction that needs to obtain the source operand field is parsed to obtain the parsing result, and the type of the instruction and the attribute information of the source operand field are determined according to the parsing result. By parsing the opcode, the type of the instruction and the attribute information of the source operand field can be directly obtained, which can reduce the complexity of decoding.

Step S404, according to the attribute information of the field, determine the field of the corresponding type from the specified encoding position in the instruction.

Step S405: Acquire the corresponding operand according to the field of the corresponding type, and output the operand.

The embodiment of the present application also provides another method for processing instruction data, and the method includes:

Step S501, determining the operation code in the compiled instruction.

Step S502, if it is detected that the instruction needs to obtain the source operand field, parse the operation code corresponding to the instruction that needs to obtain the source operand field, and obtain the analysis result.

Step S503: Determine the type of the instruction and attribute information of the source operand field according to the parsing result.

Step S504: Determine the type of the instruction according to the first identification code parsed from the operation code.

Here, the decoding unit parses the first part of the opcode, that is, parses the first identification code of the opcode, and can determine the type of the instruction.

Step S505: Determine the number and type of the source operand field according to the second identification code parsed from the operation code.

Here, the decoding unit parses the second part of the opcode, that is, parses the second identification code of the opcode, and can determine the number and type of the source operand fields.

Step S506, according to the number and type of the source operand fields, determine the corresponding type of field from the specified encoding position in the instruction.

Here, the corresponding type of field can be determined from the specified encoding position in the instruction according to the source operand field number and type. For example, the source operand one is divided into three cases: the instruction does not need to obtain the source operand one, and the instruction is directly transmitted to the read unit; the instruction needs to obtain the source operand one, and the number and the source register need to be intercepted from the instruction encoding. address; the instruction needs to obtain the source operand one, and the read address is fixed without other decoding operations. For the source operand two, there are four cases: the instruction does not need to obtain the source operation two, and directly transmits it to the read unit; the instruction needs to obtain the source operand two, and the number and address of the source register need to be intercepted from the instruction encoding; the instruction requires Obtain the source operand 2, and the required source register is intercepted from the instruction encoding and converted; the instruction needs to obtain the source operand 2, and the read address is fixed without other decoding operations.

The above-mentioned steps S504 to S506 provide a way of implementing the steps of "determining a field of a corresponding type from a specified encoding position in the instruction according to the attribute information of the field". In this method, the type of the instruction is determined according to the first identification code parsed from the opcode; the number and type of source operand fields are determined according to the second identification code parsed from the opcode; the number and type of source operand fields are determined according to the number of source operand fields and type, the source operand field is determined from the specified encoded position in the instruction. The source operand field can be directly determined from the specified encoding position in the instruction according to the number and type of the source operand field, which can reduce the complexity of decoding.

Step S507: Acquire a corresponding operand according to the field of the corresponding type, and output the operand.

The embodiment of the present application also provides another method for processing instruction data, and the method includes:

Step S601, determining the operation code in the compiled instruction.

Step S602, if it is detected that the instruction needs to obtain the source operand field, parse the operation code corresponding to the instruction that needs to obtain the source operand field, and obtain the analysis result.

Step S603: Determine the type of the instruction and attribute information of the source operand field according to the parsing result.

Step S604: Determine the type of the instruction according to the first identification code parsed from the operation code.

Step S605: Determine the number and type of the source operand field according to the second identification code parsed from the operation code.

Step S606, according to the number and type of the source operand fields, determine the corresponding type of field from the specified encoding position in the instruction.

Step S607, according to the number and type of the source operand field, obtain the corresponding source operand field from the specified encoding position in the instruction.

Step S608: Determine the number and address of the source operand according to the source operand field.

Here, the decoding unit determines the source operand field according to the fixed position of the source operand field in the instruction encoding, obtains the number and address of the source operand, and sends them to the reading unit.

Step S609: Acquire the source operand according to the number and address of the source operand, and output the source operand.

The above-mentioned steps S608 to S609 provide a way of implementing the steps of "acquiring corresponding operands according to the fields of the corresponding types, and outputting the operands". In this manner, the number and address of the source operand are determined according to the source operand field; the source operand is obtained according to the number and address of the source operand, and the source operand is output. The source operand field can be directly determined from the specified encoding position in the instruction according to the number and type of the source operand field, and then the corresponding source operand can be directly obtained according to the source operand field, which can reduce the complexity of decoding.

In other embodiments, the function of the instruction is determined according to the type of the instruction, and the source operand is processed according to the function of the instruction.

3 is a schematic flowchart of a method for processing instruction source operands of a network processor provided by an embodiment of the present application. As shown in FIG. 3 , the method includes the following steps:

In step S31, the compiling unit places the same field between each instruction in a fixed position in the instruction encoding.

Here, the instructions are first encoded by fixed-length encoding, and then each encoded instruction in the instruction set is segmented, and the instructions in the instruction set are classified according to their functions. Generally, the instructions of the network processor are classified into logical calculation categories. Instructions, data upload/download instructions, jump instructions and some special instructions. Then, according to the function of each type of instruction, confirm the field type required by each instruction.

In the embodiment of the present application, by adopting the fixed-length encoding method, the instruction can be converted into a format convenient for the compilation unit to store, and the decoding unit does not need to record the storage location and length of the instruction, and directly obtains the encoded instruction in the storage memory.

Among them, logical calculation instructions: usually have a purpose register operand field, a common register source operand field, a common register source operand two fields, an immediate data source operand two fields, etc.; data upload/download instructions: usually have a purpose Register operand field, condition register source operand 2 field, memory source operand 1 field, memory source operand 2 field, immediate data source operand 2 field, etc.; jump instructions: usually have labels, condition register source operands Second-class fields; special class instructions: usually complete network service table lookup, co-processing and other operations, without the source operand field.

Step S32, the compiling unit judges and marks the type of the instruction and the source operand of the instruction, and generates an operation code corresponding to the instruction according to the mark.

Here, the compilation unit completes the judgment and marking of the type of the instruction and the source operand of the instruction, and generates the corresponding instruction opcode, which is directly related to the type of the instruction and the number and type of the instruction source operand; The above instruction opcode completes the classification and acquisition of the instruction source operand.

Wherein, judging the type of the instruction means: classifying the instruction into at least one type according to the functional operation. For example, the instructions can be divided into four types: logical calculation instructions, data upload/download instructions, jump instructions, and some special instructions.

Marking the type of an instruction means that the compilation unit generates a corresponding mark according to the type of the instruction. For example, the instructions can be divided into four types: logical calculation instructions, data upload/download instructions, jump instructions and special instructions, and then generate four corresponding tags according to the four types, which are corresponding to the logical calculation instructions. Mark one 00, data upload/download type instruction corresponds to mark two 01, jump type instruction corresponds to mark three 10, special type instruction corresponds to mark four 11, as the first part of the operation code field encoding of the instruction.

Judging the source operands of an instruction refers to classifying instructions according to the number and type of source operands.

For example, according to the number and type of source operands, the instructions are divided into four types: logical calculation instructions, data upload/download instructions, jump instructions and special instructions. For example, the formed types are: : Instructions that do not require source operands or source operands in the form of immediate values are type 1; instructions that only need to operate a source operand in the form of a condition register are type 2; instructions that only need to operate a source operand in the form of a normal register The instruction is type three; the instruction that only needs to operate a source operand in the form of memory is type four; the instruction that needs to operate a source operand in the form of an ordinary register and a source operand in the form of memory is type five; it needs to operate an ordinary register. An instruction that requires a source operand in the form of a form of register and a source operand in the form of a condition register is type six; an instruction that requires operation on a source operand in the form of two ordinary registers is type seven; an instruction that requires a source operand in the form of memory and a condition register Instructions with source operands of the form are of type eight.

The labeling of the source operands of the instruction means that the compiling unit classifies the instruction according to the number and type of the source operands, obtains the classification result, and marks the classification result. Taking the above eight types as an example, type one corresponds to mark one 000, type two corresponds to mark two 001, type three corresponds to mark three 010, type four corresponds to mark four 011, type five corresponds to mark five 100, type six corresponds to mark six 101, Type seven corresponds to tag seven 110, and type eight corresponds to tag eight 111, as the second part of the instruction's opcode field encoding.

Step S33, the decoding unit judges whether the source operand needs to be obtained according to the operation code, and when the source operand needs to be obtained, using the fixed position of the source operand in the instruction encoding, the decoding unit directly intercepts and obtains the source operand in the instruction. number and address.

In the embodiment of the present application, the decoding unit determines the second part of the opcode, and the source operand 1 is divided into three cases: the instruction does not need to obtain the source operand 1, and the read unit is directly transparently transmitted, corresponding to the above step S32. Two parts of 000, 001 and 011; if the instruction needs to obtain the source operand one, and the number and address of the source register need to be intercepted from the instruction encoding, it corresponds to 010, 100, 101 and 110 of the second part of the operation code in the above step S32; If the instruction needs to obtain the source operand one, and the read address is fixed and no other decoding operation is required, it corresponds to 111 in the second part of the operation code in the above step S32.

For the source operand two, there are four cases: the instruction does not need to obtain the source operation two, and the read unit is directly transparently transmitted, corresponding to 000 and 010 in the second part of the operation code in the above step S32; the instruction needs to obtain the source operand two, and the If the number and address of the source register are intercepted from the instruction encoding, it corresponds to 110 in the second part of the operation code in the above step S32; if the instruction needs to obtain the source operand 2, and the required source register is intercepted from the instruction encoding and converted, the corresponding 001, 101 and 111 in the second part of the operation code in the above step S32; if the instruction needs to obtain the source operand 2, and the read address is fixed without other decoding operations, it corresponds to 111 in the second part of the operation code in the above step S32.

The decoding unit needs to include three operation modes, among which, when intercepting the number and address of the source operation, the source operand two condition registers of some instructions need to be converted into ordinary registers.

Step S34, the decoding unit obtains the data of the source operand in the kernel register according to the number and address of the source operand, and sends it to the execution unit.

After the decoding unit completes the processing, it sends the obtained number and address of the source operand to the reading unit, and the reading unit obtains the data of the source operand in the kernel register and sends it to the execution unit. Transparently transmitted to the execution unit.

Step S35, after the execution unit completes the execution, the processing result is stored in the kernel register.

Here, the execution unit processes the instruction according to the instruction function and source operand, and rewrites the result into the kernel register after successful processing.

FIG. 4 is a schematic diagram of the composition and structure of an apparatus for processing an instruction source operand of a network processor provided by an embodiment of the present application. As shown in FIG. 4 , the apparatus includes:

The compiling unit 41 is used for placing the same fields between instructions in a fixed position in the instruction encoding; it is used for judging and marking the type of the instruction and the source operation of the instruction, and generating the corresponding operation code of the instruction according to the marking.

The decoding unit 42 is configured to determine whether the instruction needs to acquire the source operation according to the operation code of the instruction, and when the instruction needs to acquire the source operand, according to the fixed position of the source operand in the instruction encoding, complete the various The number and address of the source operand in the form are obtained and sent to the read unit.

The reading unit 43 is configured to obtain the data of the source operand in the kernel register according to the number and address of the source operand of the instruction.

The execution unit 44 is configured to process the source operand according to the instruction function.

The output unit 45 is used for storing the processing result in the kernel register.

In the embodiment of the present application, when the compiling unit converts the instruction into binary code, the same field between the instructions is placed in a fixed position in the instruction encoding to ensure the same field between the instructions is aligned and encoded. In this way, when decoding the instruction , the decoding unit can directly intercept the number and address of the source operand, without first distinguishing each instruction type, and then obtaining the source operand in the instruction encoding, so that the decoding unit does not need additional judgment logic, and does not need to record the source operand in each instruction position, which greatly reduces the logic complexity of the decoding unit and saves chip resources.

Based on the foregoing embodiments, the embodiments of the present application provide an apparatus for processing instruction data. Each unit included in the device and each subunit included in each unit can be realized by a processor in a computer device; of course, it can also be realized by a logic circuit; in the process of implementation, the processor can be a central Processor (CPU), Microprocessor (MPU), Digital Signal Processor (DSP) or Field Programmable Gate Array (FPGA), etc.

FIG. 5 is a schematic diagram 1 of the composition and structure of an apparatus for processing instruction data provided by an embodiment of the present application. As shown in FIG. 5 , the apparatus includes:

The first storage unit 51 is configured to, if it is determined that there are fields of the same type between the instructions before compilation, during compilation, store the fields of the same type to a specified encoding position.

The generating unit 52 is configured to generate a corresponding operation code according to the type of each pre-compiled instruction and the attribute information of the field of the same type.

The second storage unit 53 is configured to store the operation code into the compiled instruction.

The first output unit 54 is configured to output the compiled instruction.

In other embodiments, the generating unit is further configured to: if it is determined that the fields of the same type include source operand fields, determine the number and type of the source operand fields; The type of instruction, the number and type of the source operand field, and the corresponding opcode is generated.

In other embodiments, the apparatus further includes: a classification unit configured to: classify the pre-compiled instructions according to the function to be performed by each pre-compiled instruction to obtain a classification result; correspondingly, the The generating unit is further configured to: if it is determined that the fields of the same type include source operand fields, determine the number and type of the source operand fields according to the classification result.

In other embodiments, the generating unit is further configured to: mark the type of each of the pre-compiled instructions, and generate a first identification code corresponding to each of the pre-compiled instructions; The number and type of the source operand fields are used to generate a corresponding second identification code; the first identification code and the second identification code are combined to generate a corresponding operation code.

FIG. 6 is a second schematic diagram of the composition and structure of an apparatus for processing instruction data provided by an embodiment of the present application. As shown in FIG. 6 , the apparatus includes:

The first determining unit 61 is configured to determine the opcode in the compiled instruction.

The second determination unit 62 is configured to determine the type of the instruction and attribute information of the fields in the instruction according to the operation code.

The third determining unit 63 is configured to determine a field of a corresponding type from the specified encoding position in the instruction according to the attribute information of the field.

The second output unit 64 is configured to obtain the corresponding operand according to the field of the corresponding type, and output the operand.

In other embodiments, the second determining unit is further configured to: if it is detected that the instruction needs to obtain the source operand field, parse the operation code corresponding to the instruction that needs to obtain the source operand field, and obtain a parsing result ; According to the parsing result, determine the type of the instruction and the attribute information of the source operand field.

In other embodiments, the third determining unit is further configured to: determine the type of the instruction according to the first identification code parsed from the operation code; The second identification code is used to determine the number and type of the source operand fields; and according to the number and type of the source operand fields, the source operand fields are determined from the specified encoding position in the instruction.

In other embodiments, the second output unit is further configured to: determine the number and address of the source operand according to the source operand field; obtain the number and address of the source operand according to the number and address of the source operand the source operand, and output the source operand.

It should be noted that, in the embodiments of the present application, if the above-mentioned instruction data processing method is implemented in the form of a software function module and sold or used as an independent product, it can also be stored in a computer-readable storage medium. Based on such understanding, the technical solutions of the embodiments of the present application can be embodied in the form of software products in essence or in the parts that make contributions to the prior art. The computer software products are stored in a storage medium and include several instructions for A computer device is caused to execute all or part of the methods described in the various embodiments of the present application. The aforementioned storage medium includes: a U disk, a removable hard disk, a read only memory (Read Only Memory, ROM), a magnetic disk or an optical disk and other mediums that can store program codes. As such, the embodiments of the present application are not limited to any specific combination of hardware and software.

Correspondingly, the embodiments of the present application provide a computer-readable storage medium on which a computer program is stored, and when the computer program is executed by a processor, implements the steps in the method for processing instruction data provided by the foregoing embodiments.

The descriptions of the device embodiments of the present application are similar to the descriptions of the foregoing method embodiments, and have similar beneficial effects to the method embodiments. For technical details not disclosed in the device embodiments of the present application, please refer to the descriptions of the method embodiments of the present application for understanding.

It should be pointed out here that the descriptions of the above storage medium and device embodiments are similar to the descriptions of the above method embodiments, and have similar beneficial effects to the method embodiments. For technical details not disclosed in the embodiments of the storage medium and device of the present application, please refer to the description of the method embodiments of the present application to understand.

It should be noted that FIG. 7 is a schematic structural diagram of a computer device provided by an embodiment of the application. As shown in FIG. 7 , the computer device 70 at least includes: a processor 71 , a communication interface 72 and a memory 73 , wherein

The processor 71 generally controls the overall operation of the computer device 70 .

Communication interface 72 may enable the computer device to communicate with other computer devices or servers over a network.

The memory 73 is configured to store instructions and applications executable by the processor 71, and may also cache data to be processed or processed by the processor 71 and various modules in the computer device 70 (eg, image data, audio data, voice communication data and video communication data), which can be implemented by flash memory (FLASH) or random access memory (Random Access Memory, RAM).

Of course, the devices in the embodiments of the present application may also have other similar implementation cases of protocol interaction. Those skilled in the art can make various corresponding implementations according to the embodiments of the present application without departing from the spirit and essence of the present application. changes and deformations, but these corresponding changes and deformations should belong to the protection scope of the appended claims of the method of the present application.

As will be appreciated by those skilled in the art, the embodiments of the present application may be provided as a method, a system, or a computer program product. Accordingly, the application may take the form of a hardware embodiment, a software embodiment, or an embodiment combining software and hardware aspects. Furthermore, the present application may take the form of a computer program product embodied on one or more computer-usable storage media having computer-usable program code embodied therein, including but not limited to disk storage, optical storage, and the like.

The present application is described with reference to flowchart illustrations and/or block diagrams of methods, apparatus (systems), and computer program products according to embodiments of the present application. It will be understood that each flow and/or block in the flowchart illustrations and/or block diagrams, and combinations of flows and/or blocks in the flowchart illustrations and/or block diagrams, can be implemented by computer program instructions. These computer program instructions may be provided to the processor of a general purpose computer, special purpose computer, embedded processor or other programmable data processing device to produce a machine such that the instructions executed by the processor of the computer or other programmable data processing device produce A device that implements the functions specified in a flow or flow of a flowchart and/or a block or blocks of a block diagram.

These computer program instructions may also be stored in a computer readable memory capable of directing a computer or other programmable data processing apparatus to function in a particular manner, such that the instructions stored in the computer readable memory result in an article of manufacture comprising the instruction apparatus, the instructions The device implements the functions specified in the flow or flows of the flowcharts and/or the block or blocks of the block diagrams.

These computer program instructions can also be loaded on a computer or other programmable data processing device to cause a series of operational steps to be performed on the computer or other programmable device to produce a computer-implemented process such that The instructions provide steps for implementing the functions specified in the flow or blocks of the flowcharts and/or the block or blocks of the block diagrams.

It is to be understood that reference throughout the specification to "one embodiment" or "an embodiment" means that a particular feature, structure or characteristic associated with the embodiment is included in at least one embodiment of the present application. Thus, appearances of "in one embodiment" or "in an embodiment" in various places throughout this specification are not necessarily necessarily referring to the same embodiment. Furthermore, the particular features, structures or characteristics may be combined in any suitable manner in one or more embodiments. It should be understood that, in various embodiments of the present application, the size of the sequence numbers of the above-mentioned processes does not mean the sequence of execution, and the execution sequence of each process should be determined by its functions and internal logic, and should not be dealt with in the embodiments of the present application. implementation constitutes any limitation. The above-mentioned serial numbers of the embodiments of the present application are only for description, and do not represent the advantages or disadvantages of the embodiments.

It should be noted that, herein, the terms "comprising", "comprising" or any other variation thereof are intended to encompass non-exclusive inclusion, such that a process, method, article or device comprising a series of elements includes not only those elements, It also includes other elements not expressly listed or inherent to such a process, method, article or apparatus. Without further limitation, an element qualified by the phrase "comprising a..." does not preclude the presence of additional identical elements in a process, method, article or apparatus that includes the element.

In the several embodiments provided in this application, it should be understood that the disclosed apparatus and method may be implemented in other manners. The device embodiments described above are only illustrative. For example, the division of the modules is only a logical function division. In actual implementation, there may be other division methods. For example, multiple modules or components may be combined, or Can be integrated into another system, or some features can be ignored, or not implemented. In addition, the coupling, or direct coupling, or communication connection between the various components shown or discussed may be through some interfaces, and the indirect coupling or communication connection of devices or modules may be electrical, mechanical or other forms. of.

The modules described above as separate components may or may not be physically separated, and the components shown as modules may or may not be physical modules; they may be located in one place or distributed to multiple network modules; Some or all of the modules may be selected according to actual needs to achieve the purpose of the solution in this embodiment.

The above is only the embodiment of the present application, but the protection scope of the present application is not limited to this. Covered within the scope of protection of this application. Therefore, the protection scope of the present application should be subject to the protection scope of the claims.

Claims (12)

1. A method for processing instruction data, wherein the method comprises: If it is determined that there are fields of the same type between the instructions before compilation, during compilation, the fields of the same type are stored in the specified encoding position; generating a corresponding opcode according to the type of each of the pre-compiled instructions and the attribute information of the field of the same type; storing the opcode in the compiled instruction; The compiled instructions are output. 2. The method according to claim 1, wherein generating a corresponding opcode according to the type of each of the pre-compiled instructions and the attribute information of the same type field, comprising: If it is determined that the fields of the same type include source operand fields, determining the number and type of the source operand fields; A corresponding opcode is generated according to the type of each of the precompiled instructions, and the number and type of the source operand fields. 3. The method according to claim 2, wherein the method further comprises: According to the function to be performed by each pre-compiled instruction, classify the pre-compiled instructions to obtain a classification result; Correspondingly, if it is determined that the fields of the same type include source operand fields, determining the number and type of the source operand fields includes: If it is determined that the fields of the same type include source operand fields, the number and type of the source operand fields are determined according to the classification result. 4. The method according to claim 3, wherein generating a corresponding opcode according to the type of each said pre-compiled instruction, the quantity and type of the source operand field, comprising: Marking the type of each of the pre-compiled instructions, and generating a first identification code corresponding to each of the pre-compiled instructions; generating a corresponding second identification code according to the quantity and type of the source operand field; The first identification code and the second identification code are combined to generate a corresponding operation code. 5. A method for processing instruction data, wherein the method comprises: Determine the opcode in the compiled instruction; According to the operation code, determine the type of the instruction and attribute information of the field in the instruction; According to the attribute information of the field, determine the field of the corresponding type from the specified encoding position in the instruction; Obtain the corresponding operand according to the field of the corresponding type, and output the operand. 6. The method according to claim 5, wherein the determining the type of the instruction and the attribute information of the fields in the instruction according to the operation code comprises: If it is detected that the instruction needs to obtain the source operand field, parse the operation code corresponding to the instruction that needs to obtain the source operand field, and obtain the analysis result; According to the parsing result, the type of the instruction and the attribute information of the source operand field are determined. 7. The method according to claim 6, characterized in that, determining a field of a corresponding type from a specified encoding position in the instruction according to the attribute information of the field, comprising: Determine the type of the instruction according to the first identification code parsed from the operation code; Determine the number and type of the source operand field according to the second identification code parsed from the opcode; The source operand field is determined from a specified encoding position in the instruction based on the number and type of the source operand field. 8. The method according to claim 7, characterized in that, acquiring the corresponding operand according to the field of the corresponding type, and outputting the operand, comprising: determining the number and address of the source operand according to the source operand field; Obtain the source operand according to the number and address of the source operand, and output the source operand. 9. An apparatus for processing instruction data, wherein the apparatus comprises: a first storage unit, configured to store the same type of field in a specified encoding position when compiling if it is determined that there are fields of the same type between the instructions before compilation; a generating unit, configured to generate a corresponding opcode according to the type of each of the pre-compiled instructions and the attribute information of the field of the same type; a second storage unit, configured to store the operation code in the compiled instruction; The first output unit is configured to output the compiled instruction. 10. An apparatus for processing instruction data, wherein the apparatus comprises: a first determining unit, configured to determine an opcode in the compiled instruction; a second determining unit, configured to determine the type of the instruction and attribute information of a field in the instruction according to the operation code; a third determining unit, configured to determine a corresponding type of field from the specified encoding position in the instruction according to the attribute information of the field; The second output unit is configured to obtain the corresponding operand according to the field of the corresponding type, and output the operand. 11. A computer device, characterized in that the computer device at least comprises: a processor and a storage medium configured to store executable instructions, wherein: The processor is configured to execute the stored executable instructions, and the executable instructions are configured to execute the method for processing instruction data provided by any one of claims 1 to 10 above. 12. A computer-readable storage medium storing computer-executable instructions, the computer-executable instructions being configured to execute the processing method of the instruction data provided by any one of the preceding claims 1 to 10. step.

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