CN101118498A - Assembler Based on User Description and Its Realization Method - Google Patents

Abstract

A user-description-based assembler and its implementation method in the field of computer technology, wherein: the ISA description module reads in the instruction set architecture information described by the user, and extracts ISA data from the user's description information to automatically configure structured information module; the structured information automatic configuration module organizes the data into structured ISA information and outputs it to the ISA information base management module; the ISA information base management module stores the structured instruction structure information into the memory, and will The ISA information is passed to the assembly function processing module; the assembly function module reads the assembly source file, and obtains the required ISA information from the ISA information database management module, which is used to process the assembly source file, and finally generates the corresponding binary code file. The present invention also provides the above-mentioned assembler generating method, which can conveniently and intuitively generate the assembler with corresponding assembler function according to the user's description of the ISA without repeated compiling.

Description

Assembler Based on User Description and Its Realization Method

technical field

The invention relates to a system in the field of computer technology and its implementation method, in particular to an assembler based on user description and its implementation method.

Background technique

The assembler is an important part of the compilation system, and its main function is to convert the source program written in assembly language into a binary form of the object file. The input to an assembler is an assembly language program, which can be the output of a compiler or a handwritten assembly language program. The output of the assembler is a binary object file.

In the design and implementation of existing assemblers, different assemblers must be developed for different instruction set architectures (hereinafter referred to as ISA) to meet the requirements of different processors, so that when developing a new processor, it is necessary to Redevelop the corresponding assembler. Currently, assemblers are typically co-developed with the corresponding processors. Different processors have different instruction word lengths, instruction encoding methods, register settings, etc., which make assemblers very different in implementation and structure. In addition, because of the difference in design ideas, the assembler will also be different in implementation and method. Different configurations of processors and different design ideas lead to differences in the structure and implementation methods of assemblers of different ISAs. Due to the existence of this difference, when improving and expanding each new ISA or the original ISA, it is necessary to develop an assembler adapted to it at the same time. The development of an assembler generally has high complexity and a large workload, and requires a long time and a lot of energy. In the whole compilation system, the assembler is an indispensable part, so develop an assembler that can instantly generate the corresponding assembly function according to the user's description of a certain ISA, so as to significantly shorten the development cycle and reduce the workload The investment of energy and energy is of vital significance to the development of processors and their corresponding compilation systems.

After searching the literature of the prior art, it was found that the patent "Automatic Processor Generation System and Method for Designing a Configurable Processor" (Patent Application number CN00812731) mentioned the configurable assembler based on the configuration method of Tansilika Company, this technology uses the instruction set system definition language developed by Tansilika Company to configure the assembler, and this method can also realize Generate corresponding assemblers for different ISAs. However, when users use the company's configurable assembler, they must first learn to use its instruction set system description language. To generate a relatively complete instruction set system, it is necessary to spend a lot of work in order to master it more proficiently. An instruction set architecture definition language. Moreover, this language is relatively abstract when describing the ISA, and is not easy to be mastered by users. It does not have the simplicity and intuition of describing the instruction set architecture. At the same time, in the relevant patents of Tansilika, the ISA of its definition language will generate corresponding code files, and then add them to code files that have nothing to do with ISA information to compile, and finally generate an assembler. In this way, every time an assembler with a different ISA is generated, it needs to be recompiled once, which makes it take a lot of time in the compilation process during the development process. Especially when making changes to the ISA, a small change will take a lot of time to compile. This approach undoubtedly increases the burden on the development process. To sum up, the configurable assembler described in this technology provides users with too complex and abstract description method, which is difficult to master; every time an assembler with different ISA is generated, it needs to be recompiled, which takes a lot of compilation time.

Contents of the invention

Aiming at the deficiencies in the prior art, the present invention proposes an assembler based on user description and its implementation method, so that it can conveniently and intuitively describe the ISA according to the user, and generate corresponding assembly functions in real time without repeated compiling. Assemblers to greatly reduce the development time and difficulty of developing assemblers corresponding to new instruction set architectures.

The present invention is achieved through the following technical solutions:

The assembler based on user description in the present invention includes: an ISA description module, a structured information automatic configuration module, an ISA information library management module, and a compilation function processing module. The ISA description module reads in the instruction set architecture information described by the user, and extracts the ISA data from the user's description information to the structured information automatic configuration module; the structured information automatic configuration module organizes the data into a structured The ISA information is output to the ISA information base management module; the ISA information base management module stores the structured instruction structure information in the memory to complete the definition of the ISA, and passes the ISA information required in the assembly process to the assembly function for processing module; the assembly function module reads in the assembly source file, and obtains the required ISA information from the ISA information base management module for processing the assembly source file, and finally generates a corresponding binary code file.

In the ISA description module, the user only needs to fill in the ISA information in a standardized form according to the specifications to complete the description of the ISA. The specific forms used include: instruction type table, mnemonic code table, suffix code table, operation Number code table, general purpose register code table and special purpose register table. Wherein: the instruction type table is used to describe the information of different instruction types of the ISA; the mnemonic code table is used to describe the binary code information of the instruction mnemonics belonging to a certain instruction type; the suffix code The table is used to describe the binary encoding information of the suffix used by the instruction belonging to a certain instruction type; the said operand encoding table is used to describe the binary encoding information of the operand used by the instruction belonging to a certain instruction type; the said The general-purpose register table is used to describe the information of the general-purpose registers used by the ISA; the special-purpose register table is used to describe the information of the special-purpose registers used by the ISA;

In the structured information automatic configuration module, the basic structure containing ISA-related information is organized into a structured definition, and each ISA instruction type will correspond to an instruction structure, which is used to describe all information of this type of instruction. The opcode attribute in the instruction structure of this type of instruction is an opcode structure. The instruction mnemonic name list of this opcode structure records all the instruction mnemonic names belonging to this instruction type. The instruction mnemonic code list follows the instruction The sequence of mnemonics in the mnemonic name list records the encoding information of the instruction mnemonics, and the suffix list attribute corresponds to a set of instruction operand structures used to record the suffix information used by the instruction type. The operand attribute of the instruction structure corresponds to a group of instruction operand structures used to record the operand information used by the instruction type. All binary encoding information used is stored in the instruction encoding common structure.

The ISA information base management module includes an ISA definition submodule and an instruction set system search submodule. According to the size and structure of the ISA code information transmitted by the structured information automatic configuration module, the described ISA definition sub-module dynamically applies for memory to store these code information, and according to the general ISA structure defined by the present invention described in the previous paragraph The ISA definition method in the method implements the definition of the ISA; the instruction set system search submodule searches the defined ISA in the memory according to the needs of the assembly function processing module, and outputs the required information to the assembly function processing module.

The assembly function processing module is used to perform the actual assembly function on the assembly source file. This module does not contain the relevant information of the ISA. During the assembly process, the relevant information of the ISA will be obtained from the ISA information base management module. This module reads in and reads assembly instructions from the assembly source file, and notifies the ISA information library management module to search for the definition of the ISA in the internal memory, and extracts the required information therefrom, according to the ISA in the general ISA structure method defined by the present invention above The method of parsing parses out the assembly instruction, completes the encoding of the binary instruction code, and finally outputs the binary instruction code file.

The realization method based on the assembler of user described in the present invention, comprises the following steps:

The first step, compiling the source program of the assembler based on the user description described in the present invention;

In the second step, the user uses a simple, easy and intuitive description method for ISA defined by the present invention to describe the ISA, and the user only needs to fill in the ISA information in the standardized form according to the specification to complete the description of the ISA;

The third step is to extract the relevant data in the user's description of the ISA;

The fourth step is to organize the extracted ISA-related data into a highly versatile, extensible structured ISA that can provide a good interface to meet the expansion requirements of instructions, and is conducive to efficient assembler instruction parsing and encoding information structure;

In the fifth step, the organized ISA information is dynamically stored in the memory according to its size and structure, and the definition of the ISA is completed by using the method of instruction definition based on the basic structure described in step 4;

The sixth step is to read the assembly source code and assemble each assembly instruction one by one, and obtain relevant ISA clue information from the assembly instruction;

The seventh step is to extract the required ISA information from the ISA definition in the memory according to the clue information;

The eighth step, according to the ISA information, adopt the method of instruction analysis based on the basic structure and instruction definition described in step 4 to complete the analysis of the assembly instruction and finally complete the encoding of the binary instruction;

The ninth step is to complete the processing of all assembly instructions in the assembly source code, and output the binary code file;

In the tenth step, if you want to regenerate the new ISA assembler, go to the second step to start again, and you can complete the corresponding assembly function without recompiling.

The standardized table described in the second step includes: instruction type table, mnemonic code table, suffix code table, operand code table, general purpose register code table and special purpose register table. An instruction set architecture description has only one instruction type table, one general purpose register table, and one special purpose register table. Each instruction type in the instruction type table will correspond to a mnemonic code table, a suffix code table, and an operand code table, which are used to describe the operation code and operand information of this type of instruction.

in:

The instruction type table is used to describe the information of different instruction types of ISA, including: the name of the instruction type, the number of operands carried by this type of instruction, the number of suffixes that can be used, the identifier of the instruction type, the type of the operand, the instruction Types use the prefix six attributes.

The mnemonic encoding table is used to describe the binary encoding information of the instruction mnemonics belonging to a certain instruction type, including: the name of the mnemonic, the starting position of each mnemonic encoding, the length of each encoding, and the mnemonic Encodes the number of segments to be divided, and encodes five attributes of the mnemonic.

The suffix encoding table is used to describe the binary encoding information of the suffix used by the instruction belonging to a certain instruction type, including: suffix name, the starting position of each suffix encoding, the length of each encoding segment, the number of segments for which the suffix encoding is divided, and the suffix An encoding of the six attributes of the type to which the suffix belongs.

The operand encoding table is used to describe the binary encoding information of operands used by instructions belonging to a certain instruction type, including: the type name of the operand, the starting position of each operand encoding, the length of each encoding, and mnemonic There are eight attributes including the number of segments where the symbol code is divided, the code of the operand, whether the value of the immediate value is an offset identifier relative to the current instruction, the type of relocation of the immediate value, and the special processing method of the immediate value. Whether the value of the immediate value is an offset identifier relative to the current instruction, the type of relocation of the immediate value, and the special processing method of the immediate value are all related to the relocation of the immediate value. When the operand is a register, these three items are invalid .

The general-purpose register table is used to describe the information of the general-purpose registers used by the ISA, including: the identification name of the register, the start number of the register, the end number of the register, and the corresponding relationship between register aliases to describe four attributes.

The special-purpose register table is used to describe the information of the special-purpose registers used by the ISA, including: the name of the special-purpose register, the starting position of each special-purpose register code, the length of each code, and the number of segments where the special-purpose register code is divided , the encoding of the special purpose register consists of five attributes.

The structured ISA information structure described in the fourth step adopts a general and extensible ISA structure method, which is mainly used for the definition of ISA and the analysis of ISA instructions. The method includes a set of basic structures for instruction definition and instruction analysis, a method for instruction definition based on the above-mentioned basic structure (that is, the method adopted in the fifth step), and a method for instruction analysis based on the above-mentioned basic structure and instruction definition ( That is, the method adopted in the eighth step). In the fourth step, the data will be organized into the above basic structure.

The basic structure used for instruction definition and instruction analysis includes: instruction structure, general structure of instruction encoding, instruction opcode structure and instruction operand structure, wherein:

An instruction structure describes all information about an instruction belonging to the same type. It includes five basic attributes: instruction type, opcode, operand array, number of operands, and format description. Wherein, the opcode attribute is an instruction opcode structure, and the operation array attribute is an array of instruction operand structures.

The general structure of the instruction encoding describes and records the location of the fields and the specific machine codes corresponding to the fields. It contains four attributes: field start position array, field length array, field segment number and field value.

The instruction opcode structure is used to describe the instruction opcode information, and its attributes include: prefix name, instruction mnemonic name list, instruction mnemonic encoding list, instruction mnemonic name list length, suffix list, and number of suffix types. Among them, the instruction mnemonic encoding list is an array of common data structures encoded by instructions, and the suffix list is an array of instruction operand structures, which are used to describe special operands such as suffixes.

The instruction operand structure description includes information about register operands, immediate operands, special operands and addressing modes, and its attributes include: type definition, operand name list, operand encoding list, composite operand pointer, Relocation type, relative jump flag. Wherein, the operand encoding list is an array of common data structures of instruction encoding.

The method of instruction definition based on the basic structure described in the fifth step refers to organizing the basic structure containing ISA-related information into a structured definition. In this method, each ISA instruction type will correspond to an instruction structure, which is used to describe all information of this type of instruction. The opcode attribute in the instruction structure of this type of instruction is an opcode structure. The instruction mnemonic name list of this opcode structure records all the instruction mnemonic names belonging to this instruction type. The instruction mnemonic code list follows the instruction The sequence of mnemonics in the mnemonic name list records the encoding information of the instruction mnemonics, and the suffix list attribute corresponds to a set of instruction operand structures used to record the suffix information used by the instruction type. The operand attribute of the instruction structure corresponds to a group of instruction operand structures used to record the operand information used by the instruction type. The used binary encoding information (including instruction mnemonics, suffixes, and operands) is stored in the instruction encoding general structure.

The method of instruction parsing based on the basic structure and instruction definition described in the eighth step refers to: for each assembly instruction, lexical analysis of its opcode (comprising instruction mnemonic and suffix), operand, and analyzing the obtained The information is populated into the instruction parsing structure based on the basic structure. This structure uses an instruction structure, fills the opcode information of the assembly instruction into the opcode structure corresponding to the opcode attribute of the instruction structure, and at the same time fills the operand information of the assembly instruction into the operand attribute of the instruction structure Go to the corresponding set of operand structures. Find the instruction type that matches the instruction according to the instruction mnemonic and the operand, look up the instruction definition table that matches the instruction type according to the instruction type, and determine the specific encoding definition of the opcode operand (stored in a general encoding structure), fill in Instruction parsing structure to go. The general coding structure in the data field coding is scanned sequentially to complete the final instruction coding.

The method of regenerating a new ISA assembler described in the tenth step is: based on the ISA information described by the user, it is stored in the memory, so that when generating a new assembly function assembler, only the corresponding user-described The ISA instruction information is structured and stored in the memory for use in the assembly process, and the corresponding assembly function can be completed without recompiling to generate an assembler, which saves a lot of compilation time in the development process.

Compared with the prior art, the present invention has the following beneficial effects: the present invention uses the user to fill in a standardized form to describe the architecture of the relevant instruction set. Description language, you can easily describe the ISA. These normalized tables are highly versatile and meet the description requirements of various instruction set architectures today. The present invention adopts a general scalable ISA structure, supports the requirements and design ideas of the existing instruction set architecture to the greatest extent, satisfies the development needs of assemblers of various instruction set architectures, and makes the development of assemblers The time and labor of development is greatly reduced. At the same time, in the generation process of the new ISA assembler, the method of exempting compilation is adopted, which saves a lot of development time in the development process.

Description of drawings

Figure 1 is a schematic structural diagram of an assembler based on user descriptions;

FIG. 2 is a schematic structural diagram of a table used to describe the specification plan of the ISA;

Fig. 3 is a structural schematic diagram of the basic structure in the general scalable ISA structural method;

Fig. 4 is a schematic diagram of the method of instruction definition in the structure method of general extensible ISA;

Fig. 5 is a schematic diagram of a method for instruction parsing in a general scalable ISA structure method;

Detailed ways

The embodiments of the present invention are described in detail below in conjunction with the accompanying drawings: this embodiment is implemented on the premise of the technical solution of the present invention, and detailed implementation methods and specific operating procedures are provided, but the protection scope of the present invention is not limited to the following the described embodiment.

As shown in FIG. 1 , the assembler of the embodiment of the present invention includes: an ISA description module, a structured information automatic configuration module, an ISA information library management module, and an assembly function processing module. The ISA information base management module includes an ISA definition submodule and an instruction set system search submodule.

The ISA description module will read in the instruction set architecture information described by the user, and output the relevant data extracted from it to the structured information automatic configuration module; the structured information automatic configuration module organizes the data into structured ISA information and outputs it to the ISA Information base management module; the ISA definition sub-module in the ISA information base management module stores the structured instruction structure information in the memory, and the instruction set system search sub-module searches the ISA definition information in the memory for the ISA required in the assembly process The information is passed to the assembly function processing module; the assembly function module reads the assembly source file, and obtains the required ISA information from the instruction set system library management module for processing the assembly source file, and finally generates the corresponding binary code file.

Below in conjunction with accompanying drawings 2-5, take the application of the device and method of the present invention in developing an assembly instruction set assembler of an ARM processor as an example, and further describe the technical solution of the present invention in detail. The ARM processor has a 32-bit ARM instruction set and a 16-bit Thumb instruction set. In this example, the 32-bit ARM instruction set is used to develop an assembler with corresponding assembly functions. The process is described as follows:

First compile the source program based on the user-described assembler described in the present invention, and generate this part of the source program without specific ISA information.

As shown in Figure 2, it shows the standardized tables filled in by the user when describing the ISA and the relationship between these tables. Users need to fill in the relevant information of an ISA into these forms as follows. These tables include: Instruction Type Table, Mnemonic Code Table, Suffix Code Table, Operand Code Table, General Purpose Register Code Table, and Special Purpose Register Table. An instruction set architecture description has only one instruction type table, one general purpose register table, and one special purpose register table. Each instruction type in the instruction type table will correspond to a mnemonic code table, a suffix code table, and an operand code table, which are used to describe the operation code and operand information of this type of instruction.

32-bit ARM instructions have many different instruction types, and instructions of the same instruction type have the same number and type of operands, the same instruction word length, and their operators and operands have the same encoding position. Fill in the information of these instruction types into the instruction type table, which contains six attributes, describing the name of the instruction type, the number of operands carried by this type of instruction, the number of suffixes that can be used, the identification of the instruction type, and the number of operands The type of the instruction type, the prefix used by the instruction type and other information about the instruction type.

The specific information of each instruction type in the ARM instruction set will be filled in by the user into a corresponding mnemonic code table, a suffix code table and an operand code table. Among them, the mnemonic code table records the binary code information of the mnemonic of each instruction belonging to this type, including the starting position of each mnemonic code, the length of each code, and the division of the mnemonic code. Number of segments, encoding of the mnemonic. The suffix code table records the binary code information of the suffix used by this type of instruction, including the starting position of each suffix code, the length of each code segment, the number of segments the suffix code is divided into, the code of the suffix, and the suffix to which the suffix belongs. type. The operand encoding table records the encoding information of the operands of this type of instruction, including the start position of each operand encoding, the length of each encoding, the number of segments where the mnemonic encoding is divided, the encoding of the operand, and the immediate Whether the value of the number is an offset identifier relative to the current instruction, the relocation type of the immediate value, and the special processing method of the immediate value. Whether the value of the immediate value is an offset identifier relative to the current instruction, the type of relocation of the immediate value, and the special processing method of the immediate value are all related to the relocation of the immediate value. When the operand is a register, these three items are invalid .

Some general-purpose registers and special-purpose registers are used in the ARM instruction set. Users need to fill in the information of these registers in the general-purpose register table and special-purpose register table to represent the information of these registers. Wherein, the general-purpose register table includes the identification name of the register, the start number of the register, the end number of the register, the description of the corresponding relationship of the register alias, and the like. The special purpose register table describes the binary encoding information of the special purpose register, including the encoding start position, the length of each segment of the encoding, the number of segments into which the special purpose register encoding is divided, and the encoding of the special purpose register.

The ISA description module reads the information in the above table describing the ISA, extracts relevant ISA data and sends it to the structured information automatic configuration module.

The structured information automatic configuration module organizes these data into structured ISA code information. The ISA code information is the basic structure in a general scalable ISA structure method adopted by the present invention. This general and extensible ISA structure method is used for the definition of ISA and the parsing of ISA instructions. The method includes a set of basic structures for instruction definition and instruction analysis, a method for instruction definition based on the above basic structure, and a method for instruction analysis based on the above basic structure and instruction definition. Among them, the instruction definition method and the instruction analysis method will be used in the following process.

As shown in Figure 3, the above-mentioned basic structure includes: instruction structure, general structure of instruction encoding, instruction opcode structure and instruction operand structure.

The instruction structure describes all information about instructions belonging to the same type: name of instruction type, opcode, operand array, number of operands, format description. Wherein, the opcode is an instruction opcode structure, the operand array is a collection of instruction operand structures, and the format description will describe the arrangement format of the operands.

The general structure of the instruction encoding describes and records the position of the fields used by each part of the instruction in the binary encoding and the specific machine encoding corresponding to the fields. Including the field start position array, field length array, field segment number and field value.

The instruction opcode structure is used to describe the instruction opcode information, including: instruction mnemonic name list, instruction mnemonic code list, instruction mnemonic name list length, suffix list, and number of suffix types. Among them, the instruction mnemonic encoding list is a collection of common data structures for instruction encoding, and the suffix list is a collection of instruction operand structures, which are used to describe special operands such as suffixes.

The instruction operand structure description includes register operand, immediate operand, special operand and addressing mode and other operand information, including: operand type definition, operand name list, operand encoding list, composite operand pointer, Relocation type, relative jump flag. Among them, the type definition indicates registers, immediate values, suffixes and corresponding operands; when the operand name list is a suffix, this item is a collection of names that list a certain type of suffix; when the operand is an immediate value or a register, the information has only one item, indicating that it is a register or an immediate value; the operand encoding list is an array of general data structures encoded by instructions; the relocation type is only valid when the operand is an immediate value, and identifies the immediate value Positioning type; relative jump flag When the operand is an immediate value, the value of the immediate value is the offset relative to the current address.

The structured information automatic configuration module transmits the basic structure containing structured ISA information to the ISA information management module one by one, and the ISA definition sub-module of this module follows the size and size of the ISA code information transmitted by the structured information automatic configuration module. structure, dynamically apply for memory to store these code information, and realize the definition of ISA according to the ISA definition method in the general ISA structure method defined in the present invention.

As shown in FIG. 4, the ISA definition method is a method defined based on basic structure instructions in the structure method of the general extensible ISA. Organize basic structures containing ISA-related information into structured definitions. In this method, each ISA instruction type will correspond to an instruction structure, which is used to describe all information of this type of instruction. The opcode attribute in the instruction structure of this type of instruction is an opcode structure. The instruction mnemonic name list of this opcode structure records all the instruction mnemonic names belonging to this instruction type. The instruction mnemonic code list follows the instruction The sequence of mnemonics in the mnemonic name list records the encoding information of the instruction mnemonics, and the suffix list attribute corresponds to a set of instruction operand structures used to record the suffix information used by the instruction type. The operand attribute of the instruction structure corresponds to a group of instruction operand structures used to record the operand information used by the instruction type. The used binary encoding information (including instruction mnemonics, suffixes, and operands) is stored in the instruction encoding general structure.

The assembly function processing module reads and reads assembly instructions from the assembly source file, and notifies the ISA information base management module, the instruction set system search sub-module of the ISA information base management module extracts the required information from the ISA definition in the memory, according to the aforementioned The ISA parsing method in the general ISA structure method parses the assembly instruction, completes the encoding of the binary instruction code, and finally outputs the binary instruction code file.

As shown in FIG. 5 , the method adopted for parsing assembly instructions is a method for parsing instructions based on the basic structure and instruction definition in the structure method of the general extensible ISA. In this method, for each assembly instruction, its operation code (including instruction mnemonic and suffix) and operands are lexically analyzed, and the information obtained from the analysis is filled into the instruction analysis structure based on the basic structure. This structure uses an instruction structure, fills the opcode information of the assembly instruction into the opcode structure corresponding to the opcode attribute of the instruction structure, and at the same time fills the operand information of the assembly instruction into the operand attribute of the instruction structure Go to the corresponding set of operand structures. Find the instruction type that matches the instruction according to the instruction mnemonic and the operand, look up the instruction definition table that matches the instruction type according to the instruction type, and determine the specific encoding definition of the opcode operand (stored in a general encoding structure), fill in Instruction parsing structure to go. The general coding structure in the data field coding is scanned sequentially to complete the final instruction coding.

After the binary instruction code file of the source file is generated, the assembly function of the ARM instruction set is completed.

To regenerate a new ISA assembler, the user only needs to fill in the new ISA information into a corresponding standardized form, hand it to the ISA description module, and repeat the above process to complete the corresponding assembly function. Thus, the corresponding assembler is generated without recompilation.

It can be seen from the above that the present invention proposes an assembler based on the user's description of the instruction set architecture to obtain the corresponding assembly function. It uses a highly abstract user-oriented general instruction set architecture description method, which is simple, easy to implement, and intuitive, and can easily generate the required assembler without mastering a complex description language. It also adopts a highly versatile and extensible instruction set architecture data structure that can provide a good interface to meet the expansion requirements of instructions, and is conducive to efficient assembler instruction parsing and encoding, so that the present invention can support the present invention to the greatest extent. The requirements and design ideas of some instruction set architectures meet the development needs of assemblers of various instruction set architectures. At the same time, the present invention also supports a method for generating an assembler without compiling, so that the assembler program can receive the information obtained by the user describing the instruction set architecture during the running process after the compilation, and complete the function of the assembler , thus saving the trouble of recompiling every time an assembler is generated.

Claims (10)

1. a kind of assembler based on user description, comprising: ISA description module, structured information automatic configuration module, ISA information base management module and assembly function processing module, it is characterized in that: The ISA description module reads in the instruction set architecture information described by the user, and extracts the instruction set architecture data from the user's description information to the structured information automatic configuration module. The user only needs to fill in the instruction set architecture information according to the specification. The description of the instruction set architecture can be completed by entering the standardized table; The structured information automatic configuration module organizes data into structured instruction set architecture information and outputs it to the ISA information base management module; The ISA information library management module stores the structured instruction structure information into the memory to complete the definition of the instruction set architecture, and passes the ISA information required in the assembly process to the assembly function processing module; The assembly function module reads in the assembly source file, and obtains the required instruction set architecture information from the ISA information base management module for processing the assembly source file, and finally generates a corresponding binary code file. 2. The assembler based on user description according to claim 1, wherein the information used by the ISA description module includes: instruction type table, mnemonic code table, suffix code table, operand code table, General-purpose register encoding table and special-purpose register table, where: The instruction type table is used to describe information of different instruction types of the instruction set architecture; The mnemonic encoding table is used to describe the binary encoding information of the instruction mnemonics belonging to a certain instruction type; The suffix encoding table is used to describe the binary encoding information of the suffix used by the instruction belonging to a certain instruction type; The operand encoding table is used to describe binary encoding information of operands used by instructions belonging to a certain instruction type; The general-purpose register table is used to describe the information of the general-purpose registers used by the instruction set architecture; The special purpose register table is used to describe the information of special purpose registers used by the instruction set architecture. 3. The assembler based on user description according to claim 1, characterized in that, the structured information of the structured information automatic configuration module, the output of the structured ISA code information, will contain the basic information of the relevant information of the instruction set architecture The structure is organized into a structured definition. Each instruction set architecture instruction type will correspond to an instruction structure, which is used to describe all information of this type of instruction. The opcode attribute in the instruction structure of this type of instruction is an opcode structure. The instruction mnemonic name list of the opcode structure records all instruction mnemonic names belonging to the instruction type, and the instruction mnemonic encoding list records the instruction mnemonics in the order of mnemonics in the instruction mnemonic name list The suffix list attribute corresponds to a set of instruction operand structures used to record the suffix information used by the instruction type, and the operand attribute of the instruction structure corresponds to a set of instruction operand structures used to record the suffix information used by the instruction type. The operand information and the binary encoding information used are all stored in the instruction encoding general structure. 4. The assembler based on user description according to claim 1, characterized in that, said ISA information base management module includes an ISA definition submodule and an instruction set system search submodule, and said ISA definition submodule follows The size and structure of the instruction set architecture code information transmitted by the structured information automatic configuration module, dynamically apply for memory to store these code information, and implement the definition of the instruction set architecture by using the method of instruction definition based on the basic structure; The instruction set architecture search submodule searches the instruction set architecture defined in the memory according to the needs of the assembly function processing module, and outputs the required information to the assembly function processing module. 5. The assembler based on user description according to claim 1, characterized in that, the assembly function processing module does not contain the relevant information of the instruction set architecture, and during its execution of the assembly process, the relevant information of the instruction set architecture The information is obtained from the ISA information base management module, which reads and reads assembly instructions from the assembly source file, and notifies the ISA information base management module to search for the definition of the instruction set architecture in the memory, extract the required information from it, and adopt the structure The instruction parsing method based on the basic structure and instruction definition in the standardized ISA information structure parses the assembly instruction, completes the coding of the binary instruction code, and finally outputs the binary instruction code file. 6. A method for implementing an assembler based on user description, comprising the following steps: The first step is to compile the source program based on the assembler described by the user; In the second step, the user uses the instruction set architecture description method to describe the instruction set architecture. The user only needs to fill in the instruction set architecture information into the standardized form according to the specification to complete the description of the ISA; The third step is to extract the relevant data in the user's description of the instruction set architecture; The fourth step is to organize the extracted instruction set architecture-related data into a structured ISA information structure. The structured ISA information structure includes: a set of basic structures for instruction definition and instruction analysis, based on the above The method of instruction definition of the basic structure, and the method of instruction analysis based on the above basic structure and instruction definition, in the fourth step, the data will be organized into the above basic structure; The fifth step is to dynamically store the organized instruction set architecture information in the memory according to its size and structure, and use the method of instruction definition based on the basic structure described in step four to complete the definition of the instruction set architecture ; The sixth step is to read the assembly source code and assemble each assembly instruction one by one, and obtain the relevant instruction set architecture clue information from the assembly instruction; The seventh step is to extract the required instruction set architecture information from the instruction set architecture definition in the memory according to the clue information; In the eighth step, according to the instruction set architecture information, the method of instruction analysis based on the basic structure and instruction definition described in step 4 is used to complete the analysis of the assembly instructions and finally complete the encoding of the binary instructions; The ninth step is to complete the processing of all assembly instructions in the assembly source code, and output the binary code file; In the tenth step, if you want to regenerate the assembler of the new instruction set architecture, go to the second step and start again, that is, complete the corresponding assembly function without recompiling. 7. The method for implementing an assembler based on user description according to claim 6, characterized in that, in the description method of the instruction set architecture described in the second step, the specifically used standardized tables include: instruction type table, Mnemonic code table, suffix code table, operand code table, general purpose register code table, and special purpose register table, where: The instruction type table is used to describe information of different instruction types of the instruction set architecture; The mnemonic encoding table is used to describe the binary encoding information of the instruction mnemonics belonging to a certain instruction type; The suffix encoding table is used to describe the binary encoding information of the suffix used by the instruction belonging to a certain instruction type; The operand encoding table is used to describe binary encoding information of operands used by instructions belonging to a certain instruction type; The general-purpose register table is used to describe the information of the general-purpose registers used by the instruction set architecture; The special purpose register table is used to describe the information of special purpose registers used by the instruction set architecture. 8. The method for implementing an assembler based on user description according to claim 6 or 7, wherein the described method for describing the instruction set architecture refers to: a set of instruction set architecture description has only one instruction Type table, a general-purpose register table, and a special-purpose register table. Each instruction type in the instruction type table will correspond to a mnemonic code table, a suffix code table, and an operand code table, which are used to describe the type. Information about the instruction's opcode and operands; The instruction type table includes: the name of the instruction type, the number of operands carried by this type of instruction, the number of suffixes that can be used, the identifier of the instruction type, the type of the operand, and the six attributes of the prefix used by the instruction type; The mnemonic encoding table includes: mnemonic name, starting position of each segment of mnemonic encoding, length of encoding of each segment, number of segmented segments of mnemonic encoding, and five attributes of mnemonic encoding; The suffix coding table includes: suffix name, starting position of each segment of suffix coding, length of coding of each segment, number of segmented segments of the suffix coding, coding of the suffix, and six attributes of the type to which the suffix belongs; The operand encoding table includes: the type name of the operand, the starting position of each segment of the operand encoding, the length of each segment of the encoding, the number of segmented segments of the mnemonic encoding, the encoding of the operand, and whether the value of the immediate value is These are the eight attributes of the offset identifier relative to the current instruction, the relocation type of the immediate value, and the special processing mode of the immediate value. Among them, whether the value of the immediate value is an offset identifier relative to the current instruction, the relocation of the immediate value The type of positioning and the special handling of immediate data are related to the relocation of immediate data. When the operand is a register, these three items are invalid; The general-purpose register table includes: the identification name of the register, the start number of the register, the end number of the register, and the corresponding relationship description of the register alias to form four attributes; The special-purpose register table includes: the name of the special-purpose register, the starting position of each special-purpose register code, the length of each code, the number of segments that the special-purpose register code is divided into, and five attributes of the special-purpose register code . 9. The method for implementing an assembler based on user description according to claim 6, wherein the basic structure used for instruction definition and instruction analysis includes: instruction structure, general structure of instruction encoding, instruction operation code structure and instruction operand structure, The instruction structure describes all information of instructions belonging to the same type, and it includes five basic attributes: instruction type, opcode, operand array, number of operands, and format description, wherein: the opcode attribute is the instruction opcode structure, The operation array attribute is an array of instruction operand structures; The general structure of the instruction encoding describes and records the position of the domain and the specific machine code corresponding to the domain, and it includes four attributes: an array of domain start positions, an array of domain lengths, the number of domain segments and domain values; The instruction opcode structure is used to describe the instruction opcode information, and its attributes include: prefix name, instruction mnemonic name list, instruction mnemonic code list, instruction mnemonic name list length, suffix list, suffix type number number, where: the instruction mnemonic code list is an array of general data structures encoded by instructions, and the suffix list is an array of instruction operand structures, which are used to describe special operands such as suffixes; The instruction operand structure description includes information about register operands, immediate operands, special operands and addressing mode operands, and its attributes include: type definition, operand name list, operand encoding list, composite operand pointer, relocation type, and relative jump flag, wherein: the operand encoding list is an array of general data structures for instruction encoding; The method of instruction definition based on the basic structure refers to: organize the basic structure containing the relevant information of the instruction set architecture into a structured definition, and each instruction type of the instruction set architecture will correspond to an instruction structure, which is used for Describe all the information of this type of instruction. The opcode attribute in the instruction structure of this type of instruction is an opcode structure. The instruction mnemonic name list of this opcode structure records all the instruction mnemonic names belonging to this instruction type. The instruction mnemonic encoding list records the encoding information of the instruction mnemonics in the order of the mnemonics in the instruction mnemonic name list, and the suffix list attribute corresponds to a set of instruction operand structures used to record the suffix used by the instruction type Information, the operand attribute of the instruction structure corresponds to a set of instruction operand structures used to record the operand information used by the instruction type, and the binary encoding information used is stored in the instruction encoding general structure; The described instruction analysis method based on the basic structure and instruction definition refers to: for each assembly instruction, its opcode and operand are analyzed lexically, and the information obtained by the analysis is filled into the instruction analysis structure based on the basic structure. , the structure uses an instruction structure, fills the opcode information of the assembly instruction into the opcode structure corresponding to the opcode attribute of the instruction structure, and at the same time fills the operand information of the assembly instruction into the operand attribute of the instruction structure Go to the corresponding set of operand structures, find the instruction type that matches the instruction according to the instruction mnemonic and the operand, look up the instruction definition table that matches the instruction type according to the instruction type, and determine the specific encoding of the opcode operand Define, fill in the instruction parsing structure, and scan the general encoding structure in the data field encoding in turn to complete the final instruction encoding. 10. The method for implementing an assembler based on user description according to claim 6, wherein the method for regenerating the assembler of a new instruction set architecture is: based on the instruction set architecture described by a user The information is stored in the memory, so that when generating a new assembly function assembler, as long as the corresponding instruction set architecture instruction information described by the user is structured and stored in the memory for use in the assembly process, the corresponding assembly function is completed without requiring Generate assembler by recompilation method.

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