CN111240682B - A method, device, and storage medium for processing instruction data - Google Patents

Abstract

The embodiment of the application discloses a method, a device, equipment and a storage medium for processing instruction data, wherein the method comprises the following steps: if the fact that the same type of fields exist among the instructions before compiling is determined, storing the same type of fields to a designated coding position during compiling; generating a corresponding operation code according to the type of each instruction before compiling and the attribute information of the fields of the same type; storing the operation code into a compiled instruction; outputting the compiled instruction.

Description

A method, device, and storage medium for processing instruction data

Technical Field

The embodiments of the present application relate to a computer system, and relate to but are not limited to a method and apparatus, device, and storage medium for processing instruction data.

Background Art

A network processor is a processor specifically used for network data processing. It is mainly used in network products such as switches and routers, and is mostly used to process messages in the network. It has the advantages of high processing performance, programmability, flexible expansion, and short development cycle. It is precisely because the processing of network business data is different from that of ordinary system programs and its characteristic requirements that the instruction set design of the network processor must have the characteristics of high instruction execution efficiency, strong instruction scalability, and rich instruction set.

At the same time, on the basis of satisfying forwarding performance, it is necessary to reduce the complexity of logic design, reduce chip resources and reduce power consumption. These feature requirements require not only individual considerations for each process of instruction set design, but also overall considerations for all processes. Therefore, the instruction set design and processing of network processors is very complex.

Summary of the invention

In view of this, embodiments of the present application provide a method and apparatus, device, and storage medium for processing instruction data to solve at least one problem existing in the prior art.

The technical solution of the embodiment of the present application is implemented as follows:

In a first aspect, an embodiment of the present application provides a method for processing instruction data, the method comprising: if it is determined that there are fields of the same type between instructions before compilation, during compilation, storing the fields of the same type to a specified encoding position; generating a corresponding opcode based on the type of each instruction before compilation and the attribute information of the fields of the same type; storing the opcode in the compiled instruction; and outputting the compiled instruction.

In a second aspect, an embodiment of the present application provides a method for processing instruction data, the method comprising: determining an opcode in a compiled instruction; determining the type of the instruction and attribute information of a field in the instruction based on the opcode; determining a field of a corresponding type from a specified encoding position in the instruction based on the attribute information of the field; obtaining a corresponding operand based on the field of the corresponding type, and outputting the operand.

In a third aspect, an embodiment of the present application provides an instruction data processing device, the device comprising: a first storage unit, configured to store the fields of the same type to a designated encoding position during compilation if it is determined that there are fields of the same type between instructions before compilation; a generation unit, configured to generate a corresponding operation code based on the type of each instruction before compilation and the attribute information of the fields of the same type; a second storage unit, configured to store the operation code in the compiled instruction; and a first output unit, configured to output the compiled instruction.

In a fourth aspect, an embodiment of the present application provides a device for processing instruction data, the device comprising: a first determination unit, configured to determine an opcode in a compiled instruction; a second determination unit, configured to determine the type of the instruction and attribute information of a field in the instruction based on the opcode; a third determination unit, configured to determine a field of a corresponding type from a specified encoding position in the instruction based on the attribute information of the field; and a second output unit, configured to obtain a corresponding operand based on the field of the corresponding type and output the operand.

In a fifth aspect, an embodiment of the present application provides a computer device, which comprises at least: a processor and a storage medium configured to store executable instructions, wherein: the processor is configured to execute the stored executable instructions, and the executable instructions are configured to execute the instruction data processing method provided in the above embodiment.

In a sixth aspect, an embodiment of the present application provides a computer-readable storage medium, in which computer-executable instructions are stored, and the computer-executable instructions are configured to execute the steps in the instruction data processing method provided in the above embodiment.

The embodiment of the present application provides a method and apparatus, device, and storage medium for processing instruction data, wherein the method includes: if it is determined that there are fields of the same type between instructions before compilation, during compilation, the fields of the same type are stored in a specified encoding position; according to the type of each instruction before compilation and the attribute information of the fields of the same type, a corresponding operation code is generated; the operation code is stored in the compiled instruction; and the compiled instruction is output. In this way, the operation code is directly associated with the type of instruction and the number and type of instruction source operands, so that the classified acquisition of instruction source operands is completed according to the instruction operation code.

BRIEF DESCRIPTION OF THE DRAWINGS

FIG1 is a flowchart of a method for processing instruction data provided by an embodiment of the present application;

FIG2 is a second flow chart of a method for processing instruction data provided in an embodiment of the present application;

3 is a flow chart of an instruction source operand processing method of a network processor provided in an embodiment of the present application;

FIG4 is a schematic diagram of the composition structure of a network processor instruction source operand processing device provided in an embodiment of the present application;

FIG5 is a schematic diagram of a first structure of a device for processing instruction data provided in an embodiment of the present application;

FIG6 is a second schematic diagram of the composition structure of the instruction data processing device provided in an embodiment of the present application;

FIG. 7 is a schematic diagram of the structure of a computer device provided in an embodiment of the present application.

DETAILED DESCRIPTION

In the related technology, when designing the instruction set of a network processor, it is necessary to consider several key technologies such as instruction encoding, storage, acquisition, and decoding. Among them, instruction encoding and decoding is the basis of instruction set design and directly determines the complexity of instruction set processing. At the same time, in order to be able to process various business data in the network, it is necessary to design instructions with multiple different functions and a large-capacity instruction space. Therefore, if there is no corresponding good design solution for instruction encoding and decoding, it often leads to a high complexity of logic design, and it will occupy a large amount of chip memory and consume high power.

The instruction set design of traditional network processors uses an instruction pipeline decoding technology similar to that of Reduced Instruction Set Computer (RISC), and the instruction encoding is encoded in a fixed-length manner. Since the opcode field of the instruction is encoded only according to the functional operation of each instruction, when obtaining the source operand in the decoding stage, it is necessary to first determine the type of each instruction, and then obtain the source operand number and address field information according to the position of the source operand recorded by each instruction in the instruction encoding.

There are a large number of instructions based on network processors. Obtaining source operands in this way not only requires additional chip memory resources to store the source operand information of each instruction, but also greatly increases the logical complexity of the chip core.

In order to make the purpose, technical solution and advantages of the embodiments of the present application clearer, the specific technical solution of the invention will be further described in detail below in conjunction with the drawings in the embodiments of the present application. The following embodiments are used to illustrate the present application, but are not used to limit the scope of the present application.

An embodiment of the present application provides a method for processing instruction data, which is applied to a computer device. The function implemented by the method can be implemented by calling a program code through a processor in the computer device. Of course, the program code can be stored in a computer storage medium. It can be seen that the computer device at least includes a processor and a storage medium.

FIG. 1 is a flow chart of a method for processing instruction data provided in an embodiment of the present application. As shown in FIG. 1 , the method includes:

Step S11: If it is determined that there are fields of the same type between the instructions before compilation, the fields of the same type are stored in a designated encoding position during compilation.

Here, at least one instruction is obtained from a preset instruction set. Since the function and effect of each instruction are preset, the same type of fields between the instructions before compilation can be determined based on the obtained instructions. When compiling through the compilation unit, each instruction can be divided into several segments according to the corresponding rules, and each segment occupies a preset position and a corresponding byte length, and the preset position and the corresponding byte length are set to the corresponding encoding position. When compiling, the same type of fields between the instructions can be stored in the specified encoding position, and the formulated encoding position can be preset as needed. For example, there are instructions A and instruction B in the instruction set, instruction A has fields A1, A2, A3, and instruction B has fields B1, B2, B3. If A3 and B3 are fields of the same type, the compilation unit will put the A3 field of instruction A and the B3 field of instruction B in the same bit position of their respective encodings.

Step S12: Generate a corresponding operation code according to the type of each instruction before compilation and the attribute information of the field of the same type.

Here, the opcode is used to indicate the operation to be performed by the instruction, and the length of the opcode can be fixed or variable. In an embodiment of the present application, the type of instruction before compilation and the attribute information of the same type of field can be obtained, and the type of instruction before compilation and the attribute information of the same type of field are marked respectively, and the corresponding opcode is generated according to the generated marking information. Here, the type of instruction can be: logical calculation instructions, data upload/download instructions, jump instructions, and some special instructions, etc., which can be preset as needed. The same type of field can be different source operands, destination operands, or other fields, etc.

Step S13, storing the operation code into the compiled instruction.

Here, the compilation unit may store the opcode generated according to the above steps to a corresponding encoding position in the compiled instruction.

Step S14, outputting the compiled instructions.

In the embodiment of the present application, if it is determined that there are fields of the same type between the pre-compiled instructions, during compilation, the fields of the same type are stored in the designated encoding position, and the corresponding opcode is generated according to the type of each pre-compiled instruction and the attribute information of the fields of the same type, and the opcode is stored in the compiled instruction, and the compiled instruction is output. The opcode can be directly associated with the type of instruction and the attribute information of the field, so as to achieve the classification acquisition of the operands corresponding to the field according to the instruction opcode.

The present application also provides another method for processing instruction data, the method comprising:

Step S101: If it is determined that there are fields of the same type between instructions before compilation, the fields of the same type are stored in a designated encoding position during compilation.

Step S102: If it is determined that the fields of the same type include source operand fields, the number and type of the source operand fields are determined.

Here, the instruction may include one or more source operand fields. In the embodiment of the present application, if it is determined that fields of the same type include source operand fields, the number and type of the source operand fields are determined.

Step S103, generating a corresponding operation code according to the type of each pre-compiled instruction and the number and type of the source operand fields.

Here, the type of instruction before compilation and the number and type of source operand fields can be obtained, and the type of instruction before compilation and the number and type of source operand fields can be marked respectively, and the corresponding operation code can be generated according to the identification code generated by the mark. The number and type of source operand fields are marked respectively, including: determining the number and type of source operands, and generating a mark according to the number and type of source operands. For example: the mark that does not require source operands or immediate numbers is 000; the mark that only needs to operate a conditional register is 001, etc.

The above-mentioned steps S102 to S103 provide a method for implementing the step of "generating a corresponding operation code according to the type of each instruction before compilation and the attribute information of the same type field". In this method, if it is determined that the same type of field includes a source operand field, the number and type of the source operand field are determined, and the corresponding operation code is generated according to the type of each instruction before compilation, the number and type of the source operand field. The operation code can be directly associated with the type of instruction and the number and type of the source operand field, so as to achieve the classification acquisition of the instruction source operand according to the instruction operation code.

Step S104, storing the operation code into the compiled instruction.

Step S105, outputting the compiled instructions.

The present application also provides another method for processing instruction data, the method comprising:

Step S201, classifying the pre-compiled instructions according to the function to be executed by each pre-compiled instruction to obtain a classification result.

Here, the pre-compiled instructions may be classified into at least one category according to the functions to be executed by the instructions, wherein the classification results may include: logic calculation instructions, data upload/download instructions, jump instructions, and some special instructions.

Step S202: If it is determined that there are fields of the same type between the instructions before compilation, the fields of the same type are stored in a designated encoding position during compilation.

Step S203: If it is determined that the fields of the same type include source operand fields, the number and type of the source operand fields are determined according to the classification result.

Here, it can be determined whether the instruction needs a source operand according to the function to be executed by the instruction before compilation. If a source operand is needed, the number and type of the required source operands can be determined. Take the division of instructions into logic calculation instructions, data upload/download instructions, and jump instructions as an example. Among them, logic calculation instructions usually have fields such as destination register, common register source operand one, common register source operand two or immediate source operand two, etc.; data upload/download instructions usually have fields such as destination register, conditional register source operand two, memory source operand one or memory source operand two, immediate source operand two, etc.; jump instructions usually have labels, conditional register source operand two, etc.; special instructions usually complete network service table lookup, co-processing and other processing, and do not require source operands. Among them, source operand one refers to the source operand in the first position when there is one operand, or when there are two operands; source operand two refers to the source operand in the second position when there are two operands.

Step S204: Generate a corresponding operation code according to the type of each pre-compiled instruction and the number and type of the source operand fields.

Step S205: store the operation code into the compiled instruction.

Step S206: output the compiled instructions.

The present application also provides another method for processing instruction data, the method comprising:

Step S301, classifying the pre-compiled instructions according to the functions to be executed by each pre-compiled instruction to obtain classification results.

Step S302: If it is determined that there are fields of the same type between the instructions before compilation, the fields of the same type are stored in a designated encoding position during compilation.

Step S303: If it is determined that the fields of the same type include source operand fields, the number and type of the source operand fields are determined according to the classification result.

Step S304: Mark the type of each pre-compiled instruction and generate a first identification code corresponding to each pre-compiled instruction.

Here, marking the type of instruction means that the compilation unit generates a corresponding identification code according to the type of instruction. For example, instructions can be divided into four types: logic calculation instructions, data upload/download instructions, jump instructions, and special instructions. Then, four corresponding tags are generated according to the four types, namely, the first identification code 10 for logic calculation instructions, the first identification code 201 for data upload/download instructions, the first identification code 310 for jump instructions, and the first identification code 411 for special instructions. The above identification code is used as the first part of the opcode field encoding of the corresponding instruction.

Step S305: Generate a corresponding second identification code according to the number and type of the source operand fields.

Here, taking the example of dividing instructions into eight types according to the number and type of source operands, namely, logic calculation instructions, data upload/download instructions, jump instructions and special instructions, the types formed are: instructions that do not require source operands or source operands in the form of immediate numbers are type one; instructions that only need to operate a source operand in the form of a conditional register are type two; instructions that only need to operate a source operand in the form of an ordinary register are type three; instructions that only need to operate a source operand in the form of a memory are type four; instructions that need to operate a source operand in the form of an ordinary register and a source operand in the form of a memory are type five; instructions that need to operate a source operand in the form of an ordinary register and a source operand in the form of a conditional register are type six; instructions that need to operate two source operands in the form of ordinary registers are type seven; instructions that need to operate a source operand in the form of a memory and a source operand in the form of a conditional register are type eight.

The compilation unit classifies the instructions according to the number and type of source operands, obtains the classification results, and obtains corresponding identification codes for the classification results. Taking the above eight types as an example, type one corresponds to the second identification code one 000, type two corresponds to the second identification code two 001, type three corresponds to the second identification code three 010, type four corresponds to the second identification code four 011, type five corresponds to the second identification code five 100, type six corresponds to the second identification code six 101, type seven corresponds to the second identification code seven 110, and type eight corresponds to the second identification code eight 111. The above identification codes are used as the second part of the opcode field encoding of the corresponding instruction.

Step S306: combine the first identification code and the second identification code to generate a corresponding operation code.

Here, the first part of the operation code field code generated through the above steps and the second part of the operation code field code may be combined to generate a corresponding operation code.

The above steps S304 to S306 provide a method for implementing the step of "generating a corresponding operation code according to the type of each instruction before compilation, the number and type of the source operand fields". In this method, the operation code can be directly associated with the type of instruction and the number and type of the source operand fields, so as to achieve the classification acquisition of the instruction source operand according to the instruction operation code.

Step S307, storing the operation code into the compiled instruction.

Step S308: output the compiled instructions.

FIG. 2 is a second flow chart of a method for processing instruction data provided in an embodiment of the present application. As shown in FIG. 2 , the method includes:

Step S21, determining the operation code in the compiled instruction.

Here, after receiving the compiled instruction, the decoding unit may determine the corresponding operation code from the compiled instruction.

Step S22: Determine the type of the instruction and attribute information of the fields in the instruction according to the operation code.

Here, the decoding unit obtains the compiled instruction, can parse the corresponding operation code from the instruction, and determine the type of instruction and the attribute information of the field in the instruction according to the operation code.

Step S23, determining a field of a corresponding type from a designated encoding position in the instruction according to the attribute information of the field.

Here, the field is a designated encoding position stored in the compiled instruction, and the decoding unit can directly determine the corresponding type of field from the designated encoding position according to the attribute information of the field.

Step S24, obtaining corresponding operands according to the fields of the corresponding types, and outputting the operands.

Here, after the fields of corresponding types are determined based on the above steps, corresponding operands can be directly obtained from corresponding registers, and the obtained operands can be processed accordingly.

In the embodiment of the present application, the opcode in the compiled instruction is determined, and the type of instruction and the attribute information of the field in the instruction are determined according to the opcode, and the field of the corresponding type is determined from the specified encoding position in the instruction according to the attribute information of the field, and the corresponding operand is obtained according to the field of the corresponding type, and the operand is output. The decoding unit can directly intercept the corresponding operand from the compiled instruction without determining the type of instruction and then determining the corresponding operand according to the type of instruction, which can reduce the judgment steps and reduce the complexity of operand processing.

The present application also provides another method for processing instruction data, the method comprising:

Step S401, determining the operation code in the compiled instruction.

Step S402: If it is detected that the instruction needs to obtain a source operand field, the opcode corresponding to the instruction that needs to obtain a source operand field is parsed to obtain a parsing result.

Here, the decoding unit determines whether it is necessary to obtain the source operand according to the operation code. When the source operand needs to be obtained, the operation code corresponding to the instruction for which the source operand field needs to be obtained is parsed to obtain the parsing result.

Step S403: Determine the type of the instruction and the attribute information of the source operand field according to the parsing result.

Here, since the operation code includes the first identification code and the second identification code, the type of instruction can be determined according to the first identification code, and the attribute information of the source operand field can be determined according to the second identification code.

The above steps S402 to S403 provide a method for implementing the step of "determining the type of the instruction and the attribute information of the fields in the instruction according to the opcode". In this method, if it is detected that the instruction needs to obtain the source operand field, the opcode corresponding to the instruction that needs to obtain the source operand field is parsed to obtain the parsing result, and the type of the instruction and the attribute information of the source operand field are determined according to the parsing result. By parsing the opcode, the type of the instruction and the attribute information of the source operand field can be directly obtained, which can reduce the complexity of decoding.

Step S404: determining a field of a corresponding type from a designated encoding position in the instruction according to the attribute information of the field.

Step S405, obtaining corresponding operands according to the fields of the corresponding types, and outputting the operands.

The present application also provides another method for processing instruction data, the method comprising:

Step S501, determining the operation code in the compiled instruction.

Step S502: If it is detected that the instruction needs to obtain a source operand field, the opcode corresponding to the instruction that needs to obtain a source operand field is parsed to obtain a parsing result.

Step S503: Determine the type of the instruction and the attribute information of the source operand field according to the parsing result.

Step S504: Determine the type of the instruction according to the first identification code parsed from the operation code.

Here, the decoding unit parses the first part of the operation code, that is, parses the first identification code of the operation code, and can determine the type of the instruction.

Step S505: Determine the number and type of the source operand fields according to the second identification code parsed from the operation code.

Here, the decoding unit parses the second part of the operation code, that is, parses the second identification code of the operation code, and can determine the number and type of source operand fields.

Step S506: Determine a field of a corresponding type from a specified encoding position in the instruction according to the number and type of the source operand fields.

Here, the corresponding type of field can be determined from the specified encoding position in the instruction according to the number and type of source operand fields. For example, for source operand one, there are three cases: the instruction does not need to obtain source operand one, and the instruction is directly transmitted to the read unit; the instruction needs to obtain source operand one, and the number and address of the source register need to be intercepted from the instruction encoding; the instruction needs to obtain source operand one, and the read address is fixed and no other decoding operations are required. For source operand two, there are four cases: the instruction does not need to obtain source operand two, and it is directly transmitted to the read unit; the instruction needs to obtain source operand two, and the number and address of the source register need to be intercepted from the instruction encoding; the instruction needs to obtain source operand two, and the required source register is intercepted from the instruction encoding and converted; the instruction needs to obtain source operand two, and the read address is fixed and no other decoding operations are required.

The above-mentioned steps S504 to S506 provide a method for implementing the step of "determining a field of a corresponding type from a designated encoding position in the instruction according to the attribute information of the field". In this method, the type of the instruction is determined according to the first identification code parsed from the opcode; the number and type of source operand fields are determined according to the second identification code parsed from the opcode; and the source operand fields are determined from the designated encoding position in the instruction according to the number and type of source operand fields. The source operand fields can be directly determined from the designated encoding position in the instruction according to the number and type of source operand fields, which can reduce the complexity of decoding.

Step S507, obtaining corresponding operands according to the fields of the corresponding types, and outputting the operands.

The present application also provides another method for processing instruction data, the method comprising:

Step S601, determining the operation code in the compiled instruction.

Step S602: If it is detected that the instruction needs to obtain a source operand field, the opcode corresponding to the instruction that needs to obtain a source operand field is parsed to obtain a parsing result.

Step S603: Determine the type of the instruction and the attribute information of the source operand field according to the parsing result.

Step S604: Determine the type of the instruction according to the first identification code parsed from the operation code.

Step S605: Determine the number and type of the source operand fields according to the second identification code parsed from the operation code.

Step S606: Determine a field of a corresponding type from a specified encoding position in the instruction according to the number and type of the source operand fields.

Step S607 : acquiring corresponding source operand fields from designated encoding positions in the instruction according to the number and type of the source operand fields.

Step S608: Determine the number and address of the source operand according to the source operand field.

Here, the decoding unit determines the source operand field according to the fixed position of the source operand field in the instruction encoding, obtains the number and address of the source operand, and sends them to the reading unit.

Step S609, acquiring the source operand according to the number and address of the source operand, and outputting the source operand.

The above steps S608 to S609 provide a method for implementing the step of "obtaining the corresponding operand according to the field of the corresponding type, and outputting the operand". In this method, the number and address of the source operand are determined according to the source operand field; the source operand is obtained according to the number and address of the source operand, and the source operand is output. The source operand field can be determined directly from the specified encoding position in the instruction according to the number and type of the source operand field, and then the corresponding source operand can be directly obtained according to the source operand field, which can reduce the complexity of decoding.

In other embodiments, the function of the instruction is determined according to the type of the instruction, and the source operand is processed according to the function of the instruction.

FIG3 is a flow chart of a method for processing an instruction source operand of a network processor provided in an embodiment of the present application. As shown in FIG3 , the method includes the following steps:

In step S31, the compiling unit places the same fields between various instructions at fixed positions in the instruction code.

Here, the instructions are first encoded using a fixed-length encoding method, and then each encoded instruction in the instruction set is segmented and classified according to function. Usually, the instructions of the network processor are divided into logical calculation instructions, data upload/download instructions, jump instructions, and some special instructions. Then, according to the function of each type of instruction, the field type required for each instruction is determined.

In the embodiment of the present application, by adopting a fixed-length encoding method, instructions can be converted into a format that is convenient for storage by the compilation unit, and the decoding unit does not need to record the storage location and length of the instructions, and can directly obtain the encoded instructions in the storage memory.

Among them, logical calculation instructions usually have a destination register operand field, a common register source operand one field, a common register source operand two field, an immediate source operand two field, etc.; data upload/download instructions usually have a destination register operand field, a conditional register source operand two field, a memory source operand one field, a memory source operand two field, an immediate source operand two field, etc.; jump instructions usually have fields such as labels and conditional register source operand two; special instructions usually complete network service table lookup, co-processing and other operations, and do not require a source operand field.

Step S32: the compiling unit determines and marks the type of instruction and the source operand of the instruction, and generates an operation code corresponding to the instruction according to the mark.

Here, the compilation unit judges and marks the type of instruction and the source operands of the instruction, and generates a corresponding instruction opcode, which is directly related to the type of instruction and the number and type of the instruction source operands; and the classification acquisition of the instruction source operands is completed according to the instruction opcode.

The determination of the type of instruction refers to: classifying the instruction into at least one type according to the functional operation. For example, the instruction can be classified into four types: logic calculation instruction, data upload/download instruction, jump instruction and some special instruction.

Marking the type of instruction means that the compilation unit generates a corresponding tag according to the type of instruction. For example, instructions can be divided into four types: logic calculation instructions, data upload/download instructions, jump instructions, and special instructions. Then, four corresponding tags are generated according to the four types, namely, logic calculation instructions corresponding to tag 1 00, data upload/download instructions corresponding to tag 2 01, jump instructions corresponding to tag 3 10, and special instructions corresponding to tag 4 11, as the first part of the opcode field encoding of the instruction.

Judging the source operands of the instructions means classifying the instructions according to the number and type of the source operands.

Taking the example of dividing instructions into eight types according to the number and type of source operands, namely, logic calculation instructions, data upload/download instructions, jump instructions and special instructions, the types formed are: instructions that do not require source operands or source operands in the form of immediate numbers are type one; instructions that only need to operate a source operand in the form of a conditional register are type two; instructions that only need to operate a source operand in the form of an ordinary register are type three; instructions that only need to operate a source operand in the form of a memory are type four; instructions that need to operate a source operand in the form of an ordinary register and a source operand in the form of a memory are type five; instructions that need to operate a source operand in the form of an ordinary register and a source operand in the form of a conditional register are type six; instructions that need to operate two source operands in the form of ordinary registers are type seven; instructions that need to operate a source operand in the form of a memory and a source operand in the form of a conditional register are type eight.

The marking of the source operands of the instructions refers to: the compilation unit classifies the instructions according to the number and type of the source operands, obtains the classification results, and marks the classification results. Taking the above eight types as an example, type one corresponds to mark one 000, type two corresponds to mark two 001, type three corresponds to mark three 010, type four corresponds to mark four 011, type five corresponds to mark five 100, type six corresponds to mark six 101, type seven corresponds to mark seven 110, and type eight corresponds to mark eight 111, as the second part of the opcode field encoding of the instruction.

Step S33, the decoding unit determines whether it is necessary to obtain the source operand according to the operation code. When the source operand needs to be obtained, the decoding unit directly intercepts and obtains the number and address of the source operand in the instruction by using the fixed position of the source operand in the instruction encoding.

In an embodiment of the present application, the decoding unit determines the second part of the opcode, and divides the source operand one into three situations: the instruction does not need to obtain the source operand one, and directly transmits it to the reading unit, corresponding to 000, 001 and 011 of the second part of the opcode of the above step S32; the instruction needs to obtain the source operand one, and the number and address of the source register need to be intercepted from the instruction code, corresponding to 010, 100, 101 and 110 of the second part of the opcode of the above step S32; the instruction needs to obtain the source operand one, and the read address is fixed and no other decoding operation is required, corresponding to 111 of the second part of the opcode of the above step S32.

There are four cases for source operand two: the instruction does not need to obtain source operand two and directly passes through the read unit, which corresponds to 000 and 010 in the second part of the opcode of step S32 above; the instruction needs to obtain source operand two, and the number and address of the source register need to be intercepted from the instruction code, which corresponds to 110 in the second part of the opcode of step S32 above; the instruction needs to obtain source operand two, and the required source register is intercepted from the instruction code and converted, which corresponds to 001, 101 and 111 in the second part of the opcode of step S32 above; the instruction needs to obtain source operand two, and the read address is fixed and no other decoding operation is required, which corresponds to 111 in the second part of the opcode of step S32 above.

The decoding unit needs to include three operation modes, among which, when intercepting the number and address of the source operation, the source operand two condition registers of some instructions need to be converted into ordinary register operations.

Step S34: the decoding unit obtains the data of the source operand in the core register according to the number and address of the source operand, and sends it to the execution unit.

After the decoding unit completes the processing, it sends the number and address of the obtained source operand to the reading unit. The reading unit obtains the data of the source operand in the core register and sends it to the execution unit. If there is no source operand, it is directly transmitted to the execution unit.

Step S35, after the execution unit completes the execution, the processing result is stored in the core register.

Here, the execution unit processes the instruction according to the instruction function and source operands, and writes the result back into the core register after successful processing.

FIG. 4 is a schematic diagram of the composition structure of a network processor instruction source operand processing device provided in an embodiment of the present application. As shown in FIG. 4 , the device includes:

The compiling unit 41 is used to place the same fields between instructions at a fixed position in the instruction encoding; and to judge and mark the type of instruction and the source operation of the instruction, and generate the corresponding operation code of the instruction according to the mark.

The decoding unit 42 is used to determine whether the instruction needs to obtain a source operation based on the operation code of the instruction. When the instruction needs to obtain a source operand, the numbering and address of various forms of source operands are obtained according to the fixed position of the source operand in the instruction encoding, and sent to the reading unit.

The reading unit 43 is used to obtain the data of the source operand in the core register according to the number and address of the source operand of the instruction.

The execution unit 44 is used to process the source operand according to the instruction function.

The output unit 45 is used to store the processing result in the core register.

In an embodiment of the present application, when the compilation unit converts instructions into binary codes, it places the same fields between instructions at a fixed position in the instruction code to ensure that the same fields between instructions are aligned in the code. In this way, when decoding the instruction, the decoding unit can directly intercept the number and address of the source operand without first distinguishing the various instruction types and then obtaining the source operand from the instruction code. In this way, the decoding unit does not need additional judgment logic, nor does it need to record the position of the source operand in each instruction, which greatly reduces the logical complexity of the decoding unit and saves chip resources.

Based on the above embodiments, the embodiments of the present application provide a device for processing instruction data. Each unit included in the device, and each sub-unit included in each unit, can be implemented by a processor in a computer device; of course, it can also be implemented by a logic circuit; in the implementation process, the processor can be a central processing unit (CPU), a microprocessor (MPU), a digital signal processor (DSP) or a field programmable gate array (FPGA), etc.

FIG. 5 is a schematic diagram of a first structure of a device for processing instruction data provided in an embodiment of the present application. As shown in FIG. 5 , the device includes:

The first storage unit 51 is configured to store the fields of the same type to a designated encoding position during compilation if it is determined that there are fields of the same type between instructions before compilation.

The generating unit 52 is configured to generate a corresponding operation code according to the type of each of the pre-compiled instructions and the attribute information of the fields of the same type.

The second storage unit 53 is configured to store the operation code into the compiled instruction.

The first output unit 54 is configured to output the compiled instructions.

In other embodiments, the generation unit is further configured to: if it is determined that the fields of the same type include source operand fields, determine the number and type of the source operand fields; and generate a corresponding opcode according to the type of each pre-compiled instruction and the number and type of the source operand fields.

In other embodiments, the device further includes: a classification unit, configured to: classify the pre-compiled instructions according to the function to be performed by each pre-compiled instruction to obtain a classification result; correspondingly, the generation unit is also configured to: if it is determined that the fields of the same type include source operand fields, determine the number and type of the source operand fields according to the classification result.

In other embodiments, the generation unit is further configured to: mark the type of each pre-compiled instruction to generate a first identification code corresponding to each pre-compiled instruction; generate a corresponding second identification code based on the number and type of the source operand fields; and merge the first identification code and the second identification code to generate a corresponding operation code.

FIG6 is a second schematic diagram of the composition structure of the instruction data processing device provided in an embodiment of the present application. As shown in FIG6 , the device includes:

The first determining unit 61 is configured to determine an operation code in the compiled instruction.

The second determining unit 62 is configured to determine the type of the instruction and attribute information of the fields in the instruction according to the operation code.

The third determining unit 63 is configured to determine a field of a corresponding type from a designated encoding position in the instruction according to the attribute information of the field.

The second output unit 64 is configured to obtain a corresponding operand according to the field of the corresponding type and output the operand.

In other embodiments, the second determination unit is further configured to: if it is detected that the instruction needs to obtain a source operand field, parse the opcode corresponding to the instruction that needs to obtain the source operand field to obtain a parsing result; and determine the type of the instruction and attribute information of the source operand field based on the parsing result.

In other embodiments, the third determination unit is further configured to: determine the type of the instruction based on a first identification code parsed from the opcode; determine the number and type of source operand fields based on a second identification code parsed from the opcode; and determine the source operand fields from a specified encoding position in the instruction based on the number and type of source operand fields.

In other embodiments, the second output unit is further configured to: determine the number and address of the source operand according to the source operand field; obtain the source operand according to the number and address of the source operand, and output the source operand.

It should be noted that in the embodiment of the present application, if the processing method of the above-mentioned instruction data is implemented in the form of a software function module and sold or used as an independent product, it can also be stored in a computer-readable storage medium. Based on such an understanding, the technical solution of the embodiment of the present application can be essentially or partly embodied in the form of a software product that contributes to the prior art. The computer software product is stored in a storage medium, including several instructions to enable a computer device to execute all or part of the methods described in each embodiment of the present application. The aforementioned storage medium includes: various media that can store program codes, such as a U disk, a mobile hard disk, a read-only memory (ROM), a disk or an optical disk. In this way, the embodiment of the present application is not limited to any specific combination of hardware and software.

Correspondingly, an embodiment of the present application provides a computer-readable storage medium on which a computer program is stored. When the computer program is executed by a processor, the steps in the instruction data processing method provided in the above embodiment are implemented.

The description of the device embodiment of the present application is similar to the description of the above method embodiment, and has similar beneficial effects as the method embodiment. For technical details not disclosed in the device embodiment of the present application, please refer to the description of the method embodiment of the present application for understanding.

It should be noted here that the description of the above storage medium and device embodiments is similar to the description of the above method embodiments, and has similar beneficial effects as the method embodiments. For technical details not disclosed in the storage medium and device embodiments of this application, please refer to the description of the method embodiments of this application for understanding.

It should be noted that FIG. 7 is a schematic diagram of a computer device structure provided in an embodiment of the present application. As shown in FIG. 7 , the computer device 70 at least includes: a processor 71, a communication interface 72 and a memory 73, wherein

Processor 71 generally controls the overall operation of computer device 70 .

The communication interface 72 may enable the computer device to communicate with other computer devices or servers via a network.

The memory 73 is configured to store instructions and applications executable by the processor 71, and can also cache data to be processed or processed by the processor 71 and various modules in the computer device 70 (for example, image data, audio data, voice communication data, and video communication data), which can be implemented through flash memory (FLASH) or random access memory (Random Access Memory, RAM).

Of course, the device in the embodiment of the present application may also have other similar protocol interaction implementation cases. Without departing from the spirit and essence of the present application, technicians in this field can make various corresponding changes and deformations according to the embodiment of the present application, but these corresponding changes and deformations should all fall within the scope of protection of the claims attached to the method of the present application.

Those skilled in the art will appreciate that the embodiments of the present application may be provided as methods, systems, or computer program products. Therefore, the present application may adopt the form of hardware embodiments, software embodiments, or embodiments in combination with software and hardware. Moreover, the present application may adopt the form of a computer program product implemented on one or more computer-usable storage media (including but not limited to disk storage and optical storage, etc.) that contain computer-usable program code.

The present application is described with reference to the flowchart and/or block diagram of the method, device (system) and computer program product according to the embodiment of the present application. It should be understood that each process and/or box in the flowchart and/or block diagram, and the combination of the process and/or box in the flowchart and/or block diagram can be realized by computer program instructions. These computer program instructions can be provided to a processor of a general-purpose computer, a special-purpose computer, an embedded processor or other programmable data processing device to produce a machine, so that the instructions executed by the processor of the computer or other programmable data processing device produce a device for realizing the function specified in one process or multiple processes in the flowchart and/or one box or multiple boxes in the block diagram.

These computer program instructions may also be stored in a computer-readable memory that can direct a computer or other programmable data processing device to work in a specific manner, so that the instructions stored in the computer-readable memory produce a manufactured product including an instruction device that implements the functions specified in one or more processes in the flowchart and/or one or more boxes in the block diagram.

These computer program instructions may also be loaded onto a computer or other programmable data processing device so that a series of operational steps are executed on the computer or other programmable device to produce a computer-implemented process, whereby the instructions executed on the computer or other programmable device provide steps for implementing the functions specified in one or more processes in the flowchart and/or one or more boxes in the block diagram.

It should be understood that "one embodiment" or "an embodiment" mentioned throughout the specification means that specific features, structures or characteristics related to the embodiment are included in at least one embodiment of the present application. Therefore, "in one embodiment" or "in an embodiment" appearing throughout the specification does not necessarily refer to the same embodiment. In addition, these specific features, structures or characteristics can be combined in one or more embodiments in any suitable manner. It should be understood that in various embodiments of the present application, the size of the sequence number of the above-mentioned processes does not mean the order of execution, and the execution order of each process should be determined by its function and internal logic, and should not constitute any limitation on the implementation process of the embodiments of the present application. The above-mentioned sequence numbers of the embodiments of the present application are only for description and do not represent the advantages and disadvantages of the embodiments.

It should be noted that, in this article, the terms "include", "comprises" or any other variations thereof are intended to cover non-exclusive inclusion, so that a process, method, article or device including a series of elements includes not only those elements, but also other elements not explicitly listed, or also includes elements inherent to such process, method, article or device. In the absence of further restrictions, an element defined by the sentence "comprises a ..." does not exclude the existence of other identical elements in the process, method, article or device including the element.

In the several embodiments provided in the present application, it should be understood that the disclosed devices and methods can be implemented in other ways. The device embodiments described above are only schematic. For example, the division of the modules is only a logical function division. There may be other division methods in actual implementation, such as: multiple modules or components can be combined, or can be integrated into another system, or some features can be ignored, or not executed. In addition, the coupling, direct coupling, or communication connection between the components shown or discussed can be through some interfaces, and the indirect coupling or communication connection of the devices or modules can be electrical, mechanical or other forms.

The modules described above as separate components may or may not be physically separated, and the components displayed as modules may or may not be physical modules; they may be located in one place or distributed on multiple network modules; some or all of the modules may be selected according to actual needs to achieve the purpose of the present embodiment.

The above is only an implementation method of the present application, but the protection scope of the present application is not limited thereto. Any person skilled in the art who is familiar with the present technical field can easily think of changes or substitutions within the technical scope disclosed in the present application, which should be included in the protection scope of the present application. Therefore, the protection scope of the present application should be based on the protection scope of the claims.

Claims (8)

1. A method of processing instruction data, the method comprising:

If the fact that the fields of the same type among the instructions before compiling comprise source operand fields is determined, the number and the types of the source operand fields are determined, and the fields of the same type are stored to the same bit positions preset by each instruction during compiling;

Marking the type of each pre-compiling instruction, and generating a first identification code corresponding to each pre-compiling instruction;

Generating a corresponding second identification code according to the number and the type of the source operand fields;

Combining the first identification code and the second identification code to generate a corresponding operation code;

Storing the operation code into a compiled instruction;

outputting the compiled instruction.

2. The method according to claim 1, wherein the method further comprises:

Classifying the pre-compiled instructions according to the functions to be executed by each pre-compiled instruction to obtain classification results;

correspondingly, the determining the number and type of the source operand fields includes:

and determining the number and the type of the source operand fields according to the classification result.

3. A method of processing instruction data, the method comprising:

Determining an operation code in the compiled instruction;

If the instruction is detected to need to acquire the source operand field, analyzing an operation code corresponding to the instruction needing to acquire the source operand field to obtain an analysis result;

Determining the type of the instruction according to a first identification code analyzed from the operation code; determining the number and the type of the source operand fields according to a second identification code analyzed from the operation code; determining the source operand fields from specified encoding positions in the instruction according to the number and type of the source operand fields;

And acquiring a corresponding operand according to the source operand field, and outputting the operand.

4. A method according to claim 3, wherein said retrieving a corresponding operand from said source operand field and outputting said operand comprises:

Determining the number and address of the source operand according to the source operand field;

And acquiring the source operand according to the number and the address of the source operand, and outputting the source operand.

5. An apparatus for processing instruction data, the apparatus comprising:

A first storage unit configured to store, if it is determined that the same type of field includes a source operand field between the instructions before compiling, the number and type of the source operand fields, and at the time of compiling, the same type of field to the same bit position preset by each instruction;

A generating unit configured to mark a type of each pre-compiling instruction and generate a first identification code corresponding to each pre-compiling instruction; generating a corresponding second identification code according to the number and the type of the source operand fields; combining the first identification code and the second identification code to generate a corresponding operation code;

a second storage unit configured to store the operation code into a compiled instruction;

And the first output unit is configured to output the compiled instruction.

6. An apparatus for processing instruction data, the apparatus comprising:

a first determination unit configured to determine an operation code in the compiled instruction;

The second determining unit is configured to parse the operation code corresponding to the instruction needing to acquire the source operand field if the instruction needing to acquire the source operand field is detected, so as to obtain a parsing result; a third determining unit configured to determine a type of the instruction according to a first identification code parsed from the operation code; determining the number and the type of the source operand fields according to a second identification code analyzed from the operation code; determining the source operand fields from specified encoding positions in the instruction according to the number and type of the source operand fields;

And the second output unit is configured to acquire a corresponding operand according to the source operand field and output the operand.

7. A computer device, the computer device comprising at least: a processor and a storage medium configured to store executable instructions, wherein:

The processor is configured to execute stored executable instructions configured to perform the method of processing instruction data provided in any of the preceding claims 1 to 4.

8. A computer-readable storage medium having stored therein computer-executable instructions configured to perform the steps of the method of processing instruction data provided in any one of the preceding claims 1 to 4.