CN110112110A - Semiconductor package and preparation method thereof - Google Patents

Abstract

The invention provides a semiconductor packaging structure and a preparation method thereof. The semiconductor packaging structure includes: a rewiring layer; a chip bonded to the lower surface of the rewiring layer; an electrical connection structure located on the upper surface of the rewiring layer; a plastic sealing layer located on the The upper surface of the rewiring layer, and the electrical connection structure is plastic-sealed; the first antenna layer is located on the upper surface of the plastic sealing layer; the frame structure is located on the upper surface of the plastic sealing layer and is located at the periphery of the first antenna layer; the lens layer is located on the frame On the top of the structure, the lens layer includes at least one lens; the second antenna layer, located on the lower surface of the lens layer, includes at least one second antenna and is arranged correspondingly to the lens; solder ball bumps, located on the lower surface of the rewiring layer . The semiconductor packaging structure of the present invention can effectively reduce the volume of the packaging structure and help to improve the integration of devices; and the semiconductor packaging structure of the present invention also has the advantages of short transmission signal path, low transmission loss, and high antenna gain.

Description

Semiconductor packaging structure and manufacturing method thereof

technical field

The invention relates to the technical field of semiconductor packaging, in particular to a semiconductor packaging structure and a preparation method thereof.

Background technique

With the development of science and technology, mobile communication technology is about to enter the 5G era, the coverage of wireless base stations is getting wider and wider, and the signal strength is getting stronger and stronger. However, the rapid economic development has made the density of urban buildings more and more dense, so communication signals encounter more and more obstacles in the process of propagation, which puts higher and higher demands on the signal receiving ability of mobile communication terminals. Require. Existing portable mobile communication terminals usually have a built-in antenna structure to receive signals, and the antenna structure is usually composed of multiple functional modules (such as active components and passive components) and antennas. The module and antenna are assembled on the PCB board. In the above structure, the functional modules and antennas are arranged on the surface of the PCB board, which will occupy a large area of the PCB board, so that the entire packaging structure has a long transmission path for transmitting signals, poor antenna performance, large power consumption and packaging problems. problems such as large size. At the same time, due to the large number of electronic circuits on the printed circuit board, there are problems such as electromagnetic interference between the antenna and other metal circuits, and there is even a risk of short circuit between the antenna and other metal circuits.

Contents of the invention

In view of the above-mentioned shortcomings of the prior art, the object of the present invention is to provide a semiconductor packaging structure and its preparation method, which are used to solve the problems of longer transmission signal lines, lower electrical properties and antenna performance in the prior art packaging structure. Poor, high power consumption and large packaging volume and other issues.

In order to achieve the above purpose and other related purposes, the present invention provides a semiconductor packaging structure, the semiconductor packaging structure comprising:

rewiring layer;

A chip bonded to the lower surface of the rewiring layer and electrically connected to the rewiring layer;

An electrical connection structure located on the upper surface of the rewiring layer and electrically connected to the rewiring layer;

a plastic sealing layer, located on the upper surface of the rewiring layer, and plastic sealing the electrical connection structure;

a first antenna layer, located on the upper surface of the plastic encapsulation layer, and electrically connected to the electrical connection structure, the first antenna layer includes at least one first antenna;

a frame structure located on the upper surface of the plastic encapsulation layer and located on the periphery of the first antenna layer;

a lens layer on top of the frame structure, the lens layer comprising at least one lens;

The second antenna layer is located on the lower surface of the lens layer and has a distance from the first antenna layer, the second antenna layer includes at least one second antenna and the second antenna is connected to the lens of the lens layer Corresponding settings;

Solder ball bumps are located on the lower surface of the rewiring layer and are electrically connected to the rewiring layer.

Optionally, there are multiple first antennas, second antennas, and lenses, and there is a one-to-one correspondence between the first antennas, the second antennas, and the lenses.

Optionally, the frame structure includes a resin frame structure, a metal frame structure or a ceramic frame structure.

Optionally, the semiconductor package structure further includes an underfill layer, and the underfill layer is located between the chip and the rewiring layer.

Optionally, the lens is a convex lens, the lens layer further includes a plane part, the plane part is located on the top of the frame structure, and the convex lens is located on the upper surface of the plane part.

The present invention also provides a method for preparing a semiconductor package structure, the method for preparing a semiconductor package structure includes the following steps:

providing a base, forming a sacrificial layer on the upper surface of the base;

forming a rewiring layer on the upper surface of the sacrificial layer;

forming an electrical connection structure on the upper surface of the rewiring layer, the electrical connection structure being electrically connected to the rewiring layer;

forming a plastic sealing layer on the upper surface of the rewiring layer, the plastic sealing layer plastic sealing the electrical connection structure;

A first antenna layer is formed on the upper surface of the plastic sealing layer, the first antenna layer is electrically connected to the electrical connection structure, and the first antenna layer includes at least one first antenna;

forming a frame structure on the upper surface of the plastic sealing layer, the frame structure is located at the periphery of the first antenna layer;

A lens substrate is provided, a second antenna layer is formed on a surface of the lens substrate, and the second antenna layer includes at least one second antenna; the lens substrate is bonded to the top of the frame structure, and the bonded The second antenna layer is located on the lower surface of the lens substrate and has a distance from the first antenna layer;

performing etching on the lens substrate to form a lens layer, the lens layer including at least one lens, the lens corresponding to the upper and lower sides of the second line;

removing the substrate and the sacrificial layer;

providing a chip, bonding the chip to the lower surface of the rewiring layer, and electrically connecting the chip to the rewiring layer;

Solder ball bumps are formed on the lower surface of the redistribution layer, and the solder ball bumps are electrically connected to the redistribution layer.

Optionally, forming the rewiring layer on the upper surface of the sacrificial layer includes the following steps:

forming a bottom dielectric layer on the upper surface of the sacrificial layer;

forming a plastic encapsulant layer on the upper surface of the bottom dielectric layer;

forming a seed layer on the upper surface of the molding material layer;

patterning the seed layer and the plastic encapsulation material layer;

Forming a dielectric layer and a metal conductive layer on the upper surface of the bottom dielectric layer, the metal conductive layer is located in the dielectric layer and electrically connected to the seed layer; the metal conductive layer includes multiple layers arranged at intervals metal wire layers and metal plugs, the metal plugs are located between adjacent metal wire layers to electrically connect adjacent metal wire layers.

Optionally, the formed frame structure includes a resin frame structure, a metal frame structure or a ceramic frame structure; the lenses of the lens layer are convex lenses.

Optionally, forming the first antenna layer on the upper surface of the plastic encapsulation layer includes the following steps:

forming a first antenna metal layer on the upper surface of the plastic encapsulation layer;

Etching the first antenna metal layer to obtain the first antenna layer including a plurality of the first antennas arranged at intervals;

Forming the second antenna layer on a surface of the lens substrate includes the following steps:

forming a second antenna metal layer on a surface of the lens substrate;

The second antenna metal layer is etched to obtain the second antenna layer including a plurality of second antennas arranged at intervals, and the first antenna and the second antenna are arranged one by one up and down.

Optionally, after bonding the chip to the lower surface of the rewiring layer, a step of forming an underfill layer between the chip and the rewiring layer is further included.

Optionally, the lens layer includes a plane portion and a lens on the plane portion, the plane portion is located on the top of the frame structure, the lens and the first antenna and the second antenna are There are multiple, and the first antenna, the second antenna and the lens are in one-to-one correspondence.

As mentioned above, the semiconductor packaging structure of the present invention and its preparation method have the following beneficial effects: the semiconductor packaging structure of the present invention can effectively reduce the size of the package by plastic-sealing the lens layer, the first antenna layer, the second antenna layer and the chip up and down. The volume of the structure improves the integration of the device; the radiation wave of the antenna is focused by the lens of the lens layer, which can effectively improve the antenna gain; the first antenna layer and the second antenna layer are only separated by air, and the dielectric loss of the air is extremely low. The signal loss of the first antenna layer and the second antenna layer can be reduced, and the transmission signal path in the semiconductor packaging structure of the present invention is relatively short, so that better electrical properties and antenna performance can be obtained. By adopting the preparation method of the invention, the performance of the prepared semiconductor packaging structure can be significantly improved, and the production cost is reduced.

Description of drawings

FIG. 1 shows a flowchart of a method for manufacturing a semiconductor package structure provided in Embodiment 1 of the present invention.

Figures 2 to 19 show schematic cross-sectional structural views of the structure obtained in each step of the method for preparing the semiconductor package structure provided in Embodiment 1 of the present invention; among them, Figure 18 and Figure 19 show the semiconductor package structure provided in Embodiment 2 of the present invention Schematic diagram of the cross-sectional structure.

Component designation description

10 bases

11 sacrificial layer

12 Rewiring layers

121 bottom dielectric layer

122 layers of molding compound

123 seed layer

124 medium layer

125 metal conductive layer

126 openings

13 Electrical Connection Structure

14 Plastic layer

15 First antenna layer

151 first antenna

16 frame structure

17 lens layer

171 lens

172 Plane Department

17a Lens base

18 Second antenna layer

181 Second Antenna

19 Solder Bumps

20 air cavity

21 chips

22 Underfill layer

S1～S11 steps

Detailed ways

Embodiments of the present invention are described below through specific examples, and those skilled in the art can easily understand other advantages and effects of the present invention from the content disclosed in this specification. The present invention can also be implemented or applied through other different specific implementation modes, and various modifications or changes can be made to the details in this specification based on different viewpoints and applications without departing from the spirit of the present invention.

See Figures 1 through 19. It should be noted that the diagrams provided in this embodiment are only schematically illustrating the basic concept of the present invention, although only the components related to the present invention are shown in the diagrams rather than the number, shape and Dimensional drawing, the shape, quantity and proportion of each component can be changed arbitrarily during actual implementation, and the layout of the components may also be more complex.

Embodiment one

Please refer to Fig. 1, the present invention provides a kind of preparation method of semiconductor packaging structure, the preparation method of described semiconductor packaging structure comprises the following steps:

1) providing a base, and forming a sacrificial layer on the upper surface of the base;

2) forming a rewiring layer on the upper surface of the sacrificial layer;

3) forming an electrical connection structure on the upper surface of the rewiring layer, the electrical connection structure being electrically connected to the rewiring layer;

4) forming a plastic seal layer on the upper surface of the rewiring layer, and the plastic seal layer seals the electrical connection structure;

5) forming a first antenna layer on the upper surface of the plastic sealing layer, the first antenna layer is electrically connected to the electrical connection structure, and the first antenna layer includes at least one first antenna;

6) forming a frame structure on the upper surface of the plastic sealing layer, and the frame structure is located at the periphery of the first antenna layer;

7) Provide a lens substrate, a surface of the lens substrate is formed with a second antenna layer, the second antenna layer includes at least one second antenna; bonding the lens substrate to the top of the frame structure, bonding Then the second antenna layer is located on the lower surface of the lens substrate and has a distance from the first antenna layer;

8) Etching the lens substrate to form a lens layer, the lens layer including at least one lens, the lens corresponding to the second line up and down;

9) removing the substrate and the sacrificial layer;

10) providing a chip, bonding the chip to the lower surface of the rewiring layer, and electrically connecting the chip to the rewiring layer;

11) Forming solder ball bumps on the lower surface of the rewiring layer, the solder ball bumps being electrically connected to the rewiring layer.

In step 1), referring to step S1 in FIG. 1 and FIG. 2 , a substrate 10 is provided, and a sacrificial layer 11 is formed on the upper surface of the substrate 10 .

As an example, the material of the substrate 10 can be one material or a composite material of two or more of silicon, glass, silicon oxide, ceramics, polymer and metal, and its shape can be circular, square or any other required Shape, its surface area is subject to the ability to carry subsequent structures. Preferably, in this embodiment, the material of the substrate 10 is glass, that is, the substrate 10 is preferably a glass substrate.

As an example, the sacrificial layer 11 is used as a separation layer between the rewiring layer and the substrate 10 in subsequent processes. In addition, it also has a strong binding force with the substrate 10 .

As an example, the sacrificial layer 11 may include a polymer layer, a tape-shaped adhesive layer, or a light-to-heat conversion (LTHC) layer; specifically, the material of the sacrificial layer 11 may be selected from adhesive tapes that are adhesive on both sides (such as , die attach film or non-conductive film, etc.) or adhesive glue etc. made by spin-coating process; preferably, in the present embodiment, the sacrificial layer 11 is preferably UV adhesive tape, which is irradiated by UV light (ultraviolet light) Afterwards, it is easy to be torn off; of course, in other examples, the sacrificial layer 11 can also be made of other material layers formed by physical vapor deposition or chemical vapor deposition, such as epoxy resin (Epoxy), silicone rubber (silicone rubber ), polyimide (PI), polybenzoxazole (PBO), benzocyclobutene (BCB), etc., when the substrate 10 is subsequently separated, it can be removed by wet etching, chemical mechanical grinding, etc. The sacrificial layer 11.

As an example, the sacrificial layer 11 may also be formed by an automatic placement process.

In step 2), referring to step S2 in FIG. 1 and FIG. 3 to FIG. 5 , a rewiring layer 12 is formed on the upper surface of the sacrificial layer 11 .

As an example, in step 2), forming the rewiring layer 12 on the upper surface of the sacrificial layer 11 may include the following steps:

2-1) forming a bottom dielectric layer 121 on the upper surface of the sacrificial layer 11, as shown in FIG. 3;

2-2) forming a molding material layer 122 on the upper surface of the bottom dielectric layer 121, as shown in FIG. 3 ;

2-3) forming a seed layer 123 on the upper surface of the molding material layer 122, as shown in FIG. 3 ;

2-4) Patterning the seed layer 123 and the molding material layer 122, as shown in FIG. perform graphical processing;

2-5) forming a dielectric layer 124 and a metal conductive layer 125 on the upper surface of the bottom dielectric layer 121, the metal conductive layer 125 is located in the dielectric layer 124 and is electrically connected to the seed layer 123, as As shown in FIG. 5; the metal conductive layer 125 includes a plurality of metal wire layers (not shown) and metal plugs (not shown) arranged at intervals, and the metal plugs are located between adjacent metal wire layers space, so as to electrically connect the adjacent metal wire layers.

As an example, the material of the underlying dielectric layer 121 may include a low-k dielectric material. Specifically, the material of the bottom dielectric layer 121 may include one or more of epoxy resin, silica gel, PI, PBO, BCB, silicon oxide, phosphosilicate glass, and fluorine-containing glass; Differently, the underlying dielectric layer 121 may be formed by processes such as spin coating, CVD, plasma enhanced CVD, and the like.

As an example, the material of the molding material layer 122 may include but not limited to one or more of materials such as polyimide, silicone or epoxy resin.

As an example, the seed layer 123 can be formed by using but not limited to a sputtering process; the material of the seed layer 123 can include one or more of Ti (titanium) and Cu (copper); specifically, the seed Layer 123 may be a titanium layer, may also be a copper layer, may also be a laminated structure of a titanium layer and a copper layer, or may be a titanium-copper alloy layer.

As an example, the material of the dielectric layer 124 may include a low-k dielectric material. As an example, the dielectric layer 124 can be one or more of epoxy resin, silica gel, PI, PBO, BCB, silicon oxide, phosphosilicate glass, and fluorine-containing glass. The dielectric layer 124 is formed by coating, CVD, plasma enhanced CVD and other processes.

As an example, the metal wire layer may include a single metal layer, or may include two or more metal layers. As an example, the material of the metal line layer and the material of the metal plug may include one or more of copper, aluminum, nickel, gold, silver, and titanium.

In step 3), referring to step S3 in FIG. 1 and FIG. 6 , an electrical connection structure 13 is formed on the upper surface of the rewiring layer 12 , and the electrical connection structure 13 is electrically connected to the rewiring layer 12 .

As an example, the electrical connection structure 13 may be formed on the upper surface of the rewiring layer 12 by using a wire bonding process or a pillar bonding process; the electrical connection structure 13 may include a welding wire or a conductive column.

As an example, the number of the electrical connection structures 13 can be set according to actual needs. In FIG. 6, only four electrical connection structures 13 are shown as an example. It is not limited to this.

In step 4), referring to step S4 in FIG. 1 and FIG. 7 to FIG. 8 , a plastic encapsulation layer 14 is formed on the upper surface of the rewiring layer 12 , and the plastic encapsulation layer 14 encapsulates the electrical connection structure 13 .

As an example, a molded underfill process, an imprint molding process, a transfer molding process, a liquid-sealed molding process, a vacuum lamination process, or a spin-coating process can be used, which is equal to the formation of the upper surface of the rewiring layer 12. The plastic encapsulation layer 14; preferably, in this embodiment, the plastic encapsulation layer 14 is formed on the upper surface of the rewiring layer 12 by using a molding underfill process. The molded underfill process is used to form the plastic seal layer 14, the plastic seal layer 14 can smoothly and quickly fill the gap between the electrical connection structures 13, and can effectively avoid interface delamination; and the molded underfill process It is not limited like the capillary underfill process in the prior art, greatly reduces the difficulty of the process, can be used for smaller connection gaps, and is more suitable for stacking structures.

As an example, the material of the plastic sealing layer 14 may include, but not limited to, one or more of polymer-based materials, resin-based materials, polyimide, silica gel, or epoxy resin.

As an example, the upper surface of the initially formed plastic encapsulation layer 14 may be higher than the top of the electrical connection structure 13, as shown in FIG. The process of thinning the plastic sealing layer 14, specifically, but not limited to chemical mechanical grinding process can be used to thin the plastic sealing layer 14, so that the remaining upper surface of the plastic sealing layer 14 and the electrical connection structure 13 The top is flush, as shown in Figure 8. Certainly, in other examples, the upper surface of the initially formed plastic sealing layer 14 is flush with the top of the electrical connection structure 13, as shown in FIG. Thinning process.

Of course, in other examples, the plastic encapsulation layer 14 may also be formed first, and then a via hole is formed in the plastic encapsulation layer 14, the via hole exposes the metal conductive layer 125 of the rewiring layer 12, and then the The through hole is filled with metal to form the electrical connection structure 13 , which is not strictly limited in this embodiment. Compared with the method of first forming the electrical connection structure 13 and then performing plastic packaging, the advantage of this method is that it can avoid problems such as the collapse of the electrical connection structure 13 and/or damage to the electrical connection structure 13 during the subsequent plastic packaging process. The performance of the semiconductor package structure is improved.

In step 5), referring to step S5 in FIG. 1 and FIG. 9, a first antenna layer 15 is formed on the upper surface of the plastic sealing layer 14, and the first antenna layer 15 is electrically connected to the electrical connection structure 13. , the first antenna layer 15 includes at least one first antenna 151 .

As an example, forming the first antenna layer 15 on the upper surface of the plastic encapsulation layer 14 may include the following steps:

5-1) forming a first antenna metal layer (not shown) on the upper surface of the plastic sealing layer 14;

5-2) Etching the first antenna metal layer to obtain the first antenna layer 15 including a plurality of first antennas 151 arranged at intervals; that is, the first antenna layer 15 may include several a plurality of first antennas 151, and a plurality of first antennas 151 can be evenly spaced, which can enhance the gain and beam width of the first antenna layer 15; The upper surface of the plastic sealing layer 14 can be arranged in any shape (for example, distributed in a ring shape, etc.). The number of the first antennas 151 of the first antenna layer 15 can be set according to actual needs. In FIG. 9, the first antenna layer 15 includes four first antennas 151 as an example. In actual In an example, the number of the first antennas 151 in the first antenna layer 15 is not limited thereto.

In another example, a groove can also be formed in the upper surface of the plastic sealing layer 14, and the first antenna layer 15 is formed in the groove, and the obtained structure is shown in FIG. 10 , and preferably the The upper surface of the first antenna layer 15 is flush with the upper surface of the plastic encapsulation layer 14 . When there are multiple first antennas 151 on the first antenna layer 15 , the multiple first antennas 151 are separated by the plastic encapsulation layer 14 , which can form good protection for the first antennas 151 .

As an example, the first antenna layer 15 can be formed by an electroplating process, a physical vapor deposition process or a chemical vapor deposition process; the material of the first antenna layer 15 can include but not limited to at least one of copper, aluminum and silver. kind.

As an example, the shape of the first antenna 151 may include but not limited to a block shape or a spiral shape and the like.

In step 6), referring to step S6 in FIG. 1 and FIG. 11 , a frame structure 16 is formed on the upper surface of the plastic encapsulation layer 14 , and the frame structure 16 is located at the periphery of the first antenna layer 15 .

As an example, the frame structure 16 includes a resin frame structure, a metal frame structure or a ceramic frame structure; preferably a metal frame structure, which can avoid electromagnetic interference of the external environment on the first antenna layer 15 .

As an example, the frame structure 16 may surround the first antenna layer 15 with a distance between the frame structure 16 and the first antenna layer 15 .

As an example, the frame structure 16 may be bonded to the upper surface of the plastic sealing layer 14 using a bonding process.

In step 7), referring to step S7 in FIG. 1 and FIG. 12, a lens substrate 17a is provided, a surface of the lens substrate 17a is formed with a second antenna layer 18, and the second antenna layer 18 includes at least one first antenna layer. Two antennas 181; the lens substrate 17a is bonded to the top of the frame structure 16, the second antenna layer 18 is located on the lower surface of the lens substrate 17a after bonding, and the second antenna layer 18 is connected to the bottom surface of the lens substrate 17a. The first antenna layer 15 has a distance.

As an example, after step 7), the lens substrate 17a seals the area inside the frame structure 16 to form an air cavity 20, and the first antenna layer 15 and the second antenna layer 18 are both located in the air cavity. cavity 20.

The lens substrate 17a is preferably an optical glass substrate, such as quartz glass, which can reduce the radiation loss of the antenna and improve the performance of the antenna.

As an example, forming the second antenna layer 18 on a surface of the lens substrate 17a includes the following steps:

forming a second antenna metal layer (not shown) on a surface of the lens substrate 17a;

Etching the second antenna metal layer to obtain the second antenna layer 18 including a plurality of second antennas 181 arranged at intervals; that is, the second antenna layer 18 may include several second antennas 181, The plurality of second antennas 181 may be arranged in any shape (for example, in an array) on the lower surface of the frame structure 16 , and there is a distance between adjacent second antennas 181 . The number of the second antennas 181 of the second antenna layer 18 can be set according to actual needs. In FIG. 12, the second antenna layer 18 includes four second antennas 181 as an example. In an example, the number of the second antennas 181 of the second antenna layer 18 is not limited thereto. The number, shape and arrangement of the second antennas 181 of the second antenna layer 18 are preferably exactly the same as the number, shape and arrangement of the first antennas 151 of the first antenna layer 15, and the The one-to-one correspondence between the first antenna 151 and the second antenna 181 is beneficial to improve the antenna gain and increase the beam width of the antenna.

Of course, in other examples, a plurality of grooves distributed at intervals may also be formed on the surface of the lens substrate 17a, and metal is filled in the grooves to form the second antenna layer 18, that is, the second antenna layer 18 is formed in the groove of the lens substrate 17a, and preferably the surface of the second antenna layer 18 is flush with the surface of the lens substrate 17a, thereby forming good protection for the second antenna layer 18 , and at the same time, it is beneficial to focus the radiated wave of the second antenna layer 18, which is beneficial to improve the performance of the antenna. The structure obtained by this method is shown in FIG. 13 (in FIG. 13 the first antenna layer 15 is located in the plastic encapsulation layer 14).

As an example, the material of the second antenna 181 may include but not limited to at least one of copper, aluminum and silver.

In step S8), referring to step S8 in FIG. 1 and FIG. 14, the lens substrate 17a is etched to form a lens layer 17, and the lens layer 17 includes at least one lens 171, and the lens 171 is connected to the lens layer 17. The second antenna 181 corresponds up and down; the lens 171 is preferably multiple and more preferably the lens 171 is multiple with the first antenna 151 and the second antenna 181 and the first antenna 151, The second antenna 181 and the lens 171 have one-to-one correspondence in the longitudinal direction, and the lens 171 is preferably a convex lens, which can focus the radiation wave of the antenna to improve the antenna gain, while the first antenna 151, the second Multiple antennas 181 and the lens 171 can increase the beam width, so that the performance of the semiconductor package structure of the present application is significantly improved. Of course, in other examples, according to different requirements, the lens 171 may be a concave lens, which is not strictly limited in this embodiment.

As an example, in this embodiment, the lens substrate 17a is only partially etched to form the lens 171, and the unetched part becomes the planar portion 172 of the lens layer 17, and the planar portion 172 is located on the frame. The top of the structure 16 and the lens 171 is located on the surface of the plane part 172, so the plane part 172 and the lens 171 are integrated, such an integrated structure is beneficial to reduce the radiation loss of the antenna and improve the performance of the antenna. The thickness and etching depth of the lens substrate 17a depend on the focal length of the lens 171, preferably the distance between the second antenna 181 of the second antenna layer 18 and the optical center of the lens 171 (i.e. object distance) It is greater than twice the focal length of the lens 171 to maximize the focus of the antenna radiation wave and increase the antenna gain.

It should be noted that the lens layer 17 can also be prepared through large-scale production without separately forming the lens layer 17 in each packaging process, and the lens 171 is formed and formed on the surface of the lens layer 17. There is no strict sequence relationship between the two of the second antenna layers 18. For example, the second antenna layer 18 can be formed on the surface of the lens substrate 17a first, and then the lens substrate 17a can be formed according to the second antenna layer 18. Etching is performed to form the lens 171 , and the second antenna layer 18 may be formed corresponding to the lens 171 after forming the lens 171 , which is not strictly limited in this embodiment. The latter is preferred, namely forming the lens 171 first and then forming the second antenna layer 18, so as to reduce the exposure time of the second antenna layer 18, ensure the performance of the second antenna layer 18, and avoid The damage that may be caused to the second antenna layer 18 during the process of forming the second antenna layer 18 and then etching to form the lens 171 (for example, it may cause the second antenna layer 18 to fall off), ensures that the device performance.

In step 9), referring to step S9 in FIG. 1 and FIG. 15 , the substrate 10 and the sacrificial layer 11 are removed.

As an example, the sacrificial layer 11 may be removed while the substrate 10 is removed.

As an example, the sacrificial layer 11 and the substrate 10 can be removed by a grinding process, a thinning process or a tearing process; preferably, in this embodiment, the substrate 10 is removed by tearing off the sacrificial layer 11 .

As an example, step 9) further includes the following step: forming an opening 126 in the rewiring layer 12, the opening 126 passing through the bottom dielectric layer 121 and the molding material layer 122 to expose the seed layer 123, as shown in Figure 16. Specifically, the opening 126 may be formed by etching from the lower surface of the rewiring layer 12 using a photolithography process.

In step 10), please refer to S10 step among Fig. 1 and Fig. 17, provide chip 21, described chip 21 is bonded on the lower surface of described rewiring layer 12, described chip 21 and described rewiring layer 12 to achieve electrical connection.

As an example, the chip 21 can be any functional chip, a device structure (not shown) can be formed in the chip 21, and a connection pad (not shown) can be formed on the surface of the chip 21, so The connection pad is electrically connected to the device structure.

As an example, the device structures in the chip 21 may include active components and passive components.

As an example, any existing bonding process can be used to bond the chip 21 to the lower surface of the rewiring layer 12; the connection pad of the chip 21 is connected to the The metal conductive layer 125 in the redistribution layer 12 is electrically connected.

As an example, after bonding the chip 21 to the lower surface of the rewiring layer 12, it also includes the step of forming an underfill layer 22 between the chip 21 and the rewiring layer 12; But not limited to at least one of inkjet process, dispensing process, compression molding process, transfer molding process, liquid seal forming process, vacuum lamination process or spin coating process to form the bottom filling layer 22; The material of the filling layer 22 may include but not limited to at least one of polyimide, silica gel and epoxy resin. The underfill layer 22 can enhance the bonding strength between the chip 21 and the rewiring layer 12 and protect the rewiring layer 12 .

In step 11), referring to step S11 in FIG. 1 and FIG. 18 and FIG. 19, solder ball bumps 19 are formed on the lower surface of the rewiring layer 12. Layer 12 is electrically connected.

As an example, the solder ball bumps 19 are located in the openings 126 on the periphery of the chip 21 , and the solder ball bumps 19 are in contact with the seed layer 123 .

As an example, the material of the solder ball bump 19 may include at least one of copper and tin.

Of course, the above process sequence is only schematic and can be adjusted according to different needs. For example, in other examples, the chip 21 can also be bonded to the surface of the rewiring layer 12 first, and then other structures can be sequentially formed. It is not strictly limited in this embodiment. And according to needs, the antenna layer can also be 3 or more layers, so as to further improve the performance of the antenna.

The semiconductor package structure prepared by the method for preparing the semiconductor package structure of the present invention can effectively reduce the cost of the semiconductor package structure by plastic-sealing the lens layer 17, the first antenna layer 15, the second antenna layer 18, and the chip 21 up and down. The volume of the semiconductor packaging structure is reduced, and the integration degree of the device is improved; by integrating the active element and the passive element in the chip 21, the volume of the packaging structure can be further reduced, and the integration of the device can be further improved. The radiation wave of the antenna is focused by the lens of the lens layer, which can effectively improve the antenna gain; there is only air isolation between the first antenna layer 15 and the second antenna layer 18, and the dielectric loss of the air is extremely small. The signal loss of the first antenna layer 15 and the second antenna layer 18 can be reduced, and the transmission signal path in the semiconductor packaging structure of the present invention is shorter, so that better electrical properties and antenna performance can be obtained. By adopting the preparation method of the invention, the performance of the prepared semiconductor packaging structure can be significantly improved, and the production cost is reduced.

Embodiment two

Please continue to refer to FIG. 18 and FIG. 19 in conjunction with FIG. 2 to FIG. 17. The present invention also provides a semiconductor packaging structure, which can be prepared according to the preparation method of Embodiment 1. Therefore, the relevant structures in Embodiment 1 The description applies fully to this embodiment.

As shown in Figure 18, the semiconductor package structure includes: a rewiring layer 12; a chip 21, the chip 21 is bonded to the lower surface of the rewiring layer 12, and the chip 21 and the rewiring layer 12 Electrical connection; electrical connection structure 13, the electrical connection structure 13 is located on the upper surface of the rewiring layer 12, and the electrical connection structure 13 is electrically connected to the rewiring layer 12; plastic sealing layer 14, the plastic sealing layer 14 is located on the upper surface of the rewiring layer 12, and the plastic sealing layer 14 plastic-seals the electrical connection structure 13; the first antenna layer 15, the first antenna layer 15 is located on the upper surface of the plastic sealing layer 14, And the first antenna layer 15 is electrically connected to the electrical connection structure 13, the first antenna layer 15 includes at least one first antenna 151; a frame structure 16, the frame structure 16 is located on the plastic sealing layer 14 surface, and the frame structure 16 is located at the periphery of the first antenna layer 15; the lens layer 17 is located at the top of the frame structure 16, and the lens layer 17 includes at least one lens 171; the second antenna layer 18, the The second antenna layer 18 is located on the lower surface of the lens layer 17, and the second antenna layer 18 has a distance from the first antenna layer 15, the second antenna layer 18 includes at least one second antenna 181 and The second antenna 181 is arranged corresponding to the lens 171 of the lens layer 17; the solder ball bump 19 is located on the lower surface of the rewiring layer 12, and the solder ball bump 19 It is electrically connected with the rewiring layer 12 . The semiconductor packaging structure of the present invention can effectively reduce the volume of the packaging structure and improve the integration degree of the device by plastic sealing the lens layer, the first antenna layer, the second antenna layer and the chip up and down; Focusing can effectively improve the antenna gain; there is only air isolation between the first antenna layer and the second antenna layer, and the dielectric loss of the air is extremely small, which can reduce the signal loss of the first antenna layer and the second antenna layer, and the present invention The transmission signal path in the semiconductor package structure is shorter, which can get better electrical and antenna performance.

As an example, the rewiring layer 12 may include: a dielectric layer 124 located on the upper surface of the sacrificial layer 11; a metal conductive layer 125 located in the dielectric layer 124, the metal conductive layer 125 includes multiple layers of metal wire layers (not shown) and metal plugs (not shown) arranged at intervals, and the metal plugs are located between adjacent metal wire layers to The wire layer is electrically connected.

As an example, the material of the dielectric layer 124 may include a low-k dielectric material. Specifically, the material of the dielectric layer 124 can include epoxy resin, silica gel, PI, PBO, BCB, silicon oxide, phosphosilicate glass and fluorine-containing glass; coating, CVD, plasma enhanced CVD and other processes.

As an example, the rewiring layer 12 may further include: a seed layer 123, the seed layer 123 is located in the dielectric layer 124, and the seed layer 123 is electrically connected to the metal conductive layer 125; a plastic encapsulation material layer 122 , the molding material layer 122 is located in the dielectric layer 124 and is located on the lower surface of the seed layer 123; the dielectric layer 124 covers the molding material layer 122 and the seed layer 123 underlying dielectric layer 121 , the underlying dielectric layer 121 is located on the lower surface of the dielectric layer 124 .

As an example, the material of the underlying dielectric layer 121 may include a low-k dielectric material. Specifically, the material of the bottom dielectric layer 121 may include one or more of epoxy resin, silica gel, PI, PBO, BCB, silicon oxide, phosphosilicate glass, and fluorine-containing glass; depending on the material, the The underlying dielectric layer 121 can be formed by processes such as spin coating, CVD, plasma enhanced CVD, and the like.

As an example, the material of the molding material layer 122 may include but not limited to one or more of materials such as polyimide, silicone or epoxy resin.

As an example, the seed layer 123 can be formed by using but not limited to a sputtering process; the material of the seed layer 123 can include at least one of Ti (titanium) and Cu (copper); specifically, the seed layer 123 It may be a titanium layer, may also be a copper layer, may also be a laminated structure of a titanium layer and a copper layer, or may be a titanium-copper alloy layer.

As an example, the material of the dielectric layer 124 may include a low-k dielectric material. As an example, the dielectric layer 124 can be one or more of epoxy resin, silica gel, PI, PBO, BCB, silicon oxide, phosphosilicate glass, and fluorine-containing glass, and can be used such as spin coating, CVD, plasma The dielectric layer 124 is formed by enhanced CVD and other processes.

As an example, the metal wire layer may include a single metal layer, or may include two or more metal layers. As an example, the material of the metal line layer and the material of the metal plug may include one material or a combination of two or more materials among copper, aluminum, nickel, gold, silver, and titanium.

As an example, the chip 21 can be any functional chip, a device structure (not shown) can be formed in the chip 21, and a connection pad (not shown) can be formed on the surface of the chip 21, so The connection pad is electrically connected to the device structure.

As an example, the device structures in the chip 21 may include active components and passive components.

As an example, any existing bonding process can be used to bond the chip 21 to the lower surface of the rewiring layer 12; The metal conductive layer 125 is electrically connected.

As an example, the electrical connection structure 13 may include bonding wires or conductive posts.

As an example, the number of electrical connection structures 13 can be set according to actual needs. In FIG. 18, only four electrical connection structures 13 are shown as an example. It is not limited to this.

As an example, the material of the plastic sealing layer 14 may include, but not limited to, one or more of polymer-based materials, resin-based materials, polyimide, silica gel, or epoxy resin.

As an example, the upper surface of the plastic encapsulation layer 14 is flush with the top of the electrical connection structure 13 .

As an example, the first antenna layer 15 includes several first antennas 151; several first antennas 151 are arranged in any shape on the upper surface of the plastic encapsulation layer 14 (for example, several first antennas 151 are evenly spaced and arranged in an array, which is beneficial to increase the beam width of the antenna), and there is a distance between adjacent first antennas 151 . The number of the first antennas 151 of the first antenna layer 15 can be set according to actual needs. In FIG. 15, the first antenna layer 15 includes four first antennas 151 as an example. In an example, the number of the first antennas 151 of the first antenna layer 15 is not limited thereto.

As an example, the first antenna layer 15 can be formed by an electroplating process, a physical vapor deposition process or a chemical vapor deposition process; the material of the first antenna layer 15 can include but not limited to at least one of copper, aluminum and silver. kind.

As an example, the frame structure 16 includes a resin frame structure, a metal frame structure or a ceramic frame structure, preferably a metal frame, which can reduce external electromagnetic interference.

As an example, the frame structure 16 may surround the first antenna layer 15 with a distance between the frame structure 16 and the first antenna layer 15 .

As an example, the frame structure 16 may be bonded to the upper surface of the plastic sealing layer 14 using a bonding process.

The lens layer 17 seals the area inside the frame structure 17 to form an air cavity 20 , and both the first antenna layer 15 and the second antenna 18 are located in the air cavity 20 .

As an example, the material of the lens layer 17 is preferably optical glass, such as quartz glass, and the lens 171 is preferably a convex lens, which can focus antenna radiation waves and improve antenna gain.

As an example, the lens layer 17 also includes a plane portion 172, the plane portion 172 is located on the top of the frame structure 16, the lens 171 is located on the upper surface of the plane portion 172, the plane portion 172 and the The lens 171 is preferably an integrated structure, which can reduce the radiation loss of the antenna and increase the gain of the antenna.

As an example, the second antenna layer 18 may include several second antennas 181 arranged in any shape in the frame structure 16 (for example, several second antennas 181 Evenly distributed and arranged in an array, which is beneficial to increase the beam width of the antenna), and there is a distance between adjacent second antennas 181 . The number of the second antennas 181 of the second antenna layer 18 can be set according to actual needs. In FIG. 11, the second antenna layer 18 includes four second antennas 181 as an example. In an example, the number of the second antennas 181 of the second antenna layer 18 is not limited thereto.

As an example, the number of the first antenna 151, the second antenna 181 and the lens 171 are multiple, such as 2 or more, the number of the three is preferably the same and the first antenna 151, The second antenna 181 and the lens 171 are provided in one-to-one correspondence in the longitudinal direction, and the projected area of the lens 171 is not less than the surface area of the second antenna 181 to ensure that the lens 171 radiates to the second antenna 181 The wave is fully focused, which helps to improve the antenna gain and increase the antenna beam width.

As an example, the material of the second antenna 181 may include but not limited to at least one of copper, aluminum and silver.

As an example, the material of the solder ball bump 19 may include at least one of copper and tin.

As shown in FIG. 19 , in another example, a groove (not shown) is formed on the upper surface of the plastic sealing layer 14 , the first antenna layer 15 is formed in the groove of the plastic sealing layer 14 , and Preferably, the upper surface of the first antenna layer 15 is flush with the upper surface of the plastic encapsulation layer 14. In the case where the first antenna layer 15 includes a plurality of first antennas 151 distributed at intervals, the The space between the first antennas 151 is filled by the plastic encapsulation layer 14 to form good protection for the first antenna layer 15, improve antenna performance, and facilitate further miniaturization of the device. Of course, in other examples, the second antenna layer 18 may also be formed in the lens layer 17 (that is, grooves are formed in the lens layer 17, and the second antenna layer 18 is formed in the lens layer 17) and the surface of the second antenna layer 18 is flush with the surface of the lens layer 17, which is not strictly limited in this embodiment.

In summary, the present invention provides a semiconductor package structure and a manufacturing method thereof, the semiconductor package structure comprising: a rewiring layer; a chip bonded to the lower surface of the rewiring layer, and connected to the rewiring layer Electrical connection; an electrical connection structure, located on the upper surface of the rewiring layer, and electrically connected to the rewiring layer; a plastic sealing layer, located on the upper surface of the rewiring layer, and plastic-encapsulating the electrical connection structure; An antenna layer is located on the upper surface of the plastic sealing layer and is electrically connected to the electrical connection structure, the first antenna layer includes at least one first antenna; a frame structure is located on the upper surface of the plastic sealing layer and is located on the periphery of the first antenna layer; a lens layer located on the top of the frame structure, the lens layer comprising at least one lens; a second antenna layer located on the lower surface of the lens layer and connected to the first antenna The layer has a pitch, the second antenna layer includes at least one second antenna and the second antenna is arranged corresponding to the lens of the lens layer; the solder ball bump is located on the lower surface of the rewiring layer, and is connected to the Redistribution layer electrical connections described above. The semiconductor packaging structure of the present invention can effectively reduce the volume of the packaging structure and improve the integration degree of the device by plastic sealing the lens layer, the first antenna layer, the second antenna layer and the chip up and down; Focusing can effectively improve the antenna gain; there is only air isolation between the first antenna layer and the second antenna layer, and the dielectric loss of the air is extremely small, which can reduce the signal loss of the first antenna layer and the second antenna layer, and the present invention The transmission signal path in the semiconductor package structure is shorter, which can get better electrical and antenna performance.

The above-mentioned embodiments are only illustrative to illustrate the principles and effects of the present invention, but are not intended to limit the present invention. Any person familiar with this technology can modify or change the above-mentioned embodiments without departing from the spirit and scope of the present invention. Therefore, all equivalent modifications or changes made by those skilled in the art without departing from the spirit and technical ideas disclosed in the present invention should still be covered by the claims of the present invention.

Claims (10)

1. A semiconductor package structure, characterized in that, the semiconductor package structure comprises: rewiring layer; A chip bonded to the lower surface of the rewiring layer and electrically connected to the rewiring layer; An electrical connection structure located on the upper surface of the rewiring layer and electrically connected to the rewiring layer; a plastic sealing layer, located on the upper surface of the rewiring layer, and plastic sealing the electrical connection structure; a first antenna layer, located on the upper surface of the plastic encapsulation layer, and electrically connected to the electrical connection structure, the first antenna layer includes at least one first antenna; a frame structure located on the upper surface of the plastic encapsulation layer and located on the periphery of the first antenna layer; a lens layer on top of the frame structure, the lens layer comprising at least one lens; The second antenna layer is located on the lower surface of the lens layer and has a distance from the first antenna layer, the second antenna layer includes at least one second antenna and the second antenna is connected to the lens of the lens layer Corresponding settings; Solder ball bumps are located on the lower surface of the rewiring layer and are electrically connected to the rewiring layer. 2. The semiconductor package structure according to claim 1, characterized in that: the number of the first antenna, the second antenna and the lens is multiple and the first antenna, the second antenna One-to-one correspondence with the lens. 3. The semiconductor package structure according to claim 1, wherein the frame structure comprises a resin frame structure, a metal frame structure or a ceramic frame structure. 4. The semiconductor package structure according to claim 1, wherein the semiconductor package structure further comprises an underfill layer, and the underfill layer is located between the chip and the rewiring layer. 5. The semiconductor package structure according to any one of claims 1 to 4, wherein the lens is a convex lens, and the lens layer further includes a planar portion, the planar portion is located at the top of the frame structure, The convex lens is located on the upper surface of the plane part. 6. A preparation method of a semiconductor packaging structure, characterized in that, the preparation method of the semiconductor packaging structure comprises the steps of: providing a base, forming a sacrificial layer on the upper surface of the base; forming a rewiring layer on the upper surface of the sacrificial layer; forming an electrical connection structure on the upper surface of the rewiring layer, the electrical connection structure being electrically connected to the rewiring layer; forming a plastic sealing layer on the upper surface of the rewiring layer, the plastic sealing layer plastic sealing the electrical connection structure; A first antenna layer is formed on the upper surface of the plastic sealing layer, the first antenna layer is electrically connected to the electrical connection structure, and the first antenna layer includes at least one first antenna; forming a frame structure on the upper surface of the plastic sealing layer, the frame structure is located at the periphery of the first antenna layer; A lens substrate is provided, a second antenna layer is formed on a surface of the lens substrate, and the second antenna layer includes at least one second antenna; the lens substrate is bonded to the top of the frame structure, and the bonded The second antenna layer is located on the lower surface of the lens substrate and has a distance from the first antenna layer; performing etching on the lens substrate to form a lens layer, the lens layer including at least one lens, the lens corresponding to the upper and lower sides of the second line; removing the substrate and the sacrificial layer; providing a chip, bonding the chip to the lower surface of the rewiring layer, and electrically connecting the chip to the rewiring layer; Solder ball bumps are formed on the lower surface of the redistribution layer, and the solder ball bumps are electrically connected to the redistribution layer. 7 . The method for manufacturing a semiconductor package structure according to claim 6 , wherein the formed frame structure includes a resin frame structure, a metal frame structure or a ceramic frame structure; and the lenses of the lens layer are convex lenses. 8. The preparation method of semiconductor package structure according to claim 6, is characterized in that, Forming the first antenna layer on the upper surface of the plastic encapsulation layer includes the following steps: forming a first antenna metal layer on the upper surface of the plastic encapsulation layer; Etching the first antenna metal layer to obtain the first antenna layer including a plurality of the first antennas arranged at intervals; Forming the second antenna layer on a surface of the lens substrate includes the following steps: forming a second antenna metal layer on a surface of the lens substrate; etching the second antenna metal layer to obtain the second antenna layer comprising a plurality of the second antennas arranged at intervals; The first antenna and the second antenna are arranged in a one-to-one correspondence. 9. The method for preparing a semiconductor package structure according to claim 6, characterized in that: after the chip is bonded to the lower surface of the rewiring layer, it is also included between the chip and the rewiring layer A step of forming an underfill layer. 10. The method for manufacturing a semiconductor package structure according to any one of claims 6 to 9, wherein the lens layer includes a plane part and a lens located on the surface of the plane part, and the plane part is located on the frame On the top of the structure, there are multiple lenses, the first antenna and the second antenna, and the first antenna, the second antenna and the lens correspond one-to-one.