CN110047772A - A kind of probe card, preparation method and chip detecting method - Google Patents

Abstract

The embodiment of the invention discloses a probe card, a preparation method and a chip testing method. The probe card includes: a substrate, a patterned substrate layer located on one side of the substrate, the patterned substrate layer including at least one vacant slot; at least one cantilever probe located on the side of the patterned substrate layer away from the substrate, the cantilever probe extending The cantilever probe includes a first thermal deformation layer, a second thermal deformation layer and a conductive contact, the first thermal deformation layer is located between the patterned substrate layer and the second thermal deformation layer, and the first thermal deformation layer is located between the patterned substrate layer and the second thermal deformation layer. The thermal expansion coefficient of a thermal deformation layer is greater than the thermal expansion coefficient of the second thermal deformation layer, the conductive contact is arranged at one end of the cantilever probe suspended in the vacant slot, the first thermal deformation layer and/or the second thermal deformation layer is a conductive layer, and the conductive contact is The layers are electrically connected to the conductive contacts. The invention solves the problems of insufficient docking accuracy and easy poor contact of the existing probe card, realizes the automatic contact of the probe, and can ensure the effective contact between the cantilever probe and the chip to be tested.

Description

A probe card, preparation method and chip testing method

technical field

The embodiments of the present invention relate to the technical field of semiconductor manufacturing, and in particular, to a probe card, a preparation method and a chip testing method.

Background technique

Various tests are required at various stages of semiconductor device fabrication. For example, in order to test the electrical characteristics of the semiconductor device before packaging the semiconductor device, a test instrument can be used to connect with the semiconductor device through a probe card including fine probes. Specifically, the probes of the probe card can be connected to the semiconductor device. The upper electrode contacts make electrical connections so that electrical signals can be transmitted from the tester to the semiconductor device, and a signal output by the semiconductor device in response to the transmitted electrical signal is detected and analyzed to determine whether the semiconductor device is normal. For example, in the field of Micro Light Emitting Diode (Micro-LED) display panels, it is necessary to transfer Micro-LED chips to the driver backplane in batches, and probe cards need to be used to test the Micro-LED chip array before the batch transfer is performed. , to calibrate the chip with normal electrical performance.

With the increase in the number of electrodes in semiconductor chips and further miniaturization, the pitch between electrodes continues to decrease. Especially for Micro-LED chips, the electrodes are small in size, complex in surface structure, and undulating. Traditional probes use It is difficult to ensure the accuracy of the mechanical movement by contacting the chip electrodes, which makes it difficult to align the probe during the test process, thereby affecting the test efficiency.

SUMMARY OF THE INVENTION

The invention provides a probe card, a preparation method and a chip testing method, so as to realize the automatic electrical contact between the probe and the chip to be tested, and at the same time ensure the effective contact between the probe and the chip to be tested.

The present invention provides a probe card, comprising:

substrate,

a patterned substrate layer, located on one side of the substrate, the patterned substrate layer comprising at least one vacant groove;

at least one cantilever probe located on the side of the patterned substrate layer away from the substrate, the cantilever probe extending to the vacant groove and suspended above the vacant groove;

The cantilever probe includes a first thermal deformation layer, a second thermal deformation layer, and a conductive contact, the first thermal deformation layer is located between the patterned substrate layer and the second thermal deformation layer, and the first thermal deformation layer is located between the patterned substrate layer and the second thermal deformation layer. The thermal expansion coefficient of a thermal deformation layer is greater than the thermal expansion coefficient of the second thermal deformation layer, the conductive contact is disposed at one end of the cantilever probe suspended in the vacant groove, the first thermal deformation layer and/or The second thermal deformation layer is a conductive layer, and the conductive layer is electrically connected to the conductive contacts.

In the above probe card, optionally, at least one of the cantilever probes is arranged in a one-to-one correspondence with at least one of the empty slots.

In the above probe card, optionally, the first thermal deformation layer is a conductive layer, and the cantilever probe further includes a conductive contact slot at least penetrating the second thermal deformation layer; the conductive contact Located in the conductive contact slot, the conductive contact is electrically connected to the first thermal deformation layer.

In the above probe card, optionally, the range of the difference between the thermal expansion coefficients of the first thermal deformation layer and the second thermal deformation layer is 10×10 ^-6 /°C-50×10 ^-6 / °C.

In the above probe card, optionally, the thermal expansion coefficient of the first thermal deformation layer is greater than 15×10 ^-6 /°C, and the thermal expansion coefficient of the second thermal deformation layer is less than 10×10 ^-6 /°C.

In the above probe card, optionally, the length of the cantilever probe in the extension direction is in the range of 50-2000 μm, and the length in the vertical direction of the extension is in the range of 10-400 μm.

The present invention also provides a preparation method of a probe card, comprising:

providing a substrate;

forming a substrate layer on one side of the substrate;

forming a first thermal deformation layer on the side of the substrate layer away from the substrate;

A second thermal deformation layer is formed on the side of the first thermal deformation layer away from the substrate layer, wherein the thermal expansion coefficient of the first thermal deformation layer is greater than the thermal expansion coefficient of the second thermal deformation layer, and the first thermal deformation layer is A thermal deformation layer and/or the second thermal deformation layer is a conductive layer;

patterning the first thermal deformation layer and the second thermal deformation layer to form at least one probe structure;

forming a conductive contact on the probe structure, the conductive contact is electrically connected with the first thermal deformation layer and the conductive layer to form a cantilever probe;

The substrate layer is patterned to form a patterned substrate layer, the patterned substrate layer includes at least one vacant groove, and the cantilever probe extends to the vacant groove and is suspended in the vacant groove.

The preparation method of the probe card as described above, optionally, before the patterning of the substrate layer to form the patterned substrate layer, further comprising:

forming a protective layer on the surface of the cantilever probe;

After the patterning of the substrate layer to form the patterned substrate layer, the method further includes:

The protective layer on the surface of the cantilever probe is removed.

The present invention also provides a chip testing method, using the probe card described above, including:

moving the probe card to the position where the cantilever probe in the probe card is facing the electrode of the chip to be tested;

The cantilever probe is heated until the cantilever probe is thermally deformed and the conductive contacts on the cantilever probe electrically contact the electrodes of the chip to be tested.

In the chip testing method as described above, optionally, the cantilever probe is heated until the cantilever probe is thermally deformed and the conductive contacts on the cantilever probe electrically contact the electrodes of the chip to be tested After that, also include:

Electrical performance measurement is performed on at least one of the chips to be tested through the cantilever probe.

In the probe card, preparation method and chip testing method provided by the embodiments of the present invention, a patterned substrate layer is provided on a substrate, wherein the patterned substrate layer is provided with at least one vacant groove, and at least one cantilever probe is provided on the patterned substrate layer. The cantilever structure formed on the vacant groove by the cantilever probe can be bent during thermal deformation, and by setting the thermal expansion coefficient of the first thermal deformation layer in the cantilever probe to be greater than the thermal expansion coefficient of the second thermal deformation layer, the cantilever can be The probe is bent to the side away from the substrate through thermal deformation, so as to finally realize the automatic contact between the cantilever probe and the chip to be tested, which solves the problems that the mechanical docking accuracy of the existing probe card is insufficient and the contact is easy to occur. It realizes the automation of probe alignment and contact, and can ensure the effective contact between the cantilever probe and the chip to be tested, ensure the test efficiency of the chip, help to realize the batch test of microchips, especially Micro-LED, and improve the production of microchips efficiency.

Description of drawings

1 is a schematic structural diagram of a probe card according to an embodiment of the present invention;

Fig. 2 is the cross-sectional structure schematic diagram of the probe card shown in Fig. 1 along AA';

Fig. 3 is a side view of the probe card shown in Fig. 1;

4 is a schematic structural diagram of another probe card provided by an embodiment of the present invention;

5 is a schematic cross-sectional structure diagram of another probe card provided by an embodiment of the present invention;

6 is a flowchart of a method for preparing a probe card according to an embodiment of the present invention;

7 is a flowchart of another method for preparing a probe card according to an embodiment of the present invention;

8 is a flowchart of a chip testing method provided by an embodiment of the present invention;

9 is a schematic diagram of a chip test structure provided by an embodiment of the present invention;

FIG. 10 is a schematic diagram of another chip testing structure provided by an embodiment of the present invention.

Description of reference numerals: 10-substrate, 20-patterned substrate layer, 21-vacant slot, 30-cantilever probe, 31-first thermal deformation layer, 32-second thermal deformation layer, 33-conductive contact, 34 - Conductive contact slots.

Detailed ways

In order to make the purpose, technical solutions and advantages of the present invention clearer, the technical solutions in the embodiments of the present invention will be clearly and completely described below in conjunction with the embodiments of the present invention. Obviously, the described embodiments are part of the implementation of the present invention. examples, but not all examples. Based on the embodiments of the present invention, all other embodiments obtained by those of ordinary skill in the art without creative efforts shall fall within the protection scope of the present invention. The embodiments described below and features in the embodiments may be combined with each other without conflict.

As mentioned in the background art, the test accuracy of the probe card in the prior art cannot meet the test of the existing miniaturized chip, the main reason is that the traditional probe card usually uses mechanically moving probes to contact the chip electrodes, and gradually miniaturized The size of the chip becomes smaller and the surface structure of the chip becomes more complex. When using mechanical moving contact, it is easy to cause problems such as difficult alignment and poor contact, thus resulting in a decrease in the testing efficiency of microchips such as Micro-LED.

Based on the above reasons, the present invention provides a probe card. FIG. 1 is a schematic structural diagram of a probe card provided by an embodiment of the present invention, and FIG. 2 is a cross-sectional structural schematic diagram of the probe card shown in FIG. 1 along AA'. 3 is a side view of the probe card shown in FIG. 1, referring to FIGS. 1-3, the probe card includes a substrate 10, a patterned substrate layer 20, located on one side of the substrate 10, and the patterned substrate layer 20 includes at least one vacant slot 21; at least one cantilever probe 30, located on the side of the patterned substrate layer 20 away from the substrate 10, the cantilever probe 30 extends to the vacant slot 21 and is suspended on the vacant slot 21; the cantilever probe 30 includes a first thermal deformation layer 31. The second thermal deformation layer 32 and the conductive contacts 33, the first thermal deformation layer 31 is located between the patterned substrate layer 20 and the second thermal deformation layer 32, and the thermal expansion coefficient of the first thermal deformation layer 31 is greater than that of the second thermal deformation The thermal expansion coefficient of the layer 32, the conductive contact 33 is provided at one end of the cantilever probe 30 suspended in the vacant slot 21, the first thermal deformation layer 31 and/or the second thermal deformation layer 32 is a conductive layer, and the conductive layer and the conductive contact 33 electrical connection. As shown in the figure, the second thermal deformation layer 31 is a conductive layer, and the conductive contacts 33 may be provided on the surface of the second thermal deformation layer 31 .

The substrate 10 is made of rigid material to carry the probe structures disposed thereon. The substrate 10 can be made of silicon or glass, and the patterned substrate layer 20 is a substrate layer with vacant grooves 21 formed on the substrate 10 , the substrate layer can be made of silicon oxide or metal and other materials corresponding to the substrate using silicon or glass. The purpose of the patterned substrate layer 20 is mainly to form vacant grooves 21, so that the probe can form a cantilever structure, and the cantilever probe 30 is Since part of the cantilever probe 30 is suspended on the vacant groove 21, the suspended part of the cantilever probe 30 can be freely bent, so as to ensure that the cantilever probe 30 is in contact with the chip electrode to be tested for testing.

The free bending function of the cantilever probe 30 is realized by the principle of thermal deformation. Specifically, the first thermal deformation layer 31 and the second thermal deformation layer 32 in the cantilever probe 30 will be deformed when heated, and due to the first thermal deformation layer 31 and the second thermal deformation layer 32 have different thermal expansion coefficients, the cantilever probe 30 bends when thermally deformed, and the bending direction of the cantilever probe 30 depends on the thermal expansion coefficients of the first thermal deformation layer 31 and the second thermal deformation layer 32 the size of. By setting the thermal expansion coefficient of the first thermal deformation layer 31 to be greater than the thermal expansion coefficient of the second thermal deformation layer 32 , it can be ensured that the cantilever probe 30 bends to the side away from the substrate 10 when the temperature is raised. In addition, the first thermal deformation layer and/or the second thermal deformation layer need to be prepared with conductive materials, so as to realize the electrical connection with the conductive contacts as the conductive layers. When the conductive contacts 33 on the cantilever probe 30 contact the chip electrodes, It can transmit electrical signals to the chip to realize the test of the chip.

In the probe card provided by the embodiment of the present invention, a patterned substrate layer is provided on the substrate, wherein the patterned substrate layer is provided with at least one vacant groove, and at least one cantilever probe is provided on the patterned substrate layer, and the cantilever probe is used in the probe card. The cantilever structure formed on the vacant slot can be bent during thermal deformation, and by setting the thermal expansion coefficient of the first thermal deformation layer in the cantilever probe to be greater than the thermal expansion coefficient of the second thermal deformation layer, the cantilever probe can be realized through thermal deformation. The bending of the side away from the substrate can finally realize the automatic contact between the cantilever probe and the chip to be tested, which solves the problem that the mechanical docking accuracy of the existing probe card is insufficient and is prone to poor contact, and realizes the probe alignment and contact It can ensure the effective contact between the cantilever probe and the chip to be tested, ensure the test efficiency of the chip, help to realize the batch test of microchips, especially Micro-LED, and improve the production efficiency of microchips.

It should be noted that in addition to the cantilever probe structure shown in the figure, the probe card should also be provided with a circuit structure, so that each cantilever probe is passed through the circuit and the test instrument installed on the probe card to ensure that The test instrument sends or receives test signals to the chip to be tested. In addition, the rectangular shape of the probe card shown in the figure is only for illustration, and the actual probe card shape should be designed according to the shape of the chip or chip array. is circular. In addition, the number and distribution of cantilever probes in the probe card are not limited here, and those skilled in the art can design and layout according to the actual chip structure to be tested.

In the probe card shown in FIG. 1 , since the positions of the multiple cantilever probes 30 are adjacent, it is possible to set the multiple cantilever probes 30 to share one vacant slot 21 , that is, the multiple cantilever probes 30 are located in the same vacant slot 21 . In this case, when the vacant grooves 21 are formed on the patterned substrate layer 20 , the number of the vacant grooves 21 can be reduced, and the process of etching a plurality of vacant grooves 21 can be simplified. However, in some actual situations, the positions of the cantilever probes are not adjacent. For this situation, an embodiment of the present invention further provides a probe card. FIG. 4 is a schematic structural diagram of another probe card provided by an embodiment of the present invention. Referring to FIG. 4 , optionally, at least one cantilever probe 30 and at least one vacant slot 21 set in the probe card are set in a one-to-one correspondence . By setting each cantilever probe 30 to correspond to an empty slot 21 , it can be ensured that each cantilever probe 30 has a cantilever structure, and each cantilever structure has a separate free bending space.

5 is a schematic cross-sectional structure diagram of another probe card provided by an embodiment of the present invention. Referring to FIG. 5 , in the cantilever probe 30 in the probe card, the first thermal deformation layer 31 is a conductive layer, and the cantilever probe 30 It also includes a conductive contact slot 34 penetrating at least the second thermal deformation layer 32 ; the conductive contact 33 is located in the conductive contact slot 34 , and the conductive contact 33 is electrically connected to the first thermal deformation layer 31 .

Wherein, setting the first thermal deformation layer 31 as a conductive layer can make use of the first thermal deformation layer 31 to directly contact the patterned substrate layer 20. When the circuit structure is arranged on the patterned substrate layer 20, the conductive layer can directly contact the circuit structure, and The second thermal deformation layer 32 may be a conductive layer or a non-conductive layer. When the second thermal deformation layer 32 is a non-conductive layer, the conductive contacts 33 need to be electrically connected to the conductive layer. Two conductive contact grooves 34 of the thermally deformable layer 32 . Of course, in the case where the second thermal deformation layer 32 is also a conductive layer, a conductive contact slot 34 can also be provided in the second thermal deformation layer 32. On the one hand, the conductive contacts 33 and the first thermal deformation layer 31 can be connected. For electrical connection, on the other hand, the contact area between the conductive contacts 33 and the second thermal deformation layer 32 can be increased to ensure the electrical contact effect. It should be noted here that, in order to ensure the electrical conductivity and better oxidation resistance of the conductive contacts 33, the conductive contacts 33 can be made of copper, silver, tin, silver and alloys thereof.

Further, in order to ensure the ability of the cantilever probe in the probe card to actively contact the chip, the difference between the thermal expansion coefficients of the first thermal deformation layer and the second thermal deformation layer should be greater than or equal to 10×10 ^-6 /℃, that is, the first thermal deformation layer. When the first thermal deformation layer and the second thermal deformation layer are heated to the same temperature, the thermal deformation has a relatively obvious difference. At this time, due to the different thermal deformation of the two layers, a relatively large bending is formed, that is, a relatively obvious bending can be achieved. The effect of automatic contact chip. In addition, considering that the temperature adjustment accuracy is relatively low, in order to avoid excessive deformation of the cantilever probe in a small temperature range and the deformation amount out of control, the first thermal deformation layer can be arranged on the second thermal deformation layer. The difference of the thermal expansion coefficient is less than or equal to 50×10 ^-6 /°C, so that the bending degree of the cantilever probe can be effectively and properly controlled by temperature adjustment, and the active contact between the cantilever probe and the chip can be realized. Specifically, the thermal expansion coefficient of the first thermal deformation layer should be greater than 15×10 ^-6 /°C, and the thermal expansion coefficient of the second thermal deformation layer should be less than 10×10 ^-6 /°C. There is an obvious difference in the thermal expansion coefficient of the thermal deformation layer, and the deformation of the cantilever probe will be more obvious when the temperature rises. Among them, for the first thermal deformation layer with a larger thermal expansion coefficient, metals such as copper, aluminum, silver, manganese, lead, zinc and their alloys, or other alloy materials with a thermal expansion coefficient greater than 15×10 ^-6 /°C can be used, and The second thermal deformation layer can be selected from metals such as molybdenum, tungsten, chromium, platinum and their alloys, or any alloy material with a thermal expansion coefficient of less than 10×10 ^-6 /°C.

In the probe card provided by the embodiment of the present invention, the cantilever probe can be prepared by depositing a material into a film. Therefore, the size of the cantilever probe can reach the order of microns. Continuing to refer to FIG. 4 , optionally, the length L of the cantilever probe in the extending direction can be set in the range of 50-2000 μm, and the length D in the direction perpendicular to the extending direction can be set in the range of 10-400 μm, that is, the length of the cantilever probe is 50 μm. -2000μm with a width of 10-400μm. By setting a cantilever probe with a micron-scale size formed by deposition and film formation, the test of microchips such as Micro-LED can be realized. Moreover, since the size of the cantilever probe is relatively small, more chips can be tested at the same time. Batch testing of microchips improves the testing efficiency of chips.

An embodiment of the present invention also provides a method for preparing a probe card. FIG. 6 is a flowchart of a method for preparing a probe card provided by an embodiment of the present invention. Referring to FIGS. 2 and 6 , the method for preparing a probe card is shown in FIG. include:

S110. Provide a substrate.

The substrate is a rigid substrate, such as a silicon substrate or a glass substrate.

S120, forming a substrate layer on one side of the substrate.

Corresponding to silicon substrate and glass substrate, the substrate layer can be made of silicon oxide material and metal material respectively. For silicon substrate, the surface of the substrate can be oxidized to form a substrate layer of silicon oxide; for glass substrate, deposition can be used on the glass substrate, etc. form a metal film layer.

S130 , forming a first thermal deformation layer on the side of the substrate layer away from the substrate.

The material of the first thermal deformation layer can be selected from metals such as copper, aluminum, silver, manganese, lead, zinc, and their alloys, and can be formed by thermal evaporation, electron beam evaporation, sputtering, chemical plating, electroplating, etc. The first thermal deformation layer at this time has a whole-layer structure.

S140, forming a second thermal deformation layer on the side of the first thermal deformation layer away from the substrate layer, wherein the thermal expansion coefficient of the first thermal deformation layer is greater than the thermal expansion coefficient of the second thermal deformation layer, and the first thermal deformation layer and/or the The two thermal deformation layers are conductive layers.

Similarly, the second thermal deformation layer can also be formed by thermal evaporation, electron beam evaporation, sputtering, chemical plating, electroplating and other deposition methods, and the second thermal deformation layer can be made of molybdenum, tungsten, chromium, platinum and other metals and its alloys, the second thermal deformation layer at this time is also a whole-layer structure.

S150 , patterning the first thermal deformation layer and the second thermal deformation layer to form at least one probe structure.

The patterning of the first thermal deformation layer and the second thermal deformation layer can be achieved by a photolithography process. The structure of the photolithography mask determines the basic structure of the cantilever probe. At this time, the design of the photolithography mask can be used. The length and width of the cantilever probe.

S160 , forming a conductive contact on the probe structure, and the conductive contact is electrically connected to the first thermal deformation layer and the conductive layer to form a cantilever probe.

The conductive contacts can be formed of copper, aluminum, tin, and silver or their alloys, and the complete structure of the cantilever probe is formed.

S170 , patterning the substrate layer to form a patterned substrate layer, the patterned substrate layer includes at least one vacant groove, and the cantilever probe extends to the vacant groove and is suspended in the vacant groove.

In the patterning process of the substrate layer, the part of the substrate layer covered by the cantilever probe is substantially hollowed out, so that the part of the cantilever probe can be suspended, thereby realizing the bendability of the cantilever probe.

In the method for preparing a probe card provided by the embodiment of the present invention, a substrate layer, a first thermal deformation layer, and a second thermal deformation layer are formed on a substrate in sequence, and the first thermal deformation layer, the second thermal deformation layer and the lining are sequentially formed on the substrate. The bottom layer is patterned to form the structure of the cantilever probe, and the part of the cantilever probe is suspended in the vacant groove formed by the substrate layer, and finally a probe card is prepared and formed, and in the probe card, the cantilever probe is used. The cantilever structure formed by the needle on the vacant groove can be bent during thermal deformation, and by setting the thermal expansion coefficient of the first thermal deformation layer in the cantilever probe to be greater than the thermal expansion coefficient of the second thermal deformation layer, the cantilever probe is thermally deformed. Realize the bending to the side away from the substrate, so as to finally realize the automatic contact between the cantilever probe and the chip to be tested. The automation of quasi-contact, and can ensure the effective contact between the cantilever probe and the chip to be tested, ensure the test efficiency of the chip, help to realize the batch test of microchips, especially Micro-LED, and improve the generation efficiency of microchips.

It should be noted that, in the preparation method provided above, the sequence of some steps is not limited, and those skilled in the art can adjust it according to the actual situation. Exemplarily, step S160 can also be set before step S150, that is, corresponding to the corresponding positions on the probe structures that need to be formed for the first thermal deformation layer and the second thermal deformation layer, first set up to form conductive contacts, and then pattern the first thermal deformation layer. A thermally deformable layer and a second thermally deformable layer form a cantilever probe. In addition, in step S160, for the case where the first thermal deformation layer is a conductive layer, it is necessary to pattern the first thermal deformation layer and the second thermal deformation layer in S150 to form at least one probe structure. One end of the structure forms a conductive contact slot that runs through at least the second thermal deformation layer; and step S160, forming a conductive contact on the probe structure, should be to form a conductive contact in the conductive contact slot, and the conductive contact is connected to the first The thermally deformable layer is electrically connected.

In addition, in step S170, when the substrate layer is patterned to form the patterned substrate layer, the patterned substrate layer may be formed by photolithography, and in the photolithography, the substrate layer needs to be patterned by wet etching or dry etching to form a patterned substrate layer. For the vacant groove, during wet etching or dry etching, the etching solution or etching gas may also have an etching effect on the cantilever probe, so the formed cantilever probe needs to be protected. An embodiment of the present invention further provides a method for preparing a probe card. FIG. 7 is a flowchart of another method for preparing a probe card provided by an embodiment of the present invention. Referring to FIG. 7 , the method for preparing a probe card includes: :

S210. Provide a substrate.

S220, forming a substrate layer on one side of the substrate.

S230 , forming a first thermal deformation layer on the side of the substrate layer away from the substrate.

S240, forming a second thermal deformation layer on the side of the first thermal deformation layer away from the substrate layer, wherein the thermal expansion coefficient of the first thermal deformation layer is greater than the thermal expansion coefficient of the second thermal deformation layer, and the first thermal deformation layer and/or the first thermal deformation layer The two thermal deformation layers are conductive layers.

S250 , patterning the first thermal deformation layer and the second thermal deformation layer to form at least one probe structure.

S260 , forming a conductive contact on the probe structure, and the conductive contact is electrically connected with the first thermal deformation layer and the conductive layer to form a cantilever probe.

S270, forming a protective layer on the surface of the cantilever probe.

The protective layer on the surface of the cantilever probe needs to be made of a material that is not easily corroded by an etching solution or an etching gas, for example, a photoresist can be used as the protective layer. In addition, the upper surface and side surface of the cantilever probe need to be protected, and when the substrate layer is etched, in order to prevent the etching solution and the etching gas from being further removed from the lower part of the cantilever probe after etching the substrate layer to form an empty groove. For surface etching cantilever probes, it is necessary to strictly control the concentration of etching solution, etching gas, and etching time, and those skilled in the art can make reasonable designs according to specific experimental data.

S280 , patterning the substrate layer to form a patterned substrate layer, where the patterned substrate layer includes at least one vacant groove, and the cantilever probe extends to the vacant groove and is suspended in the vacant groove.

S290, removing the protective layer on the surface of the cantilever probe.

For an organic protective layer such as photoresist, an organic solution can usually be used for cleaning and removal, which is not limited here.

An embodiment of the present invention also provides a chip testing method. FIG. 8 is a flowchart of a chip testing method provided by an embodiment of the present invention. Referring to FIG. 8 , the chip testing method adopts any probe provided in the above embodiment. card, including:

S310 , move the probe card to the position where the cantilever probe in the probe card is facing the electrode of the chip to be tested.

FIG. 9 is a schematic diagram of a chip testing structure provided by an embodiment of the present invention. Referring to FIG. 9 , in the selected probe card, the number and distribution of cantilever probes 30 should correspond to the electrodes of the chip to be tested. The probe card needs to be initially moved, that is, the cantilever probes 30 in the probe card face the electrodes 40 of a chip to be tested by mechanical movement. At this time, the distance between each cantilever probe 30 and an electrode 40 is within the controllable range.

S320 , heating the cantilever probe until the cantilever probe is thermally deformed and the conductive contacts on the cantilever probe electrically contact the electrodes of the chip to be tested.

FIG. 10 is a schematic diagram of another chip testing structure provided by an embodiment of the present invention. Referring to FIG. 10 , the cantilever probe 30 is thermally deformed by heating the cantilever probe 30 . Usually, the ambient temperature of the probe card can be checked. Adjustment, the cantilever probe 30 is gradually bent at the ambient temperature, and by reasonably setting the end point temperature value, the bending degree of the cantilever probe 30 can be ensured, so that the bent cantilever probe 30 is in contact with an electrode 40, and the cantilever can be ensured The contact between the probe 30 and the electrode 40 is a relatively close electrical contact. Specifically, the relationship between the bending degree and the temperature of the cantilever probe 30 can be tested and recorded in advance through experiments, so that the heating temperature can be reasonably set according to the distance between the cantilever probe 30 and the electrode 40 reserved in step S310.

After the conductive contacts of the cantilever probe are brought into contact with the electrodes of the chip to be tested by heating in step 320, the electrical properties of at least one chip to be tested can be measured by the cantilever probe. Exemplarily, the test instrument connected to the probe card can send a test signal to each cantilever probe, and then the cantilever probe receives a feedback signal to determine whether the chip to be tested is normal. The structure design and test method of the test chip will not be repeated here.

In the chip testing method provided by the embodiment of the present invention, by using the probe card provided by the embodiment of the present invention to test the chip, the cantilever structure formed on the vacant groove by the cantilever probe can be bent during thermal deformation, and can be bent by setting The thermal expansion coefficient of the first thermal deformation layer in the cantilever probe is greater than the thermal expansion coefficient of the second thermal deformation layer, so that the cantilever probe can be bent to the side away from the substrate through thermal deformation, and during the test, the probe card is first moved by moving the probe card. To the position of the cantilever probe in the probe card for the electrode of the chip to be tested, and then by heating the cantilever probe until the cantilever probe is thermally deformed and the conductive contact on the cantilever probe electrically contacts the electrode of the chip to be tested, the cantilever probe can be realized. The automatic contact between the needle and the chip to be tested solves the problems that the existing probe card has insufficient mechanical docking accuracy and is prone to poor contact, realizes the automation of probe alignment and contact, and can ensure that the cantilever probe is connected to the test chip. The effective contact of the chip ensures the test efficiency of the chip, helps to realize the batch test of microchips, especially Micro-LED, and improves the production efficiency of microchips.

In addition, in the present invention, unless otherwise expressly specified and limited, the terms "connected", "connected", "stacked" and other terms should be understood in a broad sense, for example, it may be a fixed connection or a detachable connection, or It can be directly connected or indirectly connected through an intermediate medium, and it can be the internal communication between two elements or the interaction relationship between the two elements. For those of ordinary skill in the art, the specific meanings of the above terms in the present invention can be understood according to specific situations.

Note that the above are only preferred embodiments of the present invention and applied technical principles. Those skilled in the art will understand that the present invention is not limited to the specific embodiments described herein, and various obvious changes, readjustments, combinations and substitutions can be made by those skilled in the art without departing from the protection scope of the present invention. Therefore, although the present invention has been described in detail through the above embodiments, the present invention is not limited to the above embodiments, and can also include more other equivalent embodiments without departing from the concept of the present invention. The scope is determined by the scope of the appended claims.

Claims (10)

1. a kind of probe card characterized by comprising

Substrate,

Patterned substrate layer, positioned at the side of the substrate, the patterned substrate layer includes at least one vacant slot；

At least one cantilever probe, the side of the substrate is deviated from positioned at the patterned substrate layer, and the cantilever probe extends It is to the vacant slot and hanging on the vacant slot；

The cantilever probe includes the first thermal deformation layer, the second thermal deformation layer and conductive contact, and the first thermal deformation layer is located at Between the patterned substrate layer and the second thermal deformation layer, the thermal expansion coefficient of the first thermal deformation layer is greater than described the The thermal expansion coefficient of two thermal deformation layers, the conductive contact are set to the cantilever probe vacantly in one end of the vacant slot, The first thermal deformation layer and/or the second thermal deformation layer are conductive layer, and the conductive layer is electrically connected with the conductive contact.

2. probe card according to claim 1, which is characterized in that at least one described cantilever probe and at least one described in Vacant slot is arranged in a one-to-one correspondence.

3. probe card according to claim 1, which is characterized in that the first thermal deformation layer is conductive layer, the cantilever Probe further includes the conductive contact slot at least running through the second thermal deformation layer；The conductive contact is located at the conductive contact slot In, the conductive contact is electrically connected with the first thermal deformation layer.

4. probe card according to claim 1 to 3, which is characterized in that the first thermal deformation layer and second heat The difference range of the thermal expansion coefficient of deformation layer is 10 × 10^-6/℃-50×10^-6/℃。

5. probe card according to claim 4, which is characterized in that the thermal expansion coefficient of the first thermal deformation layer is greater than 15 ×10^-6/ DEG C, the thermal expansion coefficient of the second thermal deformation layer is less than 10 × 10^-6/℃。

6. probe card according to claim 1, which is characterized in that the length range of the cantilever probe in the direction of extension It is 50-2000 μm, is being 10-400 μm perpendicular to the length range on extending direction.

7. a kind of preparation method of probe card characterized by comprising

One substrate is provided；

Substrate layer is formed in the side of the substrate；

The first thermal deformation layer is formed away from the side of the substrate in the substrate layer；

The second thermal deformation layer is formed away from the side of the substrate layer in the first thermal deformation layer, wherein the first hot shape The thermal expansion coefficient of change layer is greater than the thermal expansion coefficient of the second thermal deformation layer, the first thermal deformation layer and/or described the Two thermal deformation layers are conductive layer；

The first thermal deformation layer and the second thermal deformation layer are patterned, at least one probe structure is formed；

Conductive contact, the conductive contact and the first thermal deformation layer and conductive layer electricity are formed on the probe structure Connection forms cantilever probe；

Patterning is carried out to the substrate layer and forms patterned substrate layer, the patterned substrate layer includes that at least one is vacant Slot, the cantilever probe extend to the vacant slot and hanging in the vacant slot.

8. the preparation method of probe card according to claim 7, which is characterized in that carry out figure to the substrate layer described Caseization is formed before patterned substrate layer, further includes:

Protective layer is formed on the cantilever probe surface；

It is described the substrate layer is carried out patterning form patterned substrate layer after, further includes:

Remove the protective layer on the cantilever probe surface.

9. a kind of chip detecting method, which is characterized in that using the probe card as described in claim 1-6 is any, comprising:

The probe card is moved to the position of the cantilever probe face chip electrode to be measured in the probe card；

The cantilever probe is heated until the conductive contact electricity that the cantilever probe occurs on thermal deformation and the cantilever probe connects Touch the electrode of the chip to be measured.

10. chip detecting method according to claim 9, which is characterized in that in the heating cantilever probe until The conductive contact that the cantilever probe occurs on thermal deformation and the cantilever probe is in electrical contact after the electrode of the chip to be measured, Further include:

By the cantilever probe, electricity performance measurement is carried out at least one described chip to be measured.