KR20000064001A - Probe and probe card - Google Patents

Abstract

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for manufacturing a probe, a probe card, and a brob, wherein a plurality of probes and probe pads are formed on a single crystal or polycrystalline silicon wafer through photolithography and etching. Contacts are defined at the bottom of the probe, and the contacts of these probes are electrically connected to the probe pads defined at the top of the probe substrate, and the probe pads are in electrical communication with the PCB of the probe card. At this time, the shape of the probe is so that both sides and one end is separated from the probe substrate and the other end is connected to the substrate so that the needle portion of the probe is elastically deformed and restored in the vertical direction during contact. Since the probe and the probe substrate are manufactured by a photo and etching process, the density of the probe may be increased, and the probe may be defined at a desired position. Using the probe and the probe card manufactured as described above has the advantage that it is possible to simultaneously test a plurality of semiconductor integrated circuit die. In addition, by using crystalline silicon as a probe material, the initial shape is maintained even after repeated use without deterioration of elasticity. The contacts of the probe needle are rounded semi-circular and surface-treated with non-oxidizing, highly conductive metals or alloys, which minimizes the deposition of foreign substances such as the integrated circuit pad material on the probe contacts when contacted with the integrated circuit pads. The poor contact between the probe and the pad is minimized. In addition, product productivity is improved by eliminating the use of auxiliary components and processes such as glass substrates, auxiliary circuit boards, buffer pads with fine conductors, wire bonding, and the like.

Description

Probe and probe card

The present invention relates to a probe for testing a semiconductor integrated circuit device formed on a semiconductor wafer, a method of manufacturing the probe, and a probe card to which a plurality of probes are attached.

In general, semiconductor integrated circuit devices are tested to see if their overall or partial electrical characteristics are manufactured to match the design during, during, or after manufacturing.

The equipment used for such a test is a probe device equipped with a test device and a probe card, and the probe card is provided between the various electrical signal generators in the test device and pads in the semiconductor integrated circuit device or between the electric signals in the test device. It serves to electrically communicate between the detection unit and the pad in the semiconductor integrated circuit device.

Hereinafter, a conventional probe and a probe card will be described with reference to the accompanying drawings, FIGS. 1A to 3.

1A shows a conventional so-called tungsten needle probe card, in which needles 11 made of tungsten are arranged in an array and electrically insulated from each other.

The tungsten needle jig 12 maintains the tungsten needle 11 at a high density, and the contact portion 13 of the needle protrudes from the tungsten needle jig 12. The other end 14 of the tungsten needle 11 passes through the tungsten needle support 15 at low density and protrudes from the tungsten needle support 15. A connection (not shown) is connected to the other end 14 and electrically connected to a test device (not shown) through the circuit board 16. As shown in FIG. 1B, the tungsten needle jig 12 contacts the contact portion 13 of the tungsten needle to the pad 18 of the semiconductor integrated circuit device formed on the wafer 17 so that a test device (not shown) can be used. Communicate with the integrated circuit device through the card.

The tungsten needle probe card of the prior art causes a problem that it is difficult to increase the density of the probe by reducing the pitch of the needle contact portion 13, and as the number of the needles 11 increases, the needle contact portion 13 ) Makes it difficult to align them to the same height. The manufacturing price also increases with the number of tungsten needles 11. In addition, the tungsten needle is manufactured by a method such as powder sintering, etc. Due to the characteristics of the manufacturing method, material defects such as voids are concentrated in the sharply processed contact portion, and in the defect portion, aluminum, which is a pad material of a semiconductor integrated circuit device, is repeatedly used. It precipitates and causes defects such as an increase in contact resistance. In addition, in order to stably contact the needle with the pad of the semiconductor integrated circuit, the elasticity of the needle is required, and the tungsten needle has a problem that the elasticity is lost due to the horizontality of the needle being repeatedly used. In addition, the semiconductor integrated circuit test is required not only at room temperature but also at high temperature. The probe and the probe card not only have different thermal expansion coefficients from the semiconductor integrated circuit wafer, but also do not coincide with the direction of expansion when the temperature rises. Slip phenomenon occurs between the circuit pads, which leads to an increase in contact resistance or communication instability. In addition, when used for testing high-speed semiconductor integrated circuits, the needles are long and adjacent to each other, causing electrical interactions between adjacent needles, which reduces the accuracy of the test.

Fig. 2 shows another prior art probe card called a thin film probe card. As shown in FIG. 2, the prior art thin film probe card includes a support plate 21, and the support film 22 is fixed to the support plate 21 by the elastomer layer 23. Conductive bumpers 24 are defined in alignment on the support membrane 22 and are selectively connected to the wiring 25. The conductive bumper 24 comes into contact with the pad 26 of the integrated circuit device, and a test device (not shown) communicates with the integrated circuit device through a conventional thin film card.

The above-described thin film probe card of the prior art causes a problem due to its short stroke. More specifically, it is possible to increase the density by aligning the conductive bumpers 24 at a precise pitch, but there is a problem that the height of the bumper is always shorter than the diameter of the bottom portion of the bumper. That is, the height decreases when the size of the conductive bumper is minimized for precisely aligning the pitch so that the dispersion of the height of the pad 26 of the semiconductor integrated circuit device cannot be sufficiently accommodated, and the conductive bumper 24 and the semiconductor There is a problem that causes poor contact between the integrated circuit pads 26.

Another conventional probe to probe card technology relates to a vertically operated probe assembly, such as US Patent No. 5,134,365, Korean Patent No. 10-0212169, and the like. The vertically operated probes can increase the density, but other problems of the tungsten probe, for example, a decrease in elasticity due to repeated use, a difficulty in maintaining the height of the needle contact uniformly, or a semiconductor in the contact portion The problem of depositing integrated circuit pad materials is still accompanied. In addition, all the probes must be inserted into the auxiliary plate one by one, which causes problems such as reduced productivity.

Another conventional probe to probe card technology is Korean Patent Laid-Open No. 2000-0017761, which is shown in FIG. Referring to FIG. 3, a plurality of fine probes 31 are defined in front of a glass substrate 32, and the glass substrate 32 is attached to the auxiliary circuit board 33. The auxiliary circuit board 33 is coupled to the main circuit board 35 through the buffer pad part 34. The terminal of the probe 31 is electrically connected to the auxiliary substrate 33 by a wire 36 through a hole formed in the glass substrate 32, and the auxiliary substrate 33 is a buffer including a plurality of fine wires. The pad 34 is in electrical communication with the main circuit board 35. In general, the pad arrangement of the integrated circuits is different according to the types of semiconductor integrated circuits. In the case of using the conventional probes and probe cards described above, only the main circuit boards of the compatible probe cards are used to test different types of semiconductor integrated circuits. There is a disadvantage in that both the probe 31 part, the glass substrate 32 part, and the auxiliary circuit board 33 must be remanufactured.

The present invention has been made to solve the above problems, the height of the probe is sufficiently high to accommodate the dispersion of the height of the semiconductor integrated circuit pad, the height of the needle contact is the same and the elasticity of the probe even after repeated use It is an object of the present invention to provide a defined probe card in which a change hardly occurs, and probes which are not accompanied by material defects such as voids in the contact portion of the probe are packed at a fine pitch.

In addition, the present invention is a glass substrate, an auxiliary circuit board and the auxiliary circuit board and the like to be manufactured by varying the size, shape, arrangement, etc. according to the size or shape of the semiconductor integrated circuit to be tested among the components constituting the probe card The purpose of the present invention is to provide a probe and a probe card that improve the compatibility of components and the productivity of finished products by eliminating the use of a buffer pad including a fine metal wire that serves to electrically conduct the main circuit board.

Another object of the present invention is to provide a probe and a probe card capable of simultaneously testing a plurality of semiconductor integrated circuit dies.

In addition, an object of the present invention is to provide a probe, a probe card that can be tested at room temperature as well as a change in contact resistance even at a high temperature.

In addition, an object of the present invention is to provide a probe and a probe card that can improve the reliability of the test results by minimizing the mutual interference between the probes to a high-speed operation semiconductor integrated circuit test.

1A is a plan view of a so-called tungsten needle probe card according to the prior art;

1B is a state diagram showing a state where a tungsten needle and a pad of a semiconductor integrated circuit are in contact when using a so-called tungsten needle probe card according to the prior art;

2 is a state diagram showing an operating state of a so-called thin film probe card according to the prior art.

Figure 3 is a cross-sectional view showing a fine probe and a probe card according to the prior art.

Figure 4a is a cross-sectional view showing a probe according to an embodiment of the present invention

Figure 4b is a plan view showing a probe according to an embodiment of the present invention

4C is a cross-sectional view taken along the line a-a 'of FIG. 4B.

Figure 4d is a state diagram showing the operating state of the probe according to an embodiment of the present invention.

Figure 5a is a cross-sectional view showing a probe according to another embodiment of the present invention

Figure 5b is a plan view showing a probe according to another embodiment of the present invention

5C is a cross-sectional view taken along the line b-b 'of FIG. 5B.

Figure 5d is a state diagram showing the operating state of the probe according to another embodiment of the present invention.

6A-6G are process diagrams in which a probe is prepared by the method of the present invention.

<Details of Drawing>

11: tungsten needle

12: Tungsten Needle Jig

13: contact portion of tungsten needle

14: other end of tungsten needle

15: Tungsten Needle Support

16: circuit board of the probe card

17 wafer defined semiconductor integrated circuit

18: pad of semiconductor integrated circuit device

19: stage of probe equipment

21: support plate

22: support membrane

23: elastomer layer

24: conductive bumper

25: Final connection

26: pad of semiconductor integrated circuit device

27: wafer in which semiconductor integrated circuit is defined

28: stage of probe equipment

31: fine probe

32: glass substrate

33: auxiliary circuit board

34: buffer pad

35: main circuit board

36: wire

41: probe

42: connection between the probe and the probe board

43: probe substrate

44: contact portion of the probe

45: insulation film

46: probe pad

47: conductive metal or alloy

48: semiconductor integrated circuit

49: pad of semiconductor integrated circuit

51: probe

52: connection between the probe and the probe board

53: probe substrate

54: contact portion of the probe

55: through groove

56: insulation film

57: probe pad

58: conductive metal or alloy

59: semiconductor integrated circuit

60: pad of semiconductor integrated circuit

61: Silicon Wafer

62: protective film for silicon etching

63: Probe outline model unit

64: residual silicon film

65 contact of probe

66: surface insulation film

67: probe pad

68: probe contact

69: conductive metal or alloy

70: probe card PCB

71: Probe Card PCB Pads

72: solder ball

In order to achieve the above technical problem, preferred embodiments of the probe, probe manufacturing method and probe card according to the present invention will be described as follows.

As a first embodiment, Figure 4a is a cross-sectional view showing a probe according to the present invention, Figure 4b is a plan view showing a probe of the present invention, Figure 4c is a cross-sectional view showing a cut section of the portion a-a 'of Figure 4b. As shown in these figures above, the probe 41 is formed by selectively etching a portion of a single crystal or polycrystalline silicon wafer, and the probes are formed of a peripheral probe substrate (except for one or more connections 42). It has a shape separate from 43 and the contact portion 44 is formed to protrude more than the other peripheral portions. Both of these probes and probe substrates are formed with an insulating film 45 on its surface. It also includes a portion of the bottom of the probe including protruding contacts and a probe pad 46 formed on the top of the probe and the top of the probe substrate to connect with an external printed circuit board (not shown). The plating is connected to the contact portion and the connection pad is electrically conductive.

FIG. 4D is a state diagram showing a state in which the prescribed pressure is applied to the probe to contact the pad 49 of the semiconductor integrated circuit device 48.

As a second embodiment, Figure 5a is a cross-sectional view showing a probe according to the present invention, Figure 5b is a plan view showing a probe of the present invention, Figure 5c is a cross-sectional view showing a cut section of the portion b-b 'of FIG. As shown in these figures above, the probe 51 is formed by selectively etching a portion of a single crystal or polycrystalline silicon wafer, and the probes are formed of a peripheral probe substrate (except for one or more connections 52). 53 and the contact portion 54 is formed to protrude more than the other peripheral portions, and the groove 55 is formed in the wafer substrate penetrating the upper bottom. The groove size is suitable for several micrometers to hundreds of micrometers, and dozens of micrometers are suitable for subsequent plating steps. All silicon surfaces, including those probes, probe substrates, and through grooves described above, are formed of an insulating film 56. In addition, a metal or a bottom portion of the probe including a protruding contact portion extending therefrom, a portion including a through groove, an inner side wall of the through groove, and a pad portion 57 formed to connect with an external PCB (not shown) on the top of the probe substrate. The alloy 58 is plated and formed so that the contact portion and the connection pad are electrically conductive.

FIG. 5D is a state diagram showing a state in which the pad portion 60 of the semiconductor integrated circuit device 59 is contacted by applying a pressure prescribed to the probe.

Single crystal or polycrystalline silicon is a high elastic material, hardly plastic deformation occurs, and it is already known that sufficient strength when the microstructure is a micro unit, for example, tensile strength is higher than that of stainless steel. The probe of the present invention is made of the above-described crystalline silicon, so that even after tens of thousands of repeated contact processes, there is no plastic deformation such as bending or warping, thereby maintaining a circular shape.

Hereinafter, one example of a probe manufacturing method according to the first embodiment of the present invention will be described with reference to FIGS. 6A to 6H, and the manufacturing method of the second embodiment of the present invention is also almost the same and will not be described separately.

The first step is to adjust the thickness of the probe and to secure the upper space. A thin film such as a silicon nitride film, a silicon oxide film, or a mixed film thereof is formed on the top surface of the single crystal or polycrystalline silicon wafer 61 as shown in FIG. 6A. After forming a protective film 62 for silicon etching, a photoresist pattern is formed thereon by a photo process, and then a suitable etching method, for example, wet etching using phosphoric acid or CCl ₂ F ₃ gas using phosphoric acid is used. In the case of an oxide film, a dry etching method using dry etching and wet etching such as hydrofluoric acid, or dry etching using appropriate gases such as CCl ₂ F ₃ , CF ₄ , C ₂ F ₆ , C ₃ F _8, etc. Form a pattern.

Next, as shown in FIG. 6B, the lower silicon is etched to a predetermined depth using these protective films, and then the protective film is peeled off. When etching single crystal wafers, KOH, EDP (ethylene diamine pyrocathechol), TMAH (tetramethyl ammonium hydroxide), etc., are about thousands of times slower than those of other crystals. Anisotropic wet etching using or anisotropic dry etching using appropriate gases such as Cl ₂ , CCl ₄ , BCl ₃ , CHCl ₃ , CHF ₃ , CF _4, and the like, and when using a polycrystalline silicon wafer Run with anisotropic etching. The depth to be etched is appropriately selected according to the thickness of the wafer, the thickness of the probe to be made, and the height of the bonding needle of the probe. Of these, the thickness of the probe is very important, and it is a variable that determines the elasticity and strength of the probe when applying pressure for bonding together with the width and length of the probe. Therefore, the thickness calculated according to the usage environment of the probe to be manufactured should be used. Since the above-described use environment may be very diverse, the specific thickness is not mentioned in the present invention.

The fifth step is to electrically conduct the pad portion 67 connected to the external printed circuit board (PCB) and the contact portion 68 of the probe, and as shown in FIG. 6F, the bottom surface of the probe including a junction portion. The metal or alloy 69 having a high conductivity and high oxidation resistance is selectively plated by a photo and thin film forming process, and the above-described metal in the shape of a pad having a size of tens to hundreds of micros also on the upper part of the probe and the upper part of the probe substrate connected thereto. The alloy is selectively plated by photo and thin film formation to electrically conduct contact between the contact portion 68 of the probe and the pad portion 67 of the probe to complete the formation of the silicon probe and the probe substrate.

The above-described process steps are just examples, and the order of the above-described process steps may be changed or modified. Such process steps may also be modified using a silicon wafer, and part of the wafer may form a probe. It is obvious that the present invention is not contrary to the idea of a probe and a probe substrate on which a probe pad is formed for connection with a printed circuit board (PCB).

The next step is to complete the final probe card by connecting the PCB 70 on the probe and the probe substrate manufactured by the above method, as shown in Figure 6g can be directly connected to the probe pads according to the present invention After positioning the metal pad 71 of the properly manufactured PCB, and then placing a low melting point conductive metal or alloy such as a solder ball 72 and applying a temperature above the melting point, the probe pad and the PCB are finally connected. The probe card is complete.

According to the present invention, since the fine probes are defined on the probe substrate through a photo and etching process, there is an effect of increasing the density of the probes.

In addition, all the probes produced by the method of the present invention has the effect that the height of the needle contact is kept uniform.

In addition, since the probes manufactured by the method of the present invention maintain sufficient needle height and high elasticity, there is an effect of achieving stable electrical conduction by accommodating the dispersion of the height of the semiconductor integrated circuit pad upon contact with the semiconductor integrated circuit pad.

In addition, the probes produced by the method of the present invention have the effect of maintaining a high elasticity even after repeated use does not deform the shape.

In addition, since the probe card manufactured by the method of the present invention excludes the use of auxiliary parts such as a glass substrate, an auxiliary circuit board, a buffer pad having a fine metal wire, and the like, there is an effect of improving component compatibility and finished product productivity.

In addition, the probe card manufactured by the method of the present invention has the effect of simultaneously testing a plurality of semiconductor integrated circuits.

In addition, since the materials of the probe and the probe substrates manufactured by the method of the present invention are the same as those of the semiconductor integrated circuit board, the thermal expansion coefficient of the probe substrate according to the temperature rise is the same as the thermal expansion coefficient of the semiconductor integrated circuit board. The shape of the semiconductor integrated circuit board is similar to that of the semiconductor integrated circuit board, and thus the direction of expansion or contraction of the probe substrate generated by the temperature change is the same as that of the semiconductor integrated circuit board. Sliding does not occur and can achieve stable communication.

In addition, the probe and the probe card manufactured by the method of the present invention can minimize the mutual electrical interference between adjacent probes, it is possible to obtain a reliable test results even in the test of the high-speed operation semiconductor integrated circuit.

Claims (7)

The probe and the probe substrate are integral, and most of the outer part of the probe is formed separately from the probe substrate, but a part of the outer part is connected to the substrate, and a contact part is defined to protrude from the lower part of the opposite end of the probe not connected to the substrate. A certain space is secured at the upper part of the probe so that a part of the probe including the contact part is elastically deformed vertically when the probe is pressed for testing, thereby establishing electrical conduction with the semiconductor integrated circuit, and the probe is restored to its original shape by the elasticity of the probe material when the pressure is released. And a contact portion of the probe, wherein the contact portion of the probe is designed to electrically conduct with the PCB of the probe card through a probe pad defined above the probe substrate. Process steps for manufacturing probes, Defining a probe having a predetermined thickness on the upper front surface of the silicon wafer by photolithography; Defining probe contacts at the bottom of the silicon wafer by photo and etching processes; Forming an insulating film such as an oxide film or a nitride film on all exposed silicon surfaces including the probe and the probe substrate; And Probe and a method for producing a probe, characterized in that the process step comprises the step of selectively plating a metal or alloy having a high conductivity, antioxidant properties on the top and bottom of the probe substrate. The method of claim 1, wherein the probe or probe substrate is made of single crystal silicon, polycrystalline silicon, or the like. In the execution method of claim 1 and 2, In order to electrically conduct between the probe pad formed on the probe substrate and the contact portion under the probe, a conductive metal or alloy is selectively plated on the lower part of the probe, the side of the probe, the upper part of the probe, and the side of the connection portion where the probe is connected to the substrate. How to feature. In the execution method of claim 1 and 2, In order to electrically conduct a connection between the probe pad formed on the probe substrate and the contact portion of the lower part of the probe, a hole penetrating the upper and lower parts is defined on the probe substrate, and the contact portion of the probe, the lower part of the probe, and the lower part of the probe substrate connected to the lower part of the probe are defined. Selectively plating a portion of the through hole, the sidewall of the through hole, the upper portion of the probe substrate, and the probe pad to a conductive metal or alloy. The probe card PCB is attached to the probe and the probe substrate of the claim 1, the probe card manufactured to be electrically connected between each probe pad and the PCB pad In the method of claim 6, A method of electrically conducting between a probe pad and a PCB using solder balls or similar low melting metals or alloys.