CN110038811B - Semiconductor element classification method - Google Patents
Semiconductor element classification method Download PDFInfo
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- CN110038811B CN110038811B CN201910063112.4A CN201910063112A CN110038811B CN 110038811 B CN110038811 B CN 110038811B CN 201910063112 A CN201910063112 A CN 201910063112A CN 110038811 B CN110038811 B CN 110038811B
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Abstract
The invention discloses a semiconductor element classification method, which comprises the following steps: defining a plurality of semiconductor elements on a bearing device as a plurality of classification areas; providing a selection operation to select one of the classification areas as a first sorting area; providing a sorting operation for taking out one or more semiconductor devices attached to the first sorting area on the carrying device; and providing a turning operation to take out one or more semiconductor elements attached to another classification region of the classification regions on the bearing device.
Description
The present application is a divisional application of the Chinese patent application (application number: 201510336366.0, application date: 2015, 06, 17, entitled semiconductor device classification method).
Technical Field
The present invention relates to a method for sorting semiconductor devices, and more particularly, to a method for sorting semiconductor light emitting devices.
Background
In the semiconductor back-end manufacturing process, after a wafer diced into a plurality of semiconductor devices is classified according to point measurement (bonding), the semiconductor devices are classified and selected according to different specifications through a sorting device (Sorter) or a turning device (die flipper), and then are sent to different customers or warehouses.
When the sorting equipment is used for sorting the semiconductor elements, although the semiconductor elements can be sorted and sorted according to different specifications (bin) of each semiconductor element, the equipment has high cost and high maintenance cost, can be sorted only by one semiconductor element at a time, has low sorting speed and has insufficient economic benefit; if the turnover device is used for sorting, since the turnover device cannot distinguish and identify the semiconductor elements with different specifications, only the semiconductor elements with similar specifications can be selected in a large range, and the scattered semiconductor elements cannot be sequentially selected according to different specifications to be sorted and selected individually.
Disclosure of Invention
To solve the above problems, the present invention discloses a semiconductor device sorting method, comprising: defining a plurality of semiconductor elements on a bearing device as a plurality of classification areas; providing a selection operation, selecting one of the classification areas as a sorting area; providing a sorting operation for taking out the semiconductor elements attached to the sorting area on the carrying device; and providing a turning operation to take out the semiconductor element attached to the other classification area on the bearing device.
A semiconductor device sorting method includes: providing a selection operation to select a first plurality of semiconductor devices on a carrier device as a sorting area; providing a sorting operation for taking out one or more semiconductor devices attached to the first sorting area on the carrying device; and providing a turning operation to take out a second plurality of semiconductor elements attached to the bearing device.
A semiconductor device sorting method includes: defining a plurality of semiconductor elements on a first bearing device as a plurality of classification areas, wherein the classification areas comprise a first classification area and a second classification area, the first classification area comprises a plurality of first semiconductor elements in the plurality of semiconductor elements, and the second classification area comprises a plurality of second semiconductor elements in the plurality of semiconductor elements; taking out one or more semiconductor elements from the plurality of second semiconductor elements on the first bearing device, wherein the one or more semiconductor elements in the plurality of second semiconductor elements are positioned around one of the first classification regions and adjacent to the first classification region; and transferring the plurality of first semiconductor elements on the first bearing device to a second bearing device at a time.
A semiconductor device sorting method includes: defining a plurality of semiconductor elements on a first bearing device as a plurality of classification areas; selecting a first sorting zone, a first flipping zone and a second flipping zone from the plurality of sorting zones, wherein the first sorting zone is located between the first flipping zone and the second flipping zone; taking out a plurality of semiconductor elements attached to the first sorting area on the first carrying device to form a plurality of spaces, wherein the first overturning area and the second overturning area are separated by the plurality of spaces from a top view; and providing a turnover operation to take out the plurality of semiconductor elements on the first turnover area and/or the second turnover area to a second bearing device at one time.
Drawings
FIG. 1A is a diagram illustrating a semiconductor device sorting method according to an embodiment of the present invention;
FIG. 1B is a schematic diagram of a sorting apparatus used in an embodiment of the present invention;
FIG. 1C is a schematic view of a flipping apparatus used in an embodiment of the present invention;
FIG. 2A is a diagram illustrating the distribution of the photoelectric characteristics of a plurality of semiconductor devices according to the present invention;
FIG. 2B is a schematic diagram illustrating the distribution of the photoelectric characteristics of a plurality of semiconductor devices according to the present invention;
FIG. 2C is a schematic diagram of a sorting process and an arrangement after selection according to an embodiment of the present invention;
fig. 2D is a schematic diagram of a classification process and an arrangement manner after selection according to an embodiment of the present invention.
Description of the symbols
10 wafer
10a semiconductor element
12 first adhesive layer
12' second adhesive layer
15 first bearing platform
16 second carrying platform
17 computer system
18 picking device
100 sorting apparatus
20 base
22 first carrier device
23 second carrying device
24 third bearing device
25 first bearing platform
26 second load-bearing platform
27 air bag
27a buffer pad
28 heater
29 pressurizer
Defect Bin failure area
200 pasting device
Bin 1 first classification region
Bin 2 second classification region
Bin 3 third classification region
Bin 4 fourth classification region
Bin 5 fifth classification region
Bin 6 sixth classification region
Line 1 first parting Line
Line 3 third separation Line
Detailed Description
Fig. 1A is a method for classifying a semiconductor device according to a first embodiment of the present invention. As shown in fig. 1A, a semiconductor device sorting method includes: defining a plurality of semiconductor elements on a bearing device to comprise a plurality of classification areas; selecting one of the classification areas as a sorting area and the other classification area as a turning area; selecting the semiconductor elements attached to the sorting area on the bearing device through a sorting operation; and selecting the semiconductor element attached to the overturning area on the bearing device through an overturning operation.
The semiconductor element is an electronic circuit component which utilizes the special electrical characteristics of semiconductor materials to complete specific functions and comprises a light emitting diode or a transistor, the semiconductor element of the embodiment is the light emitting diode and comprises a substrate, a first conductive semiconductor layer, a light emitting laminated layer and a second conductive semiconductor layer, the semiconductor laminated layer is formed on a wafer in an MOCVD or MBE epitaxial mode, after a platform (mesa) position is defined through photomask development, a semiconductor structure is formed in an etching platform mode, electrodes are formed in a film coating or wire bonding mode, and finally, a plurality of semiconductor elements are formed through cutting. The plurality of cut semiconductor elements are firstly subjected to specification classification, and the specification classification of the embodiment is that a plurality of classification areas are defined according to photoelectric characteristics by utilizing point measurement operation; then, one or more classification areas are selected as the sorting areas. In one embodiment, the semiconductor devices have less uniform optoelectronic properties in the epitaxial chip due to epitaxy or device fabrication processes, or the failed semiconductor devices are damaged, or fewer semiconductor devices in different specifications are selected as the sorting region. Then, at least one sorting operation is provided to select the semiconductor elements in the sorting area, and the range of the remaining semiconductor elements on the bearing device is the turning area. Finally, the semiconductor element attached to the overturning area on the bearing device is selected through at least one overturning operation. In one embodiment, the turning region may be a semiconductor device with more uniform and concentrated photoelectric characteristics, or a semiconductor device with more number. Sorting operation is matched with overturning operation so as to achieve optimal cost and efficiency consideration of classification. Defining the classification region of the semiconductor device includes defining the classification according to the different specifications required by customers or the different ranges of the optoelectronic characteristics of the predetermined specifications, wherein the optoelectronic characteristics include brightness, light-emitting wavelength, operating voltage, operating current, or device power.
Fig. 1B shows a sorting apparatus 100 used in the sorting operation in the first embodiment. As shown in fig. 1B, in the first embodiment, the sorting apparatus 100 includes a first carrying platform 15, a second carrying platform 16, a picking device 18 and a control system 17. The picking device 18 comprises a robot arm, the diced wafer 10 comprises a plurality of semiconductor devices 10a attached to an adhesive layer 12 and placed on the first carrying platform 15, the picking device 18 transfers the semiconductor devices 10a in the picking area from the first carrying platform 15 to the second carrying platform 16, and is attached to a second adhesive layer 12 'on the second carrying platform 16, wherein the first adhesive layer 12 and the second adhesive layer 12' can be blue films. The control system 17 is electrically connected to the first carrying platform 15, the second carrying platform 16 and the sorting device 18, and can control the sorting device 18 to transfer the semiconductor devices 10a in the sorting areas from the first carrying platform 15 to the second carrying platform 16 according to the specification classification of the semiconductor devices 10a, wherein the second carrying platform 16 may comprise a plurality of carrying platforms and a plurality of second adhesive layers, and when there are a plurality of sorting areas, the semiconductor devices 10a in different sorting areas can be transferred to different carrying platforms.
Fig. 1C shows an inverting apparatus 200 used for the inverting operation in the first embodiment. As shown in fig. 1C, the flipping apparatus 200 comprises a substrate 20; a heater 28 on the substrate; a first load-bearing platform 25 is positioned above the heater; and a pressurizer 29 located above the base 20, wherein the pressurizer 29 further comprises an airbag 27 and a cushion 27a located in the airbag. A first adhesive layer 12 is disposed on the first carrying platform 25 for the turnover operation, a plurality of semiconductor elements 10a remaining after the sorting operation, i.e. semiconductor elements 10a in the turnover area, are adhered and carried, a second adhesive layer 12 ' is disposed on the second carrying platform 26, the adhesive surface of the second adhesive layer 12 ' faces the first adhesive layer 12 and the plurality of semiconductor elements 10a in the turnover area, the second adhesive layer 12 ' is closely adhered to the semiconductor elements 10a by pressing the second adhesive layer 12 ' through an air bag 27 of a presser 29, and finally the second adhesive layer 12 ' is adhered and fixed to the plurality of semiconductor elements 10a by heating the second carrying platform with a heater 28, and then the adhesive force between the semiconductor elements 10a and the first adhesive layer 12 is reduced by reducing the adhesive force between the semiconductor elements 10a and the first adhesive layer 12 at the position of the sorting area to be taken out, the method comprises applying a degumming solvent (not shown) on the first adhesive layer 12 at the position of the sorting area to be taken out, for example, acetone, when the acetone penetrates into the bonding surface between the first adhesive layer 12 and the semiconductor elements 10a, the bonding force between the semiconductor elements 10a and the first adhesive layer 12 is weakened, the first adhesive layer 12 and the second adhesive layer 12 'are torn off by an automatic film tearing device (not shown) or by hand, the semiconductor elements 10a in the classification region coated with acetone are left on the second adhesive layer 12', the semiconductor elements 10a in the classification region not coated with acetone are still bonded on the first adhesive layer 12 after being torn off, the classification is completed for one time, and if there are a plurality of turnover regions, the operation is repeatedly carried out for a plurality of times until all the turnover regions are bonded to another adhesive layer, and then the whole turnover operation is completed. The method for reducing the adhesion between the semiconductor device and the adhesive layer may be a method of removing the adhesive layer by irradiating UV light, etc., in addition to the above-described method of applying a photoresist solvent. In the method of irradiating UV light, the adhesive layer may be optionally implemented with a UV blue film whose adhesiveness is reduced after the UV light irradiation. The advantage of the flipping operation is that semiconductor devices in a large area can be selected at one time, which is faster than the speed of the single sorting operation. For semiconductor devices with poor uniformity of photoelectric characteristics, such as blue LEDs, sorting can be accomplished by sorting operations in combination with flipping operations.
In the first embodiment, the specification classifying operation may be further performed with a semiconductor device optoelectronic characteristic image identifier for identifying the optoelectronic characteristic specification of each semiconductor device 10 a. In an embodiment, the optoelectronic characteristic image identifier may further include a function of defining a coordinate position, and after identifying a plurality of semiconductor devices with different or the same optoelectronic characteristic specifications, the coordinate positions of the semiconductor devices with different optoelectronic characteristic specifications are analyzed simultaneously to define the classification region. Fig. 2A shows a distribution diagram of the electro-optical characteristics of a plurality of semiconductor devices arranged in a wafer shape on a carrier. After the plurality of semiconductor elements arranged in a wafer shape are subjected to specification classification operation of photoelectric characteristics, the plurality of semiconductor elements are defined as a plurality of classification regions. The specification sorting operation includes sorting equipment using an optoelectronic property testing instrument or other led optoelectronic property image identifier to generate the optoelectronic property profile shown in fig. 2A. The photoelectric characteristic image identifier disclosed in the present embodiment represents different photoelectric characteristics except for different color regions, defines a plurality of classification regions, and displays the positions of a plurality of semiconductor devices according to the X-axis and Y-axis coordinates. In the present embodiment, the plurality of classification regions shown in fig. 2A, which are represented by different black-and-white contrasts, represent led regions with different powers and are defined as a plurality of classification regions of Defect Bin, Bin 1, Bin 2, Bin 3, and Bin 4. In this embodiment, the Defect Bin is a light emitting diode failure region, Bin 1 is 175-180 mW, Bin 2 is 181-185 mW, Bin 3 is 185-190 mW, and Bin 4 is 190-195 mW. In addition to being defined by different powers, the power can be defined by ranges such as wavelength, brightness, operating voltage, or current.
When the definition is completed, a selection operation is provided to select one or more classification areas, such as: bin 1, Bin 2, Bin 4 and Defect Bin are arbitrarily selected as sorting areas, and Bin 3 is selected as a turning area. The sorting area and the turning area can be selected by using the actual photoelectric characteristic distribution diagram as a reference for the selected position.
In one embodiment, after the defining is completed, a selecting operation is provided, wherein the sorting region with the most semiconductor devices is selected as the turning region, and the sorting region with the smaller number of semiconductor devices is selected as the sorting region, so as to achieve the cost and efficiency of the preferred sorting operation and turning operation. For the sake of clarity, fig. 2B is taken as the schematic diagram of fig. 2A. As shown in fig. 2B, a plurality of classification regions including Defect Bin, Bin 1, Bin 2, Bin 3, and Bin 4, where Bin 1 is the most classified region, and therefore is selected as the flipped region; bin 2, Bin 3, Bin 4 and Defect Bin are selected as sorting areas.
In one embodiment, after the definition is completed, a selection operation is provided, a plurality of sorting areas are selected so that a plurality of turning areas are not adjacent to each other, then a plurality of semiconductor devices in the sorting areas are selected by the sorting operation so that the plurality of turning areas are not adjacent to each other, and then turning operations are respectively performed on the respective turning areas, so as to solve the defect that the boundaries between the areas cannot be identified by the conventional turning operation. Referring to fig. 2B, non-adjacent Bin 1 and Bin 3 are selected as the flipping regions, and the rest of Bin 2, Bin 4 and Defect Bin are selected as the sorting regions. After Bin 2, Bin 4 and Defect Bin are sorted out, Bin 1 and Bin 3 can identify the boundary of Bin 1 and Bin 3 by visual inspection because of the blank left by the sorted areas, and Bin 1 and Bin 3 are selected and arranged on different carrying devices by turning over operation.
In another embodiment, the boundary of each classification region is defined by Line 1, Line 2, and Line 3 separation lines. Referring to fig. 2B, Bin 1 to Bin 4 are selected as turning areas, a plurality of semiconductor devices adjacent to the Line 1 to Line 3 dividing lines are selected as sorting areas, and after the sorting operation is completed, spaces are left between the turning areas, so that the turning areas are not adjacent to each other.
Fig. 2C is a schematic diagram of a sorting process and an arrangement manner after selection according to an embodiment of the invention. In the present embodiment, as shown in FIG. 2C, a plurality of semiconductor devices arranged in a wafer shape are carried on the first carrier 22, and the first step is defined as Bin 1-6 classification regions according to the method described in the previous embodiment. Then, the classification region Bin 1 of the most semiconductor devices is selected as the flip region, and the other classification regions Bin 2-6 are selected as the sorting regions, and the data selected as the sorting regions, such as luminance data of Bin 2-6, e.g., 176-180 mW, 181-185 mW, 186-190 mW, 191-195 mW, 196-200 mW, and 201-205 mW, are input to the sorting equipment. The second step places the plurality of semiconductor components on the first carrier 22 into a sorting apparatus, which performs a plurality of sorting operations in accordance with the previously entered sorting area data. In the third step, after a plurality of sorting operations, the semiconductor devices in the sorting regions Bin 2 to Bin 6 are respectively sorted onto the second carrying devices 23 by the sorting operations, and the remaining sorting regions Bin 1, i.e., the semiconductor devices in the turning regions, are left on the first carrying devices 22. And a fourth step of placing the semiconductor element in the turnover area Bin 1 into a turnover device for turnover operation. In the fifth step, after the flip operation, the semiconductor devices in the flip area Bin 1 are flipped and picked from the first carrier 22 onto the third carrier 24. The semiconductor devices in the flip area Bin 1 are arranged on the third carrier 24 in an irregular shape of the original flip area, the semiconductor devices in the sorting areas Bin 2 to Bin 6 are arranged on the second carrier 23 in a square shape during the sorting operation, and the semiconductor devices and the third carrier 24 are delivered to a warehouse for storage or delivery to customers. In another embodiment, after the turning region Bin 1 is turned, the arrangement shape on the third carrying device 24 may be irregular or scattered; after the sorting operation is performed on the sorting areas Bin 2-6, the arrangement shape on the second bearing device 23 can be square or circular.
Fig. 2D is a schematic diagram of a classification process and an arrangement manner after selection according to an embodiment of the invention. In the present embodiment, as shown in fig. 2D, a plurality of semiconductor devices arranged in a wafer shape are first carried on the first carrier 22, and defined as Bin 1 to 3 sorting regions according to the method described in the previous embodiment. Then, the sorting regions Bin 1, Bin 2, Bin 3 are selected as three turning regions, and the plurality of semiconductor elements adjacent to the Line 1, Line 2, and Line 3 dividing lines are selected as three sorting regions Bin 4, Bin 5, and Bin 6, and sorting region data is inputted into the sorting apparatus. The second step is to put the semiconductor components into a sorting apparatus for sorting operation. In the third step, after a plurality of sorting operations, the sorting regions Bin 4, Bin 5, and Bin 6 of the plurality of semiconductor devices adjacent to the Line 1, Line 2, and Line 3 separation lines are respectively selected by the sorting operations in batches to be arranged in a square on the plurality of second carriers 23, and the remaining plurality of turning regions Bin 1, Bin 2, and Bin 3 are left on the first carrier 22. In the fourth step, the rest of the plurality of turning areas Bin 1, Bin 2, and Bin 3 are placed in a turning apparatus to sequentially perform three turning operations, and the batch is attached to the plurality of third carrying devices 24. In the fifth step, after the turning operation, the semiconductor devices in the turning areas Bin 1, Bin 2, and Bin 3 are transferred to the carrier 24 according to the irregular patterns originally arranged on the carrier 22, and finally sent to a warehouse for storage or delivery to customers. In another embodiment, after the flipping operation, the arrangement shape of the plurality of flipped areas Bin 1, Bin 2, and Bin 3 semiconductor devices on the carrier may be irregular or scattered; the arrangement shape of the plurality of semiconductor element sorting areas Bin 4, Bin 5 and Bin 6 adjacent to the Line 1, Line 2 and Line 3 separation lines on the bearing device after the sorting operation can be square or circular.
The examples are given solely for the purpose of illustration and are not intended to limit the scope of the invention. Any obvious modifications or variations can be made to the present invention without departing from the spirit or scope of the present invention.
Claims (12)
1. A semiconductor device sorting method includes:
defining the semiconductor elements on a first bearing device into a plurality of classification areas according to the photoelectric characteristics of the semiconductor elements, wherein the classification areas comprise a first classification area and a second classification area, the first classification area comprises a plurality of first semiconductor elements in the semiconductor elements, the second classification area comprises a plurality of second semiconductor elements in the semiconductor elements, and the boundary of the second classification area and the first classification area forms a separation line;
sorting the plurality of semiconductor elements adjacent to the separation line one by one from the plurality of second semiconductor elements on the first bearing device; and
transferring the plurality of first semiconductor devices on the first carrier device to a second carrier device in batch.
2. The method of claim 1, wherein the defining comprises classifying according to optoelectronic characteristics of the first and second semiconductor devices.
3. The method as claimed in claim 2, further comprising providing an optoelectronic property image identifier for identifying the optoelectronic properties of the first and second semiconductor devices.
4. The method of claim 2, wherein the optoelectronic property comprises luminance, wavelength of light emission, operating voltage, current, or power.
5. The method as claimed in claim 2, wherein the optoelectronic properties of the first semiconductor devices are more uniform and concentrated.
6. The method as claimed in claim 1, wherein the step of transferring the remaining semiconductor devices of the plurality of second semiconductor devices on the first carrier device after the step of sorting the plurality of semiconductor devices adjacent to the dividing line one by one from the plurality of second semiconductor devices on the first carrier device.
7. The method as claimed in claim 1, wherein the first sorting region has a greater number of first semiconductor devices than the second sorting region, further comprising sorting the second semiconductor devices one by one.
8. The method of claim 1, comprising transferring the one or more semiconductor devices removed from the second plurality of semiconductor devices on the first carrier to a third carrier using sorting equipment.
9. The method of claim 1, wherein the transferring the plurality of first semiconductor devices of the first classification region comprises heating, pressing, or irradiating.
10. The method of claim 8, wherein the semiconductor devices transferred from the second semiconductor devices are arranged on the third carrier in a square or circular shape.
11. The method of claim 1, wherein an arrangement of the plurality of first semiconductor devices transferred from the plurality of first semiconductor devices on the second carrier comprises an irregular shape or a scattered shape.
12. A semiconductor device sorting method includes:
defining a plurality of semiconductor elements on a first bearing device as a plurality of classification areas according to the photoelectric characteristics of the plurality of semiconductor elements;
selecting a first sorting area, a first overturning area and a second overturning area from the sorting areas, wherein the boundary of the first overturning area and the second overturning area forms a separation line, and the semiconductor elements in the first sorting area are adjacent to the separation line;
sorting out a plurality of semiconductor elements attached to the first sorting area on the first bearing device one by one to form a plurality of blanks, wherein the first overturning area and the second overturning area are separated by the plurality of blanks; and
providing a turnover operation, and taking out the plurality of semiconductor elements on the first turnover area and/or the second turnover area to a second carrying device in batches.
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| CN201910063112.4A CN110038811B (en) | 2015-06-17 | 2015-06-17 | Semiconductor element classification method |
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| CN201510336366.0A CN106311625B (en) | 2015-06-17 | 2015-06-17 | Classification method of semiconductor components |
| CN201910063112.4A CN110038811B (en) | 2015-06-17 | 2015-06-17 | Semiconductor element classification method |
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| CN107321639A (en) * | 2017-05-27 | 2017-11-07 | 华灿光电（浙江）有限公司 | Screening method of light emitting diode chips |
| CN107639043B (en) * | 2017-09-26 | 2020-06-09 | 武汉华星光电技术有限公司 | Panel classification moves and carries device |
| JP2019066399A (en) * | 2017-10-04 | 2019-04-25 | 三菱電機株式会社 | Semiconductor device classification system and semiconductor device |
| CN109279312B (en) * | 2018-11-27 | 2024-02-20 | 深圳市宇道机电技术有限公司 | Automatic film tearing equipment |
| CN114669496B (en) * | 2022-04-24 | 2024-08-13 | 江西兆驰半导体有限公司 | LED chip sorting method |
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| CN106311625B (en) | 2019-02-19 |
| CN110038811A (en) | 2019-07-23 |
| CN106311625A (en) | 2017-01-11 |
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