CN109343639B - Low-temperature floating band gap reference voltage circuit, method and chip thereof - Google Patents

Abstract

The invention provides a low-temperature drift bandgap reference voltage circuit, method and chip; the circuit includes a self-biasing module, a bandgap reference core module, and a voltage generating module; the method includes the following steps: generating a primary reference voltage; Base current correction and primary reference voltage generate reference voltage before compensation; generate low temperature drift bandgap reference voltage. The low temperature drift bandgap reference voltage circuit and method are applied in a power management chip. The advantages of the invention are that the bandgap reference voltage source circuit with ultra-high precision and ultra-low temperature drift coefficient is realized, and a highly stable reference voltage can be provided for circuit applications with high reference voltage requirements.

Description

A low temperature drift bandgap reference voltage circuit, method and chip

technical field

The invention designs the field of electronic circuits, in particular to a low-temperature drift bandgap reference voltage circuit, a method and a chip thereof.

Background technique

At present, the reference voltage source has become an indispensable basic module in semiconductor integrated circuits, and it is widely used in amplifiers, analog-to-digital converters, digital-to-analog converters, radio frequency, sensors and power management chips. Traditional reference voltage sources include voltage references based on the reverse breakdown characteristics of Zener diodes, voltage references based on the forward conduction characteristics of PN junctions, and bandgap references. Therefore, it has been widely used.

With the development of semiconductor technology and portable electronic products, the demand for reference voltage sources with low power consumption and high supply voltage range has greatly increased, which has also led to a great increase in the design requirements of bandgap references. A bandgap reference can generate a reference voltage or a reference voltage that is power- and process-independent and has deterministic temperature characteristics. The stability of the bandgap reference has a direct and crucial impact on the generation of the internal power supply of the entire system and the adjustment of the output voltage. The bandgap reference voltage must be able to overcome manufacturing process variations, variations in the system's internal power supply voltage within the operating range, and the effects of outside temperature. With the improvement of system accuracy, the requirements for the stability of the temperature, voltage and process of the reference are also higher and higher.

In the design of power management chips and analog/digital converters (ADC), digital/analog converters (DAC), dynamic memory (DRAM), Flash memory and other chips, low temperature coefficient, low power consumption, high power supply rejection ratio (PSRR) ) of the bandgap reference design is critical.

Brokaw bandgap circuit is a new bandgap reference circuit proposed by Brokaw in 1974. As shown in the schematic diagram of the Brokaw bandgap unit in Figure 1, assuming that the circuit is in a balanced state, due to the voltage clamping effect of the operational amplifier OPs1, the voltage drops on the two resistors Rs1 and Rs2 are equal, so the currents flowing through the two branches are equal, Then the base-emitter voltage difference of the two transistors Qs1 and Qs2 is:

Among them, the emitter area ratio of the transistors Qs1 and Qs2 is N. The current flowing through Rs2 is:

Then the current flowing through the resistor Rs1 is the sum of the currents of the emitters of the two transistors Qs1 and Qs2, and the expression of the output reference voltage Vsref is:

By selecting an appropriate ratio of N, resistors Rs1 and Rs2, an output reference voltage Vsref with a smaller temperature coefficient can be obtained.

However, in the above-mentioned bandgap reference circuit of the prior art, the following problems exist:

1) As the temperature changes, the bias current supplied to the bandgap voltage generation circuit usually changes, resulting in an inaccurate reference voltage for the final output.

2) The circuit design itself will lead to poor compensation accuracy due to mismatch;

3) The high-order temperature compensation accuracy of the actual bandgap reference is poor due to the excessively rough theoretical approximation results of some circuits.

SUMMARY OF THE INVENTION

In order to solve the above problems: the present invention provides a low temperature drift bandgap reference voltage circuit, method and application thereof. By using the exponential characteristic of base current to temperature, in the core circuit of the bandgap reference, the current is corrected by the resistance, so as to correct the output voltage. At the same time, a curvature compensation module that can generate a curvature-up parabolic trend current is added to compensate the high-order temperature nonlinearity in the reference voltage.

According to the first aspect of the present invention, the present invention proposes a low temperature drift bandgap reference voltage circuit:

The concrete technical solutions of the present invention are as follows:

A low-temperature drift bandgap reference voltage circuit, comprising a self-biasing module, a bandgap reference core module and a voltage generating module;

The self-biasing module provides bias voltage and bias current; the self-biasing module acts as a self-starting circuit during the power-on process;

The bandgap reference core module is composed of a Brokaw bandgap unit to generate a primary reference voltage, and the bandgap reference module includes a base current correction resistor; the base current correction is performed by adding a base current to the base of the triode pair in the Brokaw bandgap unit resistance, and the reference voltage before compensation is generated after correction operation.

The voltage generation module generates the final reference voltage.

Preferably, the low temperature drift bandgap reference voltage circuit further includes a curvature compensation module;

The curvature compensation module performs nonlinear curvature compensation on the reference voltage before compensation; the nonlinear curvature compensation generates a nonlinear curvature compensation current for the curvature compensation module, and the nonlinear curvature compensation current is compensated by generating a voltage through a resistor;

Further preferably, the self-biasing module includes field effect transistors M5 and M6; transistors Q3 and Q4, resistors R6 and R7; field effect transistors M5 and M6 are PMOS transistors; transistor Q3 is a PNP transistor, and transistor Q4 is an NPN transistor;

The source stages of the field effect transistors M6 and M5 are connected to the power supply VDD, the gate of the field effect transistor M5 is connected to the gate of M6 and the drain of M5; the field effect transistors M6 and M5 form a current mirror; the drain of the field effect transistor M6 and One end of the resistor R7 is connected to point C and is connected to the bandgap reference core module as the first output end of the self-biasing module; the other end of the resistor R7, point B, is connected to the base of the transistor Q4 and the emitter of the transistor Q3; the emitter of the transistor Q4 The pole E is connected to one end of the resistor R6; the other end of the resistor R6 is grounded; the collector of the transistor Q3 is grounded, and the base of the transistor Q3 is used as the second output terminal of the self-biasing module to connect to the bandgap reference core module.

Further preferably, the bandgap reference core module includes transistors Q1, Q2 and Q5; resistors R01, R02, R1, R2 and R3; amplifier OP1; R3 is a base current correction resistor; transistors Q1, Q2 and Q5 are NPN transistors;

The collector of the transistor Q5 is connected to the power supply VDD, the base of the transistor Q5 is connected to the first output terminal of the self-biasing module, and the emitter D of the transistor Q5 is connected to one end of the resistors R01 and R02; the transistors Q1 and Q2 form a transistor pair, and the transistor Q1 The collectors of and Q2 are respectively connected to the other ends of the resistors R01 and R02, the collectors of the transistors Q1 and Q2 are respectively connected to the inverting input terminal and the non-inverting input terminal of the amplifier OP1, and the bases of the transistors Q1 and Q2 are connected together through R3. The base point A of Q1 is connected to the second output terminal of the self-biasing module and is connected to the voltage generating module as the first output terminal Vbgr of the bandgap reference core module; the output terminal of the amplifier OP1 is used as the second output terminal of the bandgap reference core module The voltage generation module is connected; the emitter of the transistor Q1 is connected to one end of the resistor R2; the emitter of the transistor Q2 is connected to one end of the resistor R2 through the resistor R1; the other end of the resistor R2 is grounded.

Further preferably, the voltage generation module includes a field effect transistor M10, resistors R4 and R5; the field effect transistor M10 is a PMOS tube;

The source of the field effect transistor M10 is connected to the power supply VDD, the gate of the field effect transistor M10 is connected to the second output terminal of the bandgap reference core module, and the drain of the field effect transistor M10 is connected to one end of the resistor R4 to output as the final reference voltage Vref; the other end of the resistor R4 and one end of the resistor R5 are connected to the first output end of the bandgap reference core module; the other end of the resistor R5 is grounded.

More preferably, the M5 and the M6 have the same size.

Further preferably, the curvature compensation module includes field effect transistors M1, M2, M3, M4, M7, M8 and M9; resistors R8, R9 and R10; amplifier OP2; field effect transistors M1-M4, M7 and M8 are PMOS transistors. M9 is an NMOS tube; the curvature compensation module also includes a resistor Rco;

One end of the resistor Rco is connected to the bandgap reference core module, and the other end is grounded; specifically: the resistor Rco is connected in series between the resistor R2 and the ground in the bandgap reference core module; that is, one end of the resistor Rco is connected to the bandgap Resistor R2 in the reference core module, the other end is grounded; the non-inverting terminal of the amplifier OP2 is connected to the Vbgr node, the inverting terminal is connected to the node M, and the output terminal is connected to the gate of the field effect transistor M9; the source stage of the field effect transistor M9 is connected to the power supply VDD , the drain and one end of the resistor R10 are connected to the node M; the resistors R8-R10 are connected in series: the other end of the resistor R10 and one end of the resistor R9 are connected to the node H, the other end of the resistor R9 and one end of the resistor R8 are connected to the node L, the resistor The other end of R8 is grounded;

The source of the field effect transistor M1, the source of M2, and the drain of M7 are connected; the source of the field effect transistor M3, the source of M4, and the drain of M8 are connected; the sources of M7 and M8 are connected to the power supply VDD; M7 and The gate of M8 is connected to node Vpbias; the node Vpbias is the gate of M5 of the self-biasing module; the gates of M1 and M3 are connected to node VPTAT; the gates of M2 and M4 are connected to nodes L and H respectively; M2 and M3 The drain of M1 and M4 is connected to one end of the resistor Rco.

More preferably, the M7 and M8 have the same size.

More preferably, the bandgap reference core module includes trimming circuits Rt1 and Rt2, and the contact point ports are respectively connected to the input terminals Vinp and Vinn of the amplifier OP1.

In order to adjust the size of the output voltage to meet the requirements of different applications:

More preferably, the resistor R5 in the voltage generating module includes a trimming circuit Rt3, and the resistor R5 is a series-connected potentiometer Rt3 and R50.

Further preferably, the trimming circuit includes n-bit trimming modules T0 to Tn connected in series; in each trimming module, it includes a logic control unit L, a switching device K and a trimming resistor RT; for n-bit trimming modules, the logic control unit L, The switching device K and the trimming resistor RT are K0 to Kn, L0 to Ln, RT0 to RTn in total; the trimming circuit also includes the number of bits m of the control signal, which is connected to the logic control unit L; n and m are positive integers greater than 1 ;

The output of the logic control unit L controls the conduction state of the switching device K. When the switching device K of the corresponding node is turned on, the node is connected to the output end; when the switching device K is turned off, the corresponding node is disconnected from the output end.

According to the second aspect of the present invention, the present invention provides a method for generating a low temperature drift bandgap reference voltage, comprising the following steps:

Step 1: Generate the primary reference voltage;

Step 2: Generate the reference voltage before compensation by base current correction and primary reference voltage;

Step 3: Generate a low temperature drift bandgap reference voltage.

In order to make the temperature characteristics of the reference voltage better:

Preferably, after step 2, step 21 may be further included: performing nonlinear compensation on the reference voltage before compensation; the nonlinear curvature compensation generates a nonlinear curvature compensation current for the curvature compensation module, and the nonlinear curvature compensation current generates a voltage through a resistor to compensate.

The specific step 21 is dynamic adjustment and compensation; the dynamic adjustment and compensation is to monitor the change of the positive temperature coefficient voltage VPTAT, continuously adjust the size of the compensation current, and compensate for the high-order term in the bandgap reference BE junction voltage VBE. This can effectively reduce the temperature coefficient of the reference voltage.

Further preferably, the method further includes a trimming step, and the trimming step refers to trimming the resistance.

More preferably, the resistance trimming is to perform resistance trimming on the input end of the amplifier in generating the primary reference voltage;

More preferably, the resistance trimming is to perform resistance trimming on the proportional resistor that generates the low temperature drift bandgap reference voltage.

More preferably, the resistance trimming is realized by connecting different resistances in series.

More preferably, when the resistance trimming is performed on the input end of the amplifier in generating the primary reference voltage, the resistances of the two inputs of the amplifier are adjusted in opposite directions.

More preferably, the step size n of the resistance trimming and the number of bits m of the control signal; the relationship between m and n is 2 ^m =n; m and n are positive integers greater than 1.

According to the third aspect of the present invention, the present invention provides a chip using a low-temperature drift bandgap reference voltage circuit and method:

Preferably, the low temperature drift bandgap reference voltage circuit and method are applied in a power management chip.

Preferably, the low temperature drift bandgap reference voltage circuit and method are applied to chips such as analog/digital converters, digital/analog converters, dynamic memory or flash memory.

The present invention has the following advantages:

The invention realizes a bandgap reference voltage source circuit with ultra-high precision and ultra-low temperature drift coefficient, and can provide a highly stable reference voltage for circuit applications with high reference voltage requirements.

The simulation results show that in the wide temperature range of -55℃～150℃, the temperature drift coefficient of the reference voltage output by the circuit is only 0.7ppm, and the voltage change is only 0.4mV. The circuit structure is easy to implement, and the process requirements are low, and it is suitable for various engineering applications.

Description of drawings

In order to illustrate the specific embodiments of the present invention or the technical solutions in the prior art more clearly, the following briefly introduces the accompanying drawings that need to be used in the description of the specific embodiments or the prior art. Obviously, the accompanying drawings in the following description The drawings are some embodiments of the present invention. For those of ordinary skill in the art, other drawings can also be obtained based on these drawings without creative efforts.

Figure 1 Schematic diagram of the Brokaw bandgap unit.

FIG. 2 is a schematic diagram of the low temperature drift bandgap reference voltage circuit of the present invention.

Figure 3 is a block diagram of the low temperature drift bandgap reference voltage circuit of the present invention.

Fig. 4 Embodiment 1 of the low temperature drift bandgap reference voltage circuit of the present invention.

FIG. 5 is the second embodiment of the low temperature drift bandgap reference voltage circuit of the present invention.

Fig. 6 Simulation result 1 of the low temperature drift bandgap reference voltage circuit of the present invention.

Fig. 7 Simulation result 2 of the low temperature drift bandgap reference voltage circuit of the present invention.

FIG. 8 is the third embodiment of the low temperature drift bandgap reference voltage circuit of the present invention.

Fig. 9 Embodiment 1 of the temperature compensation coefficient trimming structure in the low temperature drift bandgap reference voltage circuit of the present invention.

FIG. 10 is the second embodiment of the structure for adjusting the temperature compensation coefficient in the low temperature drift bandgap reference voltage circuit of the present invention.

FIG. 11 is an overall diagram of the low temperature drift bandgap reference voltage circuit of the present invention.

Detailed ways

In order to make the purposes, technical solutions and advantages of the embodiments of the present invention clearer, the technical solutions in the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings in the embodiments of the present invention. Obviously, the described embodiments These are some embodiments of the present invention, but not all embodiments. The components of the embodiments of the invention generally described and illustrated in the drawings herein may be arranged and designed in a variety of different configurations. Thus, the following detailed description of the embodiments of the invention provided in the accompanying drawings are not intended to limit the scope of the invention as claimed, but are merely representative of selected embodiments of the invention. Based on the embodiments of the present invention, all other embodiments obtained by those of ordinary skill in the art without creative efforts shall fall within the protection scope of the present invention.

The basic idea of a bandgap reference is to remove the temperature-dependent term in the base-emitter voltage VBE of a bipolar transistor, resulting in a bandgap voltage. VBE is

where VG0 is the derived bandgap voltage of silicon at 0K Kelvin, T is the absolute temperature in Kelvin, Tr is the reference temperature, VBE0 is the base-emitter voltage at the reference temperature Tr, and η is a positive process-dependent The constant, θ, represents the temperature-dependent order of the collector current IC. VBE has a negative temperature coefficient, typically between -1.7mV/C and -2mV/C.

The invention provides a low temperature drift bandgap reference voltage circuit, method and application thereof. It has the characteristics of low temperature drift and wide temperature range and high precision. By using the exponential characteristic of base current to temperature, in the core circuit of the bandgap reference, the current is corrected by the resistance (the resistance connected to the base of the triode), so as to correct the output voltage. Make corrections. At the same time, a curvature compensation module that can generate a curvature-up parabolic trend current is added to compensate the high-order temperature nonlinearity in the reference voltage. The voltage it provides can be applied to a power management chip (BMIC Battery Management IC) or other chips. Other chips may be analog/digital converter (ADC), digital/analog converter (DAC), dynamic memory (DRAM), flash memory and other chips.

The present invention is realized based on the Brokaw bandgap unit. The principle is shown in Fig. 2, the low temperature drift bandgap reference voltage circuit schematic diagram. It can be seen from Fig. 2 that: first, the primary reference voltage Vref (generated based on the Brokaw bandgap unit) passes through and the base current After the correction operation, the reference voltage Vref before compensation is generated; it should be noted that the reference voltage Vref before compensation generated after the base current correction operation can also be output as the bandgap reference voltage.

In order to make the bandgap reference voltage have a lower temperature drift, wider temperature range and higher accuracy, further, a nonlinear compensation operation is performed on the reference voltage before compensation, and the nonlinear curvature compensation current Ico is used to compensate the reference voltage before compensation. Vref is compensated, that is, the nonlinear curvature compensation current Ico generates a voltage through a resistor to compensate the reference voltage Vref before compensation; finally, the final reference voltage Vref is generated.

The low temperature drift bandgap reference voltage circuit of the present invention is specifically introduced as follows:

As shown in the block diagram of the low temperature drift bandgap reference voltage circuit in FIG.

The role of the self-biasing module 10 is to provide bias (bias current or bias voltage) for other modules and to act as a start-up circuit during power-up.

The function of the bandgap reference core module 11 is to generate the primary reference voltage, and at the same time, the bandgap reference module includes a base current correction resistor, which generates the reference voltage before compensation after the base current correction operation;

It should be noted here that the primary reference voltage is generated based on the Brokaw bandgap unit. By adding a base current correction resistor to the base of the triode pair in the Brokaw bandgap unit, the reference voltage before compensation is generated after the correction operation is performed.

The function of the curvature compensation module 12 is to perform nonlinear curvature compensation on the reference voltage before compensation. The nonlinear curvature compensation process is as follows: the curvature compensation module 12 generates a nonlinear curvature compensation current Ico, and the nonlinear curvature compensation current Ico generates a voltage through a resistor to compensate the reference voltage Vref before compensation.

The voltage generating module 13 processes the compensated reference voltage to generate the final reference voltage Vref.

Below in conjunction with embodiment, each module of the low temperature drift bandgap reference voltage circuit of the present invention is introduced:

Preferred Embodiment 1:

As shown in the first embodiment of the low temperature drift bandgap reference voltage circuit in FIG. 4 , it can be seen from FIG. 4 that the first embodiment includes a self-biasing module 10 , a bandgap reference core module 11 and a voltage generating module 13 .

The self-biasing module 10 includes field effect transistors (MOS transistors) M5 and M6; transistors Q3 and Q4, resistors R6 and R7; field effect transistors M5 and M6 are PMOS transistors; transistor Q3 is a PNP transistor, and transistor Q4 is an NPN transistor.

The source stages of the field effect transistors M6 and M5 are connected to the power supply VDD, the gate of the field effect transistor M5 is connected to the gate of M6 and the drain of M5; the field effect transistors M6 and M5 form a current mirror; the drain of the field effect transistor M6 and One end of the resistor R7 is connected to point C and is connected to the bandgap reference core module 11 as the first output end of the self-biasing module 10; the other end of the resistor R7, point B, is connected to the base of the transistor Q4 and the emitter of the transistor Q3; the transistor Q4 The emitter E point of 1 is connected to one end of the resistor R6; the other end of the resistor R6 is grounded; the collector of the transistor Q3 is grounded, and the base of the transistor Q3 is used as the second output terminal of the self-biasing module 10 to connect the bandgap reference core module 11.

The self-starting process of the self-biasing module 10 is as follows: the voltages at points C and B are increased, the BE junctions of the transistors Q3 and Q4 are turned on, and the transistors Q3 and Q4 start the bandgap reference core module 11 .

The bandgap reference core module 11 is generated based on the Brokaw bandgap unit, including transistors Q1, Q2 and Q5; resistors R01, R02, R1, R2 and R3; amplifier OP1; R3 is the base current correction resistor; transistors Q1, Q2 and Q5 are NPN transistor.

The collector of the transistor Q5 is connected to the power supply VDD, the base of the transistor Q5 is connected to the first output terminal of the self-biasing module 10, and the emitter D of the transistor Q5 is connected to one end of the resistors R01 and R02; the transistors Q1 and Q2 form a transistor pair, and the transistors The collectors of Q1 and Q2 are respectively connected to the other ends of the resistors R01 and R02, the collectors of the transistors Q1 and Q2 are respectively connected to the inverting input terminal and the non-inverting input terminal of the amplifier OP1, the bases of the transistors Q1 and Q2 are connected together through R3, The base point A of the transistor Q1 is connected to the second output terminal of the self-biasing module 10 and is connected to the voltage generating module 13 as the first output terminal Vbgr of the bandgap reference core module 11 ; the output terminal of the amplifier OP1 is used as the bandgap reference core module 11 The second output terminal of the transistor Q1 is connected to the voltage generating module 13; the emitter of the transistor Q1 is connected to one end of the resistor R2; the emitter of the transistor Q2 is connected to one end of the resistor R2 through the resistor R1; the other end of the resistor R2 is grounded.

The voltage generating module 13 includes a field effect transistor M10, resistors R4 and R5; the field effect transistor M10 is a PMOS transistor.

The source of the field effect transistor M10 is connected to the power supply VDD, the gate of the field effect transistor M10 is connected to the second output terminal of the bandgap reference core module 11, and the drain of the field effect transistor M10 is connected to one end of the resistor R4 to output as the final output. The reference voltage Vref; the other end of the resistor R4 and one end of the resistor R5 are connected to the first output end of the bandgap reference core module 11; the other end of the resistor R5 is grounded.

The first embodiment of the low-temperature drift bandgap reference voltage circuit in FIG. 4 is implemented based on the Brokaw bandgap unit. The positive temperature coefficient voltage VPTAT is generated at the node between the resistors R1 and R2 mainly through the difference ΔVBE between the base-emitter voltages of Q1 and Q2. , used to compensate the linear term in the negative temperature coefficient in the VBE of Q1, so as to achieve first-order temperature compensation.

Among them, k is the Boltzmann constant, q is the amount of charge, and N is the ratio of the emitter junction area of Q1 and Q2.

The self-biasing module 10 in the first embodiment can effectively provide bias for other modules in the circuit and can act as a start-up circuit during the power-on process.

In the first embodiment, the emitter of Q3 is connected to the base of Q4, and Q3 and Q4 form a cascaded source follower structure. M5 and M6 have the same dimensions.

Combined with the different nodes (A, B, C, D, E) shown in Embodiment 1 of the low-temperature drift bandgap reference voltage circuit in FIG. 4 :

The voltage at point E is Vbgr+VBE3-VBE4, (where Vbgr is the voltage value of node A) to obtain the bias current I0 as

The voltage at point E has a positive temperature coefficient, and here R6 selects a resistor with a positive temperature coefficient to make the bias current I0 more stable. Use the VBE of Q5 to offset the VBE of Q3 as much as possible, so as to provide a relatively stable input voltage VD (that is, the voltage of node D) for the bandgap reference core module 11:

V _D =V _bgr +I ₀ R ₇ (4)

Because M5 and M6 form a current mirror and have the same size, the currents in the drains of M5 and M6 are equal.

The band gap voltage Vbgr is usually only about 1.2V, because the reference voltage required by the application is not only 1.2V. Therefore, different voltage values need to be generated by the voltage generating module 13 . In the voltage generation module 13, Vref (ie, the final reference voltage) is obtained through the resistor divider network R4 and R5.

In the low embodiment one shown in FIG. 4, the base currents Ib1, Ib2 and Ib3 of the transistors Q1, Q2 and Q3 will generate a voltage drop through the resistor R4. At this time, an unnecessary temperature-related term will be introduced into Vref, as shown in the formula (5)

In the formula, due to the influence of the base current, Vref_nc and Vbgr are no longer linearly related. Under ideal conditions Vbgr is a temperature independent value, and the base current affects the temperature coefficient of the output voltage. The expression for the base current is an exponential function of temperature

Therefore, resistor R3 is added in the circuit to eliminate the influence of the base current on the output voltage, and use the exponential characteristic of the base current to compensate the output voltage. The value of Vbgr changed by R3, such as formula (7)

Substitute equation (7) into (5) to get

Where x is R4/R5, y is R2/R1, K0 is the coefficient of negative temperature coefficient voltage VBE. K1 is the first-order temperature compensation coefficient, and K2 is the high-order temperature compensation coefficient. The first-order temperature compensation coefficient K1 is mainly related to the ratio of R2 and R1, while the high-order temperature compensation coefficient K2 is mainly related to the size of R3 and z. The z value is determined by the ratio of the currents of Ib3 and Ib2.

Therefore, the ratio of R2 and R1 determines the first-order temperature compensation coefficient K1, while the size of R4 and R5 determines the value of Vref_nc, and R6 determines the size of I0, thereby determining the ratio of current Ib3 to Ib2. After determining the above coefficients, it can be obtained that R3 determines the high-order temperature compensation coefficient K2. In this way, the negative influence of the bipolar transistor base current on the final reference voltage Vref_nc can be eliminated, and the reference voltage can be further compensated.

It should be noted that the Vref_nc here refers to the Vref in Figure 4. The Vref_nc in the above formula is mainly to distinguish it from the Vref in the second embodiment, indicating that it is the final benchmark without nonlinear curvature compensation. voltage Vref.

Preferred embodiment two:

The second preferred embodiment of the present invention is an improvement based on the first preferred embodiment. For the parts not mentioned in this embodiment, reference may be made to the corresponding content in the first embodiment.

After the temperature compensation of the aforementioned base current correction resistor, the obtained output voltage Vref exhibits a parabolic change trend with downward curvature, and has a relatively low temperature drift coefficient. In order to further improve the temperature drift trend of the output voltage Vref under high temperature and low temperature conditions, consider adding a curvature compensation module to the circuit to compensate for Vref. The proposed curvature compensation method adopts the idea of dynamic adjustment. By monitoring the change of the positive temperature coefficient voltage VPTAT (proportional toabsolute temperature, which is proportional to the absolute temperature), the size of the compensation current Ico is continuously adjusted, so as to realize the compensation of the high-order items in the VBE. Effectively reduces the temperature coefficient of the reference voltage.

As shown in the schematic diagram of curvature compensation of Embodiment 2 of the low temperature drift bandgap reference voltage circuit in FIG. 5 , a curvature compensation module 12 is added on the basis of the base current correction of Embodiment 1. It should be noted that for the convenience of description and introduction of the working process of the curvature compensation module 12, only the curvature compensation module 12 and its connected parts are shown here.

The curvature compensation module 12 includes

Field effect transistors M1, M2, M3, M4, M7, M8 and M9; resistors R8, R9 and R10; amplifier OP2; field effect transistors M1-M4, M7, M8 are PMOS tubes. M9 is an NMOS transistor; the curvature compensation module 12 also includes a resistor Rco.

A resistor Rco is added in series between the resistor R2 and the ground in the bandgap reference core module 11 . That is: one end of the resistor Rco is connected to the resistor R2, and the other end is grounded.

The non-inverting terminal of the amplifier OP2 is connected to the Vbgr node, the inverting terminal is connected to the node M, and the output terminal is connected to the gate of the field effect transistor M9; the source stage of the field effect transistor M9 is connected to the power supply VDD, the drain and one end of the resistor R10 is connected to the node M; Resistors R8-R10 are connected in series: the other end of resistor R10 and one end of resistor R9 are connected to node H, the other end of resistor R9 and one end of resistor R8 are connected to node L, and the other end of resistor R8 is grounded.

M1 and M2, M3 and M4 form two sets of differential pairs: the source of field effect transistor M1, the source of M2, and the drain of M7 are connected; the source of field effect transistor M3, the source of M4, the drain of M8 poles are connected; the sources of M7 and M8 are connected to the power supply VDD; the gates of M7 and M8 are connected to the node Vpbias; the node Vpbias is the gate of M5 and the gate of M6 (not shown in FIG. 5 ); the gates of M1 and M3 Connect the node VPTAT; the gates of M2 and M4 are connected to nodes L and H respectively; the drains of M2 and M3 are grounded; the drains of M1 and M4 are connected to one end of the resistor Rco.

M7 and M8 have the same size, and they form a current mirror with M5 and M6. The currents Is1 and Is2 of the same magnitude are obtained at the drains of M7 and M8, respectively. The current of the drain connected to M1 and M4 is the error correction current Ico.

The gates of transistors M1 and M3 are connected to the positive temperature coefficient voltage VPTAT in the Bandgap core. Under the action of amplifiers OP2 and M9 (here M9 is a source follower), the voltage at point M is equal to node Vbgr, and nodes H and L between series resistors R10, R9, and R8 provide different voltages Vh, Vl, as shown in the formula (10).

In the circuit, PMOS M1 to M4 all work in the weak inversion region, and the current in the sub-threshold region is

The current through the two differential pair tubes is

I _s =I _s1 =I _s2 =I _D1 +I _D2 =I _D3 +I _D4 (12)

Combining (11) and (12), the drain currents ID1 and ID4 of M1 and M4 can be obtained as

When the circuit is in a low temperature environment, VPTAT is very low, and ID1 is approximately equal to IS from equation (13), that is, most of the current from IS passes through M1, ID1 is high, and ID4 is low at this time, approximately equal to 0 . ID1 gradually becomes smaller as the temperature increases. When the temperature exceeds Tmid (where Tmid is the middle value of the temperature range), ID1 gradually decreases to 0 and ID4 begins to increase. When the circuit works under high temperature conditions, VPTAT is greater than VH, and ID4 is approximately equal to IS by formula (13), and ID1 is lower at this time. The sum of the currents ID1 and ID4 is the compensation current Ico, which passes through the resistor Rco in the bandgap reference, so that Vref is mainly compensated by ID1 at low temperature, and mainly compensated by ID4 at high temperature. In the process of temperature change, when VPTAT is equal to VH or VL, the compensation current Ico is equal to IS/2.

Combined with the result of formula (8), the final obtained Vref is shown in formula (14).

The parameter diagrams obtained by the simulation of the above-mentioned preferred embodiment 1 and embodiment 2.

Fig. 6 shows the simulation result 1 of the low-temperature drift bandgap reference voltage circuit of the present invention, and Fig. 6 is a trend diagram of ID1, ID4 and Ico changing with temperature. The trend of the slope change of ID1 and ID4 can be shown by comparison with the linear straight line. Two of the intersection points are the slope transition points of the current curve, and represent the points where VPTAT is equal to VL and VH, respectively. The values of VL and VH can be changed by adjusting the series resistances R10, R9 and R8, and then the exponential change trajectory of the compensation current can be changed to achieve the best curvature compensation effect.

Figure 7 shows the first simulation result of the low temperature drift bandgap reference voltage circuit of the present invention. Figure 7 is a comparison diagram of Vref before curvature compensation, curvature compensation current Ico and Vref after curvature compensation.

The Vref before curvature compensation (the uppermost graph in Fig. 7 ) exhibits a downward-opening parabolic curve in the temperature range of -55°C to 150°C. The curvature compensation current Ico (the middle diagram in FIG. 7 ) exhibits a parabolic curve with an upward opening in the temperature range of -55°C to 150°C. The curvature compensation current Ico generates a compensation voltage through the compensation resistor Rco, and superimposes it with Vref to obtain the Vref voltage after curvature compensation (the lowermost diagram in FIG. 7 ). The Vref voltage after curvature compensation shows a curve with double peaks in the temperature range of -55℃～150℃, and the difference between the simulation results of the maximum voltage and the minimum voltage is only 0.3mV.

Preferred embodiment three:

The preferred embodiment 3 of the present invention is an improvement based on the preferred embodiment 1 and the preferred embodiment 2. For the parts not mentioned in this embodiment, reference may be made to the corresponding content in the preferred embodiment 1 and the preferred embodiment 2.

On the basis of the above preferred embodiment 1 and embodiment 2, in order to avoid performance degradation caused by process changes or mismatched circuits, a trimming circuit is also added to the structure to correct the circuit after production is completed.

FIG. 8 shows the third embodiment of the low temperature drift bandgap reference voltage circuit of the present invention. It can be seen from FIG. 8 that the trimming circuit for the temperature drift coefficient in the bandgap reference core module 11 includes two potentiometers Rt1 and Rt2. The dot ports are connected to the input terminals Vinp and Vinn of the amplifier OP1, respectively. It should be noted here that only a part of the aforementioned bandgap reference core module 11 is shown in FIG. 8 , and it should be emphasized that the improvement here takes the second preferred embodiment as an example, and the preferred embodiment 1 can also carry out similar improvements. I won't go into details here.

It can be seen from FIG. 8 that R5 in the voltage generating module 13 also includes a trimming circuit, that is, a potentiometer Rt3, that is, R5 is a series-connected potentiometer Rt3 and R50. Its role is to adjust the size of the output voltage to meet the requirements of different applications.

The specific principle of the potentiometer is shown in the first embodiment of the temperature compensation coefficient trimming structure in the low temperature drift bandgap reference voltage circuit of the present invention. As can be seen from FIG. 9 , it includes n-bit series trimming modules T0 to Tn. In each trimming module, it includes a logic control unit L, a switching device K and a trimming resistor RT. For the n-bit trimming module, the logic control unit L, the switching device K and the trimming resistor RT are K0 to Kn, L0 to Ln, RT0 to RTn in total.

The working principle of the potentiometer is to adjust the position of the output terminal in the series resistance, and the input m-bit code (shown as 4-bit code in Figure 9) signal closes only one switch at the same time. The resistors RT0 to RTN are connected in series, and the output of the logic control unit L controls the conduction state of the switching device K. When the switching device K of the corresponding node is turned on, the node is connected to the output end; when the switching device K is turned off, the corresponding The node is disconnected from the output.

A node that needs to be fine-tuned is led out and connected to the fine-tuning module connected in series with n bits. In FIG. 9, the input terminal Vout of OP1 is taken as an example for illustration.

The trimming circuit is connected in series to the circuit. The step size n of the trimming circuit trimming and the number of bits of the control signal (ie, the number of bits m of the input logic control unit) determine the trimming range and the number of trimming points. Their relationship is 2 ^m =n.

Here, m=4 is taken as an example, and n=16. That is, a 4-bit trimming structure, with a total of 16 trimming points. When the circuit needs to adjust the temperature coefficient, the position of the contact point is changed.

In Figure 8 the two potentiometers are adjusted in opposite directions. As shown in Figure 8, the total size of Rt1 and Rt2 is Rta+Rtb, where Rta=Rtb=n·R, when the circuit is adjusted, Rta=(n+x)·R and Rtb=(n-x)·R , where x is a value between -n and n, then the ratio of the two positive temperature coefficient currents IPTAT1 and IPTAT2 is

κ=I _PTAT2 /I _PTAT1 =(x+n)/(xn) (15)

Therefore, the adjusted positive temperature coefficient voltage is obtained as

There are various implementations for the potentiometer. Another implementation is shown in the second embodiment of the temperature compensation coefficient trimming structure in the low temperature drift bandgap reference voltage circuit of the present invention, which includes n-bit series trimming modules T0 to Tn. In each trimming module, it contains logic control unit L, transmission gate Tr, NOT gate N and trimming resistor RT. For the n-bit trimming module logic control unit L, the transmission gate Tr, the non-gate N, and the trimming resistor RT, the total is L0 to Ln, Tr0 to Trn, N0 to Nn, and RT0 to RTn. Its advantage is that the control consistency is better, and it will not be introduced in detail.

In order to facilitate the description and understanding, the overall circuit diagram of the present invention is given, as shown in FIG. 10 . A combination of three.

Based on the foregoing preferred embodiments, the present invention also provides a method for generating a low temperature drift bandgap reference voltage, comprising the following steps:

Step 1: Generate the primary reference voltage;

Step 2: Generate the reference voltage before compensation by base current correction and primary reference voltage;

Step 3: Generate a low temperature drift bandgap reference voltage.

In order to make the temperature characteristics of the reference voltage better:

After step 2, step 21 may also be included: performing nonlinear compensation on the reference voltage before compensation; the nonlinear curvature compensation generates nonlinear curvature compensation current for the curvature compensation module, and the nonlinear curvature compensation current generates voltage through a resistor for compensation.

The specific step 21 is dynamic adjustment and compensation; the dynamic adjustment and compensation is to monitor the change of the positive temperature coefficient voltage VPTAT, continuously adjust the size of the compensation current, and compensate for the high-order term in the bandgap reference BE junction voltage VBE. This can effectively reduce the temperature coefficient of the reference voltage.

In the above method, a trimming step is also included, and the trimming step refers to trimming the resistance.

Resistance trimming can be divided into two parts:

To avoid performance degradation caused by process variations or mismatched circuits: resistor trimming the input of the amplifier that generates the primary reference voltage;

In order to adjust the magnitude of the output voltage to meet the requirements of different applications: resistance trimming is performed on the proportional resistor that produces the low temperature drifting bandgap reference voltage.

The resistance trimming can specifically be implemented by connecting through a series resistance. When the resistance trimming is performed on the input end of the amplifier in generating the primary reference voltage, the resistances of the two inputs of the amplifier are adjusted in opposite directions.

The relationship between the step n of the resistance trimming and the number of bits m of the control signal is 2 ^m =n; m and n are positive integers greater than 1.

Compared with the prior art, the advantages of the present invention are:

The invention realizes a bandgap reference voltage source circuit with ultra-high precision and ultra-low temperature drift coefficient, and can provide a highly stable reference voltage for circuit applications with high reference voltage requirements. The simulation results show that in the wide temperature range of -55℃～150℃, the temperature drift coefficient of the reference voltage output by the circuit is only 0.7ppm, and the voltage change is only 0.4mV. The circuit structure is easy to implement, and the process requirements are low, and it is suitable for various engineering applications.

It should be noted that the bandgap reference voltage source circuit with high-order temperature compensation shown in the present invention is only a preferred example for illustrating the present invention, and does not limit the protection scope of the present invention. Anything carried out according to the scope of the present invention, including the exchange of PNP transistors to NPN transistors, PMOS transistors to NMOS transistors, changes to the local structure of the circuit, changes to the circuit implementation method under the concept provided by the present invention, and other non-essential Any substitution, modification or modification, etc., all fall within the protection scope of the present invention.

The above descriptions are only preferred embodiments of the present invention, and are not intended to limit the present invention. For those skilled in the art, the present invention may have various modifications and changes. Any modification, equivalent replacement, improvement, etc. made within the spirit and principle of the present invention shall be included within the protection scope of the present invention.

In the description of the present invention, it should be understood that the terms "center", "longitudinal", "lateral", "length", "width", "thickness", "upper", "lower", "front", " Rear", "left", "right", "vertical", "horizontal", "top", "bottom", "inside", "outside", "clockwise", "counterclockwise", etc. The relationship is based on the orientation or positional relationship shown in the drawings, only for the convenience of describing the present invention and simplifying the description, rather than indicating or implying that the device or element referred to must have a particular orientation, be constructed and operated in a particular orientation, and therefore It should not be construed as a limitation of the present invention.

In addition, the terms "first" and "second" are only used for descriptive purposes, and should not be construed as indicating or implying relative importance or implying the number of indicated technical features. Thus, a feature defined as "first" or "second" may expressly or implicitly include one or more of that feature. In the description of the present invention, "plurality" means two or more, unless otherwise expressly and specifically defined.

In the present invention, unless otherwise expressly specified and limited, the terms "installed", "connected", "connected", "fixed" and other terms should be understood in a broad sense, for example, it may be a fixed connection or a detachable connection , or integrated; it can be a mechanical connection or an electrical connection; it can be a direct connection or an indirect connection through an intermediate medium, and it can be the internal connection of the two elements or the interaction relationship between the two elements. For those of ordinary skill in the art, the specific meanings of the above terms in the present invention can be understood according to specific situations.

In the present invention, unless otherwise expressly specified and limited, a first feature "on" or "under" a second feature may include the first and second features in direct contact, or may include the first and second features Not directly but through additional features between them. Also, the first feature being "above", "over" and "above" the second feature includes the first feature being directly above and obliquely above the second feature, or simply means that the first feature is level higher than the second feature. The first feature is "below", "below" and "below" the second feature includes the first feature being directly below and diagonally below the second feature, or simply means that the first feature has a lower level than the second feature.

Claims (19)

1. A low temperature floating bandgap reference voltage circuit comprising:

the device comprises a self-biasing module, a band-gap reference core module and a voltage generation module;

the self-bias module provides bias voltage and bias current;

the self-bias module is used as a self-starting circuit in the power-on process of a power supply;

the band-gap reference core module is composed of Brokaw band-gap units and generates a primary reference voltage;

the band-gap reference core module comprises a base current correction resistor; adding a base current correction resistor into the base of a triode pair in the Brokaw band gap unit, and generating a reference voltage before compensation after correction operation is carried out; the correction resistor eliminates the influence of base current on the reference voltage, and the exponential characteristic of the base current is utilized to compensate the reference voltage;

the voltage generation module generates a final reference voltage;

the low-temperature drift band gap reference voltage circuit also comprises a curvature compensation module;

the curvature compensation module performs nonlinear curvature compensation on the reference voltage before compensation;

the nonlinear curvature compensation is that a curvature compensation module generates nonlinear curvature compensation current which generates voltage through a resistor for compensation;

the curvature compensation module comprises field effect transistors M1, M2, M3, M4, M7, M8, and M9; resistors R8, R9, and R10; an amplifier OP 2; the field effect transistors M1-M4, M7 and M8 are PMOS tubes; m9 is an NMOS tube; the curvature compensation module further comprises a resistor Rco;

one end of the resistor Rco is connected with the band gap reference core module, and the other end of the resistor Rco is grounded; the non-inverting terminal of the amplifier OP2 is connected with the node Vbgr, the inverting terminal node M and the output terminal of the amplifier is connected with the gate of the field effect transistor M9; the source of the field effect transistor M9 is connected with the power supply VDD, the drain and one end of the resistor R10 is connected with the node M; resistors R8-R10 are connected in series: the other end of the resistor R10 and one end of the resistor R9 are connected to the node H, the other end of the resistor R9 and one end of the resistor R8 are connected to the node L, and the other end of the resistor R8 is grounded;

the source electrode of the field effect transistor M1, the source electrode of the M2 and the drain electrode of the M7 are connected; the source electrode of the field effect transistor M3, the source electrode of the M4 and the drain electrode of the M8 are connected; the source stages of M7 and M8 are connected with a power supply VDD; the gates of M7 and M8 are connected to node Vpbias; the node Vpbias is the gate of the self-biasing module M5; the gate connection nodes VPTAT of M1 and M3; the gates of M2 and M4 are connected to nodes L and H, respectively; the drains of M2 and M3 are grounded; the drains of M1 and M4 are connected to one end of resistor Rco.

2. The low temperature floating bandgap reference voltage circuit of claim 1, wherein:

the M7 and the M8 have the same size.

3. The low temperature floating bandgap reference voltage circuit of claim 1, wherein:

the self-biasing module comprises field effect transistors M5 and M6; triodes Q3 and Q4, resistors R6 and R7; the field effect transistors M5 and M6 are PMOS tubes; the triode Q3 is a PNP triode and the triode Q4 is an NPN triode;

the source electrodes of the field effect transistors M6 and M5 are connected with a power supply VDD, and the grid electrode of the field effect transistor M5 is connected with the grid electrode of M6 and the drain electrode of M5; the field effect transistors M6 and M5 form a current mirror; the drain of the field effect transistor M6 and one end of the resistor R7 are connected to the point C and are used as the first output end of the self-bias module to be connected with the band-gap reference core module; the point B at the other end of the resistor R7 is connected with the base electrode of the triode Q4 and the emitting electrode of the triode Q3; an emitter E point of the triode Q4 is connected with one end of the resistor R6; the other end of the resistor R6 is grounded; the collector of the triode Q3 is grounded, and the base of the triode Q3 is used as a second output end of the self-bias module and is connected with the band-gap reference core module.

4. The low temperature floating bandgap reference voltage circuit of claim 3, wherein:

the M5 and the M6 have the same size.

5. The low temperature floating bandgap reference voltage circuit of claim 1, wherein:

the band-gap reference core module comprises triodes Q1, Q2 and Q5; resistors R01, R02, R1, R2 and R3; an amplifier OP 1; r3 is a base current correction resistor; the transistors Q1, Q2, and Q5 are NPN transistors;

the collector of the triode Q5 is connected with a power supply VDD, the base of the triode Q5 is connected with the first output end of the self-bias module, and the emitter D point of the triode Q5 is connected with one end of the resistors R01 and R02; the triodes Q1 and Q2 form a triode pair, collectors of the triodes Q1 and Q2 are respectively connected with the other ends of the resistors R01 and R02, collectors of the triodes Q1 and Q2 are respectively connected with the inverting input end and the non-inverting input end of the amplifier OP1, bases of the triodes Q1 and Q2 are connected together through R3, a point A of a base of the triode Q1 is connected with a second output end of the self-bias module and is used as a first output end Vbgr of the band-gap reference core module to be connected with the voltage generation module; the output end of the amplifier OP1 is used as the second output end of the band-gap reference core module and is connected with the voltage generation module; an emitter of the triode Q1 is connected with one end of the resistor R2; an emitter of the triode Q2 is connected with one end of the resistor R2 through the resistor R1; the other end of the resistor R2 is connected to ground.

6. The low temperature floating bandgap reference voltage circuit of claim 5, wherein:

the band-gap reference core module comprises trimming circuits Rt1 and Rt2, and contact point ports are respectively connected with input ends Vinp and Vinn of an amplifier OP 1.

7. The low temperature floating bandgap reference voltage circuit of claim 1, wherein:

the voltage generation module comprises a field effect transistor M10, a resistor R4 and a resistor R5; the field effect transistor M10 is a PMOS tube;

the source of the field effect transistor M10 is connected with a power supply VDD, the gate of the field effect transistor M10 is connected with the second output end of the band-gap reference core module, the drain of the field effect transistor M10 is connected with one end of the resistor R4 together to be output as a final reference voltage Vref; the other end of the resistor R4 and one end of the resistor R5 are connected with a first output end of the band-gap reference core module; the other end of the resistor R5 is connected to ground.

8. The low temperature floating bandgap reference voltage circuit of claim 7, wherein:

the resistor R5 in the voltage generation module comprises a trimming circuit Rt3, and the resistor R5 is a potentiometer Rt3 and a potentiometer R50 which are connected in series.

9. The low temperature floating bandgap reference voltage circuit of any of claims 6 or 8, wherein:

the trimming circuit comprises trimming modules T0-Tn with n bits connected in series; each fine tuning module comprises a logic control unit L, a switch device K and a fine tuning resistor RT; the total number of the logic control unit L, the switching device K and the trimming resistor RT of the n-bit trimming module is K0 to Kn, L0 to Ln and RT0 to RTn; the trimming circuit also comprises a digit m of a control signal, and the control signal is connected with the logic control unit L; n and m are positive integers greater than 1;

the output of the logic control unit L controls the on state of the switching device K, and when the switching device K of the corresponding node is turned on, the node is connected to the output terminal; when the switching device K is turned off, the corresponding node is disconnected from the output terminal.

10. A method for generating a low temperature floating bandgap reference voltage of the low temperature floating bandgap reference voltage circuit of any of claims 1 to 9, said method comprising the steps of:

step 1: generating a primary reference voltage;

step 2: generating a reference voltage before compensation by base current correction and a primary reference voltage; the base current correction is carried out through a calibration resistor; the correction resistor eliminates the influence of base current on the reference voltage, and the exponential characteristic of the base current is utilized to compensate the reference voltage;

and step 3: generating a low temperature drift band gap reference voltage;

after the step 2, carrying out nonlinear compensation on the reference voltage before compensation; the nonlinear curvature compensation is that the curvature compensation module generates nonlinear curvature compensation current which generates voltage through a resistor for compensation.

11. The method of generating a low temperature floating bandgap reference voltage of claim 10, wherein:

the nonlinear compensation of the reference voltage before compensation is dynamic adjustment compensation;

the dynamic adjustment compensation is as follows: and monitoring the change of the positive temperature coefficient voltage VPTAT, and continuously adjusting the magnitude of the compensation current to compensate the high-order term in the band gap reference BE junction voltage VBE.

12. The method of generating a low temperature floating bandgap reference voltage of claim 11, wherein:

the method further comprises a trimming step, wherein the trimming step refers to trimming the resistor.

13. The method of low temperature floating bandgap reference voltage generation according to claim 12, wherein:

the resistance trimming is realized by different access of series resistors.

14. The method of generating a low temperature floating bandgap reference voltage of claim 13, wherein:

step length n of the resistor trimming and the digit m of the control signal;

m and n have a relationship of 2^m＝n；

m and n are positive integers greater than 1.

15. The method of generating a low temperature floating bandgap reference voltage of claim 12, wherein:

and the resistance trimming is to perform resistance trimming on the input end of the amplifier in the generation of the primary reference voltage.

16. The method of generating a low temperature floating bandgap reference voltage of claim 13, wherein:

when the resistance of the input end of the amplifier in the generation of the primary reference voltage is adjusted, the resistance of the two input ends of the amplifier is adjusted in the opposite direction.

17. The method of generating a low temperature floating bandgap reference voltage of claim 12, wherein:

and the resistance trimming is to perform resistance trimming on a proportional resistor generating the low-temperature drift band-gap reference voltage.

18. A chip using the method for generating a low temperature-drift bandgap reference voltage according to any one of claims 10 to 17, wherein:

the low-temperature drift band-gap reference voltage circuit and the method are applied to a power management chip.

19. A chip using the method for generating a low temperature-drift bandgap reference voltage according to any one of claims 10 to 17, wherein:

the low temperature drift band gap reference voltage circuit and the method are applied to an analog-to-digital converter, a digital-to-analog converter, a dynamic memory or a Flash memory chip.

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