CN109300928B - Image sensor chip and image sensor device - Google Patents

Abstract

The present application provides an image sensor chip and an image sensor device. The image sensor chip includes a plurality of photosensitive units, which are arranged in sequence along a first direction, and each photosensitive unit includes a plurality of photosensitive devices arranged in sequence along a second direction, the first direction is perpendicular to the second direction, the second direction is the main scanning direction of the image sensor chip, each photosensitive device has a photosensitive receiving area, the areas of any two photosensitive receiving areas are the same and have the same width interval, and the line connecting the centers of the photosensitive receiving areas of any two photosensitive devices in any two photosensitive units has an angle θ with the first direction, and 0°<θ<180°. The image sensor increases the number of detection points in the second direction, thereby improving the resolution of the image sensor chip, and the area of the photosensitive receiving area of each photosensitive device in the image sensor chip is not reduced, further ensuring that the sensitivity does not decrease.

Description

Image sensor chip and image sensor device

Technical Field

The present application relates to the field of detection, and in particular, to an image sensor chip and an image sensor device.

Background technique

The contact image sensor device used in the image reading device generally has a plurality of linear image sensor chips, which include a row of a plurality of photodiodes arranged along the main scanning direction (the length direction of the chip), and the photodiodes are used to receive external light for photoelectric conversion and convert the light signal into an electrical signal. Each photodiode has a photosensitive receiving area, and the photosensitive receiving area can be set to a corresponding size according to the resolution requirement.

When the resolution increases, the number of photodiodes in the main scanning direction of the linear image sensor chip with the same length needs to be increased, and the size of the photosensitive receiving area of the photosensitive diode must inevitably be reduced. Under certain conditions of external light intensity and illumination time, the reduction in the photosensitive receiving area means a decrease in the amount of light received and the charge generated, that is, the output voltage (sensitivity) also decreases, making it difficult to accurately recognize the image.

At present, there are usually two ways to solve the problem of reduced sensitivity caused by increased resolution. One is to reduce the capacity of the storage capacitor. However, after the storage capacitor capacity is reduced, the same switching noise added to the capacitor with small capacity will produce a large voltage change, resulting in a weakened chip's anti-noise ability. The other is to increase the subsequent amplification circuit multiple, but after increasing the subsequent amplification circuit multiple, the signal and noise are amplified at the same time, especially the dark output deviation when no light is received will increase, making the chip's dark output characteristics worse.

The above information disclosed in the background technology section is only used to enhance the understanding of the background technology of the technology described in this article. Therefore, the background technology may contain certain information that does not form the prior art known in this country for those skilled in the art.

Summary of the invention

The main purpose of the present application is to provide an image sensor chip and an image sensor device to solve the problem of decreased sensitivity caused by increased resolution of image sensor chips in the prior art.

In order to achieve the above-mentioned purpose, according to one aspect of the present application, an image sensor chip is provided, which includes a plurality of photosensitive units, wherein the plurality of photosensitive units are arranged in sequence along a first direction, and each of the photosensitive units includes a plurality of photosensitive devices arranged in sequence along a second direction, the first direction is perpendicular to the second direction, the second direction is the main scanning direction of the image sensor chip, each of the photosensitive devices has a photosensitive receiving area, any two of the photosensitive receiving areas have the same area and have a gap with the same width, and a line connecting the centers of the photosensitive receiving areas of any two of the photosensitive devices in any two of the photosensitive units has an angle θ with the first direction, and 0°<θ<180°.

Furthermore, the projection shapes of any two of the above-mentioned photosensitive receiving areas on the first plane are the same, and the above-mentioned first plane is parallel to the above-mentioned first direction and the above-mentioned second direction respectively.

Furthermore, the projection shape of the photosensitive receiving area on the first plane is selected from any one of a circle, a square, a rectangle, an ellipse and a triangle.

Furthermore, the maximum length of each of the above-mentioned photosensitive receiving areas in the second direction is L, the above-mentioned photosensitive devices in any two adjacent above-mentioned photosensitive units are one-to-one corresponding, and the distance between the centers of the above-mentioned photosensitive receiving areas of the two one-to-one corresponding photosensitive devices in the above-mentioned second direction is 1/3L to 2/3L, preferably 1/2L.

Furthermore, in each of the above-mentioned photosensitive units, the intervals between any two adjacent photosensitive receiving areas are the same.

Furthermore, there are two photosensitive units.

Furthermore, the above-mentioned image sensor chip also includes: a control unit, which is used to receive an external clock signal and a start signal, and is used to control the operation of the above-mentioned image sensor chip; a storage unit, which includes a plurality of memories, each of which is electrically connected to the above-mentioned control unit, and the above-mentioned memories are electrically connected to the above-mentioned photosensitive devices in a one-to-one correspondence, and the above-mentioned memories are used to store the voltage signals obtained by the corresponding photosensitive devices; a shift unit, which is electrically connected to each of the above-mentioned memories and the above-mentioned control unit respectively, and the above-mentioned shift unit is used to output the above-mentioned voltage signals stored in the above-mentioned memories in sequence; an amplification unit, which is electrically connected to the above-mentioned shift unit and the above-mentioned control unit respectively, and the above-mentioned amplification unit is used to amplify the above-mentioned voltage signals outputted in sequence by the above-mentioned shift units.

Furthermore, each of the above-mentioned photosensitive units also includes: a plurality of first reset switches, which are electrically connected to the above-mentioned photosensitive devices one by one, and are used to reset the output voltage of the corresponding above-mentioned photosensitive devices; a first amplifier, which is electrically connected to the above-mentioned photosensitive devices one by one, and the output ends of the above-mentioned photosensitive devices are respectively electrically connected to the above-mentioned first reset switches and the above-mentioned first amplifiers, and the above-mentioned first amplifiers are used to amplify the output voltage of the corresponding above-mentioned photosensitive devices.

Furthermore, the storage unit further comprises a plurality of sample-and-hold switches, the sample-and-hold switches are electrically connected one-to-one between the first amplifier and the memory, and the memory is electrically connected to the control unit via the sample-and-hold switches.

Furthermore, the above-mentioned shift unit includes: a plurality of signal-on switches, which are electrically connected to the above-mentioned memories in a one-to-one correspondence; a shift register, which is electrically connected to the above-mentioned control unit and each of the above-mentioned signal-on switches, and the above-mentioned shift register is used to control the plurality of above-mentioned signal-on switches to be closed in sequence; and a common signal part, which is electrically connected to each of the above-mentioned signal-on switches, and the above-mentioned shift register is used to input the above-mentioned voltage signal stored in the above-mentioned memory into the above-mentioned common signal part in sequence.

Furthermore, the amplification unit includes a second amplifier, the second amplifier is electrically connected to the common signal unit, and the second amplifier is used to sequentially amplify the voltage signals sequentially transmitted from the common signal unit.

Furthermore, the common signal portion is composed of one common signal line or multiple common signal lines. When the common signal portion is composed of multiple common signal lines, the amplification unit includes multiple second amplifiers, and the second amplifiers are electrically connected to the common signal lines one by one. The number of the common signal lines is the same as the number of the photosensitive units, and the common signal lines are electrically connected to multiple signal-on switches connected to one of the photosensitive units.

Furthermore, the image sensor chip further includes a second reset switch, which is electrically connected to the common signal unit, the second amplifier and the control unit respectively, and is used to reset the common signal unit and the second amplifier respectively.

Furthermore, the above-mentioned photosensitive device is a photosensitive diode, which includes an N-type region, a P-type region, an input electrode and an output electrode. The above-mentioned P-type region is arranged in contact with the input electrode, and the above-mentioned input electrode is grounded. The above-mentioned N-type region is arranged in contact with the output electrode, and the above-mentioned output electrode is electrically connected to the above-mentioned storage unit.

Furthermore, the image sensor chip further comprises a substrate, and at least the photosensitive unit is located on a surface of the substrate.

According to another aspect of the present application, an image sensor device is provided, including an image sensor chip, wherein the image sensor chip includes any one of the above-mentioned image sensor chips.

By applying the technical solution of the present application, the image sensor chip has an additional photosensitive unit in the first direction compared to the prior art, and a line connecting the centers of the photosensitive receiving areas of any two of the photosensitive devices in any two of the photosensitive units is not parallel to the first direction, so that the number of detection points in the second direction is increased, thereby improving the resolution of the image sensor chip, and the area of the photosensitive receiving area of each photosensitive device in the image sensor chip is not reduced, further ensuring that the sensitivity does not decrease.

BRIEF DESCRIPTION OF THE DRAWINGS

The drawings constituting part of the present application are used to provide a further understanding of the present application. The illustrative embodiments and descriptions of the present application are used to explain the present application and do not constitute an improper limitation on the present application. In the drawings:

FIG1 is a schematic structural diagram of an image sensor device according to an embodiment of the present application;

FIG2 is a schematic diagram showing the structure of an image sensor device in Embodiment 1 of the present application;

FIG3 is a schematic diagram showing a circuit structure of the image sensor device in FIG2 ;

FIG4 is a schematic diagram showing a partial structure of the image sensor device in FIG3 ;

FIG5 is a schematic diagram showing the structure of an image sensor device in Embodiment 2 of the present application;

FIG6 is a schematic diagram showing a circuit structure of the image sensor device in FIG5 ;

FIG7 is a schematic diagram showing the detection results of the image sensor device in Example 1;

FIG. 8 is a schematic diagram showing detection results of the image sensor device of Example 2. In FIG.

The above drawings include the following reference numerals:

01. Substrate; 10. Photosensitive unit; 100. Photosensitive receiving area; 20. Control unit; 30. Storage unit; 40. Shift unit; 50. Second reset switch; 60. Amplifying unit; 70. Working unit; 11. First reset switch; 12. Photosensitive device; 13. First amplifier; 31. Sample and hold switch; 32. Memory; 41. Signal connection switch; 42. Shift register; 43. Common signal unit; 430. Common signal line; 431. First common signal line; 432. Second common signal line; 600. Second amplifier.

Detailed ways

It should be noted that the following detailed descriptions are illustrative and are intended to provide further explanation of the present application. Unless otherwise specified, all technical and scientific terms used herein have the same meanings as those commonly understood by those skilled in the art to which the present application belongs.

It should be noted that the terms used herein are only for describing specific embodiments and are not intended to limit the exemplary embodiments according to the present application. As used herein, unless the context clearly indicates otherwise, the singular form is also intended to include the plural form. In addition, it should be understood that when the terms "comprise" and/or "include" are used in this specification, it indicates the presence of features, steps, operations, devices, components and/or combinations thereof.

It should be understood that when an element (such as a layer, film, region, or substrate) is described as being "on" another element, the element may be directly on the other element, or there may be intermediate elements. Moreover, in the specification and claims, when an element is described as being "connected" to another element, the element may be "directly connected" to the other element, or "connected" to the other element through a third element.

As introduced in the background technology, when the resolution requirements of the image sensor chip in the prior art are increased, the number of photosensitive devices required increases, resulting in a smaller area of the photosensitive receiving area of each photosensitive device, thereby reducing the sensitivity of the photosensitive device. In order to solve the above technical problems, the present application proposes an image sensor chip and an image sensor device.

In a typical embodiment of the present application, an image sensor chip is provided, as shown in FIG1 , the image sensor chip includes a plurality of photosensitive units 10, the plurality of photosensitive units 10 are arranged in sequence along a first direction, that is, all the photosensitive units are arranged in sequence along the first direction, and each of the photosensitive units 10 includes a plurality of photosensitive devices 12 arranged in sequence along a second direction, the first direction is perpendicular to the second direction, the second direction is the main scanning direction of the image sensor chip, the first direction is the moving direction of the object to be measured, and the second direction is also the length direction of the image sensor chip, each of the photosensitive devices 12 has a photosensitive receiving area 100 for receiving external light, and the photosensitive device receiving the external light performs photoelectric conversion to convert the light signal into a voltage signal. Moreover, the areas of any two of the photosensitive receiving areas 100 are the same and have the same width interval, that is, the areas of all the photosensitive receiving areas in the image sensor chip are the same, and the width of the interval in the second direction is the same, so that the amount of light received by all the photosensitive receiving areas is the same, and further ensures that the subsequent image sensor device can obtain an accurate detection image. There is an angle θ between the line connecting the centers of the photosensitive receiving areas 100 of any two of the photosensitive devices 12 in any two of the photosensitive units 10 and the first direction, and 0°<θ<180°, that is, the line is not parallel to the first direction, which increases the number of detection points in the second direction, thereby improving the resolution.

Compared with the prior art, the above-mentioned image sensor chip has an additional photosensitive unit in the first direction, and the line connecting the centers of the above-mentioned photosensitive receiving areas 100 of any two of the above-mentioned photosensitive devices 12 in any two of the above-mentioned photosensitive units 10 is not parallel to the first direction, so that the detection points in the second direction are increased, thereby improving the resolution of the image sensor chip, and the area of the photosensitive receiving area of each photosensitive device in the image sensor chip is not reduced, further ensuring that the sensitivity does not decrease.

It should be noted that the present application does not limit the spacing between multiple photosensitive units in the first direction. The smaller the spacing between the two, the higher the detection accuracy. However, due to the limitations of the photolithography process, it is currently impossible to make the spacing between the two very small.

The shapes of any two photosensitive receiving areas of the present application can be the same or different (the difference here includes partial difference and complete difference), as long as the areas are the same. Those skilled in the art can set any photosensitive receiving areas to the same or different shapes according to actual conditions.

In order to simplify the structure and process of the image sensor chip, in one embodiment of the present application, as shown in FIG. 1 , the projection shapes of any two of the above-mentioned photosensitive receiving areas 100 on the first plane are the same, and the above-mentioned first plane is parallel to the above-mentioned first direction and the above-mentioned second direction respectively.

The shape of the projection of the photosensitive receiving area of the present application on the first plane can be selected from any shape in the prior art, including any regular or irregular shape, and those skilled in the art can set the photosensitive receiving area to a suitable shape according to actual conditions.

In a specific embodiment of the present application, the projection shape of the photosensitive receiving area 100 on the first plane is selected from any one of a circle, a square, a rectangle, an ellipse and a triangle. In the image sensor chip shown in FIG1 , the projection shape of the photosensitive receiving area 100 on the first plane is a square.

In one embodiment of the present application, the maximum length of each photosensitive receiving area 100 in the second direction is L, the photosensitive devices 12 in any two adjacent photosensitive units 10 are one-to-one corresponding, and the width of the spacing between the centers of the photosensitive receiving areas 100 of the two one-to-one corresponding photosensitive devices 12 in the second direction is between 1/3L and 2/3L, that is, the corresponding two photosensitive receiving areas in two adjacent photosensitive units are staggered, and the stagger is 1/3L to 2/3L. This can further ensure the improvement of detection accuracy.

In a specific embodiment of the present application, as shown in FIG2 , the width of the distance between the centers of the photosensitive receiving areas 100 of the two corresponding photosensitive devices 12 in the second direction is 1/2L, which can further improve the detection accuracy.

In order to further simplify the structure and the process, in one embodiment of the present application, as shown in FIG. 2 , in each of the photosensitive units 10 , the intervals between any two adjacent photosensitive receiving areas 100 are the same.

Of course, the intervals between any two photosensitive receiving areas mentioned above in the present application may be different, and those skilled in the art may set the intervals between any two photosensitive receiving areas to be completely different, partially different, or completely the same according to actual conditions.

In a specific embodiment, as shown in FIG2 , there are only two photosensitive units 10. Such an image sensor chip has a simpler structure and can ensure that the resolution of the image sensor chip is twice that of an image sensor chip with only one photosensitive unit. For example, the resolution of an image sensor chip with only one photosensitive unit is 1200 DPI, while the resolution of the image sensor chip with two photosensitive units is 2400 DPI.

Furthermore, by setting the corresponding photosensitive devices in the two photosensitive units at appropriate offset positions, more accurate and high-precision detection can be further ensured.

In another specific embodiment of the present application, as shown in FIG1, the image sensor chip further includes a control unit 20, a storage unit 30, a shift unit 40 and an amplification unit 60. The control unit 20 is used to receive an external clock signal and a start signal, and is used to control the operation of the image sensor chip; the storage unit 30 includes a plurality of memories 32, each of which is electrically connected to the control unit 20, and the control unit controls the storage process of the memory, and the memory 32 is used to store the voltage signal obtained by the corresponding photosensitive device 12; the shift unit 40 is electrically connected to each of the memories 32 and the control unit 20, respectively, and the shift unit 40 is used to sequentially output the voltage signal stored in the memory 32; the amplification unit 60 is electrically connected to the shift unit 40 and the control unit 20, respectively, and the amplification unit 60 is used to amplify the voltage signal sequentially output by the shift unit 40. In this embodiment, the electrical signal generated by the photosensitive device is processed sequentially by setting the control unit, the storage unit, the shift unit and the amplification unit, so that the processed electrical signal can obtain an accurate detection image.

In order to enable the photosensitive unit to obtain an accurate voltage signal and at the same time to ensure that the voltage signal output by the photosensitive unit is not too small, as shown in Figures 3, 4 and 6, in an embodiment of the present application, each of the above-mentioned photosensitive units 10 also includes a plurality of first reset switches 11 and a first amplifier 13, and the first reset switch 11 is electrically connected to the above-mentioned photosensitive device 12 in a one-to-one manner. Before the photosensitive device is tested, the first reset switch is controlled to be closed, and the first reset switch resets the output voltage of the corresponding photosensitive device 12, initializes the output voltage of the photosensitive device, so that the output voltage of each photosensitive device is consistent, avoiding the influence of other external factors on the test result, and making the test result of the photosensitive device more accurate; the first amplifier 13 is electrically connected to the above-mentioned photosensitive device 12 in a one-to-one manner, and the output end of the above-mentioned photosensitive device 12 is electrically connected to the above-mentioned first reset switch 11 and the above-mentioned first amplifier respectively, and the above-mentioned first amplifier is used to amplify the output voltage of the corresponding photosensitive device 12.

In another embodiment of the present application, as shown in FIG3, FIG4 and FIG6, the storage unit 30 further includes a plurality of sampling and holding switches 31, and the sampling and holding switches 31 are electrically connected between the first amplifier 13 and the memory 32 in a one-to-one correspondence, and the memory 32 is electrically connected to the control unit 20 through the sampling and holding switches 31. Specifically, taking the image sensor chip shown in FIG3, FIG4 and FIG6 as an example, the working process of the sampling and holding switch is explained. After the control unit controls each first reset switch 11 to initialize the output voltage of the photosensitive device 12, the control unit controls each first reset switch 11 to be disconnected, and simultaneously controls each sampling and holding switch 31 to be closed. At this time, the photosensitive device receives external light, accumulates charge, and generates a voltage signal, which is amplified by the first amplifier 13 and stored in the memory 32. Then the control unit controls the sampling and holding switch 31 to be disconnected, so that all memories store the stored voltage at the moment when the sampling and holding switch 31 is disconnected.

As shown in Figures 3, 4 and 6, in a specific embodiment of the present application, the memory is a storage capacitor. Of course, the memory of the present application is not limited to the storage capacitor, but can also be other memories that can store voltage signals.

In order to enable the shift unit to better control the sequential output of the voltage signal stored in the memory 32, in one embodiment of the present application, as shown in FIG3, FIG4 and FIG6, the shift unit 40 includes a plurality of signal connection switches 41, a shift register 42 and a common signal unit 43. Among them, the signal connection switches 41 are electrically connected to the memory 32 in a one-to-one correspondence; the shift register 42 is electrically connected to the control unit 20 and each of the signal connection switches 41, and the shift register 42 is used to control the plurality of signal connection switches 41 to be closed in sequence; the common signal unit 43 is electrically connected to each of the signal connection switches 41, and the shift register 42 is used to input the voltage signal stored in the memory 32 to the common signal unit 43 in sequence.

In another embodiment of the present application, as shown in Figures 3, 4 and 6, the above-mentioned amplification unit 60 includes a second amplifier 600, and the above-mentioned second amplifier 600 is electrically connected to the above-mentioned common signal part 43, and the above-mentioned second amplifier 600 is used to sequentially amplify the above-mentioned voltage signals transmitted sequentially from the common signal part 43.

It should be noted that the first amplifier and the second amplifier of the present application can be independently selected from any amplifier in the prior art. In a specific embodiment of the present application, the first amplifier and the second amplifier are both differential amplifiers, and the differential amplifier has two input terminals, namely a positive input terminal and a negative input terminal, the positive input terminal inputs a voltage signal to be amplified, and the negative input terminal inputs a reference voltage.

The common signal unit 43 of the present application can be composed of one common signal line 430, that is, it has only one common signal line. In the embodiment shown in FIG3 , all voltage signals stored in the memory are sequentially transmitted to the common signal line. Of course, the common signal unit 43 can be composed of multiple common signal lines 430. As shown in FIG6 , the amplification unit 60 includes multiple second amplifiers 600, and the second amplifiers 600 are electrically connected to the common signal lines 430 one by one. The number of the common signal lines 430 is the same as the number of the photosensitive units 10, and the common signal lines 430 are electrically connected to multiple signal-on switches 41 connected to one of the photosensitive units 10, that is, each common signal line is electrically connected to multiple signal-on switches 41 connected to only one photosensitive unit, so that the voltage signal on a common signal line is a plurality of voltage signals corresponding to the photosensitive unit, and each second amplifier amplifies the voltage signal corresponding to the photosensitive unit.

Of course, when the common signal part 43 can be composed of a plurality of common signal lines 430, the specific correspondence between the common signal lines and the photosensitive units is not limited to the above description, and the plurality of photosensitive units can also be divided into several groups, one group corresponding to one common signal line, that is, the voltage signal on a certain or each common signal line is a plurality of voltage signals corresponding to the plurality of photosensitive units, and of course, different common signal lines cannot correspond to the plurality of voltage signals of the same photosensitive unit. Those skilled in the art can set the number of common signal lines according to the actual situation, and input the plurality of voltage signals of the appropriate number of photosensitive units into the common signal line in sequence.

In order to further ensure the accuracy of the detection results, in one embodiment of the present application, as shown in Figures 3, 4 and 6, the image sensor chip further includes a second reset switch 50, which is electrically connected to the common signal unit 43, the second amplifier 600 and the control unit 20, respectively, and is used to reset the common signal unit 43 and the second amplifier 600, respectively. Specifically, after the control unit controls the sample and hold switch to be disconnected, it controls the second reset switch to be closed, resets the second amplifier and the common signal line, and then controls the second reset switch to be disconnected.

The photosensitive device of the present application can be any photosensitive device in the prior art, such as a photosensitive diode and a photosensitive triode. Those skilled in the art can select a suitable photosensitive device according to actual conditions.

In one embodiment of the present application, as shown in FIG4 , the photosensitive device 12 is a photodiode, which includes an N-type region, a P-type region, an input electrode and an output electrode, wherein the P-type region is in contact with the input electrode, and the input electrode is grounded, and the N-type region is in contact with the output electrode, and the output electrode is electrically connected to the storage unit. The photodiode has a simple structure and low cost.

In a specific embodiment, as shown in FIG. 1 , FIG. 2 and FIG. 5 , the image sensor chip further includes a substrate 01 , and at least the photosensitive unit 10 is located on the surface of the substrate 01 .

Of course, when the image sensor chip includes a control unit, a storage unit, a shift unit, and an amplification unit, these units are also arranged on the substrate, as shown in FIGS. 1 , 2 , and 5 .

In another typical embodiment of the present application, an image sensor device is provided. The image sensor device includes any one of the above-mentioned image sensor chips.

Since the image sensor device includes the image sensor chip, the image sensor device has a higher resolution and a more accurate image.

It should be noted that, in the present application, for the convenience of illustration, a first reset switch 11, a photosensitive device 12, a first amplifier 13, a sample and hold switch 31, a memory 32 and a signal-on switch 41 are shown as a whole in Figures 3 and 6 and are referred to as a working unit 70. The specific circuit structure diagram of the working unit is shown in Figure 4.

In order to enable those skilled in the art to more clearly understand the technical solution of the present application, the technical solution of the present application will be explained below in conjunction with specific embodiments.

Example 1

As shown in FIG. 2 , this embodiment realizes the function of 1200 DPI in the main scanning direction by using the size and interval of the photosensitive receiving area of the photosensitive diode used for ordinary 600 DPI.

As shown in Fig. 2, the image sensor chip includes a substrate 01, two photosensitive units 10, a control unit 20, a storage unit 30, a shift unit 40, a second reset switch 50 and an amplifying unit 60. The two photosensitive units 10, the control unit 20, the storage unit 30, the shift unit 40, the second reset switch 50 and the amplifying unit 60 are all arranged on the substrate 01, and the two photosensitive units 10 are arranged along the first direction.

Each photosensitive unit includes a plurality of photosensitive devices 12 arranged in sequence along the second direction, a plurality of first reset switches 11, and a plurality of first amplifiers 13. One end of the first reset switch 11 is electrically connected to the photosensitive devices 12 in a one-to-one correspondence, and the other end is connected to a reference voltage Vreset, which is an internally generated reference voltage. The first amplifier 13 is electrically connected to the photosensitive devices 12 in a one-to-one correspondence, and the photosensitive devices are photosensitive diodes, whose P-type regions are arranged in contact with input electrodes, and the input electrodes are grounded, and whose N-type regions are arranged in contact with output electrodes, and the output electrodes are electrically connected to the first reset switches and the first amplifiers, respectively.

Each photosensitive diode includes a photosensitive area, and the projection of each photosensitive area on the first plane is a square and is equal in size. The number of photosensitive receiving areas 100 of the first photosensitive unit and the second photosensitive unit is 432, each photosensitive receiving area 100 is 40 microns long and 40 microns wide, and the centers of adjacent photosensitive receiving areas in the main scanning direction (second direction) are spaced 42.3 microns apart. The center line of the photosensitive receiving area of the first photosensitive unit is 42.3 microns away from the center line of the photosensitive receiving area 100 of the second photosensitive unit, and the center of the first photosensitive receiving area of the second photosensitive unit is offset by 21.15 microns from the center of the first photosensitive receiving area of the first photosensitive unit in the second direction. The image sensor chip is 18.3 mm long and 500 microns wide.

The control unit 20 is a signal processing circuit, which is mainly provided with input pins SI and CLK for receiving external clock signals and start signals, and is responsible for the working timing of the entire image sensor chip.

The storage unit 30 includes multiple memories 32 and multiple sampling and holding switches 31. The sampling and holding switches 31 are electrically connected one by one between the photosensitive devices 12 and the memories 32. The sampling and holding switches 31 are also electrically connected to the control unit 20. The memories 32 are used to store the voltage signals obtained by the corresponding photosensitive devices 12.

The shift unit 40 includes a plurality of signal connection switches 41, a shift register 42 and a common signal unit 43. The signal connection switches 41 are electrically connected to the memory 32 in a one-to-one correspondence; the shift register 42 is electrically connected to the control unit 20 and each of the signal connection switches 41, and the shift register 42 is used to control the plurality of signal connection switches 41 to be closed in sequence; the common signal unit 43 includes a common signal line 430, and the common signal line 430 is electrically connected to each of the signal connection switches 41, and the shift register 42 is used to input the voltage signal stored in the memory 32 to the common signal unit 43 in sequence.

The amplification unit 60 includes a second amplifier 600, which is electrically connected to the common signal unit 43. The second amplifier 600 is used to sequentially amplify the voltage signal sequentially transmitted from the common signal unit 43. The second amplifier 600 is a differential amplifier circuit, having two input terminals and an output terminal, the two input terminals are respectively a positive input terminal and a negative input terminal, the positive input terminal is electrically connected to the common signal line, and the negative input terminal is electrically connected to the reference voltage VREF, and is used to amplify the difference between the voltage signal on the common signal line and the reference voltage VREF.

The second reset switch 50 is electrically connected to the common signal line 430, the second amplifier 600 and the control unit 20, respectively, and is used to reset the common signal unit 43 and the second amplifier 600, respectively, to a reference voltage VREF, where VREF is a reference voltage provided externally.

The image sensor chip works according to the following timing sequence. After the signal processing circuit detects the arrival of the start pulse signal SI, it closes all the first reset switches 11 to initialize the output voltage of the photodiode to Vreset. Then, it controls all the first reset switches 11 to be disconnected, and controls all the sample and hold switches 31 to be closed. At this time, the photodiode receives external light, accumulates charges, and the generated voltage is amplified by the first amplifier 13 of each pixel unit and stored in the storage capacitor serving as the memory 32.

Then, the signal processing circuit controls all the sample-hold switches 31 to be turned off, so that the voltage of the first amplifier at the moment when all the sample-hold switches 31 are turned off. After that, the signal processing circuit controls the second reset switch 50 to be turned on and then turned off, and the common signal line 430 and the second amplifier 600 are reset; the shift register 42 controls each signal connection switch 41 to be closed in sequence, and the voltage of the memory 32 is sequentially transmitted to the common signal line 430 for amplification.

The output timing is shown in Figure 7. The SIG port sequentially outputs the amplified voltage signal corresponding to the first photosensitive device of the first photosensitive unit, the amplified voltage signal corresponding to the first photosensitive device of the second photosensitive unit, the amplified voltage signal corresponding to the second photosensitive device of the first photosensitive unit, and the amplified voltage signal corresponding to the second photosensitive device of the second photosensitive unit, until the 864th voltage signal is output. In this way, with the size of the photosensitive receiving area at 600DPI, the output of 864 pixel voltages on a length of 18.3 mm is achieved. The voltage of 864 pixels is used as a line of data to achieve a resolution of 1200DPI. Since the size of the photosensitive receiving area of each photodiode is the size at 600DPI, the corresponding sensitivity remains unchanged while achieving 1200DPI in the main scanning direction.

Example 2

The structure of the image sensor chip in this embodiment is substantially the same as that in Embodiment 1, as shown in FIG6 . The difference between this embodiment and Embodiment 1 is that:

As shown in FIG6 , the common signal part is composed of two common signal lines 430, namely, a first common signal line 431 and a second common signal line 432. Each common signal line 430 corresponds to a photosensitive unit. The shift register 42 simultaneously controls the connection of the amplified electrical signals of the two photosensitive units with the corresponding common signal lines 430 in sequence. The amplification unit is composed of two second amplifiers 600, which amplify the voltages on the two common signal lines 430 respectively and are controlled by the shift register 42 to be outputted from the output pins SIG1 and SIG2 in parallel. The circuit block diagram is shown in FIG6 . After the signals of the first photosensitive unit are amplified by the first amplifier, the 432 voltage signals are sequentially inputted to the first common signal line 431, and the first common signal line 431 is connected to the positive input terminal of a second amplifier 600; after the signals of the second photosensitive unit are amplified by the first amplifier, the 432 voltage signals are sequentially inputted to the second common signal line 432, and the second common signal line 432 is connected to the positive input terminal of a second amplifier 600. The negative input terminals of the two second amplifiers 600 are connected to the reference voltage VREF. One end of the second reset switch 50 is respectively connected to the first common signal line 431 and the second common signal line 432 , and the other end is respectively connected to the negative input terminals of the two second amplifiers 600 .

The working process of the image sensor chip is as follows: the image sensor chip works according to the following timing sequence. After the signal processing circuit detects the arrival of the start pulse signal SI, it closes all the first reset switches 11 to initialize the output voltage of the photodiode to Vreset. Then, all the first reset switches 11 are controlled to be disconnected, and all the sample and hold switches 31 are controlled to be closed. At this time, the photodiode receives external light, accumulates charges, and the generated voltage is amplified by the first amplifier 13 of each pixel unit and stored in the storage capacitor as the memory 32.

Then, the signal processing circuit controls all the sample-hold switches 31 to be disconnected, so that the voltage of the first amplifier at the moment when all the sample-hold switches 31 are disconnected is reduced. After that, the signal processing circuit controls the second reset switch 50 to be turned on and then turned off, and the two common signal lines 430 and the two second amplifiers 600 are reset respectively; the shift register 42 simultaneously controls the signal connection switches 41 of the two photosensitive units to be closed in sequence, and the 432 voltage signals corresponding to the first photosensitive unit are sent to the first common signal line 431 in sequence, and amplified and output by a second amplifier 600, and the 432 voltage signals corresponding to the second photosensitive unit are sent to the second common signal line 432 in sequence, and amplified and output by another second amplifier 600. The output timing is shown in FIG8 , and the SIG1 port sequentially outputs the 432 voltage signals of the first photosensitive unit, and the SIG2 port sequentially outputs the 432 voltage signals of the second photosensitive unit. In this way, the resolution of 1200DPI in the main scanning direction can be achieved with the size of the photosensitive receiving area at a resolution of 600DPI. The corresponding sensitivity remains unchanged, and because two rows are output in parallel at the same time, the scanning time is also reduced under the same driving clock frequency conditions, which can be used in situations where fast reading is required.

When the resolution in the main scanning direction of the above two embodiments of the present application is doubled, the size of the photosensitive receiving area is still used at low resolution, and the signal-to-noise ratio and dark output are guaranteed to be consistent with low resolution without reducing the sensitivity. The solution of two rows of pixel units outputting simultaneously can also increase the scanning speed, which is suitable for high-speed scanning occasions.

From the above description, it can be seen that the above embodiments of the present application achieve the following technical effects:

1) Compared with the prior art, the image sensor chip of the present application has an additional photosensitive unit in the first direction, and the line connecting the centers of the photosensitive receiving areas of any two of the photosensitive devices in any two of the photosensitive units is not parallel to the first direction, so that the number of detection points is increased, thereby improving the resolution of the image sensor chip, and the area of the photosensitive receiving area of each photosensitive device in the image sensor chip is not reduced, further ensuring that the sensitivity does not decrease.

2) Since the image sensor device of the present application includes the above-mentioned image sensor chip, its resolution is higher and the image is more accurate.

The above description is only the preferred embodiment of the present application and is not intended to limit the present application. For those skilled in the art, the present application may have various modifications and variations. Any modification, equivalent replacement, improvement, etc. made within the spirit and principle of the present application shall be included in the protection scope of the present application.

Claims (14)

1. An image sensor chip, characterized in that the image sensor chip comprises a plurality of photosensitive units (10), the plurality of photosensitive units (10) are sequentially arranged along a first direction, each photosensitive unit (10) comprises a plurality of photosensitive devices (12) sequentially arranged along a second direction, the first direction is perpendicular to the second direction, the second direction is a main scanning direction of the image sensor chip, each photosensitive device (12) is provided with a photosensitive receiving area (100), any two photosensitive receiving areas (100) have the same area and have the same interval of width, an included angle theta is formed between a connecting line of centers of the photosensitive receiving areas (100) of any two photosensitive units (10) and the first direction, and the included angle theta is 0 degrees < theta <180 degrees;

The projection shapes of any two photosensitive receiving areas (100) on a first plane are the same, and the first plane is parallel to the first direction and the second direction respectively;

The maximum length of each photosensitive receiving area (100) in the second direction is L, the photosensitive devices (12) in any two adjacent photosensitive units (10) are in one-to-one correspondence, and the width of the space between the centers of the photosensitive receiving areas (100) of the two photosensitive devices (12) in one-to-one correspondence in the second direction is 1/3L-2/3L;

in each photosensitive unit (10), the interval between any two adjacent photosensitive receiving areas (100) is the same.

2. The image sensor chip according to claim 1, wherein the projection shape of the photosensitive receiving area (100) on the first plane is selected from any one of a circle, a square, a rectangle, an ellipse, and a triangle.

3. The image sensor chip according to claim 1, characterized in that a width of a pitch between centers of the photosensitive receiving areas (100) of two of the photosensitive devices (12) in one-to-one correspondence in the second direction is 1/2L.

4. The image sensor chip according to claim 1, characterized in that there are two of the photosensitive cells (10).

5. The image sensor chip of any one of claims 1 to 4, further comprising:

A control unit (20) for receiving an external clock signal and a start signal and for controlling the operation of the image sensor chip;

The storage unit (30) comprises a plurality of memories (32), each memory (32) is electrically connected with the control unit (20), the memories (32) are electrically connected with the photosensitive devices (12) in a one-to-one correspondence manner, and the memories (32) are used for storing voltage signals obtained by the corresponding photosensitive devices (12);

A shift unit (40) electrically connected to each of the memories (32) and the control unit (20), the shift unit (40) being configured to sequentially output the voltage signals stored in the memories (32);

And an amplifying unit (60) electrically connected to the shifting unit (40) and the control unit (20), wherein the amplifying unit (60) is configured to amplify the voltage signals sequentially output from the shifting unit (40).

6. The image sensor chip of claim 5, wherein each of the photosensitive cells (10) further comprises:

the first reset switches (11) are electrically connected with the photosensitive devices (12) in a one-to-one correspondence manner and are used for resetting the output voltage of the corresponding photosensitive devices (12);

the first amplifiers (13) are electrically connected with the photosensitive devices (12) in a one-to-one correspondence manner, the output ends of the photosensitive devices (12) are respectively electrically connected with the first reset switches (11) and the first amplifiers, and the first amplifiers are used for amplifying the output voltages of the corresponding photosensitive devices (12).

7. The image sensor chip according to claim 6, wherein the memory unit (30) further comprises a plurality of sample-and-hold switches (31), the sample-and-hold switches (31) are electrically connected between the first amplifier (13) and the memory (32) in a one-to-one correspondence, and the memory (32) is electrically connected with the control unit (20) through the sample-and-hold switches (31).

8. The image sensor chip according to claim 5, wherein the shift unit (40) comprises:

A plurality of signal-on switches (41), the signal-on switches (41) being electrically connected in one-to-one correspondence with the memories (32);

A shift register (42) electrically connected to the control unit (20) and each of the signal-on switches (41), the shift register (42) being configured to control a plurality of the signal-on switches (41) to be sequentially closed;

and a common signal section (43) electrically connected to each of the signal-on switches (41), wherein the shift register (42) is configured to sequentially input the voltage signals stored in the memory (32) to the common signal section (43).

9. The image sensor chip according to claim 8, wherein the amplifying unit (60) includes a second amplifier (600), the second amplifier (600) being electrically connected to the common signal section (43), the second amplifier (600) being configured to sequentially amplify the voltage signals sequentially transmitted from the common signal section (43).

10. The image sensor chip according to claim 9, wherein the common signal section (43) is composed of one common signal line (430) or a plurality of common signal lines (430), the amplifying unit (60) includes a plurality of the second amplifiers (600) when the common signal section (43) is composed of a plurality of the common signal lines (430), and the second amplifiers (600) are electrically connected to the common signal lines (430) in one-to-one correspondence, the number of the common signal lines (430) is the same as the number of the photosensitive units (10), and the common signal lines (430) are electrically connected to a plurality of signal on switches (41) connected to one of the photosensitive units (10), respectively.

11. The image sensor chip according to claim 9, further comprising a second reset switch (50), the second reset switch (50) being electrically connected to the common signal section (43), the second amplifier (600) and the control unit (20), respectively, the second reset switch (50) being configured to reset the common signal section (43) and the second amplifier (600), respectively.

12. The image sensor chip of claim 5, wherein the photosensitive device (12) is a photodiode, the photodiode includes an N-type region, a P-type region, an input electrode, and an output electrode, the P-type region is disposed in contact with the input electrode and the input electrode is grounded, the N-type region is disposed in contact with the output electrode, and the output electrode is electrically connected to the memory cell.

13. The image sensor chip according to claim 1, further comprising a substrate (01), at least the photosensitive unit (10) being located on a surface of the substrate (01).

14. An image sensor device comprising an image sensing chip, characterized in that the image sensing chip comprises an image sensing chip as claimed in any one of claims 1 to 13.