CN109273597B - A kind of SrO-based resistive memory and preparation method thereof - Google Patents
A kind of SrO-based resistive memory and preparation method thereof Download PDFInfo
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- 238000002360 preparation method Methods 0.000 title claims abstract description 8
- IATRAKWUXMZMIY-UHFFFAOYSA-N strontium oxide Chemical compound [O-2].[Sr+2] IATRAKWUXMZMIY-UHFFFAOYSA-N 0.000 claims abstract description 50
- 229910052751 metal Inorganic materials 0.000 claims abstract description 9
- 239000002184 metal Substances 0.000 claims abstract description 9
- 239000010410 layer Substances 0.000 claims description 20
- 238000000151 deposition Methods 0.000 claims description 16
- 230000008021 deposition Effects 0.000 claims description 10
- 238000000034 method Methods 0.000 claims description 10
- 230000008569 process Effects 0.000 claims description 9
- 229910000597 tin-copper alloy Inorganic materials 0.000 claims description 8
- 239000000758 substrate Substances 0.000 claims description 7
- CSCPPACGZOOCGX-UHFFFAOYSA-N Acetone Chemical compound CC(C)=O CSCPPACGZOOCGX-UHFFFAOYSA-N 0.000 claims description 6
- 239000011241 protective layer Substances 0.000 claims description 6
- 229910020888 Sn-Cu Inorganic materials 0.000 claims description 5
- 229910019204 Sn—Cu Inorganic materials 0.000 claims description 5
- 229910045601 alloy Inorganic materials 0.000 claims description 5
- 239000000956 alloy Substances 0.000 claims description 5
- 238000001755 magnetron sputter deposition Methods 0.000 claims description 5
- 238000001704 evaporation Methods 0.000 claims description 4
- LFQSCWFLJHTTHZ-UHFFFAOYSA-N Ethanol Chemical compound CCO LFQSCWFLJHTTHZ-UHFFFAOYSA-N 0.000 claims description 3
- 239000010949 copper Substances 0.000 claims description 3
- 239000008367 deionised water Substances 0.000 claims description 3
- 229910021641 deionized water Inorganic materials 0.000 claims description 3
- 238000007738 vacuum evaporation Methods 0.000 claims description 3
- XLYOFNOQVPJJNP-UHFFFAOYSA-N water Chemical compound O XLYOFNOQVPJJNP-UHFFFAOYSA-N 0.000 claims description 3
- 238000003860 storage Methods 0.000 abstract description 16
- 239000000463 material Substances 0.000 abstract description 10
- BASFCYQUMIYNBI-UHFFFAOYSA-N platinum Chemical group [Pt] BASFCYQUMIYNBI-UHFFFAOYSA-N 0.000 description 19
- 239000010408 film Substances 0.000 description 15
- 230000008859 change Effects 0.000 description 8
- 238000012360 testing method Methods 0.000 description 3
- CURLTUGMZLYLDI-UHFFFAOYSA-N Carbon dioxide Chemical compound O=C=O CURLTUGMZLYLDI-UHFFFAOYSA-N 0.000 description 2
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 description 2
- 239000002131 composite material Substances 0.000 description 2
- 230000007547 defect Effects 0.000 description 2
- 238000005516 engineering process Methods 0.000 description 2
- 230000005284 excitation Effects 0.000 description 2
- 238000011160 research Methods 0.000 description 2
- 239000004065 semiconductor Substances 0.000 description 2
- 239000010409 thin film Substances 0.000 description 2
- 238000001771 vacuum deposition Methods 0.000 description 2
- RTAQQCXQSZGOHL-UHFFFAOYSA-N Titanium Chemical compound [Ti] RTAQQCXQSZGOHL-UHFFFAOYSA-N 0.000 description 1
- 230000009471 action Effects 0.000 description 1
- 230000009286 beneficial effect Effects 0.000 description 1
- 229910002092 carbon dioxide Inorganic materials 0.000 description 1
- 239000001569 carbon dioxide Substances 0.000 description 1
- 230000000295 complement effect Effects 0.000 description 1
- 229910052802 copper Inorganic materials 0.000 description 1
- 238000011161 development Methods 0.000 description 1
- 238000010586 diagram Methods 0.000 description 1
- 239000003989 dielectric material Substances 0.000 description 1
- 238000009826 distribution Methods 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 230000005684 electric field Effects 0.000 description 1
- 239000007772 electrode material Substances 0.000 description 1
- BDAGIHXWWSANSR-NJFSPNSNSA-N hydroxyformaldehyde Chemical compound O[14CH]=O BDAGIHXWWSANSR-NJFSPNSNSA-N 0.000 description 1
- 229910010272 inorganic material Inorganic materials 0.000 description 1
- 239000011147 inorganic material Substances 0.000 description 1
- 230000006386 memory function Effects 0.000 description 1
- 230000007334 memory performance Effects 0.000 description 1
- 229910044991 metal oxide Inorganic materials 0.000 description 1
- 150000004706 metal oxides Chemical class 0.000 description 1
- 150000004767 nitrides Chemical class 0.000 description 1
- 238000011056 performance test Methods 0.000 description 1
- 229910052697 platinum Inorganic materials 0.000 description 1
- 229910052710 silicon Inorganic materials 0.000 description 1
- 239000010703 silicon Substances 0.000 description 1
- 235000012239 silicon dioxide Nutrition 0.000 description 1
- 239000000377 silicon dioxide Substances 0.000 description 1
- 239000002356 single layer Substances 0.000 description 1
- 238000005549 size reduction Methods 0.000 description 1
- 239000007784 solid electrolyte Substances 0.000 description 1
- 238000004544 sputter deposition Methods 0.000 description 1
- 229910000018 strontium carbonate Inorganic materials 0.000 description 1
- UUCCCPNEFXQJEL-UHFFFAOYSA-L strontium dihydroxide Chemical compound [OH-].[OH-].[Sr+2] UUCCCPNEFXQJEL-UHFFFAOYSA-L 0.000 description 1
- 229910001866 strontium hydroxide Inorganic materials 0.000 description 1
- 239000010936 titanium Substances 0.000 description 1
- GWEVSGVZZGPLCZ-UHFFFAOYSA-N titanium dioxide Inorganic materials O=[Ti]=O GWEVSGVZZGPLCZ-UHFFFAOYSA-N 0.000 description 1
- 239000004408 titanium dioxide Substances 0.000 description 1
- 230000007704 transition Effects 0.000 description 1
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10N—ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10N70/00—Solid-state devices having no potential barriers, and specially adapted for rectifying, amplifying, oscillating or switching
- H10N70/801—Constructional details of multistable switching devices
- H10N70/881—Switching materials
- H10N70/883—Oxides or nitrides
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10N—ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10N70/00—Solid-state devices having no potential barriers, and specially adapted for rectifying, amplifying, oscillating or switching
- H10N70/011—Manufacture or treatment of multistable switching devices
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10N—ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10N70/00—Solid-state devices having no potential barriers, and specially adapted for rectifying, amplifying, oscillating or switching
- H10N70/20—Multistable switching devices, e.g. memristors
- H10N70/24—Multistable switching devices, e.g. memristors based on migration or redistribution of ionic species, e.g. anions, vacancies
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- Engineering & Computer Science (AREA)
- Manufacturing & Machinery (AREA)
- Semiconductor Memories (AREA)
Abstract
本发明涉及一种阻变存储器及其制备方法，属于信息存储器件技术领域。该阻变存储器金属‑绝缘体‑金属(MIM)三明治结构，该MIM结构的顶电极与底电极分别为金属电极，金属电极之间的阻变介质为非晶氧化锶薄膜。本发明采用氧化锶薄膜作为阻变材料，可制备出低功耗、高存储窗口和稳定性较好的阻变存储器，从而具有多值存储和高密度存储的潜力。
The invention relates to a resistive memory and a preparation method thereof, belonging to the technical field of information storage devices. In the metal-insulator-metal (MIM) sandwich structure of the resistive memory, the top electrode and the bottom electrode of the MIM structure are respectively metal electrodes, and the resistive medium between the metal electrodes is an amorphous strontium oxide film. The invention adopts the strontium oxide film as the resistive variable material, and can prepare the resistive variable memory with low power consumption, high storage window and good stability, thereby having the potential of multi-value storage and high-density storage.
Description
Technical Field
The invention belongs to the technical field of information storage devices, particularly relates to development and research work of important components of a novel non-volatile information storage device, and more particularly relates to a resistive random access memory based on SrO and a preparation method thereof.
Background
Memory (Memory) is a Memory device used in modern information technology to store various data and programs, and generally employs two stable state Memory cells to implement the Memory function. The array composed of a large number of memory cells is taken as a core, and necessary address decoding and read-write control circuits are added to form a memory integrated circuit; the memory chip is formed by adding necessary I/O interface and some auxiliary circuits. At present, the non-volatile memory in the market is mainly a Flash memory (Flash), but the Flash memory itself still faces many defects and difficulties, such as too slow erasing speed, too high erasing voltage, and the like. The biggest bottleneck of flash memory is at the limit of size reduction, which directly results in the storage density of flash memory approaching its physical limit. Resistive Random Access Memory (RRAM) stores data by using a certain thin film material to exhibit two or more different resistance states under the action of an external electric field. The resistive random access memory has the advantages of simple structure, high storage density, convenience in realizing 3D (three-dimensional) stacking, good contractibility performance, low power consumption, high erasing and writing speed repeatability, compatibility with the traditional CMOS (complementary metal oxide semiconductor) and the like. Therefore, a new generation of memory technology represented by the resistive random access memory has become a research hotspot which is concerned by the academic and industrial fields.
The basic structure of the resistive random access memory comprises two layers of electrode materials with good conductivity and a layer of semiconductor or insulating storage medium material in the middle. The dielectric layer material is a carrier of the resistive random access memory for generating the resistive random access memory, and has the most direct and key influence on the performance of the resistive random access memory. At present, a great number of dielectric layer materials are reported for the resistive random access memory, wherein the inorganic dielectric materials include the following types: binary oxides, ternary and multicomponent oxides, chalcogenic solid electrolytes, nitrides and other inorganic materials. The storage medium material of the binary oxide shows the best storage performance in all medium materials. New dielectric layer materials and new structures are being sought worldwide to improve the memory performance of RRAMs.
Disclosure of Invention
Technical problem to be solved
In order to avoid the defects of the prior art, the invention provides a novel SrO-based resistive random access memory with the advantages of more stable performance, lower power consumption, higher memory window ratio and the like, and provides a tin-copper alloy/strontium oxide film/platinum structure and a preparation method thereof.
Technical scheme
A resistive random access memory based on SrO is characterized in that an MIM structure is adopted, a top electrode and a bottom electrode of the MIM structure are respectively metal electrodes, and an intermediate dielectric layer is an amorphous strontium oxide film; wherein the top electrode is Sn-Cu alloy with a thickness of 200-500 nm; the bottom electrode is Pt, and the thickness of the Pt is 100-200 nm; the thickness of the strontium oxide amorphous film is 20-60 nm.
And a protective layer is arranged between the middle medium layer and the top electrode, is made of metal Pt and has the thickness of 10-50 nm.
The Sn-Cu alloy comprises 99.7% of Sn and 0.3% of Cu.
A preparation method of a resistive random access memory based on SrO is characterized by comprising the following steps:
step 1: depositing a SrO film on a Pt substrate which is sequentially pretreated by deionized water, alcohol and acetone, wherein the thickness of the SrO film is 20-60 nm; the deposition adopts JGP560C type ultrahigh vacuum multifunctional magnetron sputtering equipment, and the deposition vacuum degree is less than 1 multiplied by 10-4Pa, deposition rate between 2nm/min and 10 nm/min;
step 2: under vacuum degree of less than 1 × 10-4Under the condition of Pa, depositing a Pt layer as a protective layer on the prepared SrO film, wherein the thickness is between 10nm and 50 nm;
and step 3: and evaporating a tin-copper alloy electrode by using a vacuum evaporation device, wherein the thickness of the tin-copper alloy electrode is between 200nm and 500nm, and obtaining a pattern of the required electrode through a mask plate with a hole diameter of 0.3mm in the process of preparing the electrode.
Advantageous effects
Compared with the prior art, the invention has the advantages that: according to the invention, the strontium oxide is used as the resistance change material of the resistance change memory, so that the memory with good resistance change performance can be prepared. The SrO-based resistive random access memory has the advantages of small erasing voltage, good stability and extremely large storage window, improves the storage density and provides possibility for multi-value storage of a nonvolatile low-power-consumption memory.
Drawings
Fig. 1 is a process flow diagram of a resistive random access memory according to an embodiment of the invention; (a) depositing a SrO film on a Pt substrate; (b) depositing a Pt layer on the SrO film; (c) evaporating a tin-copper alloy electrode;
1-Pt substrate, 2-SrO film, 3-Pt layer and 4-tin-copper alloy electrode;
fig. 2 shows the result of the resistance change characteristic test of the SrO-based resistance change memory of the present invention: the a-device jumps from a high resistance state to a low resistance state under the excitation of forward bias; b-a process of maintaining a low resistance state; c, the jump process of the device from a low resistance state to a high resistance state under the excitation of negative bias; d-a process of maintaining a high resistance state;
fig. 3 is a test result of cycle characteristics of the SrO-based resistance change memory according to the present invention.
Detailed Description
The invention will now be further described with reference to the following examples and drawings:
the strontium oxide-based resistive random access memory is of a metal-insulator-metal (MIM) structure, a top electrode and a bottom electrode of the MIM structure are metal electrodes respectively, and a middle dielectric layer of the structure is an amorphous strontium oxide film. Wherein the top electrode is Sn-Cu alloy (Sn/99.7%, Cu/0.3%) with a thickness between 200nm and 500 nm. The bottom electrode is commercially available platinum/titanium/silicon dioxide/silicon (Pt/Ti/SiO)2/Si) composite substrate, the thickness of Pt is between 100nm and 200 nm.
A preparation method of an SrO-based resistive random access memory comprises the following steps:
step 1: growing a SrO insulating layer on Pt of the composite substrate;
step 2: sputtering a Pt layer as a protective layer;
and step 3: obtaining a top electrode with a certain pattern;
the step 1 specifically comprises the following steps: the SrO film is deposited by a magnetron sputtering method, vacuum deposition is carried out, and the deposition vacuum degree is less than 1 multiplied by 10-4Pa, the deposition speed is 2nm/min-10 nm/min. Step 2 after the step 1 is to sputter a Pt layer on the SrO film by magnetron sputtering, which aims to prevent the strontium oxide film from absorbing moisture and carbon dioxide in the air to become strontium hydroxide (Sr (OH)2) And strontium carbonate (SrCO)3). And 3, specifically, covering a mask plate with a hole with the diameter of 0.3mm on the primary finished product obtained in the step 2, and obtaining the electrode with a certain pattern by adopting a vacuum evaporation method.
The process of the SrO-based resistive random access memory prepared by the invention is shown in figure 1,
1) a SrO thin film 2 is deposited on a Pt substrate 1 (as a bottom electrode) pretreated with deionized water, alcohol, and acetone in sequence to a thickness of 20nm to 60nm, as shown in fig. 1 (a). JGP560C type ultrahigh vacuum multifunctional magnetron sputtering equipment is adopted for deposition, the standard parameters of the equipment are selected for the process, the thickness of the film is about 20-60nm, and the deposition rate is between 2nm/min and 10 nm/min;
2) under vacuum degree of less than 1 × 10-4In the case of Pa, depositing a Pt layer 3 as a protective layer on the prepared SrO film 2, wherein the thickness is between 10nm and 50nm, as shown in figure 1 (b);
3) and evaporating the tin-copper alloy electrode 4 by using a vacuum evaporation device, wherein the thickness is between 200nm and 500 nm. In the process of preparing the electrode, a required electrode pattern is obtained through a mask plate with a hole diameter of 0.3mm, as shown in fig. 1 (c);
the invention uses SrO as the material of the resistive layer, and has the advantages of obtaining the resistive random access memory with ultrahigh memory window and low threshold voltage. The multi-value storage possibility of the single-layer memory is realized, and high-density storage is hopeful to be realized.
The resistance change performance test of the resistance change memory prepared in this embodiment is shown in fig. 2 and 3.
As can be seen from fig. 2, as the applied bias voltage of the top electrode changes (the bottom electrode is always grounded), the resistive layer between the top electrode and the bottom electrode can be inverted between high level and low level, i.e. the transition between the stored logic states "0" and "1" occurs. In addition, the threshold voltage of the device is smaller, which is beneficial to reducing power consumption.
As can be seen from fig. 3, under the condition of reading with the small voltage of 0.02V applied, the resistance value of the high-resistance state and the low-resistance state of the device does not fluctuate greatly during the 100-cycle test, which indicates that the memory has good uniformity of resistance distribution and good endurance. Meanwhile, the resistive random access memory device shows an ultra-high memory window (up to 10)9)。
Claims (3)
1. A resistive random access memory based on SrO is characterized in that an MIM structure is adopted, a top electrode and a bottom electrode of the MIM structure are respectively metal electrodes, and an intermediate dielectric layer is an amorphous strontium oxide film; wherein the top electrode is Sn-Cu alloy with a thickness of 200-500 nm; the bottom electrode is Pt, and the thickness of the Pt is 100-200 nm; the thickness of the amorphous strontium oxide film is 20-60 nm;
and a protective layer is arranged between the middle dielectric layer and the top electrode, is made of metal Pt and has a thickness of 10-50 nm.
2. The SrO-based resistive random access memory according to claim 1, wherein the Sn-Cu alloy comprises 99.7% of Sn and 0.3% of Cu.
3. The preparation method of the SrO-based resistive random access memory according to any one of claims 1-2, which is characterized by comprising the following steps:
step 1: depositing a SrO film (2) on a Pt substrate (1) which is pretreated by deionized water, alcohol and acetone in sequence, wherein the thickness of the SrO film is 20nm-60 nm; JGP560C type ultrahigh vacuum multifunctional magnetron sputtering equipment is adopted for deposition, the deposition vacuum degree is less than 1 multiplied by 10 < -4 > Pa, and the deposition rate is between 2nm/min and 10 nm/min;
step 2: under the condition that the vacuum degree is less than 1 multiplied by 10 < -4 > Pa, a Pt layer (3) is deposited on the prepared SrO film (2) to be used as a protective layer, and the thickness is 10nm-50 nm;
and step 3: and (3) evaporating a tin-copper alloy electrode (4) by using a vacuum evaporation device, wherein the thickness of the tin-copper alloy electrode is between 200nm and 500nm, and in the process of preparing the electrode, a required electrode pattern is obtained through a mask plate with a hole diameter of 0.3 mm.
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| US8853713B2 (en) * | 2012-05-07 | 2014-10-07 | Micron Technology, Inc. | Resistive memory having confined filament formation |
| US9231205B2 (en) * | 2013-03-13 | 2016-01-05 | Taiwan Semiconductor Manufacturing Company, Ltd. | Low form voltage resistive random access memory (RRAM) |
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