CN110752293A - Bidirectional threshold switch selection device and preparation method thereof - Google Patents

Abstract

The invention provides a bidirectional threshold switch selection device and a preparation method thereof, belonging to the technical field of semiconductor and CMOS hybrid integrated circuits. The invention utilizes the film superposition effect of the barrier layer thin film and the threshold switching characteristics, and can realize the optimization of the current-voltage characteristics of the selection tube device, so that the device exhibits the characteristics of symmetrical bidirectional threshold switching selection. The invention is based on adopting the traditional CMOS technology to realize the bidirectional threshold switch selection tube device, so as to reduce or even eliminate the crosstalk problem existing in the crossbar structure of the resistive memory.

Description

A bidirectional threshold switch selection device and preparation method thereof

technical field

The invention belongs to the technical field of semiconductor and CMOS hybrid integrated circuits, and in particular relates to a bidirectional threshold switch selection device and a preparation method thereof.

Background technique

With the development of integrated circuits, the device size is getting smaller and smaller, and the integration density is getting higher and higher. At the same time, with the development of the mobile Internet, the requirements for device power consumption of mobile devices are getting higher and higher. For non-volatile memory, the size reduction and integration density of flash memory (flash), which currently occupy a major market share, are about to reach their limit, and the operating voltage is high, which is difficult to meet the development of the mobile Internet in the future.

In the research of many emerging flash memory substitutes, resistive memory (RRAM) has become a favorable competitor of next-generation memory due to its high integration, low read and write power consumption, and fast read and write speed. . A resistive memory generally has two states, a high resistance state ("0" state) and a low resistance state ("1" state). In actual operation, the transition between the two states can be achieved by applying different external voltage excitations. At the same time, due to its non-volatile characteristics, the resistance value of the resistive memory will not change after the voltage excitation is withdrawn. The structure of the resistive memory is very simple, similar to the capacitor structure, it is a sandwich structure of metal-resistive switching layer-metal. This structure is very simple, and the feature size area can theoretically be reduced to 4F ² , which is very suitable for the memory array integration of the Crossbar structure. In addition, the integration density of resistive memory can be further improved by forming 3D Crossbar or 3D vertical integration similar to traditional flash memory by stacking the Crossbar structure in multiple layers.

However, for the resistive memory in the memory array, the leakage current in the array needs to be considered in the design. In a memory array, when one memory device is selected through a word line and a bit line, other half-selected memory devices may provide some leakage current due to voltage application. The worst case is when a high-resistance device is selected and surrounded by low-resistance devices, the surrounding high leakage current will overwrite the low current that should only come from the high-resistance device, causing read error. Due to the existence of leakage current, it will not only cause errors in reading, but also increase power consumption, which is not conducive to the large-scale integration of resistive memory.

In order to solve the problem of leakage current in the integration of resistive memory arrays, there are usually two solutions when integrating resistive memory: 1T1R (One-Transistor One-RRAM) structural unit and 1S1R (One-Selector One- RRAM) structural unit. The common design idea of the two structures is that when one resistive memory is selected, the other resistive memory is turned off, so that the resistance value of the other resistive memory is infinite (ideal case), so as to weaken this interference. The 1T1R structure realizes the control of each unit by connecting a transistor in series with the resistive memory. This method can solve the problem of leakage current, but the area of each cell will increase due to the introduction of transistors, which weakens the integration advantage of the resistive memory itself. There are challenges in the application of traditional diode devices or unidirectional rectifier devices in current mainstream bipolar resistive memory arrays. The other is the 1S1R structure, in which the selector as a selection device has switching characteristics under different voltage excitations, and it is also a sandwich structure, and the area is almost the same as that of the resistive memory. Compared with the introduction of traditional diodes in 1T1R, the 1S1R unit area is smaller, which is conducive to the formation of higher density integration.

SUMMARY OF THE INVENTION

In view of the above deficiencies, the present invention proposes a bidirectional threshold switch selection device and a preparation method thereof, which are realized by using a traditional CMOS process, in order to reduce or even eliminate the crosstalk problem existing in the crossbar structure of the resistive memory.

In order to solve the above-mentioned technical problems, the technical scheme adopted in the present invention is as follows:

A bidirectional threshold switch selection device includes a substrate and a bottom electrode-potential barrier layer film-threshold switch layer film-top electrode structure on the substrate. The bottom electrode-potential layer-threshold switching layer-top electrode structure is a metal-insulator-insulator-metal (Metal-Insulator-Insulator-Metal) capacitor structure or a metal-semiconductor-semiconductor-metal (Metal-Semiconductor-Semiconductor- Metal) capacitor structure. The invention utilizes that the barrier layer film is an insulator under low voltage, so that the threshold switch layer film cannot be turned on at low voltage, and the selected device is in an off state; the barrier layer film has the characteristics of generating a large tunneling current under high voltage, and at the same time With a larger current at a larger voltage, the threshold switching thin film layer can undergo a phase change and become a conductor due to its metal-insulator transition characteristics, thereby further increasing the on-state current and making the device in the on-state.

The substrate adopts silicon;

The bottom electrode and the top electrode are made of metal materials, and the thickness is 50nm-200nm;

Further, the metal material is Ti, Al, Au, W, Cu, Ta, Pt, Ir or TiN, TaN;

The barrier layer film is made of oxide material with a thickness of 1 nm-100 nm; or an organic material with a thickness of 200 nm-500 nm.

Further, the oxide material is TaO _x , HfO _x , SiO _x , Al ₂ O ₃ or TiO ₂ .

Further, the organic material is parylene;

The thin film material of the threshold switching layer is VO ₂ , NbO ₂ , GeTe, SiTe or ZnTe, and the thickness is 1 nm-100 nm.

A preparation method of a bottom electrode-potential barrier layer film-threshold switching layer film-top electrode structure, comprising the following steps:

1) Define the bottom electrode pattern, and prepare the bottom electrode on the substrate according to the pattern;

2) using PVD (Physical Vapor Deposition), ALD (Atomic Layer Deposition) or CVD (Chemical Vapor Deposition) method to deposit a barrier layer film on the bottom electrode;

3) depositing the threshold switch layer film on the barrier layer film by PVD or ALD method;

4) Define the bottom electrode lead-out hole pattern, and etch the bottom electrode lead-out hole in the barrier layer film and the threshold switch layer film according to the pattern;

5) Define the top electrode pattern, and prepare the top electrode according to the pattern.

The method for defining the pattern in the steps 1), 4) and 5) is to define the pattern on the photoresist by using the photolithography technology.

Further, the preparation methods of the bottom electrode and the top electrode include PVD and evaporation deposition methods.

The invention provides a bidirectional threshold switch selection device and a preparation method thereof. The barrier layer film and the threshold switch layer film are stacked to form a double-layer structure, so that the current-voltage characteristics of the selection tube device can be optimized, so that the device can exhibit Characterize the selection of symmetrical bidirectional threshold switches. Whether the crossbar array composed of it is to read low-resistance state or high-resistance state, due to the existence of the bidirectional threshold switch selection feature, the resistance value on the original leakage current path is much larger than the resistance value to be read, so it can effectively Leakage current is suppressed to avoid misreading. This device paves the way for the realization of resistive memory area reduction and large-scale integration.

Description of drawings

1-5 are schematic diagrams of the preparation steps of the bidirectional threshold switch selection device of the present invention;

Figure 6 is a legend illustration of Figures 1-5;

FIG. 7 is a schematic diagram of the bidirectional threshold switching characteristics of the device.

Detailed ways

This embodiment provides a bidirectional threshold switch selection device and a preparation method thereof. The device adopts a silicon substrate, W is used as a bottom electrode material, and HfO ₂ (or its non-stoichiometric oxide) is used as a barrier layer film material. , using NbO2 as the threshold switching layer thin film material, using TiN as the top electrode material.

Both HfO ₂ and NbO 2 are materials compatible with standard CMOS processes. HfO ₂ is a commonly used high-K dielectric material in CMOS technology. The resistive memory used to prepare gate dielectric has ultra-fast switching speed, high switching ratio, and good retention characteristics. As a common thin film with selective properties, NbO2 is easy to prepare and very controllable. The combination of the advantages of the two materials not only meets the requirements of compatible CMOS technology, but also realizes the characteristics of bidirectional selection, which is of great significance for the improvement of the integration density and mass production of the crossbar structure array of the resistive memory.

The preparation method of the bidirectional threshold switch selection device is as follows:

1) Using photolithography technology to define the bottom electrode pattern on the photoresist, using the PVD method to deposit W bottom electrode material on the silicon substrate with a thickness of 70nm, and then removing the photoresist, as shown in Figure 1;

2) A layer of HfO ₂ barrier layer film material is deposited on the bottom electrode by the ALD method, with a thickness of 6 nm, as shown in Figure 2;

3) A layer of NbO2 bidirectional threshold switch selection material is deposited on the barrier layer by ALD method to realize bidirectional threshold switch, and the thickness is 30nm, as shown in Figure 3;

4) First use the photolithography technology to define the bottom electrode lead-out hole pattern on the photoresist, and then use the dry etching method to etch the bottom electrode lead-out hole in the barrier layer and the threshold switch layer, and remove the photoresist ,As shown in Figure 4;

5) Using photolithography technology to define the top electrode pattern on the photoresist, using the PVD method to deposit TiN top electrode material on the energy band modification layer with a thickness of 100nm, and then removing the photoresist to obtain the bidirectional threshold switch selection device, As shown in Figure 5.

It can be seen from the above examples that, for the preparation of transition metal oxide barrier layer thin film materials and threshold switching characteristic materials, either the PVD method or the ALD method can be used. Compared with the PVD method, the ALD method can prepare thinner materials; The CVD method is used as the barrier layer.

As shown in Figure 7, by integrating the threshold switch film layer and the barrier film layer, the barrier layer film is used as an insulator at low voltage, so that the threshold switch layer film cannot be turned on at low voltage, and the device is selected to be in the off state; The barrier layer film has the characteristics of large tunneling current under high voltage, and at the same time has a large current under large voltage, the threshold switching film layer can change into a conductor due to its metal-insulator transition characteristics, thereby further increasing The on-state current keeps the device in the on-state. By properly designing the voltage and current matching of the barrier layer thin film and the threshold switching layer thin film, a large bidirectional selection ratio and a suitable driving current can be achieved.

The above embodiments are only used to illustrate the technical solutions of the present invention rather than limit them. Those of ordinary skill in the art can modify or equivalently replace the technical solutions of the present invention without departing from the spirit and scope of the present invention. The scope of protection shall be subject to what is stated in the claims.

Claims (10)

1. A bidirectional threshold switch selection device is characterized by comprising a substrate and a bottom electrode positioned on the substrate, wherein a barrier layer film is arranged on the bottom electrode, a threshold switch layer film with threshold switch characteristics is arranged on the barrier layer film, a top electrode is arranged on the threshold switch layer film, the barrier layer film is an insulator under low voltage, the threshold switch layer film cannot be started under low voltage, and the bidirectional threshold switch selection device is in an off state; the barrier layer film generates tunneling current characteristics under high voltage, the threshold switch film layer is subjected to phase change and is changed into a conductor, and on-state current is increased, so that the bidirectional threshold switch selection device is in an on state.

2. The ovonic threshold switch selection device of claim 1 wherein the substrate is silicon.

3. The ovonic threshold switch select device of claim 1, wherein the bottom electrode is a metallic material having a thickness of 50nm to 200 nm.

4. The ovonic threshold switch select device of claim 1, wherein the top electrode is a metallic material having a thickness of 50nm to 200 nm.

5. The ovonic threshold switch select device of claim 1 wherein the barrier layer film is a parylene organic material having a thickness of 200nm to 500 nm.

6. The ovonic threshold switch select device of claim 1, wherein the barrier layer film is TaO_x、HfO_x、SiO_x、Al₂O₃Or TiO₂The thickness is 1nm-100 nm.

7. The ovonic threshold switch select device of claim 1 wherein the threshold switching layer film is VO₂、NbO₂GeTe, SiTe or ZnTe, the thickness is 1nm-100 nm.

8. The ovonic threshold switch selection device according to claim 3 or 4, wherein said metallic material is Ti, Al, Au, W, Cu, Ta, Pt, Ir, TiN or TaN.

9. A method of making the bidirectional threshold switch selection transistor of claim 1, comprising the steps of:

1) defining a bottom electrode pattern, and preparing a bottom electrode on a substrate according to the pattern;

2) depositing a barrier layer film on the bottom electrode by adopting a PVD, ALD or CVD method;

3) depositing a threshold switch layer film on the barrier layer film by adopting a PVD or ALD method;

4) defining a bottom electrode lead-out hole pattern, and etching a bottom electrode lead-out hole on the barrier layer film and the threshold switch layer film according to the pattern;

5) and defining a top electrode pattern, and preparing the top electrode on the modification layer according to the pattern.

10. The method of claim 9, wherein the bottom and top electrodes are formed by PVD and vapor deposition.

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