CN105870321A - Nonlinear self-rectifying resistive random access memory and preparation method therefor - Google Patents

Abstract

The invention provides a nonlinear self-rectifying resistive random access memory. The nonlinear self-rectifying resistive random access memory comprises a substrate and a bottom electrode- resistive random layer-energy band modifying layer-top electrode structure arranged on the substrate. The invention also provides a preparation method for the nonlinear self-rectifying resistive random access memory; the preparation method comprises the following steps of 1) defining a bottom electrode pattern, and preparing the bottom electrode on the substrate according to the pattern; 2) depositing the resistive random layer on the bottom electrode by adopting a PVD method, an ALD method or a CVD method; 3) depositing the energy band modifying layer on the resistive random layer by adopting the PVD method or the ALD method; 4) defining a bottom electrode lead-out hole pattern, and etching the bottom electrode lead-out holes in the resistive random layer and the energy band modifying layer according to the pattern; and 5) defining a top electrode pattern, and preparing the top electrode on the modifying layer according to the pattern.

Description

A non-linear self-rectifying resistive variable memory and its preparation method

technical field

The invention belongs to the technical field of semiconductor and CMOS hybrid integrated circuits, and in particular relates to a nonlinear self-rectifying resistive random access memory (resistive random access memory, RRAM) and a preparation method thereof.

Background technique

In recent years, with the further development of integrated circuits, the requirements for the size reduction, power consumption reduction and high integration of non-volatile memory are continuously increasing. Due to the limitations of power consumption and speed, it can no longer fully meet the requirements of the development of non-volatile memory.

Emerging resistive memory has received extensive attention in the field of semiconductor integrated circuits. The advantages of resistive memory in terms of high integration, low power consumption, and read/write speed make it a strong competitor in the new generation of memory. RRAM relies on the reversible state transition between high resistance state ("0" state) and low resistance state ("1" state) under different external voltage excitations, and can maintain high resistance state and low resistance state after the voltage excitation is removed. state, so as to realize the non-volatile storage of data. The RRAM is composed of a simple metal-resistive layer-metal sandwich structure. Therefore, a super-large-scale and extremely high-density RRAM array can be realized through a simple crossbar structure, which reduces the cost of adding transistors as selectors. The resulting area consumption, the characteristic size area can be reduced to 4F ² . In addition, the integration density can be further improved by stacking multi-layer crossbar structures to form a 3D crossbar structure.

However, since the reading of the resistance value of the device in the array needs to read the magnitude of the current flowing through the device to determine whether the device is in a high-resistance state or a low-resistance state. In the worst case, if you want to read a high-impedance device in the crossbar array, while the surrounding devices are in a low-impedance state, when reading the high-impedance device, the current will bypass this high-impedance device. The device in the resistive state forms a sneak current on the surrounding low-resistance devices. At this time, the read current is actually the sneak current value flowing through the surrounding low-resistance devices, causing misreading. Studies have shown that the crosstalk problem of the array will lead to misoperation of devices, limit the integration of the array, increase the power consumption of the array and other issues, which greatly limit the storage density of the crossbar structure.

At present, in order to solve the crosstalk problem in the crossbar array of resistive memory, the array unit structure of resistive memory is mainly divided into two types: active array, 1T1R (One Transistor One RRAM) structural unit; passive array, 1S1R (OneSelector One RRAM) )Structural units. In the device unit of the 1T1R structure of the active array, the decisive factor for the device area is the area of the transistor. In addition, in order to meet the high reset current demand of the resistive switching device, the increase of the source and drain area will further increase the area of the transistor. This greatly limits the integration density of the storage array, and loses the advantage of high-density integration of the resistive memory. Although the structure of 1S1R (one selector one RRAM) eliminates the loss of area, it increases the number of process steps, and also requires a good match between the selector transistor and the RRAM, which has certain limitations in practical applications.

Contents of the invention

In view of the above deficiencies, the present invention proposes a non-linear self-rectifying resistive variable memory and its preparation method, based on the use of traditional CMOS technology to realize a non-linear self-rectifying resistive variable memory device, in order to reduce or even eliminate the crossbar structure of the resistive variable memory The crosstalk problem that exists in.

In order to solve the problems of the technologies described above, the technical scheme adopted in the present invention is as follows:

A nonlinear self-rectifying resistive variable memory, comprising a substrate and a bottom electrode-resistive variable layer-energy band modification layer-top electrode structure located on the substrate.

Further, the bottom electrode-resistive layer-band modification layer-top electrode structure is a metal-insulator-insulator-metal (Metal-Insulator-Insulator-Metal) capacitance structure or a metal-semiconductor-semiconductor-metal (Metal- Semiconductor-Semiconductor-Metal) capacitor structure.

Further, the substrate is made of silicon or glass;

The bottom electrode and the top electrode are made of metal materials with a thickness of 50nm-200nm;

The resistive layer is made of a transition metal oxide with resistive properties, with a thickness of 5nm-50nm; or an organic material, with a thickness of 200nm-500nm;

The energy band modifying layer is made of oxide with a thickness of 1-20nm.

Further, the metal material is Ti, Al, Au, W, Cu, Ta, Pt, Ir or TiN, TaN;

The transition metal oxide is TaO _x , HfO _x , SiO _x or SrTiO ₃ , and the organic material is parylene;

The oxide is SiO ₂ , TiO ₂ or HfO ₂ .

A method for preparing a non-linear self-rectifying resistive variable memory, comprising the steps of:

1) Define the bottom electrode pattern, and prepare the bottom electrode on the substrate according to the pattern;

2) Depositing a resistive variable layer on the bottom electrode by means of PVD (Physical Vapor Deposition), ALD (Atomic Layer Deposition) or CVD (Chemical Vapor Deposition);

3) Depositing an energy band modifying layer on the resistive layer by means of PVD or ALD;

4) Define the bottom electrode lead-out hole pattern, and etch the bottom electrode lead-out hole in the resistive layer and the energy band modification layer according to the pattern;

5) Define the pattern of the top electrode, and prepare the top electrode on the modification layer according to the pattern.

Further, the method for defining the pattern in the steps 1), 4) and 5) is to define the pattern on the photoresist by using photolithography technology.

Further, the preparation method of the bottom electrode and the top electrode includes PVD and evaporation deposition methods.

Further, the resistive layer adopts a transition metal oxide with resistive properties, with a thickness of 5nm-50nm; or an organic material, with a thickness of 200nm-500nm;

Further, the energy band modifying layer is made of oxide with a thickness of 1-20nm.

The present invention proposes a non-linear self-rectifying resistive variable memory and a preparation method thereof. The energy band modification layer is embedded into the resistive variable memory to form a double-layer structure, and the thickness change of the energy band modification layer material is used to rationally design the resistive variable layer. 1. The energy band structure matching between the energy band modification layer and the electrode material can realize the optimization of the current-voltage characteristics of the resistive memory device, so that the resistive memory exhibits the characteristic of symmetrical bidirectional nonlinear self-rectification. The resistive variable memory has a symmetrical bidirectional nonlinear self-rectification characteristic. Whether the crossbar array composed of it reads a low-resistance state or a high-resistance state, due to the existence of the nonlinear rectification region, the resistance value of the original crosstalk current path is much larger. Therefore, the crosstalk current can be effectively suppressed, thereby avoiding misreading, which is of great significance for improving the integration density of the memory array and mass production of the RRAM. In addition, the preparation method is compatible with the traditional CMOS process, has low cost and is easy to put into use.

Description of drawings

FIG. 1 is a graph of the current-voltage characteristic curve of the non-linear self-rectifying resistive variable memory.

In the figure: S1-the transition process from high resistance state to low resistance state under the excitation of positive voltage; S2-low resistance state maintenance process; S3-nonlinear rectification process of positive low resistance state; S4-negative low resistance state state nonlinear rectification process; S5-the transition process from low-resistance state to high-resistance state under the excitation of negative voltage; S6-high-resistance state maintenance process.

2(A)-2(E) correspond to the implementation steps of the respective embodiments.

FIG. 3 is a schematic diagram of a crossbar array and a crosstalk current path.

detailed description

In order to make the above-mentioned features and advantages of the present invention more comprehensible, the following specific embodiments are described in detail in conjunction with the accompanying drawings.

Example 1

This embodiment 1 provides a nonlinear self-rectifying resistive variable memory and its preparation method. The resistive variable memory uses a silicon substrate, uses Pt as the bottom electrode material, and uses Ta ₂ O ₅ (or its non-stoichiometric oxide ) as the resistive switch layer material, SiO ₂ is used as the energy band modification layer material, and Ta is used as the top electrode material.

Both Ta ₂ O ₅ and SiO ₂ are materials compatible with standard CMOS processes. Ta ₂ O ₅ based RRAM has excellent memory performance, including ultra-high endurance, ultra-fast switching speed and good retention characteristics. In addition, Ta ₂ O ₅ has the characteristics of high thermal stability and inactive chemical properties. As a gate dielectric material in a very mature CMOS process, SiO ₂ has very clear material properties and parameters, and its preparation is simple and very controllable. The combination of the advantages of the two materials, coupled with a reasonable design of the physical mechanism, not only meets the requirements of compatible CMOS technology, but also realizes the bidirectional nonlinear self-rectification characteristics of the resistive memory. Lifting and mass production have significant implications.

The preparation method of the nonlinear self-rectifying resistive variable memory is as follows:

1) Define the bottom electrode pattern on the photoresist by using photolithography technology, deposit Pt bottom electrode material on the silicon substrate by PVD method, the thickness is 50nm, and then remove the photoresist, as shown in Figure 2 (A);

2) Deposit a layer of Ta ₂ O ₅ resistive layer film material on the bottom electrode by PVD method, with a thickness of 20nm, as shown in Figure 2(B);

3) Deposit a layer of _SiO2 energy band modification layer material on the resistive layer by PVD method to realize bidirectional nonlinear self-rectification, with a thickness of 5nm, as shown in Figure 2(C);

4) First use photolithography technology to define the bottom electrode lead-out hole pattern on the photoresist, and then use dry etching to etch the bottom electrode lead-out hole in the resistive layer and energy band modification layer, and remove the photoresist. Glue, as shown in Figure 2 (D);

5) Use photolithography to define the top electrode pattern on the photoresist, and use the PVD method to deposit Ta top electrode material on the energy band modification layer with a thickness of 200nm, and then remove the photoresist to obtain the resistive variable memory, as shown in the figure 2(E).

Example 2

This embodiment 2 provides a nonlinear self-rectifying resistive variable memory and its preparation method. _The resistive variable memory uses a silicon substrate, TaN is used as the bottom electrode material, SrTiO is used as the resistive layer material, and _HfO is used as the energy band As the material of the modification layer, TaN is used as the top electrode material.

The preparation method of the nonlinear self-rectifying resistive variable memory is as follows:

1) Defining the bottom electrode pattern on the photoresist by using photolithography technology, depositing TaN bottom electrode material on the silicon substrate by evaporation deposition method, with a thickness of 200nm, and then removing the photoresist;

₂ ) Deposit a layer of SrTiO3 resistive layer film material on the bottom electrode by PVD method, with a thickness of 50nm;

3) Deposit a layer of _HfO2 energy band modification layer material on the resistive layer by ALD method to realize bidirectional nonlinear self-rectification, with a thickness of 20nm;

4) First use photolithography technology to define the bottom electrode lead-out hole pattern on the photoresist, and then use dry etching to etch the bottom electrode lead-out hole in the resistive layer and energy band modification layer, and remove the photoresist. glue;

5) Defining the top electrode pattern on the photoresist by photolithography technology, depositing TaN top electrode material on the energy band modifying layer by PVD method with a thickness of 50nm, and then removing the photoresist to obtain the resistive variable memory.

Example 3

This embodiment 3 provides a nonlinear self-rectifying resistive variable memory and its preparation method. _The resistive variable memory uses a glass substrate, uses Ir as the bottom electrode material, uses HfO as the resistive layer material, and uses _TiO as the energy band The modification layer material adopts TiN as the top electrode material.

The preparation method of the nonlinear self-rectifying resistive variable memory is as follows:

1) Defining the bottom electrode pattern on the photoresist by using photolithography technology, depositing Ir bottom electrode material on the glass substrate by evaporation deposition method, the thickness is 100nm, and then removing the photoresist;

₂ ) Deposit a layer of HfO on the bottom electrode by ALD method Resistive layer thin film material with a thickness of 5nm;

3) Deposit a layer of _TiO2 energy band modification layer material on the resistive layer by PVD method to realize bidirectional nonlinear self-rectification, with a thickness of 1nm;

4) First use photolithography technology to define the bottom electrode lead-out hole pattern on the photoresist, and then use dry etching to etch the bottom electrode lead-out hole in the resistive layer and energy band modification layer, and remove the photoresist. glue;

5) Defining the top electrode pattern on the photoresist by using photolithography technology, depositing TiN top electrode material on the energy band modifying layer by evaporation deposition method, with a thickness of 100nm, and then removing the photoresist to obtain the resistive variable memory.

Example 4

This embodiment 4 provides a nonlinear self-rectifying resistive variable memory and its preparation method. The material composition and thickness of each layer of the resistive variable memory are exactly the same as those in embodiment 1. The difference in the preparation method lies in the resistive variable layer and the energy band The modification layers are deposited by ALD method.

Example 5

This embodiment 5 provides a nonlinear self-rectifying resistive variable memory and its preparation method. The resistive variable layer of the resistive variable memory is made of organic material parylene, prepared by CVD method, and the thickness is 500nm. Other compositions, preparation methods and Parameters are exactly the same as in Example 1.

Example 6

This embodiment 6 provides a non-linear self-rectifying resistive variable memory and its preparation method. The resistive variable layer of the resistive variable memory is made of organic material parylene, prepared by CVD method, and the thickness is 350nm. Other compositions, preparation methods and Parameters are exactly the same as in Example 4.

Example 7

This embodiment 7 provides a nonlinear self-rectifying resistive variable memory and its preparation method. The resistive variable layer of the resistive variable memory is made of organic material parylene and prepared by CVD method with a thickness of 200nm. Other compositions, preparation methods and Parameters are exactly the same as in Example 4.

It can be seen from the above examples that the preparation of the transition metal oxide resistive layer thin film material and the energy modification layer material can either use the PVD method or the ALD method. Compared with the PVD method, the ALD method can be thinner; the preparation of organic materials The CVD method is used as the resistive layer.

For a kind of non-linear self-rectifying resistive variable memory provided by the present invention, the current-voltage (I-V) characteristic of its resistive change process that adopts DC Sweep mode to obtain is as shown in Figure 1, among the figure, under the excitation of S1-forward voltage The transition process from high resistance state to low resistance state; S2—low resistance state maintenance process; S3—positive low resistance state nonlinear rectification process; S4—negative low resistance state nonlinear rectification process; S5—negative voltage The transition process from low-resistance state to high-resistance state under the excitation; S6—high-resistance state maintenance process. By grounding the bottom electrode of the RRAM, the voltage of the top electrode can control the resistance value of the RRAM, making it switch between high resistance and low resistance, that is, the RRAM "0", "1" "The conversion between the two states proves that the resistive switching effect can be realized. Under the operation of positive and negative voltages, its current-voltage characteristic curve can show an approximately symmetrical nonlinear rectification effect.

By embedding the energy band modification layer into the resistive switch memory to form a double-layer structure, using the thickness change of the energy band modification layer material, and rationally designing the band structure matching between the resistance switch layer, the energy band modification layer and the electrode material, it can realize The current-voltage characteristics of resistive memory devices are optimized. This is because, if the energy band modification layer chooses a material with a larger band gap than the resistive layer, and the conduction band bottom of the energy band modification layer material is higher than that of the resistive material, and the metal electrode selects a lower work function If the material is large, the energy band modification layer will form a higher potential barrier with the electrode. At this time, if the material thickness of the energy band modification layer is thin, electrons can reach the resistive layer through tunneling, and the tunneling current has a nonlinear Therefore, the characteristics of nonlinear self-rectification can be realized.

Figure 3 is a schematic diagram of the crossbar array and the crosstalk current path. It can be seen from the figure that due to the reading of the resistance value of the device in the array, it is necessary to read the current flowing through the device to determine whether the device is in a high resistance state or a low resistance state. In the worst case, if you want to read a high-impedance device in the crossbar array, while the surrounding devices are in a low-impedance state, when reading the high-impedance device, the current will bypass this high-impedance device. The device in the resistive state forms a sneak current on the surrounding low-resistance devices. In this case, in the crossbar structure, the shortest path through which the crosstalk current will flow is the three unselected devices in the figure, that is, when the selected device (the device in the dotted line in the figure) is at the Vread voltage, each crosstalk path The actual voltage division of each device is one-third of Vread, and the read current is actually the sneak current value flowing through its surrounding devices in a low-impedance state, causing misreading. If the device adopts the nonlinear self-rectifying resistive memory provided by the present invention, it can be seen from the current-voltage curve in Fig. 1 that the current in the high-impedance state read by Vread will be greater than the low-impedance state current read by one third of Vread, That is, due to the non-linear self-rectification effect of the low resistance state, the resistance of the read path is smaller than that of the crosstalk path, so the crosstalk is effectively suppressed, even when the voltage is negative. It can be seen that the bidirectional nonlinear self-rectification effect in the low resistance state can effectively suppress the crosstalk in the crossbar array.

The above embodiments are only used to illustrate the technical solution of the present invention and not to limit it. Those of ordinary skill in the art can modify or equivalently replace the technical solution of the present invention without departing from the spirit and scope of the present invention. The scope of protection should be determined by the claims.

Claims (9)

1. A nonlinear self-rectifying resistive variable memory, characterized in that it comprises a substrate and a bottom electrode-resistive variable layer-energy band modification layer-top electrode structure on the substrate. 2. The nonlinear self-rectifying resistive variable memory according to claim 1, wherein the bottom electrode-resistive layer-band modification layer-top electrode structure is a metal-insulator-insulator-metal capacitor structure or a metal - Semiconductor-semiconductor-metal capacitor structure. 3. The non-linear self-rectifying resistive variable memory according to claim 1, characterized in that, The substrate is made of silicon or glass; The bottom electrode and the top electrode are made of metal materials with a thickness of 50nm-200nm; The resistive layer is made of a transition metal oxide with resistive properties, with a thickness of 5nm-50nm; or an organic material, with a thickness of 200nm-500nm; The energy band modifying layer is made of oxide with a thickness of 1-20nm. 4. The non-linear self-rectifying resistive variable memory according to claim 3, characterized in that, The metal material is Ti, Al, Au, W, Cu, Ta, Pt, Ir or TiN, TaN; The transition metal oxide is TaOx, HfOx, SiOx or SrTiO ₃ , and the organic material is parylene; The oxide is SiO ₂ , TiO ₂ or HfO ₂ . 5. A method for preparing a non-linear self-rectifying resistive variable memory, comprising the steps of: 1) Define the bottom electrode pattern, and prepare the bottom electrode on the substrate according to the pattern; 2) Depositing a resistive layer on the bottom electrode by PVD, ALD or CVD; 3) Depositing an energy band modifying layer on the resistive layer by means of PVD or ALD; 4) Define the bottom electrode lead-out hole pattern, and etch the bottom electrode lead-out hole in the resistive layer and the energy band modification layer according to the pattern; 5) Define the pattern of the top electrode, and prepare the top electrode on the modification layer according to the pattern. 6. The preparation method according to claim 5, characterized in that, the method of defining the pattern in the steps 1), 4) and 5) is to define the pattern on the photoresist by using photolithography technology. 7. The preparation method according to claim 5, characterized in that, the preparation methods of the bottom electrode and the top electrode include PVD and evaporation deposition methods. 8 . The preparation method according to claim 5 , wherein the resistive layer is a transition metal oxide with resistive properties, with a thickness of 5nm-50nm; or an organic material, with a thickness of 200nm-500nm. 9. The preparation method according to claim 5, characterized in that the energy band modifying layer is made of an oxide with a thickness of 1-20 nm.