CN108183065A - A kind of method and compound substrate for eliminating silicon wafer warpage - Google Patents
A kind of method and compound substrate for eliminating silicon wafer warpage Download PDFInfo
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- 238000000034 method Methods 0.000 title claims abstract description 38
- 239000000758 substrate Substances 0.000 title claims abstract description 35
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 title claims abstract description 20
- 229910052710 silicon Inorganic materials 0.000 title claims abstract description 14
- 239000010703 silicon Substances 0.000 title claims abstract description 14
- 150000001875 compounds Chemical class 0.000 title 1
- 229910010271 silicon carbide Inorganic materials 0.000 claims abstract description 64
- HBMJWWWQQXIZIP-UHFFFAOYSA-N silicon carbide Chemical compound [Si+]#[C-] HBMJWWWQQXIZIP-UHFFFAOYSA-N 0.000 claims abstract description 63
- 239000002131 composite material Substances 0.000 claims abstract description 31
- 238000000151 deposition Methods 0.000 claims abstract description 14
- JMASRVWKEDWRBT-UHFFFAOYSA-N Gallium nitride Chemical compound [Ga]#N JMASRVWKEDWRBT-UHFFFAOYSA-N 0.000 claims abstract description 10
- 239000000463 material Substances 0.000 claims description 15
- 229910052581 Si3N4 Inorganic materials 0.000 claims description 12
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 claims description 12
- 239000011521 glass Substances 0.000 claims description 12
- 229910052751 metal Inorganic materials 0.000 claims description 12
- 239000002184 metal Substances 0.000 claims description 12
- 239000004065 semiconductor Substances 0.000 claims description 12
- HQVNEWCFYHHQES-UHFFFAOYSA-N silicon nitride Chemical compound N12[Si]34N5[Si]62N3[Si]51N64 HQVNEWCFYHHQES-UHFFFAOYSA-N 0.000 claims description 12
- 229910052814 silicon oxide Inorganic materials 0.000 claims description 12
- BOTDANWDWHJENH-UHFFFAOYSA-N Tetraethyl orthosilicate Chemical compound CCO[Si](OCC)(OCC)OCC BOTDANWDWHJENH-UHFFFAOYSA-N 0.000 claims description 5
- 230000008021 deposition Effects 0.000 claims description 4
- 239000000203 mixture Substances 0.000 claims description 4
- 235000012431 wafers Nutrition 0.000 abstract description 101
- 229910002601 GaN Inorganic materials 0.000 abstract description 3
- 238000010586 diagram Methods 0.000 description 4
- 238000005229 chemical vapour deposition Methods 0.000 description 3
- 238000002834 transmittance Methods 0.000 description 3
- 238000000206 photolithography Methods 0.000 description 2
- GYHNNYVSQQEPJS-UHFFFAOYSA-N Gallium Chemical compound [Ga] GYHNNYVSQQEPJS-UHFFFAOYSA-N 0.000 description 1
- 230000009286 beneficial effect Effects 0.000 description 1
- 230000005540 biological transmission Effects 0.000 description 1
- 230000015556 catabolic process Effects 0.000 description 1
- 238000006243 chemical reaction Methods 0.000 description 1
- 238000005336 cracking Methods 0.000 description 1
- 239000013078 crystal Substances 0.000 description 1
- 230000007547 defect Effects 0.000 description 1
- 230000005684 electric field Effects 0.000 description 1
- 238000000407 epitaxy Methods 0.000 description 1
- 238000013467 fragmentation Methods 0.000 description 1
- 238000006062 fragmentation reaction Methods 0.000 description 1
- 229910052733 gallium Inorganic materials 0.000 description 1
- 230000005855 radiation Effects 0.000 description 1
- 239000002994 raw material Substances 0.000 description 1
- 230000001105 regulatory effect Effects 0.000 description 1
- 238000001179 sorption measurement Methods 0.000 description 1
- 238000004528 spin coating Methods 0.000 description 1
- 239000000126 substance Substances 0.000 description 1
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02002—Preparing wafers
- H01L21/02005—Preparing bulk and homogeneous wafers
- H01L21/02008—Multistep processes
- H01L21/0201—Specific process step
- H01L21/02016—Backside treatment
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D62/00—Semiconductor bodies, or regions thereof, of devices having potential barriers
- H10D62/80—Semiconductor bodies, or regions thereof, of devices having potential barriers characterised by the materials
- H10D62/83—Semiconductor bodies, or regions thereof, of devices having potential barriers characterised by the materials being Group IV materials, e.g. B-doped Si or undoped Ge
- H10D62/832—Semiconductor bodies, or regions thereof, of devices having potential barriers characterised by the materials being Group IV materials, e.g. B-doped Si or undoped Ge being Group IV materials comprising two or more elements, e.g. SiGe
- H10D62/8325—Silicon carbide
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Abstract
本发明公开了一种消除晶圆翘曲的方法及复合衬底,该方法包括如下步骤:S1:选取一翘曲的晶圆(1);S2:在所述晶圆(1)的背面沉积一层内部具有应力的应力补偿膜(2),使得所述应力补偿膜(2)的内部应力与所述晶圆(1)的内部应力相互抵消,得到平整的复合衬底;所述晶圆(1)为碳化硅基碳化硅晶圆或硅基氮化镓晶圆。所述复合衬底包括一晶圆(1)和一应力补偿膜(2),所述应力补偿膜(2)覆盖于所述晶圆(1)的背面,且所述应力补偿膜(2)的内部应力与所述晶圆(1)的内部应力相互抵消;所述晶圆(1)为碳化硅基碳化硅晶圆或硅基氮化镓晶圆。本发明在翘曲的晶圆背面沉积一层内部具有应力的应力补偿膜,使得应力补偿膜的内部应力与晶圆的内部应力相互抵消,从而消除翘曲现象。
The invention discloses a method for eliminating wafer warping and a composite substrate, the method comprising the following steps: S1: selecting a warped wafer (1); S2: depositing a wafer on the back side of the wafer (1) A stress compensation film (2) with stress inside, so that the internal stress of the stress compensation film (2) and the internal stress of the wafer (1) cancel each other out to obtain a flat composite substrate; the wafer (1) Silicon carbide-based silicon carbide wafers or silicon-based gallium nitride wafers. The composite substrate includes a wafer (1) and a stress compensation film (2), the stress compensation film (2) covers the back of the wafer (1), and the stress compensation film (2) The internal stress of the wafer (1) cancels out each other; the wafer (1) is a silicon carbide-based silicon carbide wafer or a silicon-based gallium nitride wafer. The invention deposits a layer of stress compensation film with internal stress on the back of the warped wafer, so that the internal stress of the stress compensation film and the internal stress of the wafer cancel each other, thereby eliminating the warping phenomenon.
Description
技术领域technical field
本发明属于半导体微纳加工技术领域,尤其是涉及一种消除晶圆翘曲的方法及采用该方法制备的复合衬底。The invention belongs to the technical field of semiconductor micro-nano processing, and in particular relates to a method for eliminating wafer warpage and a composite substrate prepared by the method.
背景技术Background technique
碳化硅(SiC)和氮化镓(GaN)是两种宽禁带半导体材料,它们有着高临界击穿电场强度、高饱和电子迁移率、高热导率等优点,特别适合应用在微波和大功率电力传输和换能领域,用其制备的微波器件和电力电子器件可以承载高电压、大电流,并且可以稳定工作在高辐射、高温等苛刻应用环境。Silicon carbide (SiC) and gallium nitride (GaN) are two wide bandgap semiconductor materials. They have the advantages of high critical breakdown electric field strength, high saturation electron mobility, high thermal conductivity, etc., and are especially suitable for applications in microwave and high-power In the field of power transmission and energy conversion, microwave devices and power electronic devices prepared with it can carry high voltage and high current, and can work stably in harsh application environments such as high radiation and high temperature.
在碳化硅基片的晶锭生长时,碳化硅晶体形成的内部应力偏大。将碳化硅晶锭切割成晶圆薄片时,内部应力容易引起翘曲现象,生长外延后,翘曲仍然保持。When the ingot of the silicon carbide substrate grows, the internal stress formed by the silicon carbide crystal is relatively large. When the silicon carbide ingot is cut into wafer slices, the internal stress is likely to cause warpage, and the warpage remains after epitaxy growth.
在硅基片上外延生长氮化镓时,也容易因为内部应力引起翘曲现象。When gallium nitride is epitaxially grown on a silicon substrate, it is also easy to cause warpage due to internal stress.
碳化硅基碳化硅晶圆和硅基氮化镓晶圆的翘曲都将会给后续器件加工带来困难,这表现在:The warping of silicon carbide-based silicon carbide wafers and silicon-based gallium nitride wafers will bring difficulties to subsequent device processing, which is manifested in:
一是,翘曲导致光刻工艺中无法顺利对整个晶圆聚焦曝光。One is that warpage prevents smooth focused exposure of the entire wafer during the photolithography process.
二是,翘曲使得包含曝光机的大量半导体设备难以实现对晶圆的自动搬运。这表现为:晶圆无法有效地被搬运托片真空吸附,容易从搬运托片上滑落翻掉;以及晶圆无法通过真空吸附的方式定位在设备腔室中。The second is that warpage makes it difficult for a large number of semiconductor equipment including exposure machines to automatically carry wafers. This is manifested as: the wafer cannot be effectively vacuum-adsorbed by the transfer pallet, and it is easy to slip and fall off from the transfer pallet; and the wafer cannot be positioned in the equipment chamber by vacuum adsorption.
现有技术中,用于克服碳化硅基碳化硅晶圆发生翘曲现象的方法是增加其厚度。在碳化硅晶圆内部应力相同的情形下,碳化硅晶圆的厚度越大,翘曲就越小。In the prior art, the method used to overcome the warpage of SiC-based SiC wafers is to increase its thickness. In the case of the same internal stress of the SiC wafer, the greater the thickness of the SiC wafer, the smaller the warpage.
现有技术的上述方法的缺点是:The shortcoming of the above-mentioned method of prior art is:
一是,增加基于碳化硅材料的器件成本,碳化硅基片的厚度越大,单片晶圆消耗的材料就越多,成本就越高;One is to increase the cost of devices based on silicon carbide materials. The greater the thickness of the silicon carbide substrate, the more materials consumed by a single wafer, and the higher the cost;
二是,导致工艺繁琐复杂、效率低、良率损失。碳化硅基碳化硅晶圆的厚度越大,器件的导通电阻就越大。在划片前需要通过研磨的方法从碳化硅基碳化硅晶圆的背面减薄,此时碳化硅基碳化硅晶圆正面的器件已经完成,需要对其进行覆盖保护,然后将碳化硅基碳化硅晶圆正面与研磨装置表面强力黏结在一起,以保护碳化硅基碳化硅晶圆正面的器件在高速高强度的背面研磨过程中不受损伤。之后从研磨装置表面取下碳化硅基碳化硅晶圆,再去掉覆盖保护。整个″覆盖-黏结-研磨-去黏结-去覆盖″工艺繁琐复杂,并导致效率低下和良率损失。The second is that the process is cumbersome and complicated, the efficiency is low, and the yield rate is lost. The thicker the silicon carbide-on-silicon carbide wafer, the greater the on-resistance of the device. Before dicing, it needs to be thinned from the back of the silicon carbide-based silicon carbide wafer by grinding. At this time, the device on the front side of the silicon carbide-based silicon carbide wafer has been completed, and it needs to be covered and protected. The front side of the silicon wafer is strongly bonded to the surface of the grinding device to protect the devices on the front side of the silicon carbide-based silicon carbide wafer from damage during the high-speed and high-intensity back grinding process. The silicon carbide-based silicon carbide wafer is then removed from the surface of the grinding device, and the overlay protection is removed. The entire "cover-bond-grind-debond-decap" process is cumbersome and leads to inefficiency and yield loss.
现有技术中,用于克服硅基氮化镓晶圆发生翘曲现象的方法是设法改变其外延生长的工艺参数。由于外延生长的工艺参数的设定主要需要考虑其他因素,比如缺陷,生长速率等,因此往往无法有效控制翘曲,这导致硅基氮化镓晶圆翘曲处于较大范围,增加器件工艺难度。In the prior art, the method for overcoming the warping phenomenon of GaN-on-Si wafers is to try to change the process parameters of its epitaxial growth. Since the setting of process parameters for epitaxial growth mainly needs to consider other factors, such as defects, growth rate, etc., it is often impossible to effectively control warpage, which leads to a large range of warpage in GaN-on-Si wafers, increasing the difficulty of device process .
发明内容Contents of the invention
本发明要解决的第一个技术问题是提供一种消除晶圆翘曲的方法。The first technical problem to be solved by the present invention is to provide a method for eliminating wafer warpage.
本发明要解决的第二个技术问题是提供一种采用上述方法制备的复合衬底。The second technical problem to be solved by the present invention is to provide a composite substrate prepared by the above method.
为解决上述第一个技术问题,发明采用如下的技术方案:In order to solve the above-mentioned first technical problem, the invention adopts the following technical solutions:
本发明提供一种消除晶圆翘曲的方法,包括如下步骤:The invention provides a method for eliminating wafer warpage, comprising the steps of:
S1:选取一翘曲的晶圆;S1: Select a warped wafer;
S2:在所述晶圆的背面沉积一层内部具有应力的应力补偿膜,使得所述应力补偿膜的内部应力与所述晶圆的内部应力相互抵消,得到平整的复合衬底;S2: Depositing a layer of stress compensation film with internal stress on the back of the wafer, so that the internal stress of the stress compensation film and the internal stress of the wafer cancel each other to obtain a flat composite substrate;
所述晶圆为碳化硅基碳化硅晶圆或硅基氮化镓晶圆。The wafer is a silicon carbide-based silicon carbide wafer or a silicon-based gallium nitride wafer.
优选地,当所述晶圆为碳化硅基碳化硅晶圆时,所述方法还包括如下步骤:S3:在所述应力补偿膜的背面沉积一层内部无应力的辅助膜。Preferably, when the wafer is a silicon carbide-based silicon carbide wafer, the method further includes the following step: S3: Depositing an internal stress-free auxiliary film on the back of the stress compensation film.
优选地,通过调整沉积所述应力补偿膜的气压、温度、成分比例、沉积速率调控其内部应力的类型和大小。Preferably, the type and size of the internal stress are regulated by adjusting the pressure, temperature, composition ratio, and deposition rate of the stress compensation film deposited.
优选地,所述应力补偿膜的材质为氧化硅、氮化硅或金属。Preferably, the material of the stress compensation film is silicon oxide, silicon nitride or metal.
优选地,所述应力补偿膜的内部应力为压应力、无应力或张应力。Preferably, the internal stress of the stress compensation film is compressive stress, no stress or tensile stress.
为解决上述第二个技术问题,本发明提供一种复合衬底,包括一晶圆和一应力补偿膜,所述应力补偿膜覆盖于所述晶圆的背面,且所述应力补偿膜的内部应力与所述晶圆的内部应力相互抵消;所述晶圆为碳化硅基碳化硅晶圆或硅基氮化镓晶圆。In order to solve the above-mentioned second technical problem, the present invention provides a composite substrate, including a wafer and a stress compensation film, the stress compensation film covers the back of the wafer, and the inside of the stress compensation film The stress and the internal stress of the wafer cancel each other; the wafer is a silicon carbide-on-silicon carbide wafer or a gallium nitride-on-silicon wafer.
优选地,当所述晶圆为碳化硅基碳化硅晶圆时,所述复合衬底还包括一内部无应力的辅助膜,且所述辅助膜覆盖于所述应力补偿膜的背面。Preferably, when the wafer is a silicon carbide-based silicon carbide wafer, the composite substrate further includes an internal stress-free auxiliary film, and the auxiliary film covers the back surface of the stress compensation film.
优选地,所述应力补偿膜的材质为氧化硅、氮化硅或金属。Preferably, the material of the stress compensation film is silicon oxide, silicon nitride or metal.
优选地,所述应力补偿膜的内部应力为压应力、无应力或张应力。Preferably, the internal stress of the stress compensation film is compressive stress, no stress or tensile stress.
优选地,所述辅助膜的材质为氧化硅、氮化硅、金属、TEOS或半导体用玻璃;所述半导体用玻璃为SOG或CVD制备的玻璃。本发明所记载的任何范围包括端值以及端值之间的任何数值以及端值或者端值之间的任意数值所构成的任意子范围。Preferably, the material of the auxiliary film is silicon oxide, silicon nitride, metal, TEOS or glass for semiconductor; the glass for semiconductor is glass prepared by SOG or CVD. Any range recited in the present invention includes the endpoints and any value between the endpoints and any sub-range formed by the endpoints or any value between the endpoints.
如无特殊说明,本发明中的各原料均可通过市售购买获得,本发明中所用的设备可采用所属领域中的常规设备或参照所属领域的现有技术进行。Unless otherwise specified, each raw material in the present invention can be purchased commercially, and the equipment used in the present invention can be carried out by using conventional equipment in the field or referring to the prior art in the field.
与现有技术相比较,本发明具有如下有益效果:Compared with the prior art, the present invention has the following beneficial effects:
(1)本发明的方法在翘曲的晶圆背面沉积一层内部具有应力的应力补偿膜,使得应力补偿膜的内部应力与晶圆的内部应力相互抵消,从而消除翘曲现象,得到平整的复合衬底,使得高精度的光刻工艺成为可能。(1) The method of the present invention deposits a layer of internal stress compensation film with stress on the back of the warped wafer, so that the internal stress of the stress compensation film and the internal stress of the wafer cancel each other, thereby eliminating the warping phenomenon and obtaining a smooth wafer. Composite substrates make high-precision photolithography possible.
(2)本发明的方法通过沉积应力补偿膜和辅助膜能够降低碳化硅晶圆的透光度,从而使得碳化硅晶圆更容易识别和定位。由于应力补偿膜的材质(例如氧化硅、氮化硅、金属等)和辅助膜的材质(例如氧化硅、氮化硅、金属、TEOS或半导体用玻璃等)本身的透光度较低,因此应力补偿膜和辅助膜能够降低碳化硅晶圆的透光度。这样,碳化硅晶圆的遮光性能增强,更容易被识别和定位。(2) The method of the present invention can reduce the light transmittance of the silicon carbide wafer by depositing the stress compensation film and the auxiliary film, thereby making the silicon carbide wafer easier to identify and locate. Due to the low light transmittance of the material of the stress compensation film (such as silicon oxide, silicon nitride, metal, etc.) and the material of the auxiliary film (such as silicon oxide, silicon nitride, metal, TEOS or semiconductor glass, etc.), The stress compensation film and the auxiliary film can reduce the light transmittance of the silicon carbide wafer. In this way, the shading performance of the silicon carbide wafer is enhanced, and it is easier to be identified and positioned.
(3)本发明的方法能够消除翘曲现象,得到平整的复合衬底,平整的复合衬底能够有效的被搬运托片真空吸附,不容易从搬运托片上滑落翻掉,从而使得半导体设备对晶圆的自动搬运更加容易。(3) The method of the present invention can eliminate the warping phenomenon and obtain a flat composite substrate. The flat composite substrate can be effectively vacuum-adsorbed by the conveying pallet, and is not easy to slip off from the conveying pallet, so that the semiconductor device is relatively stable. Automatic wafer handling is easier.
(4)本发明的方法通过沉积应力补偿膜和辅助膜能够增加碳化硅晶圆的厚度,从而使得碳化硅晶圆在半导体设备中更容易被搬运,同时降低碎片或裂片的几率。(4) The method of the present invention can increase the thickness of the silicon carbide wafer by depositing the stress compensation film and the auxiliary film, so that the silicon carbide wafer can be handled more easily in semiconductor equipment, while reducing the probability of fragmentation or cracking.
附图说明Description of drawings
下面结合附图对本发明的具体实施方式作进一步详细的说明Below in conjunction with accompanying drawing, specific embodiment of the present invention is described in further detail
图1为本发明实施例1的翘曲的晶圆的示意图;1 is a schematic diagram of a warped wafer in Example 1 of the present invention;
图2为本发明实施例1的在晶圆的背面沉积应力补偿膜的示意图;2 is a schematic diagram of depositing a stress compensation film on the back side of a wafer according to Embodiment 1 of the present invention;
图3为本发明实施例2的翘曲的晶圆的示意图;3 is a schematic diagram of a warped wafer according to Embodiment 2 of the present invention;
图4为本发明实施例3的在应力补偿膜的背面沉积辅助膜的示意图。FIG. 4 is a schematic diagram of depositing an auxiliary film on the back of the stress compensation film according to Embodiment 3 of the present invention.
具体实施方式Detailed ways
为了更清楚地说明本发明,下面结合优选实施例对本发明做进一步的说明。本领域技术人员应当理解,下面所具体描述的内容是说明性的而非限制性的,不应以此限制本发明的保护范围。In order to illustrate the present invention more clearly, the present invention will be further described below in conjunction with preferred embodiments. Those skilled in the art should understand that the content specifically described below is illustrative rather than restrictive, and should not limit the protection scope of the present invention.
实施例1Example 1
本实施提供一种消除晶圆翘曲的方法,该方法包括如下步骤:This implementation provides a method for eliminating wafer warpage, the method comprising the steps of:
S1:选取一翘曲的晶圆1;S1: Select a warped wafer 1;
S2:在上述晶圆1的背面沉积一层内部具有应力的应力补偿膜2,使得应力补偿膜2的内部应力与晶圆1的内部应力相互抵消,得到平整的复合衬底。S2: Deposit a layer of stress compensation film 2 with internal stress on the back of the wafer 1, so that the internal stress of the stress compensation film 2 and the internal stress of the wafer 1 cancel each other out to obtain a flat composite substrate.
上述晶圆1为碳化硅基碳化硅晶圆或硅基氮化镓晶圆。The above-mentioned wafer 1 is a silicon carbide-based silicon carbide wafer or a silicon-based gallium nitride wafer.
应力补偿膜2的材质优选为氧化硅、氮化硅或金属。The material of the stress compensation film 2 is preferably silicon oxide, silicon nitride or metal.
上述应力补偿膜2的内部应力为压应力、无应力或张应力。本领域技术人员通过调整沉积应力补偿膜2的工艺参数例如气压、温度、成分比例、沉积速率等,可以调控所沉积的应力补偿膜2的内部应力的类型(压应力、无应力或张应力)和大小。The internal stress of the above-mentioned stress compensation film 2 is compressive stress, no stress or tensile stress. Those skilled in the art can adjust the type of internal stress (compressive stress, no stress or tensile stress) of the deposited stress compensation film 2 by adjusting the process parameters of the deposited stress compensation film 2, such as gas pressure, temperature, composition ratio, deposition rate, etc. and size.
在本实施例中,在上述步骤S1中,例如选取中间向上弯曲的晶圆1,即晶圆1的正面上凸,如图1所示;在上述步骤S2中,例如在翘曲的晶圆1的背面沉积一层内部具有压应力的应力补偿膜2,使得应力补偿膜2的内部应力与晶圆1的内部应力相互抵消,从而消除晶圆1的翘曲,得到平整的复合衬底,如图2所示。In this embodiment, in the above step S1, for example, the wafer 1 that is bent upward in the middle is selected, that is, the front side of the wafer 1 is convex, as shown in FIG. 1; in the above step S2, for example, in the warped wafer A layer of stress compensation film 2 with internal compressive stress is deposited on the back of 1, so that the internal stress of the stress compensation film 2 and the internal stress of the wafer 1 cancel each other, thereby eliminating the warping of the wafer 1 and obtaining a flat composite substrate. as shown in picture 2.
在本实施例中,复合衬底包括晶圆1和应力补偿膜2。In this embodiment, the composite substrate includes a wafer 1 and a stress compensation film 2 .
实施例2Example 2
本实施提供一种消除晶圆翘曲的方法,该方法包括如下步骤:This implementation provides a method for eliminating wafer warpage, the method comprising the steps of:
S1:选取一翘曲的晶圆1;S1: Select a warped wafer 1;
S2:在上述晶圆1的背面沉积一层内部具有应力的应力补偿膜2,使得应力补偿膜2的内部应力与晶圆1的内部应力相互抵消,得到平整的复合衬底。S2: Deposit a layer of stress compensation film 2 with internal stress on the back of the wafer 1, so that the internal stress of the stress compensation film 2 and the internal stress of the wafer 1 cancel each other out to obtain a flat composite substrate.
上述晶圆1为碳化硅基碳化硅晶圆或硅基氮化镓晶圆。The above-mentioned wafer 1 is a silicon carbide-based silicon carbide wafer or a silicon-based gallium nitride wafer.
应力补偿膜2的材质优选为氧化硅、氮化硅或金属。The material of the stress compensation film 2 is preferably silicon oxide, silicon nitride or metal.
上述应力补偿膜2的内部应力为压应力、无应力或张应力。本领域技术人员通过调整沉积应力补偿膜2的工艺参数例如气压、温度、成分比例、沉积速率等,可以调控所沉积的应力补偿膜2的内部应力的类型(压应力、张应力或无应力)和大小。The internal stress of the above-mentioned stress compensation film 2 is compressive stress, no stress or tensile stress. Those skilled in the art can adjust the type of internal stress (compressive stress, tensile stress or no stress) of the deposited stress compensation film 2 by adjusting the process parameters of the deposited stress compensation film 2, such as gas pressure, temperature, composition ratio, deposition rate, etc. and size.
在本实施例中,在上述步骤S1中,例如选取中间向下弯曲的晶圆1,即晶圆1的正面下凹,如图3所示;在上述步骤S2中,例如在翘曲的晶圆1的背面沉积一层内部具有张应力的应力补偿膜2,使得应力补偿膜2的内部应力与晶圆1的内部应力相互抵消,从而消除晶圆1的翘曲,得到平整的复合衬底,如图2所示。In this embodiment, in the above step S1, for example, the wafer 1 that is bent downward in the middle is selected, that is, the front surface of the wafer 1 is concave, as shown in FIG. 3; in the above step S2, for example, in the warped wafer 1 A layer of stress compensation film 2 with internal tensile stress is deposited on the back of circle 1, so that the internal stress of stress compensation film 2 and the internal stress of wafer 1 cancel each other, thereby eliminating the warping of wafer 1 and obtaining a flat composite substrate ,as shown in picture 2.
在本实施例中,复合衬底包括晶圆1和应力补偿膜2。In this embodiment, the composite substrate includes a wafer 1 and a stress compensation film 2 .
实施例3Example 3
本实施提供一种消除晶圆翘曲的方法,该方法包括如下步骤:This implementation provides a method for eliminating wafer warpage, the method comprising the steps of:
S1:选取一翘曲的晶圆1;S1: Select a warped wafer 1;
S2:在上述晶圆1的背面沉积一层内部具有应力的应力补偿膜2,使得应力补偿膜2的内部应力与晶圆1的内部应力相互抵消,得到平整的复合衬底;S2: Depositing a layer of stress compensation film 2 with internal stress on the back of the wafer 1, so that the internal stress of the stress compensation film 2 and the internal stress of the wafer 1 cancel each other out to obtain a flat composite substrate;
S3:在上述应力补偿膜2的背面沉积一层内部无应力的辅助膜3。S3: Depositing an auxiliary film 3 with no internal stress on the back of the above stress compensation film 2 .
上述晶圆1为碳化硅基碳化硅晶圆。The above-mentioned wafer 1 is a silicon carbide-based silicon carbide wafer.
应力补偿膜2的材质优选为氧化硅、氮化硅或金属。The material of the stress compensation film 2 is preferably silicon oxide, silicon nitride or metal.
上述应力补偿膜2的内部应力为压应力、无应力或张应力。本领域技术人员通过调整应力补偿膜2的工艺参数例如气压、温度、成分比例、沉积速率等,可以调控所沉积的应力补偿膜2的内部应力的类型(压应力、零应力或张应力)和大小。The internal stress of the above-mentioned stress compensation film 2 is compressive stress, no stress or tensile stress. Those skilled in the art can adjust the type of internal stress (compressive stress, zero stress or tensile stress) and size.
在本实施例中,在上述步骤S1中,例如选取中间向下弯曲的碳化硅晶圆1,即碳化硅晶圆1的正面上凸或下凹;在上述步骤S2中,例如在翘曲的碳化硅晶圆1的背面沉积一层内部具有压应力或张应力的应力补偿膜2,使得应力补偿膜2的内部应力与碳化硅晶圆1的内部应力相互抵消,从而消除碳化硅晶圆1的翘曲,得到平整的碳化硅复合衬底;在上述步骤S3中,在上述步骤S2得到的碳化硅复合衬底背面即应力补偿膜2的背面沉积一层内部无应力的辅助膜3,得到最终的平整的碳化硅复合衬底,如图4所示。In this embodiment, in the above step S1, for example, the silicon carbide wafer 1 that is bent downward in the middle is selected, that is, the front side of the silicon carbide wafer 1 is convex or concave; in the above step S2, for example, in the warped A stress compensation film 2 with compressive or tensile stress is deposited on the back of the silicon carbide wafer 1, so that the internal stress of the stress compensation film 2 and the internal stress of the silicon carbide wafer 1 cancel each other out, thereby eliminating the stress compensation of the silicon carbide wafer 1. warping to obtain a flat silicon carbide composite substrate; in the above step S3, deposit an internal stress-free auxiliary film 3 on the back of the silicon carbide composite substrate obtained in the above step S2, that is, the back of the stress compensation film 2, to obtain The final flat silicon carbide composite substrate is shown in FIG. 4 .
在本实施例中,碳化硅复合衬底还包括辅助膜3,即最终得到的碳化硅复合衬底包括碳化硅晶圆1、应力补偿膜2和辅助膜3。In this embodiment, the silicon carbide composite substrate further includes an auxiliary film 3 , that is, the finally obtained silicon carbide composite substrate includes a silicon carbide wafer 1 , a stress compensation film 2 and an auxiliary film 3 .
上述辅助膜3用于遮光,还用于增加碳化硅复合衬底的厚度至需要的厚度值。The aforementioned auxiliary film 3 is used for light shielding, and is also used for increasing the thickness of the silicon carbide composite substrate to a required thickness value.
辅助膜3的材质优选为氧化硅、氮化硅、金属、硅酸乙酯(TEOS)或半导体用玻璃。该半导体用玻璃为SOG(spin on glass coating-旋转涂布玻璃)或CVD(Chemical VaporDeposition-化学气相沉积)制备的玻璃。The material of the auxiliary film 3 is preferably silicon oxide, silicon nitride, metal, ethyl silicate (TEOS) or semiconductor glass. The semiconductor glass is glass prepared by SOG (spin on glass coating-spin coating glass) or CVD (Chemical VaporDeposition-chemical vapor deposition).
显然,本发明的上述实施例仅仅是为清楚地说明本发明所作的举例,而并非是对本发明的实施方式的限定。对于所属领域的普通技术人员来说,在上述说明的基础上还可以做出其它不同形式的变化或变动。这里无法对所有的实施方式予以穷举。凡是属于本发明的技术方案所引伸出的显而易见的变化或变动仍处于本发明的保护范围之列。Apparently, the above-mentioned embodiments of the present invention are only examples for clearly illustrating the present invention, rather than limiting the implementation of the present invention. For those of ordinary skill in the art, other changes or changes in different forms can be made on the basis of the above description. All the implementation manners cannot be exhaustively listed here. All obvious changes or variations derived from the technical solutions of the present invention are still within the protection scope of the present invention.
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