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CN106981423A - Process based on Si substrate epitaxial SiC base GaN HEMT - Google Patents

Process based on Si substrate epitaxial SiC base GaN HEMT Download PDF

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CN106981423A
CN106981423A CN201710236739.6A CN201710236739A CN106981423A CN 106981423 A CN106981423 A CN 106981423A CN 201710236739 A CN201710236739 A CN 201710236739A CN 106981423 A CN106981423 A CN 106981423A
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gan hemt
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CN106981423B (en
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林书勋
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Chengdu Hiwafer Technology Co Ltd
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    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00Field-effect transistors [FET]
    • H10D30/01Manufacture or treatment
    • H10D30/015Manufacture or treatment of FETs having heterojunction interface channels or heterojunction gate electrodes, e.g. HEMT
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/67Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
    • H01L21/683Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping
    • H01L21/6835Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00Field-effect transistors [FET]
    • H10D30/40FETs having zero-dimensional [0D], one-dimensional [1D] or two-dimensional [2D] charge carrier gas channels
    • H10D30/47FETs having zero-dimensional [0D], one-dimensional [1D] or two-dimensional [2D] charge carrier gas channels having 2D charge carrier gas channels, e.g. nanoribbon FETs or high electron mobility transistors [HEMT]
    • H10D30/471High electron mobility transistors [HEMT] or high hole mobility transistors [HHMT]
    • H10D30/475High electron mobility transistors [HEMT] or high hole mobility transistors [HHMT] having wider bandgap layer formed on top of lower bandgap active layer, e.g. undoped barrier HEMTs such as i-AlGaN/GaN HEMTs
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2221/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof covered by H01L21/00
    • H01L2221/67Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere
    • H01L2221/683Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping
    • H01L2221/68304Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support
    • H01L2221/6835Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support used as a support during build up manufacturing of active devices

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Abstract

本发明提供了基于Si衬底外延SiC基GaN HEMT的工艺方法,其特征在于,包括如下步骤:在Si衬底上生长SiC层;在所述SiC层上生长GaN HEMT器件;在所述GaN HEMT器件上涂抹光刻胶保护层,并以预设温度烘烤预设时间,在所述光刻胶保护层上采用粘附剂黏贴载片;采用湿法或干法方式对所述GaN HEMT器件背面的Si衬底进行腐蚀移除;在移除Si衬底的SiC层上进行背面通孔工艺,使得GaN HEMT器件正面接地区域与反面连通;在所述GaN HEMT器件背面即SiC层面上,沉积金属Ti或Au;采用加热以及有机或无机溶液湿法腐蚀光刻胶保护层和载片、粘附剂,进而提高了器件的性能。

The invention provides a process method for epitaxial SiC-based GaN HEMT based on a Si substrate, which is characterized in that it comprises the following steps: growing a SiC layer on a Si substrate; growing a GaN HEMT device on the SiC layer; growing a GaN HEMT device on the GaN HEMT Apply a photoresist protective layer on the device, and bake it at a preset temperature for a preset time, and use an adhesive to stick the carrier on the photoresist protective layer; wet or dry the GaN HEMT The Si substrate on the back of the device is etched and removed; the back through-hole process is performed on the SiC layer from which the Si substrate is removed, so that the front ground area of the GaN HEMT device is connected to the back side; on the back of the GaN HEMT device, that is, on the SiC layer, Deposit metal Ti or Au; use heating and organic or inorganic solution to wet etch the photoresist protective layer, carrier and adhesive, thereby improving the performance of the device.

Description

基于Si衬底外延SiC基GaN HEMT的工艺方法Process method of epitaxial SiC-based GaN HEMT based on Si substrate

技术领域technical field

本发明涉及化合物半导体制造技术领域,尤其涉及基于Si衬底外延SiC基GaNHEMT的工艺方法。The invention relates to the technical field of compound semiconductor manufacturing, in particular to a process method for epitaxial SiC-based GaNHEMT based on a Si substrate.

背景技术Background technique

GaN HEMT器件作为第三代化合物半导体的代表器件,以其高电子迁移率、高击穿电压、高电流密度、高可靠性,广泛应用于微波功率放大领域,是现代军民通信系统、航空航天的首选器件。GaN HEMT器件在高频、大功率应用层面,需要输出高的电流密度,而SiC材料的晶格常数与GaN材料的晶格常数接近,因此一般在SiC衬底上外延生长高质量的GaN HEMT异质结结构,具备较大的电流密度,同时SiC材料的热导率较高,能够保证大功率散热的要求,因此SiC基GaN HEMT器件广泛应用于微波功率放大。As a representative device of the third-generation compound semiconductor, GaN HEMT devices are widely used in the field of microwave power amplification due to their high electron mobility, high breakdown voltage, high current density, and high reliability. preferred device. GaN HEMT devices need to output high current density in high-frequency and high-power applications, and the lattice constant of SiC material is close to that of GaN material. Therefore, high-quality GaN HEMT is generally epitaxially grown on SiC substrates. The material junction structure has a large current density, and the thermal conductivity of the SiC material is high, which can ensure the requirement of high-power heat dissipation. Therefore, SiC-based GaN HEMT devices are widely used in microwave power amplification.

为了提高SiC基GaN HEMT器件在高频、高功率应用时性能,提高基底散热能力、降低寄生效应,常采用的方法:In order to improve the performance of SiC-based GaN HEMT devices in high-frequency and high-power applications, improve the heat dissipation capacity of the substrate, and reduce parasitic effects, the commonly used methods are:

在厚度约为500um的SiC衬底上外延生长GaN HEMT结构,然后对其正面进行工艺制备。在正面工艺完成后,使用粘附剂和同尺寸玻璃等材料作为载片把正面保护,然后在进行背面的SiC研磨,研磨至200um以下,再进行背孔工艺。因为SiC材料较硬,研磨速率较慢,研磨厚度较厚,长时间研磨过程会引起以下问题:1.研磨过程所产生的机械振动,会对基于极化效应的GaN HEMT器件可靠性造成不可逆的影响。2.研磨后的SiC的表面较大的粗糙度会影响后续背孔工艺稳定性,从而影响器件的高频性能。3.在SiC衬底的减薄过程中,研磨速率的不均匀性会影响整个晶圆翘曲度,影响氮化镓材料内部的极化效应,影响器件的输出电流密度;严重会导致晶圆与载片脱离,导致工艺失败。4.研磨过程中的副产物,也会对正面器件造成污染,引起一系列器件可靠性问题。因此,以上方法虽广泛应用于SiC基GaNHEMT器件制备中,但仍然存在很大的问题,直接影响器件性能以及良品率。The GaN HEMT structure is epitaxially grown on a SiC substrate with a thickness of about 500um, and then its front side is processed. After the front process is completed, use adhesives and materials such as glass of the same size as the carrier to protect the front, and then grind the SiC on the back to below 200um, and then perform the back hole process. Because the SiC material is hard, the grinding rate is slow, and the grinding thickness is thick, the grinding process for a long time will cause the following problems: 1. The mechanical vibration generated during the grinding process will cause irreversible damage to the reliability of the GaN HEMT device based on the polarization effect influences. 2. The large roughness of the polished SiC surface will affect the stability of the subsequent back-hole process, thereby affecting the high-frequency performance of the device. 3. During the thinning process of the SiC substrate, the non-uniformity of the grinding rate will affect the warpage of the entire wafer, the polarization effect inside the gallium nitride material, and the output current density of the device; it will seriously cause the wafer Separation from the slide, resulting in process failure. 4. The by-products in the grinding process will also pollute the front devices and cause a series of device reliability problems. Therefore, although the above methods are widely used in the preparation of SiC-based GaNHEMT devices, there are still big problems, which directly affect the device performance and yield.

在器件制备过程中,在完成正面工艺之后都要对厚度达到500um的SiC衬底进行减薄和背孔工艺,是将500um左右的SiC衬底通过机械研磨减薄到200um以下,再进行接地背孔工艺,此工艺的目的一是为了GaN HEMT器件的散热,二是进行接地背孔工艺,以减小器件内部的寄生效应,是器件应用于高频领域必不可少的工艺步骤。因为SiC衬底中的Si-C键能较大,SiC材料非常坚硬,机械研磨过程中不可避免的会对正面器件造成不可逆的损伤,会使后续背孔工艺难度增加;且SiC基GaN HEMT外延片为透明,在全自动机台上进行工艺制备,会受到一系列光学传感器检测失效所引起的机台兼容性影响。基于以上理由外延、工艺技术需要革新,来提高SiC基GaN HEMT器件的性能和降低工业化生产的难度。In the device manufacturing process, after the front process is completed, the SiC substrate with a thickness of 500um must be thinned and the back hole process is performed. Hole process, the purpose of this process is to dissipate heat from the GaN HEMT device, and the second is to perform a grounded back hole process to reduce the parasitic effect inside the device, which is an essential process step for the device to be used in the high-frequency field. Because the Si-C bond energy in the SiC substrate is relatively large, and the SiC material is very hard, it will inevitably cause irreversible damage to the front device during the mechanical grinding process, which will increase the difficulty of the subsequent back-hole process; and the SiC-based GaN HEMT epitaxy The film is transparent, and the process is prepared on a fully automatic machine, which will be affected by machine compatibility caused by a series of optical sensor detection failures. Based on the above reasons, epitaxy and process technology need to be innovated to improve the performance of SiC-based GaN HEMT devices and reduce the difficulty of industrial production.

因此,现有在制备SiC基GaN HEMT器件时采用的方法,存在影响器件性能的技术问题。Therefore, there are technical problems affecting the performance of the device in the existing methods used in the preparation of SiC-based GaN HEMT devices.

发明内容Contents of the invention

本发明主要解决的技术问题是现有在制备SiC基GaN HEMT器件时采用的方法,存在影响器件性能的技术问题,进而提供基于Si衬底外延SiC基GaN HEMT的工艺方法,能够有效提高器件的性能,提高了良品率。The technical problem mainly solved by the present invention is that the existing method used in the preparation of SiC-based GaN HEMT devices has technical problems affecting device performance, and further provides a process method based on Si substrate epitaxy SiC-based GaN HEMTs, which can effectively improve the performance of the device. Performance, improve the yield rate.

为解决上述技术问题,本发明采用的一个技术方案:提供基于Si衬底外延SiC基GaN HEMT的工艺方法,包括如下步骤:In order to solve the above technical problems, a technical solution adopted by the present invention is to provide a process method for epitaxial SiC-based GaN HEMT based on Si substrate, including the following steps:

在Si衬底上生长SiC层;growing a SiC layer on a Si substrate;

在所述SiC层上生长GaN HEMT器件;growing a GaN HEMT device on the SiC layer;

在所述GaN HEMT器件上涂抹光刻胶保护层,并以预设温度烘烤预设时间,在所述光刻胶保护层上采用粘附剂黏贴载片;Apply a photoresist protective layer on the GaN HEMT device, bake at a preset temperature for a preset time, and use an adhesive to stick the carrier on the photoresist protective layer;

采用湿法或干法方式对所述GaN HEMT器件背面的Si衬底进行腐蚀移除;Etching and removing the Si substrate on the back side of the GaN HEMT device by wet or dry method;

在移除Si衬底的SiC层上进行背面通孔工艺,使得GaN HEMT器件正面接地区域与反面连通;The backside through hole process is performed on the SiC layer with the Si substrate removed, so that the front grounding area of the GaN HEMT device is connected to the backside;

在所述GaN HEMT器件背面即SiC层面上,沉积金属Ti或Au;Depositing metal Ti or Au on the back side of the GaN HEMT device, that is, on the SiC layer;

采用加热以及有机或无机溶液湿法腐蚀光刻胶保护层和载片、粘附剂。Use heating and organic or inorganic solution to wet etch the photoresist protective layer, carrier and adhesive.

区别于现有技术的情况,本发明的有益效果是:Being different from the situation of the prior art, the beneficial effects of the present invention are:

由于在Si基GaN HEMT中插入薄层SiC层,最显著的特点是可以提高GaN HEMT结构的生长质量,提高器件在大功率应用时的散热,直接提高GaN HEMT器件的性能;Since the thin SiC layer is inserted into the Si-based GaN HEMT, the most notable feature is that it can improve the growth quality of the GaN HEMT structure, improve the heat dissipation of the device in high-power applications, and directly improve the performance of the GaN HEMT device;

另外SiC层可以直接降低生长厚SiC层的能量和材料消耗。在工艺实现上,一是将透明的常规SiC基GaN HEMT外延片转化为非透明的晶圆,在工艺机台兼容性上,特别是在涉及光学检测、识别的步骤上,提供了较大的便利;其次在背面工艺上,用Si衬底作为整个外延结构的载体,易于完全移除。在移除后可以省去SiC的机械研磨,避免对正面器件的造成不可逆损伤;可以直接对薄层SiC进行背面通孔工艺,较大程度降低了GaN HEMT微波功率器件的制备工艺难度,器件性能和良率大幅度提升。In addition, the SiC layer can directly reduce the energy and material consumption of growing a thick SiC layer. In terms of process realization, one is to convert the transparent conventional SiC-based GaN HEMT epitaxial wafer into a non-transparent wafer, which provides greater compatibility in terms of process machine compatibility, especially in steps involving optical detection and identification. Convenience; Secondly, in the back process, the Si substrate is used as the carrier of the entire epitaxial structure, which is easy to completely remove. After the removal, the mechanical grinding of SiC can be omitted to avoid irreversible damage to the front device; the backside through-hole process can be directly performed on the thin-layer SiC, which greatly reduces the difficulty of the preparation process of GaN HEMT microwave power devices and improves the device performance. And the yield has been greatly improved.

附图说明Description of drawings

图1是本发明实施例中基于Si衬底外延SiC基GaN HEMT的工艺方法的步骤流程示意图;Fig. 1 is a schematic flow chart of a process method for epitaxial SiC-based GaN HEMT based on a Si substrate in an embodiment of the present invention;

图2-图9是本发明实施例中基于Si衬底外延SiC基GaN HEMT的工艺方法的示意图。2 to 9 are schematic diagrams of a process method of epitaxial SiC-based GaN HEMT based on a Si substrate in an embodiment of the present invention.

具体实施方式detailed description

下面将结合本发明实施例中的附图,对本发明实施例中的技术方案进行清楚、完整地描述,显然,所描述的实施例仅是本发明的一部分实施例,而不是全部的实施例。基于本发明中的实施例,本领域普通技术人员在没有做出创造性劳动前提下所获得的所有其他实施例,都属于本发明保护的范围。The following will clearly and completely describe the technical solutions in the embodiments of the present invention with reference to the accompanying drawings in the embodiments of the present invention. Obviously, the described embodiments are only some, not all, embodiments of the present invention. Based on the embodiments of the present invention, all other embodiments obtained by persons of ordinary skill in the art without making creative efforts belong to the protection scope of the present invention.

本发明实施例提供的基于Si衬底外延SiC基GaN HEMT的工艺方法,解决了现有技术中在制备SiC基GaN HEMT器件时采用的方法,存在影响器件性能的技术问题。The process method of epitaxial SiC-based GaN HEMT based on the Si substrate provided by the embodiment of the present invention solves the technical problem of affecting the performance of the device in the method used in the prior art when preparing the SiC-based GaN HEMT device.

本发明实施例提供的基于Si衬底外延SiC基GaN HEMT的工艺方法,如图1所示,包括如下步骤:S101,在Si衬底上生长SiC层;S102,在该SiC层上生长GaN HEMT器件;S103,在GaN HEMT器件上采用匀胶机涂抹光刻胶保护层,并以预设温度烘烤预设时间,在所述光刻胶保护层上采用粘附剂黏贴载片;S104,采用湿法或干法方式对所述GaN HEMT器件背面的Si衬底进行腐蚀移除;S105,在移除Si衬底的SiC层上进行背面通孔工艺,使得GaN HEMT器件正面接地区域与反面连通;S106,在所述GaN HEMT器件背面即SiC层面上,沉积金属Ti或Au;S107,采用加热以及有机或无机溶液湿法腐蚀光刻胶保护层和载片、粘附剂。The process method for epitaxial SiC-based GaN HEMT based on the Si substrate provided by the embodiment of the present invention, as shown in FIG. 1 , includes the following steps: S101, growing a SiC layer on the Si substrate; S102, growing a GaN HEMT on the SiC layer Device; S103, applying a photoresist protective layer on the GaN HEMT device with a coater, and baking at a preset temperature for a preset time, and using an adhesive to stick the carrier on the photoresist protective layer; S104 , using a wet or dry method to etch and remove the Si substrate on the back of the GaN HEMT device; S105, performing a back through-hole process on the SiC layer from which the Si substrate is removed, so that the front grounding area of the GaN HEMT device is connected to the The reverse side is connected; S106, on the back side of the GaN HEMT device, that is, on the SiC layer, deposit metal Ti or Au; S107, use heating and organic or inorganic solution to wet-etch the photoresist protection layer, the carrier, and the adhesive.

在具体的实施方式中,如图2所示,在Si衬底上生长SiC层,Si衬底的厚度具体为200-600μm,Si衬底的阻值具体为5000Ω.mm,该Si衬底掺杂类型具体为N型或P型,Si衬底上生长晶向具体为001或者111。In a specific embodiment, as shown in FIG. 2 , a SiC layer is grown on a Si substrate, the thickness of the Si substrate is specifically 200-600 μm, the resistance value of the Si substrate is specifically 5000Ω.mm, and the Si substrate is doped with The heterotype is specifically N-type or P-type, and the growth crystal direction on the Si substrate is specifically 001 or 111.

具体地,该Si衬底上生长SiC层具体为采用MOCVD,PECVD,ICPCVD中任一种方式进行生长。Si衬底上生长的SiC层具体可以是单晶或多晶,SiC层厚度具体为1-200μm。具体地,通过PECVD在厚度为678μm的六吋Si片上外延生长薄层SiC层,生长沿Si衬底的111方向,生长温度为300摄氏度,反应气体为硅烷SiH4和甲烷CH4,氩气Ar为稀有气体。Specifically, the growth of the SiC layer on the Si substrate is performed by any one of MOCVD, PECVD, and ICPCVD. The SiC layer grown on the Si substrate may specifically be single crystal or polycrystal, and the thickness of the SiC layer is specifically 1-200 μm. Specifically, a thin SiC layer was epitaxially grown on a six-inch Si wafer with a thickness of 678 μm by PECVD, grown along the 111 direction of the Si substrate, the growth temperature was 300 degrees Celsius, and the reaction gases were silane SiH 4 and methane CH 4 , argon Ar for rare gases.

接着,执行S102,在SiC层上生长GaN HEMT器件。如图3、图4所示,具体地,先制作外延片,然后再制作源、栅、漏极。因此,先在SiC层上依次生长AlN成核层、GaN缓冲层、AlN插入层、AlGaN势垒层、GaN帽层,形成GaN HEMT外延片,具体地;成核层的厚度为1nm,GaN缓冲层具体为铁掺杂,厚度为1.8μm,AlN插入层的厚度为1nm,AlGaN势垒层为非故意掺杂,厚度为20nm,其中,Al组分为25%,GaN帽层的厚度为2nm。Next, execute S102 to grow a GaN HEMT device on the SiC layer. As shown in FIG. 3 and FIG. 4 , specifically, the epitaxial wafer is fabricated first, and then the source, gate, and drain are fabricated. Therefore, an AlN nucleation layer, a GaN buffer layer, an AlN insertion layer, an AlGaN barrier layer, and a GaN cap layer are sequentially grown on the SiC layer to form a GaN HEMT epitaxial wafer. Specifically, the thickness of the nucleation layer is 1 nm, and the GaN buffer layer The layer is specifically iron-doped with a thickness of 1.8 μm, the thickness of the AlN insertion layer is 1 nm, the AlGaN barrier layer is unintentionally doped with a thickness of 20 nm, and the Al component is 25%, and the thickness of the GaN cap layer is 2 nm .

然后,在该GaN HEMT外延片上依次进行器件有源区隔离、源漏欧姆接触、栅极接触、电极加厚、金属互联的工艺,完成GaN HEMT器件的制备。具体地,在GaN HEMT外延片上采用氟离子注入形成器件有源区隔离,采用电子束蒸发金属Ti、Al、Ni、Au中的任意一种,具体如果是采用Ti,那么金属Ti的厚度为20nm,如果采用Al,那么金属Al的厚度为150nm,如果采用Ni,那么金属Ni的厚度为50nm,如果是采用Au,那么金属Au的厚度为100nm,接着在850摄氏度氮气气氛中退火30s形成源漏欧姆接触和栅极接触,采用电子束蒸发金属Ni或Au形成栅极接触,如果采用Ni,金属Ni的厚度为50nm,如果采用Au,金属Au的厚度为200nm,采用电子束蒸发金属Ni或Au作为电极加厚,如果采用Ni,金属Ni的厚度为50nm,如果采用Au,金属Au的厚度为500nm,采用电子束蒸发金属Ni或Au,形成正面金属互联,如果采用Ni,金属Ni的厚度为50nm,如果采用Au,金属Au的厚度为500nm,完成GaN HEMT器件的制备。Then, on the GaN HEMT epitaxial wafer, the processes of device active area isolation, source-drain ohmic contact, gate contact, electrode thickening, and metal interconnection are sequentially performed to complete the preparation of the GaN HEMT device. Specifically, fluorine ion implantation is used on the GaN HEMT epitaxial wafer to form device active area isolation, and electron beam evaporation is used to evaporate any one of the metals Ti, Al, Ni, and Au. Specifically, if Ti is used, the thickness of the metal Ti is 20nm , if Al is used, the thickness of metal Al is 150nm, if Ni is used, the thickness of metal Ni is 50nm, if Au is used, the thickness of metal Au is 100nm, and then annealed at 850 degrees Celsius for 30s in a nitrogen atmosphere to form the source and drain Ohmic contact and grid contact, use electron beam evaporation metal Ni or Au to form grid contact, if Ni is used, the thickness of metal Ni is 50nm, if Au is used, the thickness of metal Au is 200nm, and electron beam evaporation of metal Ni or Au is used As the electrode is thickened, if Ni is used, the thickness of metal Ni is 50nm, if Au is used, the thickness of metal Au is 500nm, and electron beam evaporation of metal Ni or Au is used to form a front metal interconnection. If Ni is used, the thickness of metal Ni is 500nm. 50nm, if Au is used, the thickness of the metal Au is 500nm, and the preparation of the GaN HEMT device is completed.

在上述制备完成的GaN HEMT器件之后,如图5所示,执行S103,在GaN HEMT器件上涂抹光刻胶保护层,具体是AZ4620光刻胶,可以采用匀胶机,并以预设温度烘烤预设时间,在该光刻胶保护层上采用粘附剂黏贴载片。为了对该GaN HEMT器件制备的外延片正面区域进行保护,保护的具体方式就是采用耐酸、碱腐蚀的光刻胶、有机或无机薄膜,以覆盖方式的旋转式、喷射式等物理或化学沉积方法或者直接黏贴,使得形成的光刻胶保护层厚度为1μm-100μm,然后,在该光刻胶保护层上使用粘附剂将载片黏贴在一起。该载片与GaN HEMT外延片尺寸相近。具体地,该匀胶机转速为4000转每分钟,时间为30s,胶厚为6μm,120°烘烤120s。After the above-mentioned GaN HEMT device is prepared, as shown in Figure 5, execute S103 to apply a photoresist protective layer on the GaN HEMT device, specifically AZ4620 photoresist, which can be baked at a preset temperature by using a homogenizer. Baking for a preset time, attaching the slide with an adhesive on the photoresist protection layer. In order to protect the front area of the epitaxial wafer prepared by the GaN HEMT device, the specific method of protection is to use photoresist, organic or inorganic thin film resistant to acid and alkali corrosion, and use physical or chemical deposition methods such as rotation and spraying in the covering mode Or directly paste, so that the thickness of the formed photoresist protective layer is 1 μm-100 μm, and then use an adhesive on the photoresist protective layer to stick the slides together. The carrier is similar in size to a GaN HEMT epitaxial wafer. Specifically, the speed of the homogenizer is 4000 revolutions per minute, the time is 30s, the thickness of the glue is 6 μm, and it is baked at 120° for 120s.

接着,进行背面硅衬底移除,如图6所示,执行S104,采用湿法或干法方式对GaNHEMT器件背面的Si衬底进行腐蚀移除;具体是采用酸、碱湿法腐蚀,等离子体刻蚀,从而有效将Si衬底腐蚀掉。具体实施方式中可以使用饱和KOH溶液,在80摄氏度水浴环境中,腐蚀晶圆120分钟,从而完全移除背面硅衬底。Next, remove the silicon substrate on the back, as shown in Figure 6, perform S104, and use wet or dry methods to etch and remove the Si substrate on the back of the GaNHEMT device; specifically, use acid and alkali wet etching, plasma Bulk etching, thereby effectively etching away the Si substrate. In a specific embodiment, a saturated KOH solution may be used to etch the wafer for 120 minutes in a water bath environment at 80 degrees Celsius, so as to completely remove the back silicon substrate.

然后,进行背面通孔工艺,如图7所示,执行S105,在移除Si衬底的SiC层上进行背面通孔工艺,使得GaN HEMT器件正面接地区域与反面连通。具体地,使用氟基作为等离子体刻蚀气体,以金属Ni为刻蚀掩膜,刻蚀SiC层,去除Ni再用氯基作为等离子体刻蚀气体,以SiC为刻蚀掩膜,刻蚀该氮化物薄层至正面金属层。更具体一些,采用光刻负胶,通过双面光刻对准和电镀的方式在GaN HEMT器件正面接地区域,形成金属Ni刻蚀掩膜厚度为5μm;采用等离子体刻蚀方法刻蚀SiC层以上区域至正面器件区域,即采用刻蚀气体为SF6,稀释气体为Ar的等离子体刻蚀方法刻蚀SiC层以上一部分;接着采用刻蚀气体为Cl2和稀释气体为BCl3的等离子体刻蚀方法刻蚀另一部分至GaN HEMT器件正面接地区域,使得GaN HEMT器件正面接地区域与反面连通。Then, perform a backside through-hole process, as shown in FIG. 7 , perform S105 , and perform a backside through-hole process on the SiC layer from which the Si substrate is removed, so that the front ground area of the GaN HEMT device is connected to the backside. Specifically, use fluorine base as plasma etching gas, use metal Ni as etching mask, etch SiC layer, remove Ni and then use chlorine base as plasma etching gas, use SiC as etching mask, etch The thin layer of nitride to the front metal layer. More specifically, a photolithographic negative resist is used to form a metal Ni etching mask with a thickness of 5 μm on the front grounding area of the GaN HEMT device by means of double-sided photolithography alignment and electroplating; the SiC layer is etched by plasma etching. From the above area to the front device area, the upper part of the SiC layer is etched by using the plasma etching method with the etching gas as SF 6 and the dilution gas as Ar; then use the plasma with the etching gas as Cl 2 and the dilution gas as BCl 3 The etching method etches another part to the grounding area on the front side of the GaN HEMT device, so that the grounding area on the front side of the GaN HEMT device is connected to the back side.

在完整背面通孔工艺之后,进行背面金属工艺,如图8所示,具体地,执行S106,在GaN HEMT器件背面即SiC层面上,沉积金属Ti或Au,100μm或者1000μm;具体地,沉积低电阻率金属将正面器件的“地”线连接到背面,目的是为了减小器件工作在高频下的寄生效应,金属沉积方式可以采用电子束蒸发、磁控溅射,电镀等方式,在本发明实施例中就不再详细赘述了,采用的低电阻率金属不限于金、铂等,这样,完成了背面工艺。After the complete backside through-hole process, perform the backside metal process, as shown in FIG. 8, specifically, perform S106, and deposit metal Ti or Au on the backside of the GaN HEMT device, that is, on the SiC layer, 100 μm or 1000 μm; specifically, deposit a low The resistivity metal connects the "ground" line of the front device to the back, in order to reduce the parasitic effect of the device working at high frequency. The metal deposition method can be electron beam evaporation, magnetron sputtering, electroplating and other methods. In this It will not be described in detail in the embodiments of the invention, and the low-resistivity metals used are not limited to gold, platinum, etc. In this way, the backside process is completed.

最后,如图9所示,执行S107,采用加热以及有机或无机溶液湿法腐蚀光刻胶保护层和载片、粘附剂。具体地,采用加热方式移去载片,通过湿法腐蚀方式,采用丙酮去除正面光刻保护胶和粘附剂,从而完成整个工艺过程。Finally, as shown in FIG. 9 , S107 is executed, using heating and organic or inorganic solution to wet-etch the photoresist protection layer, the carrier sheet, and the adhesive. Specifically, the carrier is removed by heating, and the front photoresist protective glue and adhesive are removed by using acetone by wet etching, so as to complete the whole process.

通过上述的技术方案,用Si衬底作为整个外延结构的载体,易于完全移除。在移除后可以省去SiC的机械研磨,避免对正面器件的造成不可逆损伤;可以直接对薄层SiC进行背面通孔工艺,较大程度降低了GaN HEMT微波功率器件的制备工艺难度,器件性能和良率大幅度提升。Through the above technical solution, the Si substrate is used as the carrier of the entire epitaxial structure, which is easy to completely remove. After the removal, the mechanical grinding of SiC can be omitted to avoid irreversible damage to the front device; the backside through-hole process can be directly performed on the thin-layer SiC, which greatly reduces the difficulty of the preparation process of GaN HEMT microwave power devices and improves the device performance. And the yield has been greatly improved.

以上所述仅为本发明的实施例,并非因此限制本发明的专利范围,凡是利用本发明说明书及附图内容所作的等效结构或等效流程变换,或直接或间接运用在其他相关的技术领域,均同理包括在本发明的专利保护范围内。The above is only an embodiment of the present invention, and does not limit the patent scope of the present invention. Any equivalent structure or equivalent process conversion made by using the description of the present invention and the contents of the accompanying drawings, or directly or indirectly used in other related technologies fields, all of which are equally included in the scope of patent protection of the present invention.

Claims (9)

1. the process based on Si substrate epitaxial SiC base GaN HEMT, it is characterised in that comprise the following steps:
SiC layer is grown on a si substrate;
GaN HEMT devices are grown in the SiC layer;
Photoetching compound protective layer is smeared in the GaN HEMT devices, and preset time is toasted with preset temperature, in the photoetching Slide glass is pasted using adhesive on compound protective layer;
Corrosion removal is carried out to the Si substrates at the GaN HEMT devices back side using wet method or dry method mode;
Backside through vias technique is carried out in the SiC layer for removing Si substrates so that GaN HEMT devices front ground area and reverse side Connection;
It is deposited metal Ti or Au on SiC layer face at the GaN HEMT devices back side;
Using heating and organic or inorganic solution wet etching photoetching compound protective layer and slide glass, adhesive.
2. the process according to claim 1 based on Si substrate epitaxial SiC base GaN HEMT, it is characterised in that institute The thickness for stating Si substrates is specially 200-600 μm, and the resistance of Si substrates is 5000 Ω .mm, and doping type is N-type or p-type, Si linings The growth crystal orientation at bottom is 001 direction or 111 directions.
3. the process according to claim 1 based on Si substrate epitaxial SiC base GaN HEMT, it is characterised in that Si Grown SiC layers, be specially:
Any mode in MOCVD, PECVD, ICPCVD is used to grow SiC layer on a si substrate.
4. the process according to claim 1 based on Si substrate epitaxial SiC base GaN HEMT, it is characterised in that institute It is specially monocrystalline or polycrystalline to state SiC layer, and thickness is 1-200 μm.
5. the process according to claim 1 based on Si substrate epitaxial SiC base GaN HEMT, it is characterised in that GaN HEMT devices are grown in the SiC layer, are specially:
Any mode in MOCVD, MBE, HVPE is used to grow GaN HEMT devices in the SiC layer.
6. the process according to claim 1 based on Si substrate epitaxial SiC base GaN HEMT, it is characterised in that GaN HEMT devices are grown in the SiC layer, are specifically included:
Growing AIN nucleating layer, GaN cushions, AlN insert layers, AlGaN potential barrier, GaN cap, shape successively in the SiC layer Into GaN HEMT epitaxial wafers;
Device active region isolation, source and drain Ohmic contact, gate contact, electrode is carried out successively on the GaN HEMT epitaxial wafers to add The thick, technique of metal interconnection, completes the preparation of GaN HEMT devices.
7. the process according to claim 1 based on Si substrate epitaxial SiC base GaN HEMT, it is characterised in that institute The thickness for stating photoetching compound protective layer is 1 μm -100 μm.
8. the process according to claim 1 based on Si substrate epitaxial SiC base GaN HEMT, it is characterised in that Remove and backside through vias technique is carried out in the SiC layer of Si substrates so that GaN HEMT devices front ground area is connected with reverse side, is had Body includes:
Using photoetching negtive photoresist, in the positive ground area of GaN HEMT devices by way of dual surface lithography is aligned and is electroplated, formed W metal etching mask thickness is 5 μm;
Etching gas are used for SF6, diluent gas is a more than Ar method for etching plasma etching SiC layer part;
Then etching gas are used for Cl2It is BCl with diluent gas3Method for etching plasma etch another part to GaN HEMT device front ground area so that GaN HEMT devices front ground area is connected with reverse side.
9. the process according to claim 1 based on Si substrate epitaxial SiC base GaN HEMT, it is characterised in that The GaN HEMT devices back side is deposited metal Ti or Au on SiC layer face, is specially:
It is on SiC layer face, using any one mode in electron beam evaporation, magnetron sputtering, plating at the GaN HEMT devices back side Deposited metal Ti or Au.
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Cited By (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN108122749A (en) * 2017-12-20 2018-06-05 成都海威华芯科技有限公司 A kind of SiC base GaN_HEMT back process based on graphical slide glass
CN110146803A (en) * 2019-05-16 2019-08-20 长江存储科技有限责任公司 Chip sample and its acquisition methods, test packaging body and forming method thereof
CN112018175A (en) * 2019-05-30 2020-12-01 苏州捷芯威半导体有限公司 Semiconductor device, preparation method thereof and semiconductor packaging structure
CN112885710A (en) * 2021-01-15 2021-06-01 广州爱思威科技股份有限公司 Preparation method and application of epitaxial wafer of semiconductor
CN112968059A (en) * 2021-02-04 2021-06-15 宁波海特创电控有限公司 Novel enhancement mode gaN HEMT device structure
CN114566461A (en) * 2022-03-02 2022-05-31 成都海威华芯科技有限公司 Semiconductor device deep back hole manufacturing method and device based on front and back side through holes
CN118782632A (en) * 2024-06-27 2024-10-15 中环领先半导体科技股份有限公司 Epitaxial wafer and method for preparing the same

Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20090253249A1 (en) * 2008-04-07 2009-10-08 Sony Corporation Method of manufacturing semiconductor device
CN102403348A (en) * 2010-09-14 2012-04-04 三星Led株式会社 Gallium nitride based semiconductor devices and methods of manufacturing the same
US20140099757A1 (en) * 2011-02-02 2014-04-10 Transphorm Inc. III-N Device Structures and Methods
US20160380090A1 (en) * 2014-12-12 2016-12-29 Gan Systems Inc. GaN SEMICONDUCTOR DEVICE STRUCTURE AND METHOD OF FABRICATION BY SUBSTRATE REPLACEMENT
CN106504988A (en) * 2016-11-30 2017-03-15 陕西科技大学 A preparation method of GaN HEMTs with diamond heat sink substrate

Patent Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20090253249A1 (en) * 2008-04-07 2009-10-08 Sony Corporation Method of manufacturing semiconductor device
CN102403348A (en) * 2010-09-14 2012-04-04 三星Led株式会社 Gallium nitride based semiconductor devices and methods of manufacturing the same
US20140099757A1 (en) * 2011-02-02 2014-04-10 Transphorm Inc. III-N Device Structures and Methods
US20160380090A1 (en) * 2014-12-12 2016-12-29 Gan Systems Inc. GaN SEMICONDUCTOR DEVICE STRUCTURE AND METHOD OF FABRICATION BY SUBSTRATE REPLACEMENT
CN106504988A (en) * 2016-11-30 2017-03-15 陕西科技大学 A preparation method of GaN HEMTs with diamond heat sink substrate

Cited By (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN108122749A (en) * 2017-12-20 2018-06-05 成都海威华芯科技有限公司 A kind of SiC base GaN_HEMT back process based on graphical slide glass
CN108122749B (en) * 2017-12-20 2019-11-26 成都海威华芯科技有限公司 A kind of SiC base GaN_HEMT back process based on graphical slide glass
CN110146803A (en) * 2019-05-16 2019-08-20 长江存储科技有限责任公司 Chip sample and its acquisition methods, test packaging body and forming method thereof
CN112018175A (en) * 2019-05-30 2020-12-01 苏州捷芯威半导体有限公司 Semiconductor device, preparation method thereof and semiconductor packaging structure
CN112018175B (en) * 2019-05-30 2022-04-08 苏州捷芯威半导体有限公司 Semiconductor device, preparation method thereof and semiconductor packaging structure
CN112885710A (en) * 2021-01-15 2021-06-01 广州爱思威科技股份有限公司 Preparation method and application of epitaxial wafer of semiconductor
CN112968059A (en) * 2021-02-04 2021-06-15 宁波海特创电控有限公司 Novel enhancement mode gaN HEMT device structure
WO2022165884A1 (en) * 2021-02-04 2022-08-11 宁波海特创电控有限公司 Novel enhanced gan hemt device structure
CN114566461A (en) * 2022-03-02 2022-05-31 成都海威华芯科技有限公司 Semiconductor device deep back hole manufacturing method and device based on front and back side through holes
CN118782632A (en) * 2024-06-27 2024-10-15 中环领先半导体科技股份有限公司 Epitaxial wafer and method for preparing the same

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