CN114335195A - Gallium nitride Schottky barrier diode with sub-vertical structure and manufacturing method thereof - Google Patents

Abstract

The invention discloses a sub-vertical structure gallium nitride Schottky barrier diode and a manufacturing method thereof, comprising a substrate (1), a buffer layer (2) and an n ⁺ -GaN epitaxial layer (3a) sequentially arranged from bottom to top , n ^-- GaN epitaxial layer (3b), the upper surface of the n ^-- GaN epitaxial layer (3b) is a Schottky electrode setting region (13b), and the partially exposed part of the upper surface of the n ⁺ -GaN epitaxial layer (3a) is an ohmic electrode Arrangement region (13a); the first insulating protective layer (6a) covers the ohmic electrode arrangement region (13a) and the Schottky electrode arrangement region (13b), and also covers the n ⁺ -GaN epitaxial layer (3a) and the On the sidewall surface of the step formed by the n ^- GaN epitaxial layer (3b), the first insulating protective layer (6a) is provided with an ohmic electrode (4) in the window formed on the ohmic electrode setting region (13a), and the first insulating protective layer (6a) is provided with an ohmic electrode (4). (6a) A Schottky electrode (5) is provided in the window formed on the Schottky electrode arrangement region (13b). The Schottky barrier diode of the invention increases the forward current and increases the reverse breakdown voltage.

Description

A sub-vertical structure gallium nitride Schottky barrier diode and its manufacturing method

technical field

The present invention relates to the technical field of third-generation semiconductor materials and devices, in particular to a structure of a sub-vertical structure gallium nitride Schottky barrier diode and a manufacturing method thereof.

Background technique

Schottky barrier diode (SBD) is a key device in rectifier circuits. It uses the unidirectional conductivity of the device to change the physical characteristics of voltage, current, frequency, conduction state, etc. in the circuit, and realizes functions such as power switching and power conversion. In the process of electronic upgrading, it has been paid more and more attention and application, and it is a core device in China's industrial processing, automobile manufacturing, wireless communication, consumer electronics, power grid power transmission and transformation and new energy applications. Therefore, higher requirements are put forward for its forward current characteristics, reverse withstand voltage characteristics and working characteristics under high frequency conditions.

The Schottky barrier diodes manufactured by traditional technology have the technical problems of large reverse leakage current, low reverse withstand voltage and poor stability. Therefore, diodes with small reverse leakage current, high reverse withstand voltage and good stability are manufactured. It is an urgent requirement of the market.

In order to solve the above problems, the present invention has been proposed.

SUMMARY OF THE INVENTION

Gallium nitride (GaN)-based materials have the characteristics of high electron mobility, high electron saturation velocity, wide band gap, and high breakdown field. Under the working environment, devices that can work stably have received extensive attention.

A first aspect of the present invention provides a sub-vertical structure gallium nitride Schottky barrier diode, which includes:

The substrate 1 and the buffer layer 2, the n ⁺ -GaN epitaxial layer 3a and the n ^- -GaN epitaxial layer 3b are sequentially arranged from bottom to top from the upper surface of the substrate 1, and the upper surface of the n ^- -GaN epitaxial layer 3b is The Schottky electrode setting area 13b, the upper surface of the n ⁺ -GaN epitaxial layer 3a is partially exposed, and the exposed part is the ohmic electrode setting area 13a;

The first insulating protection layer 6a, the first insulating protection layer 6a covers the ohmic electrode setting area 13a and the Schottky electrode setting area 13b, and the first insulating protection layer 6a also covers the n ⁺ - On the sidewalls of the step formed by the GaN epitaxial layer 3a and the n ⁻ -GaN epitaxial layer 3b, the first insulating protective layer 6a is formed on the upper surfaces of the ohmic electrode setting region 13a and the Schottky electrode setting region 13b respectively. window;

The Schottky electrode 5 is arranged on the window portion of the Schottky electrode setting region 13b, and the edge of the Schottky electrode 5 is covered on the first insulating protective layer 6a to form a field plate structure;

The ohmic electrode 4, the ohmic electrode 4 is arranged in the window of the ohmic electrode arrangement region 13a.

Wherein, the n ^-- GaN epitaxial layer 3b is used as the drift layer of the sub-vertical structure gallium nitride Schottky barrier diode of the present invention, and the thickness of the n--GaN epitaxial layer 3b can be easily obtained by adjusting the thickness of the n ^-- GaN epitaxial layer 3b The reverse breakdown voltage of the terky barrier diode.

Preferably, the diode further includes a second insulating protective layer 6b disposed on the first insulating protective layer 6a, a partial area of the Schottky electrode 5 and a partial area of the ohmic electrode 4.

The substrate 1 used in the present invention is appropriately selected according to the materials on which the epitaxial layers (ie, the n ⁻ -GaN epitaxial layer 3b and the n ⁺ -GaN epitaxial layer 3a ) are to be formed, as well as the preparation method, the degree of difficulty and the price. of. In the present invention, considering factors such as matching with the crystal lattice and thermal expansion coefficient of the epitaxial layer, and cost, sapphire is preferentially selected as the substrate, and other substrates, such as silicon carbide, silicon, germanium, oxides (zinc oxide, oxide Aluminum lithium, magnesium oxide, LiGaO2, etc.), III-V compounds in the periodic table (GaN, GaAs, AlN, AlGaN, etc.), borides (AlInN), etc.

In order to obtain a good epitaxial material, the lattice and thermal expansion coefficient matching between the substrate 1 and the epitaxial material must be considered, and the buffer layer 2 is usually used as a transition layer between the substrate 1 and the epitaxial layer. When selecting the material of the buffer layer 2, it is necessary to consider not only the lattice and thermal expansion coefficient matching between the substrate 1 and the epitaxial material, but also the composition and structure of the epitaxial material on the buffer layer 2 as the material of the device layer, and the formation of each layer. method. In the present invention, a GaN layer grown at a low temperature is preferably used as the buffer layer 2, in addition, a III-V group compound material such as AlN can also be used.

Preferably, the film thickness of the buffer layer 2 is between 1 and 30 nm, preferably 1 to 10 nm, and preferably 3 to 10 nm. The dislocation density of the buffer layer 2 should be as small as possible, otherwise it will affect the quality of subsequent film formation. Ground, the dislocation density is controlled below 1×10 ¹¹ /cm ² .

Preferably, the ohmic electrode 4 includes a titanium layer, an aluminum layer, a nickel layer and a gold layer in sequence from bottom to top, the thickness of the titanium layer is 10-30 nm, the thickness of the aluminum layer is 80-150 nm, and the thickness of the aluminum layer is 80-150 nm. The thickness of the nickel layer is 30-60 nm, and the thickness of the gold layer is 50-500 nm. The titanium layer forms ohmic contact with the n ⁺ -GaN epitaxial layer 3a.

Preferably, the Schottky electrode 5 includes a nickel nitride layer and a gold layer in order from bottom to top, the thickness of the nickel nitride layer is 10-30 nm, and the thickness of the gold layer is 50-500 nm, wherein the nitrided layer has a thickness of 50-500 nm. The nickel layer forms a Schottky contact with the n ⁻ -GaN epitaxial layer 3b.

A second aspect of the present invention provides a method for manufacturing the sub-vertical structure gallium nitride Schottky barrier diode according to the first aspect of the present invention, which includes the following steps:

A. Growing buffer layer 2, n ⁺ -GaN epitaxial layer 3a, and n ^- -GaN epitaxial layer 3b in sequence on substrate 1;

B. The n ^-- GaN epitaxial layer 3b is removed by etching in the local region of the n ^-- GaN epitaxial layer 3b, and the exposed region of the ⁿ --GaN epitaxial layer 3a constitutes the ohmic electrode setting region 13a, and the unetched The n ^-- GaN epitaxial layer 3b region constitutes the Schottky electrode setting region 13b;

C. deposit a first insulating protective layer 6a on the upper surface of the ohmic electrode setting region 13a, the upper surface of the Schottky electrode setting region 13b, and the stepped sidewall surface formed by the n ⁺ -GaN epitaxial layer 3a and the n ^- -GaN epitaxial layer 3b, The first insulating protection layer 6a has windows formed on the upper surfaces of the ohmic electrode setting area 13a and the Schottky electrode setting area 13b respectively;

D. On the upper surface window portion of the Schottky electrode setting region 13b, a nickel nitride layer is deposited by a method of nitrogen ion-assisted injection electron beam evaporation of nickel, and then an electron beam evaporation method is used to evaporate and deposit on the nickel nitride layer The gold layer forms a Schottky electrode 5, and the edge of the Schottky electrode 5 is covered on the first insulating protective layer 6a to form a field plate structure;

E. The ohmic electrode 4 is formed on the upper surface window portion of the ohmic electrode setting region 13a by an electron beam evaporation process.

Preferably, the substrate 1 is sapphire with a thickness of 430 μm, and the plane orientation of the epitaxial growth surface of the substrate is the C-plane and is inclined by 0.15 degrees to the m-plane.

The buffer layer 2 can be formed by a well-known film-forming method such as metal organic chemical vapor phase epitaxy (MOCVD method) or molecular beam epitaxy (MBE method).

Preferably, a metal organic chemical vapor phase epitaxy (MOCVD method) is used, using trimethyl gallium (TMGa) and NH ₃ as raw materials, and a GaN layer deposited under low temperature conditions is used as the buffer layer 2, and its thickness is 10-30 nm.

Preferably, the n ⁺ -GaN epitaxial layer 3a and the n ^- -GaN epitaxial layer 3b are deposited by metal organic chemical vapor phase epitaxy, the thickness of the n ⁺ -GaN epitaxial layer 3a is 3-5 μm, and the n ^- -GaN epitaxial layer The thickness of the layer 3b is 1-3 μm, wherein the n ⁺ -GaN epitaxial layer 3a and the n ^- -GaN epitaxial layer 3b are n-type doped gallium nitride layers by doping tetravalent elements into gallium nitride. (such as silicon or germanium), and its carriers are electrons; more preferably, the n ⁺ -GaN epitaxial layer 3a and the n ^- -GaN epitaxial layer 3b are made of SiH ₄ as a doping source, and the doping concentrations are respectively In the range of 1×10 ¹⁸ cm ^-3 to 1×10 ¹⁹ cm ^-3 and 8×10 ¹⁵ cm ^-3 to 5×10 ¹⁷ cm ^-3 .

Preferably, a silicon dioxide insulating film layer is deposited by PECVD method as the first insulating protective layer 6a;

Preferably, the forming process of the ohmic electrode 4 includes depositing a titanium layer, an aluminum layer, a nickel layer on the surface of the local area of the ohmic electrode setting area 13a (ie, the window portion on the upper surface of the ohmic electrode setting area 13a) by using an electron beam evaporation process in sequence. layer and gold layer, after heat treatment in nitrogen atmosphere at 500℃-950℃ for 10-300 seconds; wherein the thickness of the titanium layer is 10-30nm, the thickness of the aluminum layer is 80-150nm, and the thickness of the nickel layer is 10-30nm. The thickness of the gold layer is 30-60 nm, the thickness of the gold layer is 50-500 nm, and the titanium layer forms an ohmic contact with the n ⁺ -GaN epitaxial layer 3a.

Preferably, the forming process of the Schottky electrode 5 includes depositing sequentially from bottom to top on the surface of the local area of the Schottky electrode setting area 13b (ie, the window portion on the upper surface of the Schottky electrode setting area 13b). The nickel nitride layer and the gold layer, the thickness of the nickel nitride layer is 10-30 nm, and the thickness of the gold layer is 50-500 nm. Wherein, the nickel nitride thin film layer forms a Schottky barrier contact with the n ^- -GaN epitaxial layer.

Preferably, the diode further includes a second insulating protective layer 6b, which is deposited on the first insulating protective layer 6a, a partial area of the Schottky electrode 5 and the ohmic electrode 4 by PECVD method On part of the area; the second insulating protective layer 6b is deposited by PECVD method, wherein preferably a _SiO2 insulating film layer is used as the second insulating protective layer 6b, with a thickness of 100-500 nm.

The sub-vertical structure mentioned in the present invention refers to a structure in which the Schottky electrode and the ohmic electrode are not arranged on the same surface, nor are they arranged on the opposite upper and lower surfaces of the device. The surface on which the ohmic electrodes are provided forms a stepped structure.

Compared with the prior art, the present invention has the following beneficial effects:

1. The present invention makes full use of the characteristics of GaN epitaxial layer material with wide forbidden band width, high electric field breakdown strength, high electron mobility and high electron saturation speed, and deposits a nickel nitride layer on the surface of GaN material. , A gold layer to form a Schottky electrode, and titanium/aluminum/nickel/gold layers are sequentially deposited on the surface of the gallium nitride material to form an ohmic electrode, which constitutes the GaN Schottky barrier diode of the sub-vertical structure of the present invention. The GaN Schottky barrier diode of the sub-vertical structure of the present invention can be used in a harsh high temperature environment, and at the same time, the device has a high reverse recovery speed, is suitable for use in high-frequency circuits, and improves the power conversion efficiency of microwave systems.

2. Compared with the conventional Schottky barrier diode of the planar structure, the GaN Schottky barrier diode of the sub-vertical structure of the present invention increases the forward current and improves the reverse breakdown voltage.

3. The present invention utilizes the high-quality nickel nitride thin film layer produced by the method of nitrogen ion-assisted implantation electron beam evaporation nickel to replace the metal layer deposited by the traditional method, and the nickel nitride layer and the n ^-- GaN epitaxial layer are composed of excellent characteristics. The Schottky barrier diode with small reverse leakage current and stable performance is realized by the Teky barrier contact.

4. The present invention adopts a field plate structure at the edge of the Schottky electrode, so that the electric field intensity in the edge region of the Schottky electrode is moderated, and the reverse voltage withstand characteristics of the Schottky barrier diode are further improved.

5. The upper surface of the entire Schottky barrier diode of the present invention is covered with an insulating layer except for the ohmic electrode and the Schottky electrode, which prevents leakage current on the surface and protects the Schottky barrier diode from the outside world. Impact.

Description of drawings

1 is a schematic cross-sectional view of the structure of a gallium nitride Schottky barrier diode according to the present invention;

2 is a top view of an ohmic electrode setting area and a Schottky electrode setting area of a gallium nitride Schottky barrier diode according to one embodiment of the present invention;

3 is a top view of an ohmic electrode setting area and a Schottky electrode setting area of a gallium nitride Schottky barrier diode according to one embodiment of the present invention;

4 is a top view of an ohmic electrode setting area and a Schottky electrode setting area of a gallium nitride Schottky barrier diode according to one embodiment of the present invention;

DESCRIPTION OF REFERENCE NUMERALS: 1, substrate, 2, buffer layer, 3a, n ⁺ -GaN epitaxial layer, 3b, n ^- -GaN epitaxial layer, 4, ohmic electrode, 5, Schottky electrode, 6a, first insulation Layer, 6b, second insulating layer, 13a, ohmic electrode setting area; 13b, Schottky electrode setting area.

Detailed ways

In order to better understand the purpose, structure and function of the present invention, a gallium nitride Schottky barrier diode with a sub-vertical structure of the present invention will be described in further detail below with reference to the accompanying drawings.

A gallium nitride Schottky barrier diode with a sub-vertical structure, comprising:

The substrate 1 and the buffer layer 2, the n ⁺ -GaN epitaxial layer 3a and the n ^- -GaN epitaxial layer 3b are sequentially arranged from bottom to top from the upper surface of the substrate 1, and the upper surface of the n ^- -GaN epitaxial layer 3b is The Schottky electrode setting area 13b, the upper surface of the n ⁺ -GaN epitaxial layer 3a is partially exposed, and the exposed part is the ohmic electrode setting area 13a;

The first insulating protection layer 6a, the first insulating protection layer 6a covers the ohmic electrode setting area 13a and the Schottky electrode setting area 13b, and the first insulating protection layer 6a also covers the n ⁺ - On the sidewalls of the step formed by the GaN epitaxial layer 3a and the n ⁻ -GaN epitaxial layer 3b, the first insulating protective layer 6a is formed on the upper surfaces of the ohmic electrode setting region 13a and the Schottky electrode setting region 13b respectively. window;

The Schottky electrode 5 is arranged on the window portion of the Schottky electrode setting region 13b, and the edge of the Schottky electrode 5 is covered on the first insulating protective layer 6a to form a field plate structure;

The ohmic electrode 4, the ohmic electrode 4 is arranged in the window of the ohmic electrode arrangement region 13a.

Wherein, the n ^-- GaN epitaxial layer 3b is used as the drift layer of the sub-vertical structure gallium nitride Schottky barrier diode of the present invention. Adjusting the thickness of the n ^-- GaN epitaxial layer 3b can easily obtain the desired shape. The reverse breakdown voltage of the terky barrier diode.

Preferably, the diode further includes a second insulating protective layer 6b disposed on the first insulating protective layer 6a, a partial area of the Schottky electrode 5 and a partial area of the ohmic electrode 4.

The ohmic electrode 4 includes a titanium layer, an aluminum layer, a nickel layer and a gold layer in sequence from bottom to top, wherein the titanium layer forms an ohmic contact with the n ⁺ -GaN epitaxial layer 3a, and the titanium layer and the n ⁺ -GaN epitaxial layer 3a form an ohmic contact. The area where the layer 3a contacts is an ohmic contact area.

The Schottky electrode 5 sequentially includes a nickel nitride layer and a gold layer from bottom to top, wherein the nickel nitride layer and the n- ^-GaN epitaxial layer 3b form a Schottky contact, and the nickel nitride layer ^and the n- - The region where the GaN epitaxial layer 3b contacts is a Schottky contact region.

The present invention will be further described in detail below in conjunction with the embodiments.

Example 1

A gallium nitride Schottky barrier diode with sapphire as the substrate 1 disclosed in this embodiment uses a C-plane sapphire with a thickness of 430 μm and a 0.15 degree inclination to the m-plane as the substrate, and the specific manufacturing method is as follows:

Z1: The substrate 1 with the clean surface is placed on the tray of the MOCVD reaction furnace, and the surface is re-cleaned at a high temperature (1020°C) in a reducing atmosphere, and then the temperature is lowered to 550°C. Gallium (TMGa) and ammonia gas (NH ₃ ) are used as raw materials to perform low-temperature growth of the GaN material to form a GaN buffer layer 2, and then gradually increase the temperature to crystallize the atomic sequence of the low-temperature GaN material. The thickness of the GaN buffer layer 2 is controlled at 10 nm.

Z2: use metal organic chemical vapor phase epitaxy to epitaxially grow the n ⁺ -GaN epitaxial layer 3a and the n ^- -GaN epitaxial layer 3b, and feed trimethylgallium (TMGa) as a gallium source and ammonia as a nitrogen source into the reaction furnace gas (NH ₃ ), the epitaxial growth conditions are: furnace pressure 760 Torr, temperature 1050 ℃, and the molar ratio of V/III group elements is 3600. The n ⁺ -GaN epitaxial layer 3a and the n ^- -GaN epitaxial layer 3b are obtained by doping Si with the doping gas SiH ₄ as the source, and adjusting the flow rate of the doping gas SiH ₄ can obtain different doping concentrations. The growth rate of the compound (TMGa) can be controlled by the flow rate, and the desired thickness can be obtained by controlling the growth time. In this embodiment, the thickness of the n ⁺ -GaN epitaxial layer 3a is 5 μm, and the doping concentration is 5×10 ¹⁸ cm ^-3 . The n ^- -GaN epitaxial layer 3b has a thickness of 1.5 μm and a doping concentration of 8×10 ¹⁶ cm ^-3 .

Z3: Coat the photoresist evenly on the surface of the n ^- -GaN epitaxial layer 3b, after pre-baking, exposing, developing and other processes, keep the photoresist in the local area of the surface of the n ^- -GaN epitaxial layer 3b, and use the photoresist As a mask, the n ^- -GaN epitaxial layer 3b without the photoresist area is removed by plasma etching, exposing the n ⁺ -GaN epitaxial layer 3a, and the upper surface of the exposed n ⁺ -GaN epitaxial layer 3a is an ohmic electrode The region 13a is provided, and then the photoresist on the region of the n ^-- GaN epitaxial layer 3b that has not been etched (ie, the region 13b where the Schottky electrode is provided) is removed.

Z4: On the entire surface of the chip, that is, the ohmic electrode setting region 13a, the Schottky electrode setting region 13b, and the sidewall surfaces of the steps formed by the n ⁻ -GaN epitaxial layer 3b and the n ⁺ -GaN epitaxial layer 3a by PECVD, deposit SiO ₂ insulating film with a thickness of 500nm.

Z5: Coat the photoresist evenly on the surface of the _SiO2 insulating film layer. After pre-baking, exposing, developing and other processes, remove the photoresist on the ohmic electrode setting area 13a to form an ohmic contact area, and keep the non-ohmic contact area. Using this photoresist as a mask, wet etching method is used, that is, BHF etching is used to remove the _SiO2 insulating film layer on the ohmic contact area to be formed, exposing the n ⁺ - of the ohmic contact area to be formed For the GaN epitaxial layer 3a, the titanium layer, the aluminum layer, the nickel layer and the gold layer are sequentially evaporated by the electron beam evaporation method, and the thicknesses of the layers are respectively 10 nm, 100 nm, 30 nm and 150 nm. Then, the metal layer in the non-ohmic contact area is peeled off by the gold tearing method, the residual photoresist on the chip surface is removed, and then heat treatment is performed in a nitrogen atmosphere. The heat treatment temperature is 820 ° C, and the heat treatment time is 30 seconds. .

Z6: uniformly coat the photoresist on the surface of the semi-finished chip on which the ohmic electrode 4 is formed, and remove the photoresist to be formed in the Schottky contact area on the Schottky electrode setting area 13b after pre-baking, exposing, developing and other processes , retain the photoresist in the non-Schottky contact area on the chip surface, use the photoresist as a mask, and use the wet etching method, that is, use BHF to remove the _SiO2 insulating film layer on the Schottky contact area to be formed , exposing the n ^- -GaN epitaxial layer to be formed in the Schottky contact area, and removing the photoresist on the surface of the chip surface that is not in the Schottky contact area.

After that, photoresist is applied on the surface of the chip, and the Schottky electrode area to be formed is exposed by photolithography, and then a nickel nitride film with a thickness of 15nm is deposited by nitrogen ion-assisted injection electron beam evaporation of nickel, and nickel nitride is deposited. When the film is to be deposited, the nitrogen ion current density at the n ^- -GaN epitaxial layer in the area where the nickel nitride film is to be deposited is 0.02μAcm ^-2 , and the energy of the ions reaching the surface of the n ^- -GaN epitaxial layer is controlled between 20eV and 30eV. Under these conditions, a good and dense nickel nitride film layer can be obtained, and then the gold film is evaporated by electron beam, and its thickness is 500 nm. Then, the metal layer in the non-Schottky electrode area is peeled off by gold peeling method, so that the edge of the Schottky electrode 5 is covered on the first insulating layer 6a to form a field plate structure, and the manufacture of the Schottky electrode 5 is completed. And remove the residual photoresist on the chip surface.

Preferably, a second insulating protective layer 6b can also be provided on the surface of the diode according to the following steps;

On the entire surface of the chip by PECVD, a SiO ₂ insulating film is deposited with a thickness of 300 nm. Coat the photoresist evenly on the surface of the chip. After pre-baking, exposure, development and other processes, the photoresist is not retained on the chip surface corresponding to part of the ohmic electrode 4 and part of the Schottky electrode 5. The method of wet etching is to use BHF to remove part of the _SiO2 insulating film layer above the area of the ohmic electrode 4 and the area of the Schottky electrode 5, exposing the pad area of the ohmic electrode 4 and the Schottky electrode 5, while the first The second insulating protective layer 6b covers the first insulating protective layer 6a, a part of the edge of the second insulating protective layer 6b covers the edge of the ohmic electrode 4, and a part of the edge covers the edge of the Schottky electrode 5, and then remove the chip surface. Photoresist to complete the fabrication of Schottky diodes.

In this embodiment, the top view of the ohmic electrode arrangement region 13a and the Schottky electrode arrangement region 13b of the sub-vertical structure Schottky barrier diode is shown in FIG. 2 . On the surface of the square chip, it is divided into two rectangular regions, namely, the right side is the ohmic electrode setting region 13a, and the left side is the Schottky electrode setting region 13b. The ohmic electrode 4 and the Schottky electrode 5 are provided on the ohmic electrode arrangement region 13a and the Schottky electrode arrangement region 13b, respectively. The area ratio of the ohmic electrode arrangement region 13a and the Schottky electrode arrangement region 13b is between 1:(1˜1.5).

The shape and position of the ohmic electrode setting area and the Schottky electrode setting area are not limited to the above description, and there are more other options. For example, as shown in Figure 3, the circular area in the center of the chip is the Schottky electrode setting The region 13b and the region other than the Schottky electrode arrangement region 13b are the ohmic electrode arrangement region 13a. The area ratio of the ohmic electrode arrangement region 13a and the Schottky electrode arrangement region 13b is between 1:(1˜1.5).

As shown in FIG. 4 again, the Schottky electrode setting area 13b is arranged in the center of the chip, which is an irregular pattern area. The ohmic electrode setting area 13a is arranged around the Schottky electrode setting area 13b, and the Schottky electrode setting area 13b is arranged. It is arranged at the center of the chip, and the ohmic electrode 4 is arranged at a corner of the chip.

The distance between the ohmic electrode 4 and the Schottky electrode 5 is 2-20 micrometers, preferably 10 micrometers. For the field plate structure of the Schottky electrode, the thickness of the first insulating layer 6a embedded under the Schottky electrode 5 is 1-10 micrometers, preferably 5 micrometers.

In the present invention, the nickel nitride film of the Schottky electrode 5 forms a Schottky contact with the n ^-- GaN epitaxial layer 3b, which becomes the most important component of the GaN Schottky barrier diode, and completes the Schottky barrier diode. The nonlinear rectification characteristic function.

The nickel nitride film of the Schottky electrode is deposited by the method of nitrogen ion-assisted injection electron beam evaporation of nickel, and the number of nitrogen ions generated by the nitrogen ion gun and the ratio of the electron beam nickel evaporation rate are adjusted to reach the deposition surface of the Schottky electrode. The energy of nitrogen ions can obtain NiN, Ni ₂ N or Ni ₃ N thin films or their mixed thin film layers.

In the present invention, the nickel nitride thin film layer formed by the nitrogen ion-assisted injection electron beam evaporation method of nickel is used to replace the traditional metal to form Schottky contact, which reduces the reverse leakage current and improves the stability of the Schottky barrier diode. sex.

In the present invention, relatively low-cost sapphire is used as the substrate, which reduces the manufacturing cost of the product. The invention changes the method that the Schottky diode with sapphire substrate adopts the traditional plane structure, and proposes the Schottky diode with the sub-vertical structure, thereby improving the reverse withstand voltage characteristic of the Schottky diode and improving the Schottky diode. The forward current density of the diode. Relatively high performance devices are obtained with inexpensive substrates.

In addition, in the structure of the Schottky electrode of the present invention, the field plate structure is clearly adopted, so that the electric field intensity at the edge of the Schottky electrode is moderated, and the reverse breakdown voltage of the device is further improved. To sum up, the present invention comprehensively improves the forward and reverse characteristics of the Schottky barrier diode from the aspects of the device structure and the device manufacturing process.

It can be understood that the present invention is described by some embodiments, and those skilled in the art know that various changes or equivalent substitutions can be made to these features and embodiments without departing from the spirit and scope of the present invention. In addition, in the teachings of this invention, these features and embodiments may be modified to adapt a particular situation and material without departing from the spirit and scope of the invention. Therefore, the present invention is not limited by the specific embodiments disclosed herein, and all embodiments falling within the scope of the claims of the present application fall within the protection scope of the present invention.

Claims (10)

1. A sub-vertical structure gan schottky barrier diode, comprising:

the buffer layer structure comprises a substrate (1), and a buffer layer (2) and a buffer layer n which are sequentially arranged from bottom to top on the upper surface of the substrate (1)⁺-GaN epitaxial layers (3a) and n^--a GaN epitaxial layer (3 b); n is^--a schottky electrode arrangement region (13b) on the upper surface of the GaN epitaxial layer (3b), said n⁺-the upper surface of the GaN epitaxial layer (3a) is partially exposed, said exposed portion being an ohmic electrode disposition region (13 a);

a first insulating protection layer (6a), the first insulating protection layer (6a) covering the ohmic electrode arrangement region (13a) and the Schottky electrode arrangement region (13b), and the first insulating protection layer (6a) further covering the n⁺-GaN epitaxial layer (3a) and n^--a GaN epitaxial layer (3b) on the step side wall surface, said first insulating protective layer (6a) having windows formed on the upper surfaces of said ohmic electrode layout region (13a) and said schottky electrode layout region (13b), respectively;

a Schottky electrode (5) which is provided in a window portion of the Schottky electrode providing region (13b), wherein an edge of the Schottky electrode (5) is covered on the first insulating protective layer (6a) to form a field plate structure;

an ohmic electrode (4), the ohmic electrode (4) being disposed in a window of the ohmic electrode disposition region (13 a).

2. The sub-vertical structure schottky barrier diode as described in claim 1, further comprising a second insulating protective layer (6b) provided on the first insulating protective layer (6a), a partial region of the schottky electrode (5) and a partial region of the ohmic electrode (4).

3. The sub-vertical structure schottky barrier diode as claimed in claim 1, wherein the substrate (1) is one of sapphire, silicon carbide, silicon, germanium, zinc oxide, lithium aluminum oxide, magnesium oxide, LiGaO2, GaN, GaAs, AlN, AlGaN, AlInN or ZrB 2.

4. The sub-vertical structure GaN Schottky barrier diode according to claim 1, wherein the ohmic electrode (4) comprises, from bottom to top, a Ti layer with a thickness of 10-30nm, an Al layer with a thickness of 80-150nm, a Ni layer with a thickness of 30-60nm, and a Au layer with a thickness of 50-500nm, wherein the Ti layer and the n layer are sequentially disposed on the substrate, and the substrate is disposed on the substrate⁺-the GaN epitaxial layer (3a) constitutes an ohmic contact.

5. The gallium nitride Schottky barrier diode with a sub-vertical structure according to claim 1, wherein the Schottky electrode (5) comprises a nickel nitride layer and a gold layer in sequence from bottom to top, the thickness of the nickel nitride layer is 10-30nm, the thickness of the gold layer is 50-500nm, wherein the nickel nitride layer and the n^--the GaN epitaxial layer (3b) constitutes a schottky contact.

6. The GaN Schottky barrier diode with the sub-vertical structure according to claim 6, wherein the thickness of the buffer layer (2) is 1-30 nm, and the dislocation density is controlled to be 1 x 10¹¹/cm²The following.

7. The method of manufacturing a sub-vertical structure gan schottky barrier diode according to claim 1, comprising the steps of:

A. sequentially growing a buffer layer (2) and n on a substrate (1)⁺-GaN epitaxial layers (3a), n^--a GaN epitaxial layer (3 b);

B. at n^--etching a local area of the GaN epitaxial layer (3b) to n^--removing the GaN epitaxial layer (3b) to expose n⁺-the region of the GaN epitaxial layer (3a) constituting an ohmic electrode arrangement region (13a), n not etched^--the GaN epitaxial layer (3b) region constitutes a schottky electrode arrangement region (13 b);

C. on the upper surface of the ohmic electrode mounting region (13a), on the upper surface of the Schottky electrode mounting region (13b), and on n⁺-GaN epitaxial layer (3a) and n^--depositing a first insulating protective layer (6a) on the step sidewall face formed by the GaN epitaxial layer (3b), said first insulating protective layer (6a) having windows formed on the upper surfaces of said ohmic electrode disposition region (13a) and said schottky electrode disposition region (13b), respectively;

D. depositing a nickel nitride layer on the window part of the upper surface of the Schottky electrode arrangement region (13b) by using a nitrogen ion assisted injection type electron beam nickel evaporation method, then depositing a gold layer on the nickel nitride layer by using an electron beam evaporation method to form a Schottky electrode (5), and covering the edge of the Schottky electrode (5) on the first insulating protection layer (6a) to form a field plate structure;

E. and forming an ohmic electrode (4) on the upper surface window part of the ohmic electrode arrangement region (13a) by using an electron beam evaporation process.

8. The method of claim 7, wherein n is the same as n⁺-GaN epitaxial layers (3a) and n^--the GaN epitaxial layer (3b) is deposited by metal organic chemical vapor phase epitaxy, n⁺-the thickness of the GaN epitaxial layer (3a) is 3-5 μm, n^-The thickness of the GaN epitaxial layer (3b) is 1 to 3 μm.

9. The method of manufacturing a sub-vertical structure gan schottky barrier diode as described in claim 7, wherein the formation of the ohmic electrode (4) comprises depositing a titanium layer, an aluminum layer, a nickel layer and a gold layer on the partial surface of the ohmic electrode formation region (13a) by an electron beam evaporation process in this order, and heat-treating the deposited layers in a nitrogen atmosphere at 500 ℃ to 950 ℃ for 10 to 300 seconds.

10. The method of manufacturing a sub-vertical structure gan schottky barrier diode according to claim 7, wherein the diode further comprises a second insulating protection layer (6b), and the second insulating protection layer (6b) is deposited on the first insulating protection layer (6a), a partial region of the schottky electrode (5), and a partial region of the ohmic electrode (4) by PECVD.

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