CN107976849A - Array base palte and preparation method thereof - Google Patents
Array base palte and preparation method thereof Download PDFInfo
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- CN107976849A CN107976849A CN201711497783.9A CN201711497783A CN107976849A CN 107976849 A CN107976849 A CN 107976849A CN 201711497783 A CN201711497783 A CN 201711497783A CN 107976849 A CN107976849 A CN 107976849A
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- 238000002360 preparation method Methods 0.000 title description 5
- 238000006243 chemical reaction Methods 0.000 claims abstract description 83
- 238000000034 method Methods 0.000 claims abstract description 23
- 239000002184 metal Substances 0.000 claims description 53
- 229910052751 metal Inorganic materials 0.000 claims description 53
- 239000000758 substrate Substances 0.000 claims description 22
- 238000004519 manufacturing process Methods 0.000 claims description 12
- 238000009413 insulation Methods 0.000 claims description 8
- 238000003491 array Methods 0.000 claims description 7
- 238000002161 passivation Methods 0.000 claims description 5
- 230000005611 electricity Effects 0.000 claims description 2
- 235000008429 bread Nutrition 0.000 abstract description 4
- 230000007704 transition Effects 0.000 abstract description 4
- 238000010586 diagram Methods 0.000 description 5
- 230000000694 effects Effects 0.000 description 3
- 239000007769 metal material Substances 0.000 description 3
- 239000003989 dielectric material Substances 0.000 description 2
- 238000005516 engineering process Methods 0.000 description 2
- 239000000463 material Substances 0.000 description 2
- 238000012986 modification Methods 0.000 description 2
- 230000004048 modification Effects 0.000 description 2
- 238000010276 construction Methods 0.000 description 1
- 238000000151 deposition Methods 0.000 description 1
- 230000008021 deposition Effects 0.000 description 1
- 235000013399 edible fruits Nutrition 0.000 description 1
- 238000000605 extraction Methods 0.000 description 1
- PCHJSUWPFVWCPO-UHFFFAOYSA-N gold Chemical compound [Au] PCHJSUWPFVWCPO-UHFFFAOYSA-N 0.000 description 1
- 239000010931 gold Substances 0.000 description 1
- 229910052737 gold Inorganic materials 0.000 description 1
- 239000012774 insulation material Substances 0.000 description 1
- 239000004973 liquid crystal related substance Substances 0.000 description 1
- 238000001755 magnetron sputter deposition Methods 0.000 description 1
- 230000007257 malfunction Effects 0.000 description 1
Classifications
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- G—PHYSICS
- G02—OPTICS
- G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
- G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
- G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour
- G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour based on liquid crystals, e.g. single liquid crystal display cells
- G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
- G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
- G02F1/1362—Active matrix addressed cells
- G02F1/136286—Wiring, e.g. gate line, drain line
-
- G—PHYSICS
- G02—OPTICS
- G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
- G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
- G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour
- G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour based on liquid crystals, e.g. single liquid crystal display cells
- G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
- G02F1/1333—Constructional arrangements; Manufacturing methods
-
- G—PHYSICS
- G02—OPTICS
- G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
- G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
- G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour
- G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour based on liquid crystals, e.g. single liquid crystal display cells
- G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
- G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
- G02F1/1362—Active matrix addressed cells
- G02F1/1368—Active matrix addressed cells in which the switching element is a three-electrode device
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- Physics & Mathematics (AREA)
- Nonlinear Science (AREA)
- Mathematical Physics (AREA)
- Chemical & Material Sciences (AREA)
- Crystallography & Structural Chemistry (AREA)
- General Physics & Mathematics (AREA)
- Optics & Photonics (AREA)
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Devices For Indicating Variable Information By Combining Individual Elements (AREA)
Abstract
The present invention provides a kind of array base palte, by the way that every scan line is electrically connected with least one ranks conversion line, and the extending direction of the ranks conversion line is identical with the extending direction of data cable, make it possible to that the scanning signal of scanning circuit is transmitted to corresponding scan line by the ranks conversion line, scan drive circuit and the data driving chip can be arranged on the same side, realize the narrow frame of arraying bread board.Wherein, the ranks transition lines are located at same layer with the scan line and are obtained by same processing procedure, and by disconnecting forming fracture with the position that other scan lines in addition to the scan line that it is electrically connected intersect in every ranks conversion line.Also, the both ends of the fracture are electrically connected by connecting line, the pixel electrode of the connecting line and the array base palte is located at same layer and is formed by same processing procedure.Therefore, the array base palte of the invention need not increase the narrow frame that extra processing procedure can be achieved to include the array base palte.
Description
Technical field
The present invention relates to a kind of Display Technique device, more particularly to a kind of array base palte and preparation method thereof.
Background technology
At present, people are required to realize narrow frame for display devices such as mobile phone, tablets, are imitated with obtaining more preferable appearance
Fruit.In the array base palte of the display panel of liquid crystal, including a plurality of data lines and multi-strip scanning line arranged in a crossed manner.In order to realize
The narrow frame of display panel is stated, is generally electrically connected every scan line and a connecting line, and causes the company
Wiring is identical with the extending direction of the data cable, so that the drive circuit being connected with the scan line can be with the number
The data driving chip connected according to line is arranged on the same side, so as to fulfill the narrow frame on three sides of the display panel.It is but existing
Have in technology, in order to enable the connecting line is electrically connected with the corresponding scan line, without with other scan lines
It is electrically connected, it is thus typically necessary to increase one layer of metal layer newly, and the metal layer is patterned, it is required to obtain
Connecting line, and the connecting line is attached with corresponding scan line by via.Due to increasing the metal layer, and increase
The metal layer is patterned to obtain the processing procedure of the connecting line, so as to can cause the processing procedure of the array base palte significantly
Increase, influences the efficiency that is made of the array base palte, and increase cost of manufacture.
The content of the invention
A kind of array base palte of offer of the present invention and preparation method thereof, realizes the display panel comprising the array base palte
While narrow frame, the processing procedure of the array base palte is reduced, increases the efficiency that is made of the array base palte, reduction is fabricated to
This.
The array base palte, including：
Substrate, the first metal layer, second metal layer and the pixel electrode layer being sequentially arranged on the substrate, first gold medal
Equal insulation set between category layer, second metal layer and the pixel electrode layer；
The first metal layer includes the scan line of a plurality of spaced and parallel setting and the ranks of a plurality of spaced and parallel setting turn
Thread-changing, the scan line and the ranks conversion line are arranged in a crossed manner；Every scan line is changed with least one ranks
Line is electrically connected, and the position that every ranks conversion line intersects with other scan lines in addition to the scan line that it is electrically connected disconnects shape
Into fracture, the both ends of the fracture are electrically connected by connecting line, and the connecting line is located at different layers simultaneously with the scan line
Insulation；
The second metal layer includes the data cable of a plurality of spaced and parallel setting, and a plurality of data cable described is swept with a plurality of
Retouch line to intersect, adjacent two data cables intersect with two adjacent scan lines and surround a pixel region；The data
The extending direction of line is identical with the extending direction of the ranks conversion line；
The pixel electrode layer includes multiple pixel electrodes and the multiple connecting lines that array is set, each pixel
Electrode is arranged in a pixel region；Each connecting line is corresponding with a fracture, every connecting line
Both ends of the both ends respectively with the fracture are electrically connected.
Wherein, the both ends of the connecting line are connected by the both ends of via and the fracture of the ranks conversion line respectively
Connect, the data cable gets around the via.
Wherein, the data cable includes Part I and the Part II that is connected with the Part I, described second
It is divided into the part for getting around the via, the orthographic projection of Part I plane where the ranks conversion line covers the row
Row conversion line.
Wherein, the Part I of the data cable and Part II connect to form straight line, and the ranks conversion line disconnects position
The both ends put are connected to an exit, and the exit extends along the extending direction of the gate line, the via and institute
State exit correspondence.
Wherein, the array base palte includes non-shading region and shading region, and the exit is located in the shading region.
Wherein, the both ends of the fracture correspond to a via respectively, and the Part II is bent to get around the mistake
Hole.
Wherein, the array base palte includes non-shading region and shading region, the scan line, data cable and ranks conversion
Line is respectively positioned on the shading region.
Wherein, driving chip is additionally provided with the substrate, the driving chip is arranged on the side of the substrate, and the drive
Dynamic chip is located on the extending direction of the data cable, and the data cable and the ranks conversion line are electric with the driving chip
Connection.
The production method of the array base palte includes step：
One substrate is provided, forms patterned the first metal layer, the patterned the first metal layer on the substrate
The scan line of multiple grids, a plurality of spaced and parallel setting being connected with the multiple grid including array setting, and it is a plurality of
Ranks conversion line；Every scan line is electrically connected with least one ranks conversion line, and the ranks conversion line is with removing
The position that other scan lines outside its scan line being electrically connected intersect disconnects forming fracture, so that the ranks conversion line is with removing it
Other scan lines insulation outside the scan line of electrical connection；
The first insulating layer and patterned active layer are formed on the first metal layer successively, the active layer includes more
The active area that a array is set, each active area are corresponding with a grid；
The second insulating layer and second metal layer are formed on the active layer successively, the second metal layer includes a plurality of
Every multigroup source-drain electrode that the data cable and array being arranged in parallel are set；Source-drain electrode described in every group is corresponding with an active area,
The source electrode of source-drain electrode is electrically connected with a data line described in every group, and drain electrode is electrically connected by via with the corresponding active area；
The a plurality of data cable intersects with a plurality of scan line, and adjacent two data cables and two adjacent scan line phases
Hand over and surround a pixel region；The extending direction of the ranks conversion line is identical with the extending direction of the data cable；
Passivation layer and pixel electrode layer, the pixel electrode layer are formed in the second metal layer successively includes multiple battle arrays
Arrange the pixel electrode set and multiple connecting lines；Each pixel electrode be arranged in a pixel region and with described in one group
Source-drain electrode corresponds to, and each pixel electrode is electrically connected with the drain electrode of the corresponding source-drain electrode, and each connecting line passes through
Via connects the both ends of the ranks conversion line open position.
Wherein, the production method of the array base palte further includes：Driving chip, and institute are set in the side of the substrate
Driving chip is stated on the extending direction of the data cable, a plurality of data cable and the ranks conversion line with the drive
Dynamic chip is electrically connected.
The array base palte provided by the invention, by by every scan line and at least one ranks conversion line
It is electrically connected, and the extending direction of the ranks conversion line is identical with the extending direction of the data cable, enabling by described
The scanning signal of scanning circuit is transmitted to corresponding scan line by ranks conversion line, enabling by the scan drive circuit with
The data driving chip is arranged on the same side, realizes the narrow frame of the arraying bread board, and then realizes the display panel
Narrow frame.Wherein, the ranks transition lines are located at same layer with the scan line and are obtained by same processing procedure, and by
Every the ranks conversion line disconnects forming fracture with the position that other scan lines in addition to the scan line that it is electrically connected intersect, and makes
The only corresponding scan line of every ranks conversion line is obtained to be electrically connected.Also, the both ends of the fracture carry out electricity by connecting line
The pixel electrode of connection, the connecting line and the array base palte is located at same layer and is formed by same processing procedure.Therefore, this hair
The bright array base palte need not increase the narrow side that the display panel comprising the array base palte can be achieved in extra processing procedure
Frame, for the prior art, reduces the processing procedure of the array base palte, and increase the array base palte is made effect
Rate, reduces cost of manufacture.
Brief description of the drawings
For more clearly illustrate the present invention construction feature and effect, come below in conjunction with the accompanying drawings with specific embodiment to its into
Row describes in detail.
Fig. 1 is the circuit diagram of array base palte of the embodiment of the present invention；
Fig. 2 is the structure diagram of the array base palte of the embodiment of the present invention；
Fig. 3 is the schematic cross-section of the array base palte of the embodiment of the present invention；
Fig. 4 is the flow diagram of the production method of the array base palte of the embodiment of the present invention；
Fig. 5-Fig. 7 is the schematic diagram of the array base palte of each step of the production method of the array base palte of the embodiment of the present invention.
Embodiment
Below in conjunction with the attached drawing in the embodiment of the present invention, the technical solution in the embodiment of the present invention is carried out clear, complete
Site preparation describes.Wherein, the drawings are for illustrative purposes only and are merely schematic diagrams, it is impossible to is interpreted as the limitation to this patent.
- Fig. 3 is please referred to Fig.1, the present invention provides a kind of array base palte 100.The array base palte 100 includes substrate 10, according to
Secondary the first metal layer, second metal layer and pixel electrode layer on the substrate 10.Wherein, the first metal layer,
By setting insulating layer to realize mutually insulated between two metal layers and pixel electrode layer.In the present embodiment, first metal
The first insulating layer being once laminated, active layer and the second insulating layer are additionally provided between layer and the second metal layer, described first
Metal layer and the active layer insulates by first insulating layer, and the second metal layer and the active layer pass through described the
Insulation between the insulation of two insulating layers.Also, in order to ensure the normal display work(of the display panel comprising the array base palte 100
Can, first insulating layer and second insulating layer are that transparent insulation material is formed.It is understood that invention its
In its embodiment, the active layer can also be arranged between the first metal layer and the substrate.The second metal layer with
Passivation layer (not shown) is formed between the pixel electrode layer, to realize the second metal layer and the pixel electrode layer
Between insulation.Further, the array base palte 100 of the invention further includes shading region and non-shading region, the array base
The cabling of plate 100 and the element on the array base palte 100 are respectively positioned on the shading region, so as to ensure the array base palte
100 display effect.
The first metal layer include multiple arrays set grid 21 and a plurality of spaced and parallel setting scan line 22 and
A plurality of spaced and parallel setting ranks conversion line 23, the grid 21 is electrically connected with the scan line 22, the ranks conversion line and
The scan line 22 is intersected.Every scan line 22 is electrically connected with least one ranks conversion line, passes through the row
Scanning signal is transmitted to the scan line 22 by row conversion line.In the present embodiment, the scan line 22 is horizontally extending, often
Scan line 22 is electrically connected with grid described in a line 21 described in bar；The ranks conversion line vertically extends.It is appreciated that
It is that the ranks conversion line being connected with scan line every described 22 is more, scanning signal is transmitted by the ranks conversion line
Speed to the scan line 22 is faster.But the more wirings hardly possiblies that can increase the array base palte 100 of ranks conversion line
Degree, and influence the aperture opening ratio for including the display panel of the array base palte 100.In the present embodiment, every scan line 22 with
Two ranks conversion line connections.Also, in the present embodiment, every ranks conversion line is with removing the scan line that it is electrically connected
The position that other scan lines 22 outside 22 intersect disconnects forming fracture 24, so that the ranks conversion line is swept with except what it was electrically connected
The other scan lines 22 retouched outside line 22 insulate.Also, in the application, the both ends of the fracture are electrically connected by a connecting line 62
Connect, i.e., the both ends of described connecting line 62 are electrically connected by via with the both ends of the fracture respectively.Also, the connecting line 62 with
The ranks conversion line is located at different layers.In the present embodiment, the both ends of the fracture are connected to an exit 25 and state extraction
End extends along the extending direction of 21 line of grid.In other words, one end of the exit and the ranks conversion line is disconnected
One end connection of mouth, the other end extend along the extending direction of 21 line of grid.I.e. described exit deviates the ranks conversion
Straight line where line.It is understood that referring to Fig. 2, in other embodiments of the invention, the ranks conversion line disconnects
The both ends of position can not set exit.It is understood that in the present embodiment, the grid 21, multi-strip scanning line 22 and more
Bar ranks conversion line 23, and the exit are respectively positioned on the shading region of the array base palte 100.
The active layer includes the active area 33 that multiple arrays are set, each active area 33 and a grid 21
It is corresponding.I.e. each orthographic projection of the active area 33 on the first metal layer is in the corresponding grid 21.
The second metal layer includes the data cable 30 of a plurality of spaced and parallel setting and more group patterns set source-drain electrode.Every group
The source-drain electrode is corresponding with an active area 33.Source-drain electrode described in every group includes a source electrode 31 and a drain electrode 32, often
The data cable 30 that source electrode one end of the group source-drain electrode is adjacent with its is electrically connected, and the other end has with corresponding
Source region 33 is electrically connected.Drain electrode one end of source-drain electrode described in every group is electrically connected with the corresponding active area 33.The data cable 30
Intersect with a plurality of scan line 22, adjacent two data cables 30 intersect with two adjacent scan lines 22 and surround one
A pixel region.The extending direction of the data cable 30 is identical with the extending direction of the ranks conversion line.The data cable 30 wraps
Include Part I 31 and the Part II 32 being connected with the Part I.The Part II gets around the via, to avoid
The data cable 30 is electrically connected by via and the ranks conversion line, so as to ensure the quality of the array base palte 100.
Further, the orthographic projection of Part I plane where the ranks conversion line covers the ranks conversion line, and then
Influence of the ranks conversion line to the aperture opening ratio of the array base palte 100 is avoided, so as to ensure opening for the array base palte 100
Mouth rate.In the present embodiment, since the both ends of the fracture are connected with exit, the via corresponds respectively to the exit,
I.e. described connecting line 62 connects orthographic projection of the via at the fracture both ends on the first metal layer in the exit.
So that on straight line where the both ends of the connecting line 62 and the ranks conversion line so that the first of the data cable 30
When part 31 and Part II 32 connect shape in line, the data cable 30 can also get around the via.Referring to Fig. 3,
In another embodiment of the present invention, since the both ends of the fracture do not connect exit, i.e., the corresponding institute in described fracture both ends
State via and be located at ranks conversion line institute on straight line.In order to avoid the data cable 30 passes through the via and the ranks
Conversion line connects, and therefore, the Part II 32 of the data cable 30 is bent to be around the via, the Part I
Straight line.
The pixel electrode layer includes multiple pixel electrodes 61 and the multiple connecting lines 62 that array is set, each described
Pixel electrode 61 is arranged in a pixel region.The connecting line 62 is spaced with the pixel electrode 61, to avoid the company
Connection of the wiring 62 to the pixel electrode 61 and cause 100 cisco unity malfunction of array base palte.Each connecting line
62 is corresponding with a fracture, and the both ends of every connecting line 62 connect the two of the fracture by the via respectively
End.
Further, the array base palte 100 of the invention further includes driving chip 70, and the driving chip is arranged on described
The side of substrate.The driving chip is located on the extending direction of the data cable 30, and the data cable 30 and the ranks turn
Thread-changing is electrically connected with the driving chip.The driving chip includes data-signal driving unit and scanning signal driving is single
Member, the data cable 30 are electrically connected with the data-signal driving unit, and the scan line 22 and scanning signal driving are single
Member is electrically connected.Wherein, the data-signal driving unit is data driving chip, and the scanning signal driving unit drives for scanning
Dynamic circuit.
The array base palte 100 provided by the invention, by by every 22 and at least one ranks of scan line
Conversion line is electrically connected, and the extending direction of the ranks conversion line is identical with the extending direction of the data cable 30, enabling
The scanning signal of scanning circuit is transmitted to by corresponding scan line 22 by the ranks conversion line, enabling by the scanning
Drive circuit is arranged on the same side with the data driving chip, realizes the narrow frame of the arraying bread board, and then described in realization
The narrow frame of display panel.Wherein, the ranks transition lines are located at same layer and pass through same processing procedure with the scan line 22
Obtain, and by the position that every ranks conversion line intersects with other scan lines 22 in addition to the scan line 22 that it is electrically connected
Put disconnection and form fracture so that the only corresponding scan line 22 of every ranks conversion line is electrically connected.Also, the two of the fracture
End is electrically connected by connecting line 62, and the pixel electrode 61 of the connecting line 62 and the array base palte 100 is located at same layer
And formed by same processing procedure.Therefore, the array base palte 100 of the invention need not increase extra processing procedure and can be achieved to wrap
The narrow frame of display panel containing the array base palte 100, for the prior art, reduces the array base
The processing procedure of plate 100, increases the efficiency that is made of the array base palte 100, reduces cost of manufacture.
Referring to Fig. 4, the present invention also provides the production method of the array base palte 100, including step：
Step 110, referring to Fig. 5, provide a substrate 10, patterned first metal is formed on the substrate 10
Layer.
Specifically, first pass through the modes such as magnetron sputtering, vapour deposition forms the first metal material layer on the substrate,
The first metal layer is patterned by light shield technique, to obtain the patterned the first metal layer 10.Wherein, institute
Put down at a plurality of interval for state multiple grids 21 of the patterned the first metal layer including array setting, being connected with the multiple grid 21
The scan line 22 that row is set, and a plurality of ranks conversion line；Every 22 and at least one ranks conversion line of scan line
It is electrically connected, and the position that the ranks conversion line intersects with other scan lines 22 in addition to the scan line 22 that it is electrically connected disconnects shape
Into fracture, so that the ranks conversion line insulate with other scan lines 22 in addition to the scan line 22 that it is electrically connected
Step 120, referring to Fig. 6, the first insulating layer and patterned described is formed on the first metal layer successively
Active layer.
Specifically, the first insulating layer and dielectric materials layer are formed on the first metal layer successively.Pass through light shield technique
The dielectric materials layer is patterned, obtains the active layer.Wherein, the active layer includes having for multiple arrays setting
Source region 33, each active area 33 are corresponding with a grid 21.
Step 130, referring to Fig. 7, the second insulating layer and the second metal layer are formed on the active layer successively.
Specifically, the second insulating layer and the second metal material layer are formed on the active layer successively.Pass through light shield technique
Second metal material layer is patterned, obtains the second metal layer.The second metal layer includes a plurality of interval
The data cable 30 being arranged in parallel, a plurality of data cable 30 intersect with a plurality of scan line, and described in adjacent two
Data cable 30 intersects with two adjacent scan lines and surrounds a pixel region；The extending direction of the ranks conversion line with it is described
The extending direction of data cable 30 is identical.
Step 140, please refer to Fig. 2 again, forms passivation layer and the pixel electrode in the second metal layer successively
61 layers.
Specifically, 61 material layer of passivation layer and pixel electrode is formed in the second metal layer successively.Pass through light shield work
Skill patterns 61 material layer of pixel electrode, obtains 61 layers of the pixel electrode.61 layers of the pixel electrode includes
The pixel electrode 61 and multiple connecting lines 62 that multiple arrays are set.Each pixel electrode 61 is arranged in a pixel region
And it is corresponding with source-drain electrode described in one group, each pixel electrode is electrically connected with the drain electrode of the corresponding source-drain electrode, Mei Gesuo
State the both ends that connecting line 62 connects 23 open position of ranks conversion line by via.
Further, in the present invention, the production method the present invention also provides the array base palte 100 further includes step：
The side of the substrate sets driving chip, and the driving chip is arranged on the extending direction of the data cable 30, a plurality of institute
State data cable 30 and the ranks conversion line is electrically connected with the driving chip.
The array base palte 100 provided by the invention, by by every 22 and at least one ranks of scan line
Conversion line is electrically connected, and the extending direction of the ranks conversion line is identical with the extending direction of the data cable 30, enabling
The scanning signal of scanning circuit is transmitted to by corresponding scan line 22 by the ranks conversion line, enabling by the scanning
Drive circuit is arranged on the same side with the data driving chip, realizes the narrow frame of the arraying bread board, and then described in realization
The narrow frame of display panel.Wherein, the ranks transition lines are located at same layer and pass through same processing procedure with the scan line 22
Obtain, and by the position that every ranks conversion line intersects with other scan lines 22 in addition to the scan line 22 that it is electrically connected
Put disconnection and form fracture so that the only corresponding scan line 22 of every ranks conversion line is electrically connected.Also, the two of the fracture
End is electrically connected by connecting line 62, and the pixel electrode 61 of the connecting line 62 and the array base palte 100 is located at same layer
And formed by same processing procedure.Therefore, the array base palte 100 of the invention need not increase extra processing procedure and can be achieved to wrap
The narrow frame of display panel containing the array base palte 100, for the prior art, reduces the array base
The processing procedure of plate 100, increases the efficiency that is made of the array base palte 100, reduces cost of manufacture.
The above is the preferred embodiment of the present invention, it is noted that for those skilled in the art
For, various improvements and modifications may be made without departing from the principle of the present invention, these improvements and modifications are also considered as
Protection scope of the present invention.
Claims (10)
- A kind of 1. array base palte, it is characterised in that including：Substrate, the first metal layer, second metal layer and the pixel electrode layer being sequentially arranged on the substrate, first metal Equal insulation set between layer, second metal layer and the pixel electrode layer；The first metal layer includes the scan line of a plurality of spaced and parallel setting and the ranks conversion line of a plurality of spaced and parallel setting, The scan line and the ranks conversion line are arranged in a crossed manner；Every scan line is electrically connected with least one ranks conversion line Connect, every ranks conversion line disconnected with the position that other scan lines in addition to the scan line that it is electrically connected intersect to be formed it is disconnected Mouthful, the both ends of the fracture are electrically connected by connecting line, and the connecting line is located at different layers with the scan line and insulate；The second metal layer includes the data cable of a plurality of spaced and parallel setting, a plurality of data cable and a plurality of scan line Intersecting, two adjacent data cables intersect with two adjacent scan lines and surround a pixel region；The data cable Extending direction is identical with the extending direction of the ranks conversion line；The pixel electrode layer includes multiple pixel electrodes and the multiple connecting lines that array is set, each pixel electrode In a pixel region；Each connecting line is corresponding with a fracture, the both ends of every connecting line The both ends with the fracture are electrically connected respectively.
- 2. array base palte as claimed in claim 1, it is characterised in that the both ends of the connecting line respectively by via with it is described The both ends connection of the fracture of ranks conversion line, the data cable get around the via.
- 3. array base palte as claimed in claim 2, it is characterised in that the data cable includes Part I and with described first The Part II of part connection, to get around the part of the via, the Part I turns the Part II in the ranks The orthographic projection of plane covers the ranks conversion line where thread-changing.
- 4. array base palte as claimed in claim 3, it is characterised in that Part I and the Part II connection of the data cable Form straight line, the both ends of the ranks conversion line open position are connected to an exit, and the exit is along the grid The extending direction extension of line, the via are corresponding with the exit.
- 5. array base palte as claimed in claim 4, it is characterised in that the array base palte includes non-shading region and shading region, The exit is located in the shading region.
- 6. array base palte as claimed in claim 3, it is characterised in that the both ends of the fracture correspond to a mistake respectively Hole, the Part II are bent to get around the via.
- 7. such as the array base palte of any one of claim 1-6, it is characterised in that the array base palte include non-shading region and Shading region, the scan line, data cable and the ranks conversion line are respectively positioned on the shading region.
- 8. the array base palte as claimed in claim 1, it is characterised in that driving chip, the driving are additionally provided with the substrate Chip is arranged on the side of the substrate, and the driving chip is located on the extending direction of the data cable, the data cable and The ranks conversion line is electrically connected with the driving chip.
- 9. a kind of production method of array base palte, it is characterised in that including step：One substrate is provided, forms patterned the first metal layer on the substrate, the patterned the first metal layer includes Multiple grids of array setting, the scan line for a plurality of spaced and parallel setting being connected with the multiple grid, and a plurality of ranks Conversion line；Every scan line is electrically connected with least one ranks conversion line, and the ranks conversion line is with removing its electricity The position that other scan lines outside the scan line of connection intersect disconnects forming fracture so that the ranks conversion line with except it is electrically connected Other scan lines insulation outside the scan line connect；The first insulating layer and patterned active layer are formed on the first metal layer successively, the active layer includes multiple battle arrays The active area set is arranged, each active area is corresponding with a grid；The second insulating layer and second metal layer are formed on the active layer successively, it is flat that the second metal layer includes a plurality of interval Multigroup source-drain electrode that the data cable and array that row is set are set；Source-drain electrode described in every group is corresponding with an active area, every group The source electrode of the source-drain electrode is electrically connected with a data line, and drain electrode is electrically connected by via with the corresponding active area；It is a plurality of The data cable intersects with a plurality of scan line, and adjacent two data cables intersect simultaneously with two adjacent scan lines Surround a pixel region；The extending direction of the ranks conversion line is identical with the extending direction of the data cable；Passivation layer is formed in the second metal layer and pixel electrode layer, the pixel electrode layer are set including multiple arrays successively The pixel electrode and multiple connecting lines put；Each pixel electrode be arranged in a pixel region and with source and drain described in one group Extremely corresponding, each pixel electrode is electrically connected with the drain electrode of the corresponding source-drain electrode, and each connecting line passes through via Connect the both ends of the ranks conversion line open position.
- 10. the production method of array base palte as claimed in claim 9, it is characterised in that the making side of the array base palte Method further includes：Driving chip is set in the side of the substrate, and the driving chip is arranged on the extending direction of the data cable On, a plurality of data cable and the ranks conversion line are electrically connected with the driving chip.
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| Application Number | Priority Date | Filing Date | Title |
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| CN201711497783.9A CN107976849A (en) | 2017-12-29 | 2017-12-29 | Array base palte and preparation method thereof |
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| CN201711497783.9A CN107976849A (en) | 2017-12-29 | 2017-12-29 | Array base palte and preparation method thereof |
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