CN107968097B - Display device, display substrate and manufacturing method thereof - Google Patents

Abstract

The invention discloses a display device, a display substrate and a manufacturing method thereof. The display substrate includes a semiconductor active layer, the semiconductor active layer includes a first semiconductor oxide layer and a second semiconductor oxide layer, and the first semiconductor oxide layer is located in the Between the second semiconductor oxide layer and the base substrate, the conductivity of the first semiconductor oxide layer is lower than that of the second semiconductor oxide layer, and the second semiconductor oxide layer can protect the first semiconductor when the source and drain metal layers are etched oxide layer so that it is not damaged. The present invention can reduce one photolithography process, and also prevent the semiconductor active layer from being damaged when the source and drain metal layers are etched.

Description

A display device, a display substrate and a manufacturing method thereof

technical field

The present invention relates to the field of liquid crystal displays, in particular to a display device, a display substrate and a manufacturing method thereof.

Background technique

Thin Film Transistor Liquid Crystal Display (TFT-LCD for short) has the characteristics of small size, low power consumption and no radiation, and occupies a dominant position in the current flat panel display market. In recent years, TFT-LCD has achieved rapid development, especially LCD TVs have developed more rapidly, and their size and resolution have been continuously improved. Large-size, high-resolution LCD TVs have become a mainstream of TFT-LCD development. At present, the world's largest LCD TV has exceeded 100 inches. With the continuous increase of the size of TFTL-LCD and the continuous improvement of resolution, in order to improve the display quality, a higher frequency drive circuit is used, the delay of the image signal becomes more serious, and the signal delay becomes a constraint for large size and high resolution. It is one of the key factors for the display effect of high-speed TFT-LCD.

The inventors of the present application have found during long-term research and development that, in the process of fabricating the array substrate, it is necessary to fabricate a semiconductor active layer on the gate insulating layer, and then form the source and drain electrodes on the semiconductor active layer. However, the semiconductor active layer is easily damaged when the source and drain are fabricated. In order to avoid damage to the semiconductor active layer, the prior art method is to first fabricate an etching barrier layer (ie, a protection layer) on the semiconductor active layer. layer), and then deposit the metal layer for making the source and drain, thus adding a photolithography process, which greatly affects the production efficiency.

SUMMARY OF THE INVENTION

The present invention mainly provides a display device, a display substrate and a manufacturing method thereof, so as to solve the need to form a metal etching barrier layer (ie a protective layer) on a semiconductor active layer in the prior art, and then deposit a metal for making the source and drain electrodes layer, which in turn affects the production efficiency.

In order to solve the above-mentioned technical problems, a technical scheme adopted in the present invention is as follows:

A method for manufacturing a display substrate, comprising:

A first semiconductor oxide layer is arranged on one side of the base substrate; a second semiconductor oxide layer is arranged on the side of the first semiconductor oxide layer away from the base substrate; a source is formed on the second semiconductor oxide layer A drain metal layer; wherein the conductivity of the first semiconductor oxide layer is lower than that of the second semiconductor oxide layer, and the second semiconductor oxide layer can be used as a protective layer when etching the source and drain metal layers The first semiconductor oxide layer is protected from damage.

In order to solve the above-mentioned technical problems, another technical scheme adopted by the present invention is as follows:

A display substrate, characterized in that, comprising: a semiconductor active layer arranged on one side of a base substrate, the semiconductor active layer comprising a first semiconductor oxide layer and a second semiconductor oxide layer stacked on each other, and the The first semiconductor oxide layer is located between the second semiconductor oxide layer and the base substrate; wherein the conductivity of the first semiconductor oxide layer is lower than that of the second semiconductor oxide layer, and the first semiconductor oxide layer has a lower conductivity than the second semiconductor oxide layer. The second semiconductor oxide layer can be used as a protective layer to protect the first semiconductor oxide layer from being damaged when the source and drain metal layers are etched.

In order to solve the above-mentioned technical problems, another technical scheme adopted by the present invention is as follows:

A display device includes the above-mentioned display substrate.

The beneficial effects of the present invention are: different from the situation in the prior art, the present invention sequentially arranges a semiconductor active layer composed of a first semiconductor oxide layer and a second semiconductor oxide layer stacked on each other on one side of the base substrate, and The conductivity of the first semiconductor oxide layer is lower than that of the second semiconductor oxide layer, so that the second semiconductor oxide layer can act as a protective layer to protect the first semiconductor when the source and drain metal layers are etched Oxidizing the layer so that it is not damaged reduces one photolithography process compared to the prior art solution, and does not affect the production efficiency.

Description of drawings

1 is a schematic partial cross-sectional structure diagram of an embodiment of a display substrate of the present invention, or a partial cross-sectional structural schematic diagram of an embodiment of a display substrate manufacturing method after forming a passivation layer and a pixel electrode layer;

FIG. 2 is a top view of an embodiment of the display substrate of the present invention;

3 is a partial cross-sectional structural schematic diagram of an embodiment of the display device of the present invention;

FIG. 4 is a flow chart of part of the implementation steps of an embodiment of the method for manufacturing a display substrate of the present invention.

5 is a partial cross-sectional structural schematic diagram of a first etch barrier layer and a second etch barrier layer after forming the first etch barrier layer and the second etch barrier layer according to an embodiment of the method for fabricating the display substrate of the present invention;

6 is a partial cross-sectional structural schematic diagram of the first semiconductor oxide layer and the second semiconductor oxide layer after forming the first semiconductor oxide layer and the second semiconductor oxide layer according to an embodiment of the method for fabricating the display substrate of the present invention;

FIG. 7 is a partial cross-sectional view of a structure after forming a gate insulating layer according to an embodiment of the method for fabricating a display substrate of the present invention.

Detailed ways

Example 1

Please refer to FIGS. 1 and 2 . FIG. 1 is a partial cross-sectional structural diagram of the display substrate 100 of the present embodiment, and FIG. 2 is a top view of an implementation manner of the display substrate 100 of the present embodiment. The front view after the cut at the tangent line, the gate line 30 in FIG. 2 is connected with the gate electrode 11, the data line 40 is connected with the source electrode 17, the pixel electrode 20 is connected with the drain electrode 18, and the source electrode 17 is connected with the drain electrode 18 is separated by a passivation layer 19 in the middle.

A display substrate 100 provided by an embodiment of the present invention includes:

The gate electrode 11 and the gate insulating layer 12 are provided on one side of the base substrate 10, and the semiconductor active layer (not marked) is provided on the gate insulating layer 12, and the semiconductor active layer includes a first The semiconductor oxide layer 13 and the second semiconductor oxide layer 14 , and the first semiconductor oxide layer 13 is located between the second semiconductor oxide layer 14 and the base substrate 10 .

Wherein, relatively, the first semiconductor oxide layer 13 is a low-conductivity oxide layer, and the second semiconductor oxide layer 14 is a high-conductivity oxide layer, that is, the conductivity of the first semiconductor oxide layer 13 is lower than the The conductivity of the second semiconductor oxide layer 14, the second semiconductor oxide layer 14 can be used as a protective layer to protect the first semiconductor oxide layer 13 from being damaged when the metal layers of the source electrode 17 and the drain electrode 18 are etched. damage.

In this embodiment, the first semiconductor oxide layer 13 and the second semiconductor oxide layer 14 are both metal oxide films, and the oxygen element content of the first semiconductor oxide layer 13 is lower than that of the first semiconductor oxide layer 13. The oxygen element content of the semiconductor oxide layer 14 .

可选为

或

In this embodiment, the thickness ranges of the first semiconductor oxide layer 13 and the second semiconductor oxide layer 14 are both

optional as

or

In this embodiment, an etching barrier layer (not marked) is provided on the side of the second semiconductor oxide layer 14 away from the base substrate 10 , and the etching barrier layer includes first etching barrier layers stacked on each other. 15 and the second etching stopper layer 16 , and the first etching stopper layer 15 is located between the second etching stopper layer 16 and the second semiconductor oxide layer 14 .

Wherein, the first etching barrier layer 15 can prevent the oxygen element of the semiconductor active layer from diffusing to the outside thereof, thereby preventing the semiconductor active layer from losing oxygen.

In this embodiment, the material of the first etching stopper layer 15 is titanium nitride, and the material of the second etching stopper layer 16 is titanium metal or titanium alloy.

可选为

或

所述第二蚀刻阻挡层16的厚度范围为

可选为

或

In this embodiment, the thickness range of the first etching stopper layer 15 is

optional as

or

The thickness of the second etching barrier layer 16 is in the range of

optional as

or

In this embodiment, a source electrode 17 , a drain electrode 18 , a passivation layer 19 and a pixel electrode 20 are further provided on the second etching barrier layer 16 , wherein the source electrode 17 and the drain electrode 18 are provided on the second etching barrier layer 16 It is on the side away from the base substrate 10 and is on the same layer. The passivation layer 19 covers the source electrode 17 and the drain electrode 18, and passes through the source electrode 17, the drain electrode 18, the second etching stopper layer 16, the first etching stopper layer 15 and the second semiconductor oxide layer 14, and is connected with the first semiconductor The oxide layer 13 contacts.

In the present invention, a semiconductor active layer composed of a first semiconductor oxide layer 13 and a second semiconductor oxide layer 14 that are stacked on each other is sequentially arranged on one side of the base substrate 10, and the conductivity of the first semiconductor oxide layer 13 is low. Due to the conductivity of the second semiconductor oxide layer 14, the second semiconductor oxide layer 14 can act as a protective layer to protect the first semiconductor oxide layer 13 when etching the metal layers of the source electrode 17 and the drain electrode 18, so that the It is not damaged, reduces one photolithography process than the solution in the prior art, and does not affect the production efficiency.

In addition, in the present invention, the first etching stopper layer 15 and the second etching stopper layer 16 are stacked on the second semiconductor oxide layer 14, and the first etching stopper layer 15 is located between the second etching stopper layer 16 and the second etching stopper layer 16. Between the second semiconductor oxide layers 14, the first etch stop layer 15 can prevent the oxygen element of the semiconductor active layer from diffusing to the outside thereof, and avoid the loss of oxygen in the semiconductor active layer, which can be very good. The balance of oxygen elements in the semiconductor active layer is protected.

Finally, since the first etching barrier layer 15 and the second etching barrier layer 16 are both metal layers, and the second semiconductor oxide layer 14 is a high conductivity oxide layer, such a design can reduce the etching barrier layer and the second semiconductor oxide layer 14 The contact resistance between the first semiconductor oxide layer 13 with low conductivity and the gate insulating layer 12 directly forms the channel of the thin film transistor, and the thin film transistor formed by the first semiconductor oxide layer 13 with low oxygen content is more stable in performance. The second semiconductor oxide layer 14 with high conductivity protects the channel of the first semiconductor oxide layer 13, which can improve the performance of the thin film transistor.

Embodiment 2

Please refer to FIG. 3 and FIG. 1 , FIG. 3 is a partial cross-sectional structural schematic diagram of an embodiment of the display device of the present invention, and FIG. 1 is a partial cross-sectional structural schematic diagram of an embodiment of the display substrate 100 of the present invention. As can be seen from FIG. 3 , the display device of this embodiment includes the display substrate 100 described in the first embodiment, and a corresponding driving circuit 200 is provided on the display substrate 100 . Since the display substrate 100 has been described in detail in the first embodiment, the discussion is not repeated here.

In the display substrate 100 of the present invention, a semiconductor active layer composed of a first semiconductor oxide layer 13 and a second semiconductor oxide layer 14 stacked on each other is sequentially disposed on one side of the base substrate 10 , and the first semiconductor oxide layer 13 The conductivity of the second semiconductor oxide layer 14 is lower than that of the second semiconductor oxide layer 14, so that the second semiconductor oxide layer 14 can act as a protective layer to protect the first semiconductor oxide layer when etching the metal layers of the source electrode 17 and the drain electrode 18. The layer 13 is not damaged, one photolithography process is reduced compared with the prior art solution, and the production efficiency is not affected.

In addition, in the display substrate 100 of the present invention, the first etching stopper layer 15 and the second etching stopper layer 16 are laminated on the second semiconductor oxide layer 14 , and the first etching stopper layer 15 is located in the second etching stopper layer 14 . Between the barrier layer 16 and the second semiconductor oxide layer 14, wherein the first etching barrier layer 15 can prevent the oxygen element of the semiconductor active layer from diffusing to the outside thereof, preventing the semiconductor active layer from losing oxygen, The balance of oxygen elements in the semiconductor active layer can be well protected.

Finally, since the first etching barrier layer 15 and the second etching barrier layer 16 are both metal layers, and the second semiconductor oxide layer 14 is a high conductivity oxide layer, such a design can reduce the etching barrier layer and the second semiconductor oxide layer 14 The contact resistance between the first semiconductor oxide layer 13 with low conductivity and the gate insulating layer 12 directly forms the channel of the thin film transistor, and the thin film transistor formed by the first semiconductor oxide layer 13 with low oxygen content is more stable in performance. The second semiconductor oxide layer 14 with high conductivity protects the channel of the first semiconductor oxide layer 13, which can improve the performance of the thin film transistor.

Embodiment 3

Please refer to FIG. 1 , FIG. 4 , FIG. 5 , FIG. 6 and FIG. 7 . FIG. 1 is a schematic diagram of a partial cross-sectional structure of the passivation layer 19 and the pixel electrode 20 layer in an embodiment of the manufacturing method of the display substrate 100 of the present embodiment. 4 is a flow chart of part of the implementation steps of an embodiment of the manufacturing method of the display substrate 100 of the present embodiment, and FIG. FIG. 6 is a schematic diagram of a partial cross-sectional structure after the formation of the first semiconductor oxide layer 13 and the second semiconductor oxide layer 14 according to an embodiment of the manufacturing method of the display substrate 100 of the present embodiment, FIG. 7 is a partial cross-sectional view of the structure after forming the gate insulating layer 12 according to an embodiment of the manufacturing method of the display substrate 100 of the present embodiment.

The manufacturing method of the display substrate 100 of the present invention includes the following steps:

Step S101 : forming a gate 11 and a gate insulating layer 12 in sequence on one side of the base substrate 10 , wherein the gate 11 is formed on a surface of the base substrate 10 , and the gate insulating layer 12 is formed on the gate 11 , and covers the gate electrode 11 and the base substrate 10 . The structure formed in this step is shown in FIG. 7 .

The specific steps of this step are as follows:

的栅极11金属层，可选厚度为

和

栅极11金属层的材料可以选用Cr、W、Ti、Ta、Mo、Al、Cu等金属或合金，由多层金属组成的金属层也能满足需要。由第一次光刻工艺形成栅极11和栅极11扫描线。First, on the transparent glass substrate or quartz, that is, on the base substrate 10, sputtering or thermal evaporation are used to sequentially deposit a thickness of about

The gate 11 metal layer, optional thickness is

and

The material of the metal layer of the gate 11 can be selected from metals or alloys such as Cr, W, Ti, Ta, Mo, Al, Cu, and the like, and a metal layer composed of multiple layers of metals can also meet the requirements. The gate electrode 11 and the scan line of the gate electrode 11 are formed by the first photolithography process.

的栅极绝缘层12，厚度可选为

或

栅极绝缘层12可以选用氧化物、氮化物或者氧氮化合物，对应的反应气体可选为SiH₄、NH₃、N₂、SiH₂Cl₂、NH₃或N₂中的一种。Second, continuously depositing a thickness of

The gate insulating layer 12, the thickness can be selected as

or

The gate insulating layer 12 can be selected from oxides, nitrides or oxygen-nitrogen compounds, and the corresponding reactive gas can be selected from one of SiH ₄ , NH ₃ , N ₂ , SiH ₂ Cl ₂ , NH ₃ or N ₂ .

Step S102 : sequentially forming a first semiconductor oxide layer 13 and a second semiconductor oxide layer 14 stacked on each other on the gate insulating layer 12 , wherein on the side of the first semiconductor oxide layer 13 away from the base substrate 10 The second semiconductor oxide layer 14 is provided. The structure formed in this step is shown in FIG. 6 .

In this step, the conductivity of the first semiconductor oxide layer 13 is lower than the conductivity of the second semiconductor oxide layer 14 , and the second semiconductor oxide layer 14 can etch the metal layers of the source electrode 17 and the drain electrode 18 . At this time, the first semiconductor oxide layer 13 is protected from damage as a protective layer.

The specific steps of this step are as follows:

低导电率的金属氧化物薄膜和

高导电率的金属氧化物薄膜。低导电率的金属氧化物薄膜的厚度可选为

或

高导电率的金属氧化物薄膜的厚度可选为

或

其中，低导电率的金属氧化物薄膜作为第一半导体氧化层13，高导电率的金属氧化物薄膜作为第二半导体氧化层14。在沉积金属氧化物薄膜时，通过控制氧元素的含量来控制金属氧化物薄膜的导电性，金属氧化物薄膜中氧元素的含量高，该金属氧化物薄膜的导电性就比较好，其导电性能接近导体。金属氧化物薄膜中氧元素的含量低，该金属氧化物薄膜的导电性就不够好，其为半导体。高导电率的第二半导体氧化层14直接与源极17和漏极18金属层接触，这样设计可以减少其与源极17和漏极18的接触电阻，提升金属氧化物薄膜晶体管(TFT)的开态电流。低导电率的第一半导体氧化层13直接与栅极绝缘层12接触，形成TFT的沟道，低含氧量的金属氧化物形成的半导体层TFT性能更稳定。On the gate insulating layer 12 by the sputtering method, a continuous deposition thickness of

low conductivity metal oxide films and

High conductivity metal oxide films. The thickness of the low conductivity metal oxide film can be chosen as

or

The thickness of the high conductivity metal oxide film can be chosen as

or

The metal oxide film with low conductivity is used as the first semiconductor oxide layer 13 , and the metal oxide film with high conductivity is used as the second semiconductor oxide layer 14 . When depositing a metal oxide film, the conductivity of the metal oxide film is controlled by controlling the content of oxygen element. The higher the content of oxygen element in the metal oxide film, the better the conductivity of the metal oxide film, and its electrical conductivity close to the conductor. If the content of oxygen element in the metal oxide film is low, the electrical conductivity of the metal oxide film is not good enough, and it is a semiconductor. The second semiconductor oxide layer 14 with high conductivity is in direct contact with the metal layers of the source electrode 17 and the drain electrode 18, so the design can reduce its contact resistance with the source electrode 17 and the drain electrode 18 and improve the metal oxide thin film transistor (TFT) performance. on-state current. The first semiconductor oxide layer 13 with low conductivity is in direct contact with the gate insulating layer 12 to form the channel of the TFT, and the semiconductor layer TFT formed by the metal oxide with low oxygen content is more stable in performance.

The material of the metal oxide film can be selected from amorphous IGZO (indium gallium zinc oxide), that is, indium gallium zinc oxide, or amorphous IGZO, HIZO, IZO, a-InZnO, a-InZnO, ZnO:F, In ₂ O ₃ :Sn, In ₂ O ₃ :Mo, Cd ₂ SnO ₄ , ZnO:Al, TiO ₂ :Nb, Cd-Sn-O or other metal oxides.

Step S103 : sequentially forming a first etching stopper layer 15 and a second etching stopper layer 16 stacked on each other on the second semiconductor oxide layer 14 , and the first etching stopper layer 15 is located between the second etching stopper layer 16 and the second etching stopper layer 16 . between the second semiconductor oxide layers 14 . The structure formed in this step is shown in FIG. 5 .

In this step, the first etching barrier layer 15 can prevent the oxygen element of the semiconductor active layer from diffusing to the outside thereof, so as to prevent the semiconductor active layer from losing oxygen.

The specific steps of this step are as follows:

的氮化钛(TiNx)，可选为

或

再沉积厚度约为

钛(Ti)金属或者Ti合金，可选为

或

TiNx对氧元素有很好的阻隔能力，可以防止半导体有源层中的氧元素扩撒到外部或者被外部的Ti夺取，可以很好地保护半导体有源层中氧元素的平衡能力。First, the second semiconductor oxide layer 14 is continuously deposited by sputtering or thermal evaporation to a thickness of about

of titanium nitride (TiNx), optionally as

or

The redeposition thickness is about

Titanium (Ti) metal or Ti alloy, optional

or

TiNx has a good barrier ability to oxygen elements, which can prevent oxygen elements in the semiconductor active layer from spreading to the outside or being captured by external Ti, and can well protect the balance ability of oxygen elements in the semiconductor active layer.

Step S104 : forming a source electrode 17 , a drain electrode 18 , a passivation layer 19 and a pixel electrode 20 on the second etching stopper layer 16 , wherein the source electrode 17 and the drain electrode 18 are formed on the second etching stopper layer 16 , and the passivation layer 19 is formed on the source electrode 17 and the drain electrode 18 and covers the source electrode 17 and the drain electrode 18 , and the pixel electrode 20 is formed on a part of the passivation layer 19 , and is in contact and conducts through the passivation layer 19 and the drain electrode 18 . The structure formed in this step is shown in FIG. 1 .

The specific steps of this step are as follows:

铜(Cu)金属作为源漏极金属层，可选为

或

通过一次灰色调或者半色调掩模板曝光显影后，采用半色调或者灰色调掩模版曝光显影后，形成完全曝光区域、部分透光区域和不透光区域，完全不透光区域对应于源漏极金属层和数据线40，部分透光区域对应于TFT沟道区域。蚀刻完全透光区域的源漏极金属层和半导体氧化层，接着进行一次光刻灰化工艺去除掉部分透光区域的光刻胶，接着进行蚀刻工艺，蚀刻掉TFT沟道区域的源漏极金属层，形成源极17和漏极18。由于蚀刻的选择比问题，会蚀刻掉其下一部分第二半导体氧化层14，通过控制蚀刻工艺，使其蚀刻掉全部的高导电率的第二半导体氧化层14，从而形成TFT的沟道，形成半导体有源层。为提升金属氧化物TFT的性能可以对TFT沟道区域的半导体氧化层的表面进行一次处理，如使用N₂O处理，修复蚀刻时对半导体氧化层的损伤和污染The deposition thickness is about

Copper (Cu) metal as the source-drain metal layer, optional

or

After exposure and development through a gray-tone or half-tone mask, and after exposure and development using a half-tone or gray-tone mask, a fully exposed area, a partially transparent area and an opaque area are formed, and the fully opaque area corresponds to the source and drain The metal layer and the data line 40, and the partially transparent region corresponds to the TFT channel region. Etch the source and drain metal layers and semiconductor oxide layers in the fully transparent area, then perform a photolithography ashing process to remove the photoresist in the partially transparent area, and then perform an etching process to etch away the source and drain of the TFT channel area. Metal layer, forming source 17 and drain 18. Due to the selectivity ratio of etching, the next part of the second semiconductor oxide layer 14 will be etched away. By controlling the etching process, all the second semiconductor oxide layer 14 with high conductivity is etched away, thereby forming the channel of the TFT and forming semiconductor active layer. In order to improve the performance of metal oxide TFT, the surface of the semiconductor oxide layer in the TFT channel region can be treated once, such as N ₂ O treatment, to repair the damage and pollution of the semiconductor oxide layer during etching.

的钝化层19，厚度可选为

或

钝化层19可以选用氧化物、氮化物或者氧氮化合物，可以是单层也可以是多层，对应的反应气体可以为SiH₄，NH₃，N₂、SiH₂Cl₂，NH₃或N₂的一种，再通过一次普通的光刻工艺形成接触过孔(未标示)。First, on the second etching barrier layer 16 after the above steps are completed, the thickness is continuously deposited by the PECVD method to a thickness of

The passivation layer 19, the thickness can be selected as

or

The passivation layer 19 can be selected from oxides, nitrides or oxygen-nitrogen compounds, and can be a single layer or a multi-layer, and the corresponding reactive gas can be SiH ₄ , NH ₃ , N ₂ , SiH ₂ Cl ₂ , NH ₃ or N One of ₂ , a common photolithography process is used to form contact vias (not marked).

的透明导电层作为像素电极20，厚度可选为

或

透明导电层的材料可选为ITO(Indium Tin Oxides，铟锡氧化物半导体透明导电膜)或者IZO(indium-doped zinc oxides，掺铟氧化锌)，或者其他的透明金属氧化物。Second, on the passivation layer 19 via hole and the passivation layer 19 near the passivation layer 19 after the above steps are continuously deposited by sputtering or thermal evaporation to a thickness of about

The transparent conductive layer is used as the pixel electrode 20, and the thickness can be selected as

or

The material of the transparent conductive layer can be selected from ITO (Indium Tin Oxides, indium tin oxide semiconductor transparent conductive film) or IZO (indium-doped zinc oxides, indium-doped zinc oxide), or other transparent metal oxides.

The above description is only an embodiment of the present invention, and is not intended to limit the scope of the present invention. Any equivalent structure or equivalent process transformation made by using the contents of the description and drawings of the present invention, or directly or indirectly applied to other related technologies Fields are similarly included in the scope of patent protection of the present invention.

Claims (6)

1. A method for manufacturing a display substrate, comprising: A first semiconductor oxide layer is provided on one side of the base substrate; Disposing a second semiconductor oxide layer on the side of the first semiconductor oxide layer away from the base substrate; forming a source-drain metal layer on the second semiconductor oxide layer; Wherein, the conductivity of the first semiconductor oxide layer is lower than that of the second semiconductor oxide layer, and the second semiconductor oxide layer can be used as a protective layer to protect the first semiconductor oxide layer when the source and drain metal layers are etched. layer so that it is not damaged; A first etching stopper layer and a second etching stopper layer stacked on each other are disposed on the side of the second semiconductor oxide layer away from the base substrate, and the first etching stopper layer is located on the second etching stopper layer and the second semiconductor oxide layer; Wherein, the semiconductor active layer includes the first semiconductor oxide layer and the second semiconductor oxide layer stacked on each other, and the first etching barrier layer can prevent the oxygen element of the semiconductor active layer from diffusing to the outside thereof, avoiding The semiconductor active layer loses oxygen; Wherein, the material of the first etching barrier layer is titanium nitride, and the material of the second etching barrier layer is titanium metal or titanium alloy. 2. a display substrate, is characterized in that, comprises: A semiconductor active layer disposed on one side of the base substrate, the semiconductor active layer includes a first semiconductor oxide layer and a second semiconductor oxide layer stacked on each other, and the first semiconductor oxide layer is located on the second semiconductor layer between the oxide layer and the base substrate; Wherein, the conductivity of the first semiconductor oxide layer is lower than that of the second semiconductor oxide layer, and the second semiconductor oxide layer can be used as a protective layer to protect the first semiconductor oxide layer when the source and drain metal layers are etched. Semiconductor oxide layer to keep it from damage; A first etching stopper layer and a second etching stopper layer stacked on each other are disposed on the side of the second semiconductor oxide layer away from the base substrate, and the first etching stopper layer is located on the second etching stopper layer and the second semiconductor oxide layer; Wherein, the first etching barrier layer can prevent the oxygen element of the semiconductor active layer from diffusing to the outside thereof, so as to prevent the semiconductor active layer from losing oxygen; Wherein, the material of the first etching barrier layer is titanium nitride, and the material of the second etching barrier layer is titanium metal or titanium alloy. 3 . The display substrate of claim 2 , wherein the first semiconductor oxide layer and the second semiconductor oxide layer are both metal oxide layer films, and the oxygen element content of the first semiconductor oxide layer is 3 . lower than the oxygen element content of the second semiconductor oxide layer. 4 . The display substrate according to claim 2 , wherein the thickness ranges of the first semiconductor oxide layer and the second semiconductor oxide layer are both

5 . The display substrate according to claim 2 , wherein the thickness of the first etching barrier layer is in the range of: 6 .

The thickness of the second etch stop layer is in the range of

6. A display device, characterized in that it comprises the display substrate of any one of claims 2-5.

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