CN106531782A - Metal oxide thin film transistor and manufacturing method thereof - Google Patents
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- 239000010409 thin film Substances 0.000 title claims abstract description 106
- 229910044991 metal oxide Inorganic materials 0.000 title claims abstract description 94
- 150000004706 metal oxides Chemical class 0.000 title claims abstract description 94
- 238000004519 manufacturing process Methods 0.000 title claims description 5
- 239000004065 semiconductor Substances 0.000 claims abstract description 51
- IJGRMHOSHXDMSA-UHFFFAOYSA-N Atomic nitrogen Chemical compound N#N IJGRMHOSHXDMSA-UHFFFAOYSA-N 0.000 claims abstract description 45
- 238000009792 diffusion process Methods 0.000 claims abstract description 43
- 238000000034 method Methods 0.000 claims abstract description 36
- 230000004888 barrier function Effects 0.000 claims abstract description 32
- 239000010408 film Substances 0.000 claims abstract description 32
- 229910052757 nitrogen Inorganic materials 0.000 claims abstract description 26
- 239000012212 insulator Substances 0.000 claims abstract description 23
- 238000002161 passivation Methods 0.000 claims abstract description 23
- 238000002360 preparation method Methods 0.000 claims abstract description 19
- 239000001257 hydrogen Substances 0.000 claims abstract description 16
- 229910052739 hydrogen Inorganic materials 0.000 claims abstract description 16
- UFHFLCQGNIYNRP-UHFFFAOYSA-N Hydrogen Chemical compound [H][H] UFHFLCQGNIYNRP-UHFFFAOYSA-N 0.000 claims abstract description 15
- 239000011737 fluorine Substances 0.000 claims abstract description 13
- 229910052731 fluorine Inorganic materials 0.000 claims abstract description 13
- 239000000758 substrate Substances 0.000 claims abstract description 12
- 238000000151 deposition Methods 0.000 claims description 39
- 230000008021 deposition Effects 0.000 claims description 39
- 238000000137 annealing Methods 0.000 claims description 37
- 229910052581 Si3N4 Inorganic materials 0.000 claims description 11
- HQVNEWCFYHHQES-UHFFFAOYSA-N silicon nitride Chemical compound N12[Si]34N5[Si]62N3[Si]51N64 HQVNEWCFYHHQES-UHFFFAOYSA-N 0.000 claims description 11
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 claims description 10
- 229910052814 silicon oxide Inorganic materials 0.000 claims description 10
- PXGOKWXKJXAPGV-UHFFFAOYSA-N Fluorine Chemical compound FF PXGOKWXKJXAPGV-UHFFFAOYSA-N 0.000 claims description 9
- 230000005669 field effect Effects 0.000 claims description 8
- 238000001755 magnetron sputter deposition Methods 0.000 claims description 5
- 238000005234 chemical deposition Methods 0.000 claims description 2
- 238000004528 spin coating Methods 0.000 claims description 2
- 238000001771 vacuum deposition Methods 0.000 claims 1
- YCKRFDGAMUMZLT-UHFFFAOYSA-N Fluorine atom Chemical compound [F] YCKRFDGAMUMZLT-UHFFFAOYSA-N 0.000 abstract 3
- 239000001301 oxygen Substances 0.000 description 12
- 229910052760 oxygen Inorganic materials 0.000 description 12
- QVGXLLKOCUKJST-UHFFFAOYSA-N atomic oxygen Chemical compound [O] QVGXLLKOCUKJST-UHFFFAOYSA-N 0.000 description 10
- 238000010438 heat treatment Methods 0.000 description 9
- 239000007789 gas Substances 0.000 description 8
- 230000007547 defect Effects 0.000 description 7
- QJGQUHMNIGDVPM-UHFFFAOYSA-N nitrogen group Chemical group [N] QJGQUHMNIGDVPM-UHFFFAOYSA-N 0.000 description 7
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- GQPLMRYTRLFLPF-UHFFFAOYSA-N Nitrous Oxide Chemical compound [O-][N+]#N GQPLMRYTRLFLPF-UHFFFAOYSA-N 0.000 description 6
- XLOMVQKBTHCTTD-UHFFFAOYSA-N Zinc monoxide Chemical compound [Zn]=O XLOMVQKBTHCTTD-UHFFFAOYSA-N 0.000 description 6
- 238000005516 engineering process Methods 0.000 description 5
- 238000000623 plasma-assisted chemical vapour deposition Methods 0.000 description 4
- 229910021420 polycrystalline silicon Inorganic materials 0.000 description 4
- 229920005591 polysilicon Polymers 0.000 description 4
- GYHNNYVSQQEPJS-UHFFFAOYSA-N Gallium Chemical compound [Ga] GYHNNYVSQQEPJS-UHFFFAOYSA-N 0.000 description 3
- OKKJLVBELUTLKV-UHFFFAOYSA-N Methanol Chemical compound OC OKKJLVBELUTLKV-UHFFFAOYSA-N 0.000 description 3
- 238000011161 development Methods 0.000 description 3
- 238000010586 diagram Methods 0.000 description 3
- 230000000694 effects Effects 0.000 description 3
- 229910052733 gallium Inorganic materials 0.000 description 3
- 239000004973 liquid crystal related substance Substances 0.000 description 3
- 239000000463 material Substances 0.000 description 3
- 229910052751 metal Inorganic materials 0.000 description 3
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- 238000011160 research Methods 0.000 description 3
- ABTOQLMXBSRXSM-UHFFFAOYSA-N silicon tetrafluoride Chemical group F[Si](F)(F)F ABTOQLMXBSRXSM-UHFFFAOYSA-N 0.000 description 3
- XLYOFNOQVPJJNP-UHFFFAOYSA-N water Chemical compound O XLYOFNOQVPJJNP-UHFFFAOYSA-N 0.000 description 3
- 239000011787 zinc oxide Substances 0.000 description 3
- QGZKDVFQNNGYKY-UHFFFAOYSA-N Ammonia Chemical compound N QGZKDVFQNNGYKY-UHFFFAOYSA-N 0.000 description 2
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 2
- 229910052738 indium Inorganic materials 0.000 description 2
- APFVFJFRJDLVQX-UHFFFAOYSA-N indium atom Chemical compound [In] APFVFJFRJDLVQX-UHFFFAOYSA-N 0.000 description 2
- 238000009776 industrial production Methods 0.000 description 2
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- 239000013077 target material Substances 0.000 description 2
- 238000002834 transmittance Methods 0.000 description 2
- BHHYHSUAOQUXJK-UHFFFAOYSA-L zinc fluoride Chemical compound F[Zn]F BHHYHSUAOQUXJK-UHFFFAOYSA-L 0.000 description 2
- 229920001621 AMOLED Polymers 0.000 description 1
- NIPNSKYNPDTRPC-UHFFFAOYSA-N N-[2-oxo-2-(2,4,6,7-tetrahydrotriazolo[4,5-c]pyridin-5-yl)ethyl]-2-[[3-(trifluoromethoxy)phenyl]methylamino]pyrimidine-5-carboxamide Chemical compound O=C(CNC(=O)C=1C=NC(=NC=1)NCC1=CC(=CC=C1)OC(F)(F)F)N1CC2=C(CC1)NN=N2 NIPNSKYNPDTRPC-UHFFFAOYSA-N 0.000 description 1
- XURCIPRUUASYLR-UHFFFAOYSA-N Omeprazole sulfide Chemical compound N=1C2=CC(OC)=CC=C2NC=1SCC1=NC=C(C)C(OC)=C1C XURCIPRUUASYLR-UHFFFAOYSA-N 0.000 description 1
- BLRPTPMANUNPDV-UHFFFAOYSA-N Silane Chemical compound [SiH4] BLRPTPMANUNPDV-UHFFFAOYSA-N 0.000 description 1
- GWEVSGVZZGPLCZ-UHFFFAOYSA-N Titan oxide Chemical compound O=[Ti]=O GWEVSGVZZGPLCZ-UHFFFAOYSA-N 0.000 description 1
- HCHKCACWOHOZIP-UHFFFAOYSA-N Zinc Chemical compound [Zn] HCHKCACWOHOZIP-UHFFFAOYSA-N 0.000 description 1
- 238000010521 absorption reaction Methods 0.000 description 1
- ZOIORXHNWRGPMV-UHFFFAOYSA-N acetic acid;zinc Chemical compound [Zn].CC(O)=O.CC(O)=O ZOIORXHNWRGPMV-UHFFFAOYSA-N 0.000 description 1
- 229910021529 ammonia Inorganic materials 0.000 description 1
- 238000000231 atomic layer deposition Methods 0.000 description 1
- 230000009286 beneficial effect Effects 0.000 description 1
- 239000008358 core component Substances 0.000 description 1
- 238000003795 desorption Methods 0.000 description 1
- 230000006866 deterioration Effects 0.000 description 1
- VBXWCGWXDOBUQZ-UHFFFAOYSA-K diacetyloxyindiganyl acetate Chemical compound [In+3].CC([O-])=O.CC([O-])=O.CC([O-])=O VBXWCGWXDOBUQZ-UHFFFAOYSA-K 0.000 description 1
- 238000005530 etching Methods 0.000 description 1
- 125000001153 fluoro group Chemical group F* 0.000 description 1
- 230000006872 improvement Effects 0.000 description 1
- 229910003437 indium oxide Inorganic materials 0.000 description 1
- PJXISJQVUVHSOJ-UHFFFAOYSA-N indium(iii) oxide Chemical compound [O-2].[O-2].[O-2].[In+3].[In+3] PJXISJQVUVHSOJ-UHFFFAOYSA-N 0.000 description 1
- UVLYPUPIDJLUCM-UHFFFAOYSA-N indium;hydrate Chemical compound O.[In] UVLYPUPIDJLUCM-UHFFFAOYSA-N 0.000 description 1
- 150000002739 metals Chemical class 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000003647 oxidation Effects 0.000 description 1
- 238000007254 oxidation reaction Methods 0.000 description 1
- TWNQGVIAIRXVLR-UHFFFAOYSA-N oxo(oxoalumanyloxy)alumane Chemical compound O=[Al]O[Al]=O TWNQGVIAIRXVLR-UHFFFAOYSA-N 0.000 description 1
- KYKLWYKWCAYAJY-UHFFFAOYSA-N oxotin;zinc Chemical compound [Zn].[Sn]=O KYKLWYKWCAYAJY-UHFFFAOYSA-N 0.000 description 1
- 238000000206 photolithography Methods 0.000 description 1
- 229910000077 silane Inorganic materials 0.000 description 1
- 239000002210 silicon-based material Substances 0.000 description 1
- 239000000126 substance Substances 0.000 description 1
- 238000012360 testing method Methods 0.000 description 1
- OGIDPMRJRNCKJF-UHFFFAOYSA-N titanium oxide Inorganic materials [Ti]=O OGIDPMRJRNCKJF-UHFFFAOYSA-N 0.000 description 1
- 238000003949 trap density measurement Methods 0.000 description 1
- 238000007738 vacuum evaporation Methods 0.000 description 1
- 229910052725 zinc Inorganic materials 0.000 description 1
- 239000011701 zinc Substances 0.000 description 1
- 239000004246 zinc acetate Substances 0.000 description 1
- TYHJXGDMRRJCRY-UHFFFAOYSA-N zinc indium(3+) oxygen(2-) tin(4+) Chemical compound [O-2].[Zn+2].[Sn+4].[In+3] TYHJXGDMRRJCRY-UHFFFAOYSA-N 0.000 description 1
Classifications
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D30/00—Field-effect transistors [FET]
- H10D30/60—Insulated-gate field-effect transistors [IGFET]
- H10D30/67—Thin-film transistors [TFT]
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D30/00—Field-effect transistors [FET]
- H10D30/01—Manufacture or treatment
- H10D30/021—Manufacture or treatment of FETs having insulated gates [IGFET]
- H10D30/031—Manufacture or treatment of FETs having insulated gates [IGFET] of thin-film transistors [TFT]
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D62/00—Semiconductor bodies, or regions thereof, of devices having potential barriers
- H10D62/80—Semiconductor bodies, or regions thereof, of devices having potential barriers characterised by the materials
- H10D62/81—Semiconductor bodies, or regions thereof, of devices having potential barriers characterised by the materials of structures exhibiting quantum-confinement effects, e.g. single quantum wells; of structures having periodic or quasi-periodic potential variation
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- Thin Film Transistor (AREA)
Abstract
本发明提供一种金属氧化物薄膜晶体管及其制备方法,所述的金属氧化物薄膜晶体管,包括衬底,呈层状设置在衬底上的栅极、栅绝缘层、金属氧化物半导体层和阻挡层,设置在最外层的钝化层,以及分别与金属氧化物半导体层连接的源极和漏极;含扩散元素绝缘体薄膜层相邻阻挡层设置在与金属氧化物半导体层相反的一侧;所述的扩散元素为氟、氮和氢元素中的任意一种。所述制备方法,采用如下方法,将含扩散元素绝缘体薄膜层相邻阻挡层设置在与金属氧化物半导体层相反的一侧,扩散元素为氟、氮和氢元素中的任意一种;将氟、氮或氢元素通过热扩散方法,扩散至薄膜晶体管的金属氧化物半导体层中,直至金属氧化物半导体薄膜和栅绝缘层的界面中。
The present invention provides a metal oxide thin film transistor and a preparation method thereof. The metal oxide thin film transistor includes a substrate, a gate, a gate insulating layer, a metal oxide semiconductor layer and The barrier layer, the passivation layer arranged on the outermost layer, and the source electrode and the drain electrode respectively connected to the metal oxide semiconductor layer; side; the diffusion element is any one of fluorine, nitrogen and hydrogen. The preparation method adopts the following method, the barrier layer adjacent to the insulator film layer containing the diffusion element is arranged on the side opposite to the metal oxide semiconductor layer, and the diffusion element is any one of fluorine, nitrogen and hydrogen elements; the fluorine Elements of nitrogen, nitrogen or hydrogen are diffused into the metal oxide semiconductor layer of the thin film transistor through a thermal diffusion method, until the interface between the metal oxide semiconductor thin film and the gate insulating layer.
Description
技术领域technical field
本发明涉及金属氧化物薄膜晶体管制备领域,具体为一种金属氧化物薄膜晶体管及其制备方法。The invention relates to the field of preparation of metal oxide thin film transistors, in particular to a metal oxide thin film transistor and a preparation method thereof.
背景技术Background technique
薄膜晶体管作为显示器件每个像素有源开关/驱动的核心组成部件,已被广泛应用于有机电致发光显示器和液晶显示器等平板显示器。平板显示器作为人和各类电子产品之间的桥梁,随着现代化工业的发展和人们对生活水平要求的不断提高,下一代显示技术不但要进一步提高显示质量,还将逐步向大面积、高分辨率、薄型化、柔性可卷曲型方向发展。传统的硅基薄膜晶体管已无法满足下一代显示技术。然而,金属氧化物半导体材料具有较高电子迁移率、良好可见光透过率、可在低温甚至室温下制备等优异性能。与传统的硅基薄膜晶体管相比,金属氧化物薄膜晶体管具有宽禁带、高均匀性、高稳定性、高场效应迁移率等优点,利于工业化生产,并且迎合现代化显示技术的发展趋势。As the core component of the active switching/driving of each pixel of a display device, thin film transistors have been widely used in flat panel displays such as organic electroluminescent displays and liquid crystal displays. As a bridge between people and various electronic products, flat panel displays, with the development of modern industry and the continuous improvement of people's living standards, the next generation of display technology will not only further improve the display quality, but also gradually expand to large-area, high-resolution High-speed, thin, flexible and rollable type. Traditional silicon-based thin-film transistors are no longer sufficient for next-generation display technologies. However, metal oxide semiconductor materials have excellent properties such as high electron mobility, good visible light transmittance, and can be prepared at low temperature or even room temperature. Compared with traditional silicon-based thin film transistors, metal oxide thin film transistors have the advantages of wide bandgap, high uniformity, high stability, and high field effect mobility, which is conducive to industrial production and caters to the development trend of modern display technology.
近年来,非晶金属氧化物半导体成为薄膜晶体管有源层的研究热点,例如氧化锌,氧化铟,氧化铟锡锌,氧化锌锡和氧化镓锌等。与硅基材料相比,宽禁带非晶金属氧化物半导体材料具有较低缺陷态密度。这使得金属氧化物薄膜晶体管不仅在场效应迁移率、光透过率、均一性等方面优点明显,还具有理想的特征曲线,包括低阈值电压、低关态电流、陡亚阈值摆幅、可忽略的电滞现象和高源漏电流开关比。然而,在制备薄膜晶体管过程中,其结构、各层薄膜的制备条件、光刻技术、刻蚀方法和退火方法等因素都影响金属氧化物半导体禁带中缺陷类型及其态密度和有源层与绝缘层界面电荷陷阱密度,从而影响晶体管的工作特性和稳定性。In recent years, amorphous metal oxide semiconductors have become a research hotspot in the active layer of thin film transistors, such as zinc oxide, indium oxide, indium tin zinc oxide, zinc tin oxide and gallium zinc oxide. Compared with silicon-based materials, wide-bandgap amorphous metal oxide semiconductor materials have lower defect state density. This makes metal oxide thin film transistors not only have obvious advantages in field effect mobility, light transmittance, uniformity, etc., but also have ideal characteristic curves, including low threshold voltage, low off-state current, steep subthreshold swing, negligible hysteresis and high source-to-drain current switching ratio. However, in the process of preparing thin film transistors, factors such as its structure, preparation conditions of each layer of thin film, photolithography technology, etching method and annealing method all affect the defect type and its density of states in the metal oxide semiconductor forbidden band and the active layer The charge trap density at the interface with the insulating layer, which affects the operating characteristics and stability of the transistor.
尽管可以通过优化实验参数提高金属氧化物薄膜晶体管的工作特性和稳定性,但是由于薄膜晶体管在工作过程中受到栅极偏压、光照、温度、气氛环境的影响。对于无阻挡层和钝化层的底栅型薄膜晶体管,若有源层背沟道表面暴露于空气中,薄膜晶体管稳定性易受空气中的氧气和水汽因场致吸收/解吸收效应影响。近年来,国内外研究者采用各种绝缘体材料作为钝化层,例如氧化硅、氮化硅、氧化钛和氧化铝等。薄膜晶体管在实际工作环境中的稳定性,是决定其是否能应用于平板显示器并实现产业化发展的关键问题。由于在开关/驱动液晶显示器和有机电致发光显示器时,薄膜晶体管经常工作在负栅极偏压并暴露于背光或自然光下,同时薄膜晶体管受到基板的热效应作用,尤其在负偏压照光应力和正偏压温度应力条件下,会引起阈值电压漂移。已报道阈值漂移归因于电荷束缚于栅绝缘层、有源层与绝缘层界面、有源层、阻挡层与有源层界面、产生的深受主类型缺陷等几个方面,这是造成薄膜晶体管稳定性劣化的关键因素。Although the working characteristics and stability of the metal oxide thin film transistor can be improved by optimizing the experimental parameters, the thin film transistor is affected by gate bias, light, temperature, and atmosphere during operation. For a bottom-gate thin film transistor without a barrier layer and a passivation layer, if the back channel surface of the active layer is exposed to the air, the stability of the thin film transistor is easily affected by the field-induced absorption/desorption effect of oxygen and water vapor in the air. In recent years, researchers at home and abroad have used various insulator materials as passivation layers, such as silicon oxide, silicon nitride, titanium oxide, and aluminum oxide. The stability of thin film transistors in the actual working environment is a key issue that determines whether they can be applied to flat panel displays and realize industrial development. When switching/driving liquid crystal displays and organic electroluminescent displays, thin film transistors often work at negative gate bias and are exposed to backlight or natural light, and at the same time, thin film transistors are affected by the thermal effect of the substrate, especially under negative bias lighting stress and positive Under bias temperature stress conditions, it will cause threshold voltage drift. It has been reported that the threshold shift is attributed to the charge binding in the gate insulating layer, the interface between the active layer and the insulating layer, the interface between the active layer, the barrier layer and the active layer, and the deep main type defects generated, which are the causes of thin film A key factor in the deterioration of transistor stability.
纵观各面板商和科研机构的研究工作,为从根本上解决金属氧化物薄膜晶体管稳定性问题,研究者们主要致力于以下两个方面:一方面是通过氧化作用降低氧化物半导体中氧空位缺陷态密度,主要方法是在富氧氛围下对薄膜晶体管退火处理,例如氧气退火处理,氧气等离子体处理等。另一方面是使氧化物半导体中存在的缺陷失活,例如引入新元素与半导体中缺陷形成稳定的化学键,如氢气退火处理,氢气等离子体处理等。现有的技术方法在实施过程中所需的实验条件比较苛刻,有的需要高温高压、非常昂贵的仪器设备或者工艺复杂、均匀性差、可重复性差,难以实现工艺简单、低成本、大面积且高稳定性薄膜晶体管产业化生产。Looking at the research work of various panel manufacturers and scientific research institutions, in order to fundamentally solve the problem of the stability of metal oxide thin film transistors, researchers mainly focus on the following two aspects: one is to reduce oxygen vacancies in oxide semiconductors through oxidation Defect state density, the main method is to anneal the thin film transistor in an oxygen-rich atmosphere, such as oxygen annealing treatment, oxygen plasma treatment and the like. On the other hand, it is to deactivate the defects existing in the oxide semiconductor, such as introducing new elements to form stable chemical bonds with the defects in the semiconductor, such as hydrogen annealing treatment, hydrogen plasma treatment, etc. Existing technical methods require relatively harsh experimental conditions in the implementation process. Some require high temperature and high pressure, very expensive equipment or complex processes, poor uniformity, and poor repeatability. It is difficult to achieve simple processes, low cost, and large areas. Industrialized production of high-stability thin film transistors.
发明内容Contents of the invention
针对现有技术中存在的问题,本发明提供一种金属氧化物薄膜晶体管及其制备方法,其工艺简单、均匀性好、大面积、重复性好、稳定性高。Aiming at the problems existing in the prior art, the present invention provides a metal oxide thin film transistor and a preparation method thereof, which has the advantages of simple process, good uniformity, large area, good repeatability and high stability.
本发明是通过以下技术方案来实现:The present invention is achieved through the following technical solutions:
一种金属氧化物薄膜晶体管,包括衬底,呈层状设置在衬底上的栅极、栅绝缘层、金属氧化物半导体层和阻挡层,设置在最外层的钝化层,以及分别与金属氧化物半导体层连接的源极和漏极;含扩散元素绝缘体薄膜层相邻阻挡层设置在与金属氧化物半导体层相反的一侧;所述的扩散元素为氟、氮和氢元素中的任意一种。A metal oxide thin film transistor, comprising a substrate, a gate, a gate insulating layer, a metal oxide semiconductor layer and a barrier layer arranged in layers on the substrate, a passivation layer arranged on the outermost layer, and The source electrode and the drain electrode connected by the metal oxide semiconductor layer; the barrier layer adjacent to the insulator film layer containing the diffusion element is arranged on the side opposite to the metal oxide semiconductor layer; the diffusion element is fluorine, nitrogen and hydrogen elements any kind.
优选的,源极和漏极设置在钝化层内,下端穿过含扩散元素绝缘体薄膜层和阻挡层分别与金属氧化物半导体层连接;金属氧化物半导体层包裹在栅绝缘层和阻挡层之间。Preferably, the source electrode and the drain electrode are arranged in the passivation layer, and the lower ends are respectively connected to the metal oxide semiconductor layer through the insulator film layer containing diffusion elements and the barrier layer; the metal oxide semiconductor layer is wrapped between the gate insulating layer and the barrier layer between.
优选的,阻挡层和含扩散元素绝缘体薄膜层包裹在金属氧化物半导体层和钝化层之间;源极和漏极设置在钝化层上,下端穿过钝化层分别与金属氧化物半导体层连接。Preferably, the barrier layer and the insulator thin film layer containing diffusion elements are wrapped between the metal oxide semiconductor layer and the passivation layer; the source electrode and the drain electrode are arranged on the passivation layer, and the lower end passes through the passivation layer and is connected with the metal oxide semiconductor layer respectively. layer connections.
一种金属氧化物薄膜晶体管制备方法,所述的金属氧化物薄膜晶体管中包括一层含扩散元素绝缘体薄膜层;将含扩散元素绝缘体薄膜层相邻阻挡层设置在与金属氧化物半导体层相反的一侧,所述的扩散元素为氟、氮和氢元素中的任意一种;将氟、氮或氢元素通过热扩散方法,扩散至薄膜晶体管的金属氧化物半导体层中,直至金属氧化物半导体薄膜和栅绝缘层的界面中。A method for preparing a metal oxide thin film transistor, wherein the metal oxide thin film transistor includes a layer of an insulator film layer containing a diffusion element; the barrier layer adjacent to the insulator film layer containing a diffusion element is arranged on the opposite side of the metal oxide semiconductor layer On the one hand, the diffusion element is any one of fluorine, nitrogen and hydrogen elements; the fluorine, nitrogen or hydrogen elements are diffused into the metal oxide semiconductor layer of the thin film transistor by a thermal diffusion method until the metal oxide semiconductor at the interface between the thin film and the gate insulating layer.
优选的,所述的热扩散方法是采用快速退火方式对薄膜晶体管进行热处理,退火温度为250-350℃,退火时间为30-180分钟。Preferably, the thermal diffusion method is to heat-treat the thin film transistor by means of rapid annealing, the annealing temperature is 250-350° C., and the annealing time is 30-180 minutes.
优选的,含扩散元素绝缘体薄膜层为掺氟氧化硅薄膜层、掺氟氮化硅薄膜层、掺氮氧化硅薄膜层、掺氢氧化硅薄膜层和掺氢氮化硅薄膜层中的任意一种。Preferably, the insulator film layer containing diffusion elements is any one of a fluorine-doped silicon oxide film layer, a fluorine-doped silicon nitride film layer, a nitrogen-doped silicon oxide film layer, a hydrogen-doped silicon oxide film layer and a hydrogen-doped silicon nitride film layer kind.
优选的,含扩散元素绝缘体薄膜层通过磁控溅射法、旋涂法、真空蒸镀法、原子层沉积和非真空化学沉积方法中的任意一种方式制备而成;其厚度控制在10-100nm。Preferably, the insulator film layer containing diffusion elements is prepared by any one of magnetron sputtering, spin coating, vacuum evaporation, atomic layer deposition and non-vacuum chemical deposition methods; its thickness is controlled at 10- 100nm.
优选的,阻挡层厚度控制在50-150nm。Preferably, the thickness of the barrier layer is controlled at 50-150 nm.
优选的,金属氧化物薄膜晶体管结构设置为底栅底接触、底栅顶接触、顶删底接触和顶删顶接触中的任意一种类型。Preferably, the structure of the metal oxide thin film transistor is any one of bottom-gate-bottom-contact, bottom-gate-top-contact, top-by-bottom contact and top-by-top contact.
优选的,制备得到的金属氧化物薄膜晶体管,其场效应迁移率大于12cm2V-1s-1,开启电压小于0.5V,亚阈值摆幅小于0.2,可忽略的电滞现象,在20V正偏压应力104s条件下阈值电压漂移小于0.1V,在-20V负偏压460nm的光照应力104s条件下阈值电压漂移小于0.2V。Preferably, the prepared metal oxide thin film transistor has a field effect mobility greater than 12cm 2 V -1 s -1 , a turn-on voltage less than 0.5V, a subthreshold swing less than 0.2, and negligible hysteresis. The threshold voltage shift was less than 0.1V under the bias stress of 10 4 s, and the threshold voltage shift was less than 0.2V under the -20V negative bias of 460nm light stress for 10 4 s.
与现有技术相比,本发明具有以下有益的技术效果:Compared with the prior art, the present invention has the following beneficial technical effects:
本发明所述制备金属氧化物薄膜晶体管的方法,在250-350℃的热处理环境中在改善氧化物半导体层质量的同时,通过热扩散作用有效地提高薄膜晶体管的稳定性。通过简单的制备方法在薄膜晶体管的阻挡层和钝化层之间沉积一层含氟、氮或氢元素的绝缘体薄膜,既避免了外界环境对此薄膜层的影响,又实现了某种元素在金属氧化物半导体层中的均匀扩散,从而提高了薄膜晶体管的稳定性。此发明方法实现的金属氧化物薄膜晶体管具有工艺简单、均匀性好、大面积、重复性好、稳定性高的特点。The method for preparing the metal oxide thin film transistor of the present invention effectively improves the stability of the thin film transistor through thermal diffusion while improving the quality of the oxide semiconductor layer in a heat treatment environment at 250-350°C. A layer of insulator film containing fluorine, nitrogen or hydrogen is deposited between the barrier layer and the passivation layer of the thin film transistor through a simple preparation method, which not only avoids the influence of the external environment on this film layer, but also realizes the presence of certain elements in the film. Uniform diffusion in the metal oxide semiconductor layer, thereby improving the stability of the thin film transistor. The metal oxide thin film transistor realized by the inventive method has the characteristics of simple process, good uniformity, large area, good repeatability and high stability.
进一步的,这种方法兼容现有的平板显示工艺技术,适用于工业化生产,提高生产效率。Furthermore, this method is compatible with the existing flat panel display process technology, is suitable for industrial production, and improves production efficiency.
进一步的,能够对薄膜晶体管中不同的金属氧化物半导体层实现热扩散处理,适用范围广,获得理想的高稳定性金属氧化物薄膜晶体管。Furthermore, the thermal diffusion treatment can be realized for different metal oxide semiconductor layers in the thin film transistor, and the application range is wide, and an ideal high-stability metal oxide thin film transistor can be obtained.
进一步的,热扩散处理后,可通过打印方法将薄膜晶体管转移到柔性衬底上,实现柔性可卷曲器件。Further, after the thermal diffusion treatment, the thin film transistor can be transferred to a flexible substrate by a printing method to realize a flexible rollable device.
本发明所述的金属氧化物薄膜晶体管,通过相邻阻挡层设置在与金属氧化物半导体层相反的一侧的含扩散元素绝缘体薄膜层提高其稳定性;其结构和作用原理如下所述。(1)上述扩散元素可以填充金属氧化物半导体中氧空位位置降低金属氧化物半导体缺陷态密度,实现薄膜晶体管光照稳定性;(2)上述扩散元素置换弱金属氧离子键中的氧,实现薄膜晶体管结构稳定性;(3)上述扩散元素与金属形成强金属-元素离子键,由于金属-元素离子键键能大于金属氧离子键键能,可实现薄膜晶体管热稳定性;(4)上述扩散元素作为浅施主能级增加载流子浓度,实现低电阻率金属氧化物半导体薄膜;(5)上述扩散元素可以置换硅氢键和硅羟基键形成稳定硅-元素键,有效降低金属氧化物半导体薄膜与绝缘层界面的陷阱密度。In the metal oxide thin film transistor of the present invention, the stability of the insulator thin film layer containing diffusion elements arranged on the side opposite to the metal oxide semiconductor layer adjacent to the barrier layer is improved; its structure and working principle are as follows. (1) The above-mentioned diffusion elements can fill the oxygen vacancies in metal oxide semiconductors to reduce the defect state density of metal oxide semiconductors, and realize the light stability of thin-film transistors; (2) The above-mentioned diffusion elements replace oxygen in weak metal oxygen ion bonds to realize thin-film Transistor structural stability; (3) the above-mentioned diffused elements form strong metal-element ionic bonds with metals, since the metal-element ionic bond energy is greater than the metal oxygen ion bond energy, the thermal stability of thin film transistors can be achieved; (4) the above-mentioned diffusion Elements serve as shallow donor energy levels to increase carrier concentration and realize low-resistivity metal oxide semiconductor films; (5) the above-mentioned diffusion elements can replace silicon-hydrogen bonds and silicon-hydroxyl bonds to form stable silicon-element bonds, effectively reducing the metal oxide semiconductor The density of traps at the interface between the thin film and the insulating layer.
附图说明Description of drawings
图1为本发明实例1-3所述金属氧化物薄膜晶体管的结构示意图。FIG. 1 is a schematic structural view of the metal oxide thin film transistor described in Example 1-3 of the present invention.
图2为本发明实例4-5所述金属氧化物薄膜晶体管的结构示意图。FIG. 2 is a schematic structural view of the metal oxide thin film transistor described in Example 4-5 of the present invention.
图3为本发明实例6所述金属氧化物薄膜晶体管的结构示意图。FIG. 3 is a schematic structural diagram of the metal oxide thin film transistor described in Example 6 of the present invention.
图4为本发明实例7所述金属氧化物薄膜晶体管的结构示意图。FIG. 4 is a schematic structural diagram of the metal oxide thin film transistor described in Example 7 of the present invention.
图5为本发明实例8所述金属氧化物薄膜晶体管的结构示意图。FIG. 5 is a schematic structural diagram of the metal oxide thin film transistor described in Example 8 of the present invention.
图中:1为衬底,2为栅极,3为栅绝缘层,4为金属氧化物半导体层,5为阻挡层,6为含扩散元素绝缘体薄膜层,7为源极,8为漏极,9为钝化层。In the figure: 1 is the substrate, 2 is the gate, 3 is the gate insulating layer, 4 is the metal oxide semiconductor layer, 5 is the barrier layer, 6 is the insulator film layer containing diffusion elements, 7 is the source, 8 is the drain , 9 is the passivation layer.
具体实施方式detailed description
下面结合具体的实施例对本发明做进一步的详细说明,所述是对本发明的解释而不是限定。The present invention will be further described in detail below in conjunction with specific embodiments, which are explanations of the present invention rather than limitations.
实例1Example 1
一种金属氧化物薄膜晶体管制备方法,包括如下步骤:A method for preparing a metal oxide thin film transistor, comprising the steps of:
1)金属氧化物半导体薄膜的制备:基于图1结构制备栅极2、栅绝缘层3之后,利用磁控溅射方法制备金属氧化物半导体层4时,以靶材为氧化铟镓锌为例,沉积气体氛围是氮气和氧气,其比例为29.4:0.6sccm,沉积温度为150℃,沉积功率为180W,沉积压强为1Pa,沉积厚度为50nm。1) Preparation of the metal oxide semiconductor thin film: after preparing the gate 2 and the gate insulating layer 3 based on the structure in Fig. 1, when the metal oxide semiconductor layer 4 is prepared by magnetron sputtering, the target material is indium gallium zinc oxide as an example , the deposition gas atmosphere is nitrogen and oxygen, the ratio is 29.4:0.6sccm, the deposition temperature is 150°C, the deposition power is 180W, the deposition pressure is 1Pa, and the deposition thickness is 50nm.
2)参照图1之后制备阻挡层5,厚度为100nm。2) Prepare a barrier layer 5 after referring to FIG. 1 with a thickness of 100 nm.
3)掺氟氮化硅薄膜层6的制备:在步骤2)之后,采用等离子增强化学气相沉积法制备掺氟氮化硅,沉积气体氛围是四氟化硅、一氧化二氮、氮气,其流量分别为2、100、120sccm,沉积压强为110Pa,沉积功率为50W,沉积温度为170℃,沉积厚度为50nm。3) Preparation of fluorine-doped silicon nitride thin film layer 6: After step 2), fluorine-doped silicon nitride is prepared by plasma-enhanced chemical vapor deposition, and the deposition gas atmosphere is silicon tetrafluoride, nitrous oxide, and nitrogen. The flow rates were 2, 100, and 120 sccm, the deposition pressure was 110 Pa, the deposition power was 50 W, the deposition temperature was 170° C., and the deposition thickness was 50 nm.
4)在步骤3)之后,依次制备源极7、漏极8、钝化层9。4) After step 3), the source electrode 7, the drain electrode 8, and the passivation layer 9 are sequentially prepared.
5)利用快速退火方式对薄膜晶体管进行热处理,退火温度为350℃,退火时间为1小时,退火氛围为氮气。5) The thin film transistor is heat-treated by rapid annealing method, the annealing temperature is 350° C., the annealing time is 1 hour, and the annealing atmosphere is nitrogen.
6)氟掺杂氧化物薄膜晶体管的场效应迁移率为12cm2V-1s-1,开启电压为0.5V,亚阈值摆幅小于0.2。6) The field effect mobility of the fluorine-doped oxide thin film transistor is 12cm 2 V -1 s -1 , the turn-on voltage is 0.5V, and the subthreshold swing is less than 0.2.
7)在20V正偏压应力104s条件下阈值电压漂移小于0.1V,在-20V负偏压光照(460nm)应力104s条件下阈值电压漂移小于0.2V。其光照稳定性可与现有的商用多晶硅薄膜晶体管相媲美。7) The threshold voltage shift is less than 0.1V under the condition of 20V positive bias stress for 10 4 s, and the threshold voltage shift is less than 0.2V under the condition of -20V negative bias (460nm) light stress for 10 4 s. Its light stability is comparable to that of existing commercial polysilicon thin film transistors.
实例2Example 2
一种金属氧化物薄膜晶体管制备方法,包括如下步骤:A method for preparing a metal oxide thin film transistor, comprising the steps of:
1)金属氧化物半导体薄膜的制备:基于图1结构制备栅极2、栅绝缘层3之后,利用非真空化学气相沉积法制备金属氧化物半导体层4时,以氧化铟锌为例,前驱液为氟化锌、醋酸铟,溶剂为水和甲醇,分别为10和90mL,室温下搅拌3小时,之后用0.2μm滤网过滤。沉积条件如下,沉积气体为空气,沉积温度为350℃,沉积厚度为45nm。1) Preparation of the metal oxide semiconductor thin film: after preparing the gate 2 and the gate insulating layer 3 based on the structure in FIG. Zinc fluoride and indium acetate, the solvents are water and methanol, 10 and 90 mL respectively, stirred at room temperature for 3 hours, and then filtered through a 0.2 μm filter. The deposition conditions are as follows, the deposition gas is air, the deposition temperature is 350° C., and the deposition thickness is 45 nm.
2)参照图1之后制备阻挡层5,厚度为50nm。2) After referring to FIG. 1 , a barrier layer 5 is prepared with a thickness of 50 nm.
3)掺氮氧化硅薄膜层6的制备:在步骤2)之后,采用磁控溅射方法制备掺氮氧化硅,靶材为氧化硅,沉积气体氛围是氮气、氧气、氮气,其比例为27.4:0.6:2.0sccm,沉积温度为150℃,沉积功率为180W,沉积压强为1Pa,沉积厚度为10nm。3) Preparation of nitrogen-doped silicon oxide thin film layer 6: After step 2), nitrogen-doped silicon oxide is prepared by magnetron sputtering, the target material is silicon oxide, and the deposition gas atmosphere is nitrogen, oxygen, nitrogen, and the ratio is 27.4 :0.6:2.0sccm, the deposition temperature is 150°C, the deposition power is 180W, the deposition pressure is 1Pa, and the deposition thickness is 10nm.
4)在步骤3)之后,依次制备源极7、漏极8、钝化层9。4) After step 3), the source electrode 7, the drain electrode 8, and the passivation layer 9 are sequentially prepared.
5)利用快速退火方式对薄膜晶体管进行热处理,退火温度为250℃,退火时间为120分钟,退火氛围为氮气。5) Heat-treating the thin film transistor by means of rapid annealing, the annealing temperature is 250° C., the annealing time is 120 minutes, and the annealing atmosphere is nitrogen.
6)氮掺杂氧化物薄膜晶体管的场效应迁移率为14cm2V-1s-1,开启电压为0.5V,亚阈值摆幅小于0.2。6) The field-effect mobility of the nitrogen-doped oxide thin film transistor is 14cm 2 V -1 s -1 , the turn-on voltage is 0.5V, and the subthreshold swing is less than 0.2.
7)在20V正偏压应力104s条件下阈值电压漂移小于0.1V,在-20V负偏压光照(460nm)应力104s条件下阈值电压漂移小于0.2V。其光照稳定性可与现有的商用多晶硅薄膜晶体管相媲美。7) The threshold voltage shift is less than 0.1V under the condition of 20V positive bias stress for 10 4 s, and the threshold voltage shift is less than 0.2V under the condition of -20V negative bias (460nm) light stress for 10 4 s. Its light stability is comparable to that of existing commercial polysilicon thin film transistors.
实例3Example 3
一种金属氧化物薄膜晶体管制备方法,包括如下步骤:A method for preparing a metal oxide thin film transistor, comprising the steps of:
1)金属氧化物半导体薄膜的制备:基于图1结构制备栅极2、栅绝缘层3之后,利用旋涂法制备金属氧化物半导体层4时,以氧化铟锌为例,前驱液为0.1M醋酸锌、0.1M硝酸铟,溶剂为水,室温下搅拌3小时,之后用0.2μm滤网过滤。之后在4000rpm条件下旋涂30s,之后在空气氛围下250℃热处理1小时。1) Preparation of the metal oxide semiconductor thin film: after preparing the gate 2 and the gate insulating layer 3 based on the structure in FIG. Zinc acetate, 0.1M indium nitrate, and water as the solvent, stirred at room temperature for 3 hours, and then filtered through a 0.2 μm filter. After that, it was spin-coated at 4000rpm for 30s, and then heat-treated at 250°C for 1 hour in air atmosphere.
2)参照图1之后制备阻挡层5,厚度为150nm。2) After referring to FIG. 1, a barrier layer 5 is prepared with a thickness of 150 nm.
3)掺氢氮化硅薄膜层6的制备:在步骤2)之后,采用等离子增强化学气相沉积法制备掺氢氮化硅,沉积气体氛围是四氟化硅、氨气、氮气,其流量分别为2、100、120sccm,沉积压强为110Pa,沉积功率为50W,沉积温度为170℃,沉积厚度为100nm。3) Preparation of hydrogen-doped silicon nitride thin film layer 6: After step 2), hydrogen-doped silicon nitride is prepared by plasma enhanced chemical vapor deposition. The deposition gas atmosphere is silicon tetrafluoride, ammonia, nitrogen, and the flow rates are respectively The deposition pressure is 110Pa, the deposition power is 50W, the deposition temperature is 170°C, and the deposition thickness is 100nm.
4)在步骤3)之后,依次制备源极7、漏极8、钝化层9。4) After step 3), the source electrode 7, the drain electrode 8, and the passivation layer 9 are sequentially prepared.
5)利用快速退火方式对薄膜晶体管进行热处理,退火温度为350℃,退火时间为3小时,退火氛围为氮气。5) The thin film transistor is heat-treated by rapid annealing method, the annealing temperature is 350° C., the annealing time is 3 hours, and the annealing atmosphere is nitrogen.
6)氢掺杂氧化物薄膜晶体管的场效应迁移率为12cm2V-1s-1,开启电压为0.4V,亚阈值摆幅小于0.2。6) The field effect mobility of the hydrogen-doped oxide thin film transistor is 12cm 2 V -1 s -1 , the turn-on voltage is 0.4V, and the subthreshold swing is less than 0.2.
7)在20V正偏压应力104s条件下阈值电压漂移小于0.1V,在-20V负偏压光照(460nm)应力104s条件下阈值电压漂移小于0.2V。其光照稳定性可与现有的商用多晶硅薄膜晶体管相媲美。7) The threshold voltage shift is less than 0.1V under the condition of 20V positive bias stress for 10 4 s, and the threshold voltage shift is less than 0.2V under the condition of -20V negative bias (460nm) light stress for 10 4 s. Its light stability is comparable to that of existing commercial polysilicon thin film transistors.
实例4Example 4
一种金属氧化物薄膜晶体管制备方法,包括如下步骤:A method for preparing a metal oxide thin film transistor, comprising the steps of:
1)金属氧化物半导体薄膜的制备:参照图2自对准型薄膜晶体管结构制备栅极2、栅绝缘层3,利用磁控溅射方法制备金属氧化物半导体层4时,以靶材为氧化铟镓锌为例,其原子个数比为1:1:1,沉积气体氛围是氮气、氧气,其流量分别为29.4和0.6sccm,沉积温度为150℃,沉积功率为180W,沉积压强为1Pa,沉积厚度为50nm。1) Preparation of the metal oxide semiconductor thin film: refer to the structure of the self-aligned thin film transistor in Figure 2 to prepare the gate 2 and the gate insulating layer 3. When the metal oxide semiconductor layer 4 is prepared by the magnetron sputtering method, the target is used Take indium gallium zinc as an example, its atomic number ratio is 1:1:1, the deposition gas atmosphere is nitrogen and oxygen, the flow rates are 29.4 and 0.6 sccm respectively, the deposition temperature is 150°C, the deposition power is 180W, and the deposition pressure is 1Pa , with a deposition thickness of 50 nm.
2)阻挡层5的制备:在步骤1)之后,采用等离子增强化学气相沉积法制备阻挡层5,沉积气体氛围是硅烷、一氧化二氮、氮气,其流量分别为2、100、120sccm,沉积压强为110Pa,沉积功率为50W,沉积温度为170℃,沉积厚度为50nm。2) Preparation of the barrier layer 5: After step 1), the barrier layer 5 was prepared by plasma enhanced chemical vapor deposition, the deposition gas atmosphere was silane, nitrous oxide, nitrogen, and the flow rates were 2, 100, 120 sccm respectively. The pressure is 110Pa, the deposition power is 50W, the deposition temperature is 170°C, and the deposition thickness is 50nm.
3)掺氟氮化硅薄膜层6的制备:在步骤2)之后,采用等离子增强化学气相沉积法制备掺氟氮化硅,沉积气体氛围是四氟化硅、一氧化二氮、氮气,其流量分别为2、100、120sccm,沉积压强为110Pa,沉积功率为50W,沉积温度为170℃,沉积厚度为50nm。3) Preparation of fluorine-doped silicon nitride thin film layer 6: After step 2), fluorine-doped silicon nitride is prepared by plasma-enhanced chemical vapor deposition, and the deposition gas atmosphere is silicon tetrafluoride, nitrous oxide, and nitrogen. The flow rates were 2, 100, and 120 sccm, the deposition pressure was 110 Pa, the deposition power was 50 W, the deposition temperature was 170° C., and the deposition thickness was 50 nm.
4)在步骤3)之后,依次制备钝化层9、源极7、漏极8。4) After step 3), the passivation layer 9, the source electrode 7, and the drain electrode 8 are sequentially prepared.
5)利用快速退火方式对薄膜晶体管进行热处理,退火温度为350℃,退火时间为30分钟,退火氛围为氮气。5) The thin film transistor is heat-treated by rapid annealing method, the annealing temperature is 350° C., the annealing time is 30 minutes, and the annealing atmosphere is nitrogen.
6)自对准型氟掺杂氧化物薄膜晶体管的场效应迁移率为15cm2V-1s-1,开启电压为0.3V,亚阈值摆幅小于0.2。6) The field effect mobility of the self-aligned fluorine-doped oxide thin film transistor is 15cm 2 V -1 s -1 , the turn-on voltage is 0.3V, and the subthreshold swing is less than 0.2.
7)在20V正偏压应力104s条件下阈值电压漂移小于0.1V,在-20V负偏压光照(460nm)应力104s条件下阈值电压漂移小于0.1V。其光照稳定性可与现有的商用多晶硅薄膜晶体管相媲美。7) The threshold voltage shift is less than 0.1V under the condition of 20V positive bias stress for 10 4 s, and the threshold voltage shift is less than 0.1V under the condition of -20V negative bias (460nm) light stress for 10 4 s. Its light stability is comparable to that of existing commercial polysilicon thin film transistors.
实例5Example 5
步骤1,在衬底1上依次制备栅极2、栅绝缘层3和金属氧化物半导体层4;Step 1, sequentially preparing a gate 2, a gate insulating layer 3 and a metal oxide semiconductor layer 4 on a substrate 1;
步骤2,制备阻挡层5,厚度为70nm;Step 2, preparing a barrier layer 5 with a thickness of 70nm;
步骤3,在阻挡层5上制备含扩散元素绝缘体薄膜层6;所述的扩散元素为氟、氮和氢元素中的任意一种;Step 3, preparing an insulator film layer 6 containing diffusion elements on the barrier layer 5; the diffusion elements are any one of fluorine, nitrogen and hydrogen elements;
步骤4,分别制备源极7、漏极8和钝化层9。Step 4, preparing the source electrode 7, the drain electrode 8 and the passivation layer 9 respectively.
步骤5,热处理,利用快速退火方式对薄膜晶体管进行热处理,退火温度为270℃,退火时间为50分钟。Step 5, heat treatment, performing heat treatment on the thin film transistor by means of rapid annealing, the annealing temperature is 270° C., and the annealing time is 50 minutes.
以上实例1-5所述制备得到的金属氧化物薄膜晶体管均为底栅顶接触结构。The metal oxide thin film transistors prepared as described in Examples 1-5 above all have bottom-gate and top-contact structures.
实例6Example 6
一种金属氧化物薄膜晶体管制备方法,如图3所示,以底栅底接触结构为例,包括如下步骤,A method for preparing a metal oxide thin film transistor, as shown in Figure 3, taking a bottom-gate bottom-contact structure as an example, comprising the following steps,
步骤1,在衬底1上依次制备栅极2、栅绝缘层3、源极7、漏极8和金属氧化物半导体层4;Step 1, sequentially preparing a gate 2, a gate insulating layer 3, a source 7, a drain 8 and a metal oxide semiconductor layer 4 on a substrate 1;
步骤2,制备阻挡层5,厚度为90nm;Step 2, preparing a barrier layer 5 with a thickness of 90nm;
步骤3,在阻挡层5上制备含扩散元素绝缘体薄膜层6;所述的扩散元素为氟、氮和氢元素中的任意一种;Step 3, preparing an insulator film layer 6 containing diffusion elements on the barrier layer 5; the diffusion elements are any one of fluorine, nitrogen and hydrogen elements;
步骤4,制备钝化层9;Step 4, prepare passivation layer 9;
步骤5,热处理,利用快速退火方式对薄膜晶体管进行热处理,退火温度为290℃,退火时间为70分钟。Step 5, heat treatment, performing heat treatment on the thin film transistor by means of rapid annealing, the annealing temperature is 290° C., and the annealing time is 70 minutes.
实例7Example 7
一种金属氧化物薄膜晶体管制备方法,如图4所示,以顶删底接触结构为例,如图包括如下步骤,A method for preparing a metal oxide thin film transistor, as shown in Figure 4, taking the top-deleted bottom contact structure as an example, as shown in the figure, includes the following steps,
步骤1,在衬底1上制备含扩散元素绝缘体薄膜层6;所述的扩散元素为氟、氮和氢元素中的任意一种;Step 1, preparing an insulator film layer 6 containing diffusion elements on the substrate 1; the diffusion elements are any one of fluorine, nitrogen and hydrogen elements;
步骤2,制备阻挡层5,厚度为130nm;Step 2, preparing a barrier layer 5 with a thickness of 130nm;
步骤3,之后依次制备源极7、漏极8、金属氧化物半导体层4、栅绝缘层3、栅极2、钝化层9;Step 3, followed by sequentially preparing the source electrode 7, the drain electrode 8, the metal oxide semiconductor layer 4, the gate insulating layer 3, the gate electrode 2, and the passivation layer 9;
步骤4,热处理,利用快速退火方式对薄膜晶体管进行热处理,退火温度为310℃,退火时间为90分钟。Step 4, heat treatment, performing heat treatment on the thin film transistor by means of rapid annealing, the annealing temperature is 310° C., and the annealing time is 90 minutes.
实例8Example 8
一种金属氧化物薄膜晶体管制备方法,如图5所示,以顶删顶接触结构为例,包括如下步骤,A method for preparing a metal oxide thin film transistor, as shown in Figure 5, taking a top-by-top contact structure as an example, comprising the following steps,
步骤1,在衬底1上制备含扩散元素绝缘体薄膜层6;所述的扩散元素为氟、氮和氢元素中的任意一种;Step 1, preparing an insulator film layer 6 containing diffusion elements on the substrate 1; the diffusion elements are any one of fluorine, nitrogen and hydrogen elements;
步骤2,制备阻挡层5,厚度为110nm;Step 2, preparing a barrier layer 5 with a thickness of 110 nm;
步骤3,之后依次制备金属氧化物半导体层4、源极7、漏极8、栅绝缘层3、栅极2、钝化层9;Step 3, followed by sequentially preparing the metal oxide semiconductor layer 4, the source electrode 7, the drain electrode 8, the gate insulating layer 3, the gate electrode 2, and the passivation layer 9;
步骤4,热处理,利用快速退火方式对薄膜晶体管进行热处理,退火温度为300℃,退火时间为150分钟。Step 4, heat treatment, performing heat treatment on the thin film transistor by means of rapid annealing, the annealing temperature is 300° C., and the annealing time is 150 minutes.
本发明实现的具有高稳定性金属氧化物薄膜晶体管器件,可应用于主动矩阵有机发光二极管显示器和液晶显示器以及柔性、便携式电子产品领域。需要说明的是,本发明实例中涉及的实验参数、工作环境、测试条件、器件尺寸、配比比例等并不限制金属氧化物薄膜晶体管器件的制备工艺,在实际生产过程中,可根据具体情况做出相应的调整。以上实例仅用以说明本发明的技术方案而非对本发明保护范围的限制,尽管实例中对本发明做出了详细说明,本领域的科研技术工作者应当理解,可对本发明列出的实验方案进行修改或替换,而不脱离本发明技术方案的实质和范围。The metal oxide thin film transistor device with high stability realized by the invention can be applied to the fields of active matrix organic light emitting diode displays, liquid crystal displays, and flexible and portable electronic products. It should be noted that the experimental parameters, working environment, test conditions, device size, proportion ratio, etc. involved in the examples of the present invention do not limit the preparation process of metal oxide thin film transistor devices. In the actual production process, according to specific conditions, Make adjustments accordingly. The above examples are only used to illustrate the technical scheme of the present invention rather than limiting the protection scope of the present invention. Although the present invention has been described in detail in the examples, it should be understood by those skilled in the art that the experimental scheme listed in the present invention can be carried out Modification or replacement without departing from the spirit and scope of the technical solution of the present invention.
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Citations (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US20110133179A1 (en) * | 2009-12-08 | 2011-06-09 | Semiconductor Energy Laboratory Co., Ltd. | Semiconductor device and manufacturing method thereof |
-
2016
- 2016-11-21 CN CN201611040116.3A patent/CN106531782A/en active Pending
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Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US20110133179A1 (en) * | 2009-12-08 | 2011-06-09 | Semiconductor Energy Laboratory Co., Ltd. | Semiconductor device and manufacturing method thereof |
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