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CN1061491A - Eliminate the mixing microelectronic component of thermal stress - Google Patents

Eliminate the mixing microelectronic component of thermal stress Download PDF

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Publication number
CN1061491A
CN1061491A CN91110644A CN91110644A CN1061491A CN 1061491 A CN1061491 A CN 1061491A CN 91110644 A CN91110644 A CN 91110644A CN 91110644 A CN91110644 A CN 91110644A CN 1061491 A CN1061491 A CN 1061491A
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substrate
zone
reduced hardness
hardness
hard
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J·C·扬
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EIDP Inc
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EI Du Pont de Nemours and Co
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Abstract

A kind of micromodule, comprise a hard substrate that element is installed on it, element and an electric functional layer adjacent with at least two sides of said element with one group of side, separated by a buffer zone space between said element and the electric work layer energy, have the zone that at least one has reduced hardness in the substrate body below buffer zone, this zone makes the mechanical stress that substrate is produced when can abatement device being heated.

Description

Eliminate the mixing microelectronic component of thermal stress
The present invention relates to mix microelectronic component, its configuration makes and is reduced by thermogenetic stress in this device made from common process.
In order to realize high functional density, high-speed and high reliability work, microelectronic component is the VLSI(very lagre scale integrated circuit (VLSIC) for example) silicon just more and more with substrate in the sandwich construction combination that is connected, to form the mixing micromodule of densification.
Typical electric hybrid module comprises a ceramic substrate, an integrated circuit (IC) chip is installed on it securely, this integrated circuit (IC) chip is electrically connected on the one group of conductor layer and insulating barrier around this chip, this group conductor layer and insulating barrier also stick on the substrate securely, but spatially separate with said chip.
Fig. 1 and 2 a represents a kind of typical electric hybrid module, wherein, uses the pressure welding lead-in wire across narrow channel that chip is carried out interior the connection with this chip multi-layer conductive on every side with insulator, and chip and sandwich construction all stick on the public substrate securely.
Several materials have been comprised in the modules of said type with different heat expansion coefficient and different moduluss of elasticity.The manufacturing temperature of this assembly and the difference between the working temperature cause thermal stress and distortion, and this distortion can influence reliability.Because inner each layer made by copper and polyimides usually of sandwich construction and the coefficient of thermal expansion mismatch between the silicon, therefore, eliminate thermal stress and distortion is very difficult.
In this case, traditional countermeasure is to select a kind of substrate material that all produces minimum stress in chip and multilayer each several part.But, therefore, still there is complicated thermal deformation influence on the whole substrate owing to the thermal coefficient of expansion that three major parts that can not make assembly are chip, sandwich construction and substrate is simultaneously consistent.The invention provides a kind of improved substrate design, it has reduced the deformation effect between this three.
The present invention relates to a kind of microelectronic component, it comprises a hard substrate that an element is installed on it, said element and an electric functional layer adjacent with one group of side with at least two sides of said element, separated by buffer zone between at least two sides of said element and the said electric functional layer, has the zone that at least one has reduced hardness in the substrate body below buffer zone, this zone makes that substrate can deflection, thereby has eliminated the mechanical stress that is produced when device is heated.
Terminology used here " buffer zone " is meant the unappropriated surf zone of substrate, and it is used for making between the adjacent electric functional elements of installing on the substrate by structural gap insulate.
Accompanying drawing comprises six width of cloth figure.Fig. 1 is the orthographic projection cutaway view of a traditional mixing micromodule; Fig. 2 a is the schematic cross-section of a traditional mixing micromodule; Fig. 2 b is a schematic cross-section according to the micromodule of configuration of the present invention to 2e; Fig. 3 a is the schematic diagram of the interior normal stress of face of traditional micromodule, specifically is the analysis chart of the interior thermal stress of face of the copper layer on the unslotted aluminium substrate; Fig. 3 b is the schematic diagram according to normal stress in the face of the similar micromodule of configuration of the present invention, specifically is the analysis chart of the interior thermal stress of face of the copper layer on the top-slitting aluminium substrate; Fig. 4 is with the substrate of fluting and on-chip the bar chart that interior thermal stress compares of unslotted; Fig. 5 is the bar chart that thermal stress in the face of copper layer on the substrate of the substrate of fluting and unslotted is compared; Fig. 6 will be installed on the substrate of unslotted and the bar chart that thermal stress compares in the face of the on-chip silicon of fluting.
No. 3325882, people's such as Chiou United States Patent (USP) and United States Patent (USP) relate to arrangements of components and the assemble method that will be connected in the metal solder joint on the solid state device for No. 3428866, solid state device is fixed on the bottom surface of substrate die cavity, so that around device, form a gap, the wall of device and die cavity is separated.This and the present invention use cannelure to eliminate stress to differ widely.
In people's such as Wiech the United States Patent (USP) 437457, propose on the periphery of the die cavity that contains one or more semiconductor chips, to be provided with one group of groove of filling conductor to form an electric bus-bar structure.In contrast, the present invention is along the die cavity periphery a plurality of grooves of making of substrate and with these grooves metallization.
The United States Patent (USP) 4495025 of Haskell relates to a kind of photoresist process that forms groove in order to make insulation between the integrated circuit in semi-conducting material.For various reasons, this patent does not have the effect of groove in open or the prompting substrate.
Bar-Cohen is at " coupled relation that the free convection heat of vertical printed circuit plate is transmitted ", the IEEE journal, No. the 9th, the 73rd volume, in September, 1985 (Bar-Cohen " Bonding Relations for Natural Convection Heat Transfer from Vertical Print ed Circuit Boards "-Proceedings of the IEEE, Vol.73, No.9, point out in Se ptember 1985. this piece articles, when being separated by together on a plurality of printed substrates that have an element very near the time, vertical channel that its plate face is machined to and level trough can improve the heat transfer characteristic of assembly.But explanation heat-machinery not influencing each other and how can these influences be eliminated by the substrate that is fixed on on-chip each component ambient is slotted.
The present invention is based on and makes substrate by this way, so that make the expansion rate of the chip of being installed relative with shrinkage irrelevant with the expansion rate that also is fixed on the interior components that is connected of on-chip maintenance with shrinkage.
Substrate of the present invention comprises a flexible substrate zone little, that reduced hardness, there is a limited surf zone in this zone, wherein, this surf zone occupies an entity space below buffer zone, and buffer zone is kept apart chip and components on every side.This zone that has reduced hard links to each other with the substrate sections of two hard, wherein, and a hard part supports chip, and the components that another supporting connects in keeping.Flexible part provides acceptable (forgivable) mechanical connection between two hardness parts, wherein, the chip that is fixed on hard part almost can expand and shrink independently, and be fixed on another hard and partly go up the expansion and the contraction of the other parts of assembly and have nothing to do.
As a feature of the present invention, little flex section can be a kind of flexible material (Fig. 2 b) or the thin part (Fig. 2 c-e) that formed by continuous or interrupted groove.In whole assembly, the thermal stress of the chip that is caused by the other parts of assembly and distortion are minimum, and vice versa, thereby reduced the variation (Changes for chip) and the interior fault that is connected of chip.But whole substrate or assembly still have traditional external structure shape, and its overall structure remains very hard, therefore, can handle with the method that traditional assembly is installed it.
Referring now to accompanying drawing, Fig. 1 and 2 a represents the structure of traditional mixing micromodule, and this assembly comprises the ceramic substrate 1 of an inertia, and an integrated circuit (IC) chip 3 is installed on it securely.Substrate can be by such material such as AlN, SiC, Al 2O 3, Si, quartz, mullite, cordierite and GaAs make.Utilize adhesive linkage 5 that chip 3 is bonded on the substrate 1, adhesive linkage 5 can be inorganic and/or organic in essence.Typical adhesive linkage (also being known bonding wafer layer) is thermoplastic or heat cured organic polymer, and for example disclosed those materials of European patent specification EP88104940.7 can be selected material with reference to this specification.Around the chip 3 is insulating barrier 7, and one group of conductor signal/bus plane 9 is installed on the insulating barrier 7.Chip and insulating barrier 7 are separated by an overcoat, and chip 3 is electrically connected on signal/bus plane 9 by metal thin wires 11 such as gold or copper usually by one group.Substrate 1 among Fig. 1 is not also slotted according to the present invention or is otherwise eliminated stress.
Fig. 2 b represents and the similar device of the device of Fig. 1 and 2 a to 2e, but different is: each device all has a zone that reduces hardness, so that eliminate because the hot stress that produces.In Fig. 2 b, the zone that has reduced hardness is made up of a kind of soft solid material 13b of hard material of the remainder than substrate.Fig. 2 c represents an assembly of the present invention, and wherein, the zone that has reduced hardness is made of a groove 13c, and groove 13c reaches about 80% position of substrate thickness always from the end face of substrate.Groove can be continuously around the outward flange of chip, or interrupted or discontinuous, as long as reach the degree that is enough to eliminate stress.
Fig. 2 d represents an assembly of the present invention, and wherein, the zone that has reduced hardness is made of two groove 13d, and the end face from substrate stretches in the substrate, and another bottom surface from substrate is stretched in the substrate.
Fig. 2 e represents a similar assembly, and wherein, the zone that has reduced hardness is that the groove 13e in the substrate is stretched in a single bottom surface from substrate,
As mentioned above, having reduced one or more zones of hardness can be continuously or intermittently around the periphery of element, is enough to make stress to eliminate desired degree as long as reduced the zone of hardness.Particularly, preferably reduced the ratio (modulus ratio) of modulus of elasticity and the modulus of elasticity of substrate other parts of part of hardness in the substrate less than 0.3.Yet,, constitute the groove or other configuration that have reduced the hardness zone and should not extend through 80% of substrate thickness for the mechanical strength that reduces substrate and in order to make it be not easy to fracture with exceeding.Terminology used here " hard substrate " is meant that before making improvements according to the present invention modulus of elasticity is at least the substrate of 10Gpa.
Various configurations can be adopted in the zone that has reduced hardness.For example they can be made at the bottom of the garden or the end, side, their side can be vertical or tilt.Usually, the side of groove does not need corresponding with the outward flange of the edge of anti-mask and chip.But, such configuration is best.Whether enough big what at first will consider is to have reduced the zone of hardness so that modulus ratio to be lower than 0.3 and be preferably lower than 0.1.To meeting of this modulus ratio index, can easily determine by directly measuring modulus, perhaps can utilize computer mould to fit analytical system and determine.
Substrate can be made by a kind of single aforesaid basis material simply, perhaps it can be a kind of in the matrix of basis material disperse the combined material of particle or fiber or the mixture of basis material.Can make the packing material of substrate with fiber, to increase the intensity of substrate.On the other hand, can add some Heat Conduction Materials, so that can also improve the ability that substrate conducts the heat on the microelectronic element.Usually the thickness of substrate is approximately the 40-80 mil, and wherein typical thickness is 60 mils.On-chip thermal stress is directly proportional with thickness, and the thickness of the stress of insulating barrier and substrate is inversely proportional on every side.
Because microelectronic chip is the thermal source that causes thermal and mechanical stress, therefore preferably make the zone (the most frequently used is groove) that has reduced hardness be positioned as close to chip, but not under chip.Usually, be no more than about 10 mils, this Breadth Maximum of buffer zone normally in most electric hybrid module around the width of the groove of element.In addition, the degree of depth of groove should be no more than about 80% of substrate thickness.The thickness of substrate should be at least 10 mils, to prevent to reduce too much the mechanical strength of substrate.
When being used as reducing hardness regional with groove, these grooves can opened by sky, and perhaps they can be filled with flexible material, for example fill with high resiliency polymer or other non-hard packing material.
Embodiment
The data that are cooled to 20 ℃ of caused interior maximum thermal stresses from 170 ℃ have been provided in the table 1 below.The electric hybrid module of single chip comprises that a bronze medal ground plane and one are installed in integrated circuit (IC) chip on the aluminium substrate with the polymer wafer bonding agent.Because measuring the actual in-plane stress of such hybrid device is difficult technically, therefore, these data are based on total composite error (TCE) characteristic of known each element, and the finite element modelling of being out of shape by each part obtains.It is as follows to simulate used component size:
1.27 * 1.27 * 0.051 centimetre of integrated circuit (IC) chip
3.81 * 3.81 * 0.153 centimetre of substrate
Lamination (two sides has 1.53 * 1.53 centimetres die cavity)
3.81 * 3.81 * 0.0036 centimetre on copper layer
3.81 * 3.81 * 0.0025 centimetre of insulating barrier
3.81 * 3.81 * 0.0025 centimetre of adhesive linkage
The size of groove and the maximum stress that calculates have been provided in the table 1 simultaneously.In table 1, listed data representation is heated to 170 ℃ with copper layer, bonding wafer layer and wafer itself, when being cooled to 20 ℃ at ambient temperature then, and thermal stress in their largest face separately.Particularly, these data correspond respectively to the on-chip element of the on-chip element of unslotted, three kinds of troughs of belt and the size of several grooves.These data show: the groove of all three kinds of configurations (the single groove of upwards opening, the single groove of opening downwards and the double flute of upwards opening) can both reduce residual interior thermal stress in all three elements effectively.But the dual-slot structure of upwards opening is the most effective, and single groove structure of upwards opening is more effective than single groove structure of opening downwards significantly.
Table 1
Residual stress in fluting and the face substrate of unslotted
The size of one groove and the influence of structure
The element copper layer wafer adhesive linkage wafer of assembly
The structure maximum stress (MPa) of groove
(modulus 9MPa) 213 56 759 improved in the rice footpath
The single groove of upwards opening
50/20 （1）166 35 482
50/40 125 32 442
50/50 104 32 443
30/50 119 41 560
15/50 138 47 636
The single groove of opening downwards
15/50 169 51 689
50/50 165 51 687
The double flute of upwards opening
15/50 117 32 447
(1) wide/dark unit: mil
The data of the copper layer thermal stress that last table the second hurdle is listed can clearly be seen that from Fig. 4.

Claims (25)

1, a kind of microelectronic component, comprise a hard substrate that an element is installed on it, said element and an electric functional layer adjacent with one group of side with at least two sides of said element, separated by buffer zone between at least two sides of said element and the said electric functional layer, has the zone that at least one has reduced hardness in the substrate body below buffer zone, this zone makes that substrate can deflection, thereby has eliminated the mechanical stress that is produced when device is heated.
2, the said device of claim 1, the zone that has wherein reduced hardness is continuous.
3, the said device of claim 1, the ratio (modulus ratio) of modulus of elasticity and the modulus of elasticity of substrate other parts of substrate sections that has wherein reduced hardness is less than 0.3.
4, the said device of claim 3, wherein modulus ratio is less than 0.1.
5, the said device of claim 1, wherein substrate has preset thickness, and the zone that has reduced hardness has the predetermined degree of depth, and this degree of depth is no more than 80% of substrate thickness.
6, the said device of claim 1 wherein is 10G at least without the modulus of elasticity of improved substrate Pa
7, the said device of claim 1, the zone that has wherein reduced hardness has one and the corresponding preset width of guard band length.
8, the said device of claim 7, the zone that has wherein reduced hardness extends to the inside of substrate from upper surface.
9, the said device of claim 7, the zone that has wherein reduced hardness extends to the inside of substrate from lower surface.
10, the said device of claim 1 wherein has one group of zone that reduces hardness.
11, the said device of claim 10, the zone that has wherein reduced hardness extends to the inside of substrate from upper surface.
12, the said device of claim 10, the zone that has wherein reduced hardness alternately extends to substrate inside from upper and lower surface.
13, the said device of claim 12, the first area that has wherein reduced hardness extends to substrate inside from upper surface, and adjacent with the edge of said element.
14, the said device of claim 1, the zone that has wherein reduced hardness are grooves.
15, the said device of claim 14, wherein said groove is continuous.
16, the said device of claim 1, the zone that has wherein reduced hardness is made up of one group of discontinuous groove.
17, claim 14 or 15 said devices have been filled a kind of non-hard solid material of inertia in the wherein said groove.
18, the said device of claim 1, the zone that has wherein reduced hardness is made up of non-hard material, and it is a part of substrate.
19, the said device of claim 1, wherein substrate be one in hard solid matrix disperse the composite layer of particle.
20, the said device of claim 1, wherein substrate is a composite layer that has scattered fiber in hard solid matrix.
21, the said device of claim 1, wherein substrate is by AlN, SiC, Al 2O 3, the solid ceramic material selected in silicon, quartz, mullite, cordierite and the GaAs constitutes.
22, the said device of claim 1, wherein substrate is made of the hard polymeric material.
23, the said device of claim 1, wherein said element are integrated circuit (IC) chip.
24, the said device of claim 1, wherein said electric functional layer is an insulating barrier.
25, the said device of claim 1 wherein is equipped with a set of pieces on the substrate.
CN91110644A 1990-09-27 1991-09-27 Eliminate the mixing microelectronic component of thermal stress Pending CN1061491A (en)

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US588,930 1990-09-27

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CA2091465A1 (en) 1992-03-28
WO1992006495A1 (en) 1992-04-16
JPH06503207A (en) 1994-04-07
EP0551395A4 (en) 1993-08-25
EP0551395A1 (en) 1993-07-21

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