CN105731352B - Micro- disk chamber of arsenones and preparation method thereof is integrated on a kind of piece - Google Patents

Abstract

The embodiment of the invention discloses micro- disk chamber of integrated arsenones and preparation method thereof on a kind of piece, wherein, micro- disk chamber includes：The micro- disk and supporting construction being laminated from top to bottom；The size of micro- disk is more than the size of the supporting construction.Provided in an embodiment of the present invention upper micro- disk chamber of arsenones and preparation method thereof that integrates can improve the quality factor that the micro- disk chamber of arsenones is integrated on piece.

Description

On-chip integrated arsenic sulfide microdisk cavity and manufacturing method thereof

technical field

The embodiments of the present invention relate to the field of optical technology, in particular to an on-chip integrated arsenic sulfide microdisk cavity and a manufacturing method thereof.

Background technique

Whispering gallery mode microdisk cavity is an important micro-nanophotonic device, which has a wide range of applications in low-threshold lasers, cavity optomechanics, and biosensing. Especially in the field of integrated optics, due to the huge potential application value of mid-infrared optics and nonlinear optics, the research on integrated optics based on materials with high nonlinear coefficient of mid-infrared light transmission will be of great help to this direction.

At present, the mainstream of research on mid-infrared light-transmitting materials in integrated optics is chalcogenide glass, among which arsenic sulfide and arsenic selenide are the main ones. The existing techniques for preparing arsenic sulfide microdisk chambers cannot solve the problem that arsenic sulfide is easily corroded by oxidizing substances (including gases and liquids), and are all directly grown on silicon dioxide substrates. However, due to the small difference in refractive index between arsenic sulfide and silicon dioxide in such a structure, part of the light energy will be distributed in the substrate, and the loss of light from the substrate will reduce the quality factor of this type of microdisk cavity.

Contents of the invention

Embodiments of the present invention provide an on-chip integrated arsenic sulfide microdisk cavity and a manufacturing method thereof, so as to solve the problem of low quality factor of the on-chip integrated arsenic sulfide microdisk cavity in the prior art.

To achieve this purpose, the embodiments of the present invention adopt the following technical solutions:

In the first aspect, an embodiment of the present invention provides an on-chip integrated arsenic sulfide microdisk cavity, including: a top-down stacked microdisk and a support structure;

The dimensions of the microdisks are larger than the dimensions of the support structure.

Further, the supporting structure includes: an intermediate layer and a supporting layer stacked from top to bottom.

Further, the material of the microdisk is arsenic sulfide; the material of the intermediate layer is silicon dioxide; the material of the supporting layer is silicon.

Further, the shape of the microdisk is cylindrical or truncated-conical;

The shape of the intermediate layer is cylindrical;

The shape of the support layer is truncated cone.

Further, the center of the support layer, the center of the intermediate layer and the center of the microdisk are on the same straight line, and the support layer, the intermediate layer and the microdisk are integrated on a silicon chip.

Further, the thickness of the microdisk is greater than or equal to 0.5 microns and less than or equal to 2 microns.

Further, the diameter of the upper surface of the microdisk is greater than or equal to 20 microns and less than or equal to 100 microns.

Further, the thickness of the intermediate layer is greater than or equal to 0.2 micron and less than or equal to 1 micron.

In the second aspect, the embodiment of the present invention also provides a method for manufacturing the microdisk cavity as described in the first aspect, including:

Provide commercial silica wafers;

forming an arsenic sulfide layer on the silicon dioxide wafer;

spin-coating a first photoresist on the arsenic sulfide layer, exposing and developing to form a first photoresist sub-block;

Etching the arsenic sulfide layer in the remaining area of the arsenic sulfide layer except the area where the first photoresist sub-block is located, to form at least one microdisk;

removing the remaining first photoresist;

re-spin coating a second photoresist on the structure after removing the photoresist, and perform overlay etching to form a second photoresist sub-block, and the second photoresist sub-block surrounds the microdisk;

Etching the silicon dioxide layer in the remaining area of the silicon dioxide layer except the area where the second photoresist sub-block is located, to form a silicon dioxide sub-block;

Etching the silicon in the remaining area of the silicon wafer except the area where the silicon dioxide sub-block is located, to form a supporting layer;

Etching the edge of the silicon dioxide sub-block to form an intermediate layer, so that the size of the microdisk is larger than the size of the intermediate layer;

The remaining second photoresist is removed.

The on-chip integrated arsenic sulfide microdisk cavity and its manufacturing method provided by the embodiments of the present invention realize the suspension setting of the microdisk by setting the size of the microdisk to be larger than the size of the support structure, so that the optical modes bound in the microdisk will not be affected by the support structure Therefore, the quality factor of the on-chip integrated arsenic sulfide microdisk cavity can be improved, and the performance of the on-chip integrated arsenic sulfide microdisk cavity on optical devices can be improved.

Description of drawings

Other characteristics, objects and advantages of the present invention will become more apparent by reading the detailed description of non-limiting embodiments made with reference to the following drawings:

FIG. 1 is a schematic cross-sectional view of an implementation of an on-chip arsenic sulfide microdisk cavity provided by an embodiment of the present invention.

FIG. 2 is a schematic top view of the microdisk in the cavity of the on-chip integrated arsenic sulfide microdisk provided in FIG. 1 .

FIG. 3 is a schematic top view of the intermediate layer in the cavity of the on-chip integrated arsenic sulfide microdisk provided in FIG. 1 .

FIG. 4 is a schematic top view of the support layer in the microdisk cavity integrated with arsenic sulfide on chip provided in FIG. 1 .

FIG. 5 is a schematic cross-sectional view of another implementation of an on-chip arsenic sulfide microdisk cavity provided by an embodiment of the present invention.

FIG. 6 is a schematic top view of the microdisk in the cavity of the on-chip integrated arsenic sulfide microdisk provided in FIG. 5 .

Fig. 7 is a schematic diagram of a normalized transmission spectrum of an on-chip integrated arsenic sulfide microdisk cavity provided by an embodiment of the present invention.

FIG. 8 is a schematic flowchart of a method for fabricating an on-chip arsenic sulfide microdisk cavity provided by an embodiment of the present invention.

FIG. 9A is a schematic cross-sectional view of forming a silicon dioxide layer on a silicon wafer during the step in FIG. 8 .

FIG. 9B is a schematic cross-sectional view of forming an arsenic sulfide layer on the silicon dioxide wafer during the step in FIG. 8 .

FIG. 9C is a schematic cross-sectional view of the step of spin-coating the first photoresist on the arsenic sulfide layer in FIG. 8 .

FIG. 9D is a schematic cross-sectional view of the step of exposing and developing in FIG. 8 to form the first photoresist sub-block.

9E is a schematic cross-sectional view of etching the arsenic sulfide layer in the remaining area of the arsenic sulfide layer except the area where the first photoresist sub-block is located in the step of FIG. 8 to form at least one microdisk.

FIG. 9F is a schematic cross-sectional view of the step of removing the remaining first photoresist in FIG. 8 .

FIG. 9G is a schematic cross-sectional view of re-spinning a second photoresist on the structure after removing the photoresist in the step in FIG. 8 .

FIG. 9H is a schematic cross-sectional view of forming a second photoresist sub-block by performing overlithography in the step in FIG. 8 .

9I is a schematic cross-sectional view of etching the silicon dioxide layer in the remaining area of the silicon dioxide layer except the area where the second photoresist sub-block is located in the step of FIG. 8 to form a silicon dioxide sub-block.

FIG. 9J is a schematic cross-sectional view of etching the silicon in the remaining area of the silicon wafer except the area where the silicon dioxide sub-block is located in the step in FIG. 8 to form a supporting layer.

FIG. 9K is a schematic cross-sectional view of etching the edge of the silicon dioxide sub-block to form an intermediate layer in the step in FIG. 8 .

FIG. 9L is a schematic cross-sectional view of the step of removing the remaining second photoresist in FIG. 8 .

Detailed ways

The present invention will be further described in detail below in conjunction with the accompanying drawings and embodiments. It should be understood that the specific embodiments described here are only used to explain the present invention, but not to limit the present invention. In addition, it should be noted that, for the convenience of description, only parts related to the present invention are shown in the drawings but not all content.

FIG. 1 is a schematic cross-sectional view of an implementation of an on-chip arsenic sulfide microdisk cavity provided by an embodiment of the present invention. As shown in FIG. 1 , the on-chip integrated arsenic sulfide microdisk cavity provided by the embodiment of the present invention includes: a support structure 101 and a microdisk 102 .

Wherein, the microdisk 102 is located on the support structure 101 , and the size of the microdisk 102 is larger than that of the support structure 101 .

In the on-chip integrated arsenic sulfide microdisk chamber provided by the embodiment of the present invention, by setting the size of the microdisk 102 to be larger than the size of the support structure 101, the microdisk 102 is suspended in the air, and the optical modes bound in the microdisk 102 will not be affected by the support structure 101. Therefore, the quality factor of the on-chip integrated arsenic sulfide microdisk cavity can be improved, and the performance of the on-chip integrated arsenic sulfide microdisk cavity on optical devices can be improved.

As shown in FIG. 1 , the supporting structure 101 may include: an intermediate layer 103 and a supporting layer 104 . Wherein, the middle layer 103 is located above the supporting layer 104 .

Wherein, the material of the microdisk 102 may be arsenic sulfide; the material of the intermediate layer 103 may be silicon dioxide; the material of the supporting layer 104 may be silicon.

FIG. 2 is a schematic top view of the microdisk in the cavity of the on-chip integrated arsenic sulfide microdisk provided in FIG. 1 . As shown in FIGS. 1 and 2 , the shape of the microdisk 102 can be cylindrical. The thickness of the microdisk 102 may be greater than or equal to 0.5 microns and less than or equal to 2 microns. The diameter of the microdisk 102 may be greater than or equal to 20 microns and less than or equal to 100 microns.

FIG. 3 is a schematic top view of the intermediate layer in the cavity of the on-chip integrated arsenic sulfide microdisk provided in FIG. 1 . As shown in FIG. 1 and FIG. 3 , the shape of the intermediate layer 103 may be cylindrical. The thickness of the intermediate layer 103 may be greater than or equal to 0.2 micron and less than or equal to 1 micron.

FIG. 4 is a schematic top view of the support layer in the microdisk cavity integrated with arsenic sulfide on chip provided in FIG. 1 . As shown in FIG. 1 and FIG. 4 , the shape of the support layer 104 may be a truncated cone.

As shown in FIG. 1 , the center of the support layer 104 , the center of the intermediate layer 103 and the center of the microdisk 102 may be on the same straight line A-A.

In addition, the supporting layer 104, the intermediate layer 103 and the microdisk 102 can be integrated on the silicon chip (not shown in the figure).

FIG. 5 is a schematic cross-sectional view of another implementation of an on-chip arsenic sulfide microdisk cavity provided by an embodiment of the present invention. As shown in FIGS. 1 and 5 , different from the cavity of the on-chip arsenic sulfide microdisk shown in FIG. 1 , the shape of the on-chip arsenic sulfide integrated microdisk 102 shown in FIG. 5 is a truncated cone. Wherein, the diameter of the upper surface of the microdisk 102 may be greater than or equal to 20 microns and less than or equal to 100 microns.

FIG. 6 is a schematic top view of the microdisk in the cavity of the on-chip integrated arsenic sulfide microdisk provided in FIG. 5 . Because the shape of the microdisc 102 in the integrated arsenic sulfide microdisk cavity shown in FIG. 1 is cylindrical, the shape of the microdisc 102 in the integrated arsenic sulfide microdisk cavity shown in FIG. 2, the top view of the microdisk 102 in the on-chip arsenic sulfide microdisk cavity shown in FIG. 1 is different from the top view of the microdisk 102 in the on-chip arsenic sulfide microdisk cavity shown in FIG. Because the intermediate layer 103 and supporting layer 104 in the on-chip integrated arsenic sulfide microdisk cavity shown in FIG. The top views of the intermediate layer 103 and the support layer 104 in the on-chip integrated arsenic sulfide microdisk cavity are shown in FIG. 3 and FIG. 4 , and will not be repeated here.

Fig. 7 is a schematic diagram of a normalized transmission spectrum of an on-chip integrated arsenic sulfide microdisk cavity provided by an embodiment of the present invention. Wherein, the radius of the microdisk in the microdisk cavity utilized in FIG. 7 is 60 microns. As shown in FIG. 7 , the abscissa is the frequency detuning/GHz, and the ordinate is the normalized transmittance. It can be seen from FIG. 7 that the intrinsic quality factor Q ₀ of the microdisk cavity provided by the embodiment of the present invention can reach 8.4×10 ⁵ .

FIG. 8 is a schematic flowchart of a method for fabricating an on-chip arsenic sulfide microdisk cavity provided by an embodiment of the present invention. The fabrication method shown in FIG. 8 is used to fabricate the on-chip arsenic sulfide microdisk cavity provided by the above embodiments of the present invention. As shown in FIG. 8 , the fabrication method of the on-chip arsenic sulfide microdisk cavity provided by the embodiment of the present invention includes:

Step 701, providing commercial silicon dioxide wafers.

The commercial silicon dioxide wafer provided in step 701 is obtained by forming a silicon dioxide layer on the surface of the silicon wafer. The manufacturing steps may include: providing a silicon chip; forming a silicon dioxide layer on the silicon chip.

FIG. 9A is a schematic cross-sectional view of forming a silicon dioxide layer on a silicon wafer during the step in FIG. 8 . As shown in FIG. 9A , a silicon dioxide layer 802 is formed over a silicon wafer 801 .

The process used to form the silicon dioxide layer 802 in step 701 may be a thermal oxidation process, or a plasma enhanced chemical vapor deposition (PEVCD, Plasma Enhanced Chemical Vapor Deposition).

The thickness of the silicon dioxide layer 802 formed in step 701 can be designed according to actual needs, for example: 0.2 μm-1 μm, and the specific thickness of the silicon dioxide layer 802 is not limited here.

It should be noted that after the silicon wafer is provided, before forming the silicon dioxide layer on the silicon wafer, it may further include: cleaning and drying the silicon wafer 801 to ensure the cleanliness of the silicon wafer 801 surface.

Step 702, forming an arsenic sulfide layer on the silicon dioxide wafer.

FIG. 9B is a schematic cross-sectional view of forming an arsenic sulfide layer on the silicon dioxide wafer during the step in FIG. 8 . As shown in FIG. 9B , an arsenic sulfide layer 803 is formed over the silicon dioxide layer 802 .

The process used to form the arsenic sulfide layer 803 in step 702 may be a vacuum evaporation deposition process or a pulsed laser deposition process.

It should be noted that after step 701 and before step 702, the method may further include: cleaning and drying the silicon wafer 801 to ensure the cleanliness of the silicon wafer 801 surface. After step 702 , it may further include: annealing the structure obtained in step 702 to improve the density of the arsenic sulfide layer 803 .

Step 703 , spin-coat the first photoresist on the arsenic sulfide layer, and perform exposure and development to form the first photoresist sub-block.

FIG. 9C is a schematic cross-sectional view of the step of spin-coating the first photoresist on the arsenic sulfide layer in FIG. 8 . As shown in FIG. 9C , a first photoresist 804 is spin-coated on the arsenic sulfide layer 803 .

FIG. 9D is a schematic cross-sectional view of the step of exposing and developing in FIG. 8 to form the first photoresist sub-block. As shown in 8D, after exposure and development are performed using photolithography technology, the pattern on the mask plate is transferred to the first photoresist to form a first photoresist sub-block 805 .

It should be noted that the shape of the mask plate used in step 703 may be circular. The size of the mask plate can be designed according to actual needs, for example: 10 microns-100 microns, and the specific size of the mask plate is not limited here.

After step 702 and before step 703, it may also include: washing and drying the structure obtained in step 702 to ensure the cleanliness of the surface.

Step 704 , etching the arsenic sulfide layer in the remaining area of the arsenic sulfide layer except the area where the first photoresist sub-block is located, to form at least one microdisk.

9E is a schematic cross-sectional view of etching the arsenic sulfide layer in the remaining area of the arsenic sulfide layer except the area where the first photoresist sub-block is located in the step of FIG. 8 to form at least one microdisk. As shown in FIG. 9E , under the shielding effect of the photoresist, the etching liquid (or gas) can only etch the remaining area of the arsenic sulfide layer from top to bottom except the area where the first photoresist sub-block 805 is located. The arsenic sulfide layer forms at least one microdisk 806 .

In step 704, the method used to etch the arsenic sulfide layer may be: wet etching with liquid containing ammonia or dry etching with gas such as trifluoromethane.

It can be understood that, ideally, the microdisk 806 will not be etched during the etching process. However, in actual situations, since the etching liquid and gas also have lateral diffusion in addition to vertical diffusion, the etching depths of the upper edge and the lower edge of the microdisk 806 are inconsistent. At this time, the formed structure is as shown in FIG. 5 shows the structure.

It should be noted that the microdisk 806 here is the microdisk 102 in FIG. 1 and FIG. 5 .

Step 705 , removing the remaining first photoresist.

FIG. 9F is a schematic cross-sectional view of the step of removing the remaining first photoresist in FIG. 8 . As shown in FIG. 9F , there is no first photoresist in the structure obtained in step 705 .

Step 706 , re-spin coat a second photoresist on the structure after removing the photoresist, and perform overlithography to form a second photoresist sub-block, and the second photoresist sub-block surrounds the microdisk.

FIG. 9G is a schematic cross-sectional view of re-spinning a second photoresist on the structure after removing the photoresist in the step in FIG. 8 . As shown in FIG. 9G , a second photoresist 807 is re-spinned on the structure after the photoresist is removed. Wherein, the second photoresist 807 not only covers the microdisks 806 , but also covers the silicon dioxide 802 between two adjacent microdisks 806 .

FIG. 9H is a schematic cross-sectional view of forming a second photoresist sub-block by performing overlithography in the step in FIG. 8 . As shown in FIG. 9H , a second photoresist sub-block 808 is formed through an overlay process. Wherein, the second photoresist sub-block 808 surrounds the microdisk 806 .

It should be noted that if the second photoresist sub-block 808 is to surround the microdisk 806 , then: the second photoresist sub-block 808 not only covers the upper surface of the microdisk 806 , but also surrounds the side of the microdisk 806 for a week. In addition, the shape of the second photoresist sub-block 808 should be the same as that of the microdisk 806 . In addition, the radius of the second photoresist sub-block 808 may be 20 microns larger than the diameter of the microdisk 806 , and the center of the circle of the second photoresist subblock 808 and the center of the microdisk 806 may be concentric.

Step 707 , etching the silicon dioxide layer in the remaining area of the silicon dioxide layer except the area where the second photoresist sub-block is located, to form a silicon dioxide sub-block.

9I is a schematic cross-sectional view of etching the silicon dioxide layer in the remaining area of the silicon dioxide layer except the area where the second photoresist sub-block is located in the step of FIG. 8 to form a silicon dioxide sub-block. As shown in FIG. 9I , the silicon dioxide layer in the remaining area of the silicon dioxide except the area where the second photoresist sub-block 808 is located is etched to form a silicon dioxide sub-block 809 . In the structure formed at this time, the second photoresist sub-block 808 and the silicon dioxide sub-block 809 constitute the cladding layer of the microdisk 806 .

The process used to etch the silicon dioxide layer in step 707 may be wet etching, and the liquid used may be hydrofluoric acid solution.

Step 708 , etching the remaining silicon in the silicon wafer except the area where the silicon dioxide sub-block is located, to form a supporting layer.

FIG. 9J is a schematic cross-sectional view of etching the remaining silicon in the silicon wafer except the area where the silicon dioxide sub-block is located in the step in FIG. 8 to form a supporting layer. As shown in FIG. 9J , the remaining silicon in the silicon wafer except the area where the silicon dioxide sub-block is located is etched to form a supporting layer 810 . The support layer 810 formed here is the support layer 104 in FIGS. 1 and 5 .

The silicon etching process in step 708 may be a dry etching process or a wet etching process, and the etching substance used may be sulfur hexafluoride.

It should be noted that since the second photoresist sub-block 808 and the silicon dioxide sub-block 809 constitute the cladding layer of the microdisk 806 in step 707, therefore, when silicon dioxide is etched in this step 708, no damage to the microdisk 806 will be caused. of etching.

Step 709 , etching the edge of the silicon dioxide sub-block to form an intermediate layer, so that the size of the microdisk is larger than that of the intermediate layer.

FIG. 9K is a schematic cross-sectional view of etching the edge of the silicon dioxide sub-block to form the intermediate layer 811 in the step in FIG. 8 . The intermediate layer 811 formed here is the intermediate layer 103 shown in FIGS. 1 and 5 .

In step 709, hydrofluoric acid may be used to etch the edge of the silicon dioxide sub-block.

It should be noted that, since the second photoresist sub-block 808 and the silicon dioxide sub-block 809 constitute the cladding layer of the microdisk 806 in step 707, when the silicon dioxide sub-block is etched in this step 709, no damage to the microdisk will be caused. 806 etching.

Step 710, removing the remaining second photoresist.

FIG. 9L is a schematic cross-sectional view of the step of removing the remaining second photoresist in FIG. 8 . As shown in FIG. 9K , there is no second photoresist in the structure obtained in step 710 .

It should be noted that, in the structure shown in FIG. 9L , the structure shown in FIG. 1 can be obtained by cutting along the line B-B.

The method for fabricating the on-chip arsenic sulfide microdisk cavity provided by the embodiment of the present invention realizes the realization of the microdisk 806 by setting the size of the microdisk 806 to be larger than the size of the support structure (the support structure includes a support layer 810 and an intermediate layer 811 stacked from bottom to top). The microdisk 806 is set in the air, so that the optical modes bound in the microdisk 806 will not be affected by the support structure, so that the quality factor of the on-chip integrated arsenic sulfide microdisk cavity can be improved, and the performance of the on-chip integrated arsenic sulfide microdisk cavity on optical devices can be improved. . In addition, the manufacturing method of the on-chip integrated arsenic sulfide microdisk cavity provided by the embodiment of the present invention is compatible with traditional integrated circuit technology, and has the advantages of simple operation, high repetition rate and easy integration.

Note that the above are only preferred embodiments of the present invention and applied technical principles. Those skilled in the art will understand that the present invention is not limited to the specific embodiments described herein, and that various obvious changes, readjustments and substitutions can be made by those skilled in the art without departing from the protection scope of the present invention. Therefore, although the present invention has been described in detail through the above embodiments, the present invention is not limited to the above embodiments, and can also include more other equivalent embodiments without departing from the concept of the present invention, and the present invention The scope is determined by the scope of the appended claims.

Claims (3)

1. An on-chip integrated arsenic sulfide microdisk chamber, characterized in that it comprises: a top-down stacked microdisk and a support structure; The size of the microdisk is larger than the size of the support structure, and the microdisk is suspended relative to the support structure; The material of the microdisc is arsenic sulfide; the thickness of the microdisk is greater than or equal to 0.5 microns and less than or equal to 2 microns; The support structure includes an intermediate layer and a support layer stacked from top to bottom; the material of the intermediate layer is silicon dioxide; the thickness of the intermediate layer is greater than or equal to 0.2 micron and less than or equal to 1 micron; The material of the support layer is silicon; The shape of the microdisk is cylindrical or truncated conical; the shape of the intermediate layer is cylindrical; the shape of the support layer is truncated conical; the center of the support layer, the center of the intermediate layer and the center of the microdisk The centers are on the same straight line, and the supporting layer, the intermediate layer and the microdisk are integrated on the silicon chip. 2. The microdisk cavity according to claim 1, wherein the diameter of the upper surface of the microdisk is greater than or equal to 20 microns and less than or equal to 100 microns. 3. A manufacturing method of an integrated arsenic sulfide microdisk cavity on a chip as claimed in claim 1 or 2, characterized in that, comprising: Provide commercial silica wafers; forming an arsenic sulfide layer on the silicon dioxide wafer; spin-coating a first photoresist on the arsenic sulfide layer, exposing and developing to form a first photoresist sub-block; Etching the arsenic sulfide layer in the remaining area of the arsenic sulfide layer except the area where the first photoresist sub-block is located, to form at least one microdisk; removing the remaining first photoresist; re-spin coating a second photoresist on the structure after removing the photoresist, and perform overlay etching to form a second photoresist sub-block, and the second photoresist sub-block surrounds the microdisk; Etching the silicon dioxide layer in the remaining area of the silicon dioxide layer except the area where the second photoresist sub-block is located, to form a silicon dioxide sub-block; Etching the silicon in the remaining area of the silicon wafer except the area where the silicon dioxide sub-block is located, to form a supporting layer; Etching the edge of the silicon dioxide sub-block to form an intermediate layer, so that the size of the microdisk is larger than the size of the intermediate layer; The remaining second photoresist is removed.