CN105491787A - Single-layer circuit board, high-layer circuit board and fabrication method of high-layer circuit board - Google Patents
Single-layer circuit board, high-layer circuit board and fabrication method of high-layer circuit board Download PDFInfo
- Publication number
- CN105491787A CN105491787A CN201610008276.3A CN201610008276A CN105491787A CN 105491787 A CN105491787 A CN 105491787A CN 201610008276 A CN201610008276 A CN 201610008276A CN 105491787 A CN105491787 A CN 105491787A
- Authority
- CN
- China
- Prior art keywords
- circuit board
- wiring board
- layer
- individual layer
- pad
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 238000000034 method Methods 0.000 title claims abstract description 21
- 238000004519 manufacturing process Methods 0.000 title claims abstract description 11
- 239000010410 layer Substances 0.000 title abstract description 85
- 239000002356 single layer Substances 0.000 title abstract 4
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 claims abstract description 31
- 229910052802 copper Inorganic materials 0.000 claims abstract description 24
- 239000010949 copper Substances 0.000 claims abstract description 24
- 239000003292 glue Substances 0.000 claims description 27
- 238000003825 pressing Methods 0.000 claims description 9
- 238000007789 sealing Methods 0.000 claims description 8
- 239000011889 copper foil Substances 0.000 abstract description 8
- 229920005989 resin Polymers 0.000 abstract description 8
- 239000011347 resin Substances 0.000 abstract description 8
- 238000003475 lamination Methods 0.000 abstract description 7
- 239000000853 adhesive Substances 0.000 abstract 5
- 230000001070 adhesive effect Effects 0.000 abstract 5
- 230000000694 effects Effects 0.000 description 3
- 239000011229 interlayer Substances 0.000 description 3
- 238000012545 processing Methods 0.000 description 3
- 230000007547 defect Effects 0.000 description 2
- 238000013461 design Methods 0.000 description 2
- 230000009286 beneficial effect Effects 0.000 description 1
- 238000001816 cooling Methods 0.000 description 1
- 150000001879 copper Chemical class 0.000 description 1
- 230000007812 deficiency Effects 0.000 description 1
- 238000005516 engineering process Methods 0.000 description 1
- 239000003822 epoxy resin Substances 0.000 description 1
- 239000007788 liquid Substances 0.000 description 1
- 229920000647 polyepoxide Polymers 0.000 description 1
- 238000012360 testing method Methods 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/02—Details
- H05K1/0271—Arrangements for reducing stress or warp in rigid printed circuit boards, e.g. caused by loads, vibrations or differences in thermal expansion
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/02—Details
- H05K1/11—Printed elements for providing electric connections to or between printed circuits
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/46—Manufacturing multilayer circuits
- H05K3/4611—Manufacturing multilayer circuits by laminating two or more circuit boards
- H05K3/4614—Manufacturing multilayer circuits by laminating two or more circuit boards the electrical connections between the circuit boards being made during lamination
- H05K3/4617—Manufacturing multilayer circuits by laminating two or more circuit boards the electrical connections between the circuit boards being made during lamination characterized by laminating only or mainly similar single-sided circuit boards
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/09—Shape and layout
- H05K2201/09009—Substrate related
- H05K2201/09036—Recesses or grooves in insulating substrate
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/09—Shape and layout
- H05K2201/09209—Shape and layout details of conductors
- H05K2201/09372—Pads and lands
- H05K2201/09427—Special relation between the location or dimension of a pad or land and the location or dimension of a terminal
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Manufacturing & Machinery (AREA)
- Production Of Multi-Layered Print Wiring Board (AREA)
Abstract
The invention discloses a single-layer circuit board, a high-layer circuit board and a fabrication method of the high-layer circuit board. The single-layer circuit board comprises a core board and a copper frame, wherein the copper frame is arranged at an outer edge of the core board, the core board comprises a pattern region and a blank region, wherein the pattern region is arranged at a middle part, the blank region is arranged at the periphery of the pattern region, a plurality of bonding pads are uniformly arranged on the blank region of the upper surface and/or the lower surface of the core board, a distance is reserved between adjacent bonding pads, a plurality of adhesive guide grooves are uniformly arranged on the upper surface and/or the lower surface of the copper frame, and the central line of the plurality of adhesive guide grooves is intersected with a geometric center of the core board so that the plurality of adhesive guide grooves can be radially arranged around the geometric center of the core board. By the single-layer circuit board, the adhesive flowing performance during the lamination process can be effectively improved, resin adhesive flowing among layers is more complete and uniform, so that a copper foil is laminated to be corrugated by the high-layer circuit board.
Description
Technical field
The present invention relates to the manufacture method of a kind of individual layer wiring board, high sandwich circuit board and high sandwich circuit board, belong to the processing technique field of wiring board.
Background technology
At present, the technological progress of high sandwich circuit board product, for electronic enterprises, communications industry, automobile industry and the industry that is associated provide high-quality.High sandwich circuit board is the central layer having been made inner figure by multiple, by being pressed onto together by central layer at all levels with epoxy resin in press, becomes the PCB of a multilayer.Lamination process, as an important ring of the PCB course of processing, is related to the impedance of plate, the integrality of lines, and the state of cure of resin also has influence on the processing such as follow-up boring desmearing, plays very important effect to plate reliability.In lamination process; often can there is the wrinkling problem of Copper Foil; Copper Foil is wrinkling all appears at surface location; and internal layer is without larger place, copper clear area; very easily there is starved, the defect such as wrinkling herein, in lamination temperature-rise period, because resin is in viscosity flow state; under the effect of the pressure with the self character of liquid flow, can towards pressure less and lower ground side flow.If the glue content of PP (prepreg) is less, then the filling capacity of resin is affected, a small amount of resin is difficult to fully be filled into a large amount of clear areas, and the air of clear area have been discharged in lamination process owing to expanding with heat and contract with cold, will inevitably partial vacuum be there is after cooling, cause the Copper Foil on surface to sink and occur that Copper Foil is wrinkling.
Summary of the invention
For the deficiencies in the prior art, the object of the invention is the manufacture method in order to provide a kind of individual layer wiring board, high sandwich circuit board and high sandwich circuit board, effectively can improve the gummosis performance in bonding processes, make interlayer resin gummosis more fully, evenly, thus prevent corrugation of copper foil during stitching of high-layer circuit board.
For achieving the above object, the present invention adopts following technical scheme:
A kind of individual layer wiring board, is characterized in that: described wiring board comprises central layer and is located at the copper frame of central layer outer edge; Described central layer comprises the graph area being positioned at middle part and the clear area being positioned at graph area outside; The upper surface of described central layer and/or the clear area of lower surface are provided with several equally distributed pads, leave spacing between adjacent pad; The upper surface of described copper frame and/or lower surface are provided with several and equally distributedly lead glue groove, and several described center lines of leading glue groove intersect at the geometric center of central layer, they radially can be arranged around the geometric center of central layer.
As preferably, the diameter of described pad is 2mm.
As preferably, on same individual layer wiring board, the spacing between adjacent pad is 0.87mm, and center distance is 2.87mm, makes gummosis smooth and easy.
A kind of high sandwich circuit board, is characterized in that, comprises at least two-layer above superimposed above-mentioned individual layer wiring board.
As preferably, the position of the pad between adjacent two-layer individual layer wiring board transversely shifts to install in direction, avoids without copper area overlapping.
As preferably, the position of leading glue groove between adjacent two-layer individual layer wiring board transversely shifts to install in direction, avoids leading glue groove overlap and causes local nonlinearity harmomegathus or distortion.
A manufacture method for high sandwich circuit board, is characterized in that, comprises the following steps:
1) making of individual layer wiring board
1-1) the making of pad a: central layer having made inner figure is provided, central layer comprises the graph area being positioned at middle part and the clear area being positioned at graph area outside; Be provided with several equally distributed pads at the upper surface of described central layer and/or the clear area of lower surface, ensure to leave spacing between adjacent pad;
1-2) edge sealing: adopt copper frame to through step 1-1) outer edge of central layer after process carries out edge sealing; Be provided with several at the upper surface of described copper frame and/or lower surface and equally distributedly lead glue groove, several described center lines of leading glue groove intersect at the geometric center of central layer, they radially can be arranged around the geometric center of central layer;
2) typesetting: by least two-layer above step 1) described in individual layer wiring board carry out superimposed placement, between adjacent two-layer individual layer wiring board, place PP;
3) pressing plate: by pressing and forming machine, the superimposed each sandwich circuit board placed is carried out pressing and forming, namely obtain high sandwich circuit board.
As preferably, step 1-1) in, the diameter of described pad is 2mm; On same individual layer wiring board, the spacing between adjacent pad is 0.87mm, center distance 2.87mm, makes gummosis smooth and easy.
As preferably, step 2) in, need the position of the pad ensured between adjacent two-layer individual layer wiring board transversely to shift to install in direction; Need to ensure that the position of leading glue groove between adjacent two-layer individual layer wiring board transversely shifts to install in direction.
Beneficial effect of the present invention is:
1, the present invention is near graph area, adopts a certain size pad to replace conventional branching block, has larger interval, make gummosis smooth and easy between pad; The present invention is at the outer edge copper frame edge sealing of central layer, the upper surface of described copper frame and/or lower surface are provided with several and equally distributedly lead glue groove, the center line that several lead glue groove of the present invention intersect at central layer geometric center, they radially can be arranged around the geometric center of central layer; This copper frame is provided with one fixed width, fixed intervals, different oblique angle lead glue groove, ensure that interlayer resin spreads to surrounding.
The position of the pad between the two-layer individual layer wiring board that 2, the present invention is adjacent transversely shifts to install in direction, avoids without copper area overlapping.The position of leading glue groove between the two-layer individual layer wiring board that the present invention is adjacent transversely shifts to install in direction, avoids leading glue groove overlap and causes local nonlinearity harmomegathus or distortion.
In sum, the present invention effectively can improve the gummosis performance in bonding processes, makes interlayer resin gummosis more fully, evenly, thus prevents corrugation of copper foil during stitching of high-layer circuit board.
Accompanying drawing explanation
Fig. 1 is the structural representation of the individual layer wiring board of the embodiment of the present invention 1.
Wherein, 1, individual layer wiring board; 11, central layer; 111, graph area; 112, clear area; 12, copper frame; 121, glue groove is led; 13, pad.
Embodiment
Below, by reference to the accompanying drawings and embodiment, the present invention is described further:
Embodiment 1:
With reference to Fig. 1, a kind of individual layer wiring board 1 described in the present embodiment, comprises central layer 11 and the copper frame 12 being located at central layer outer edge; Described central layer 11 comprises the graph area 111 being positioned at middle part and the clear area 112 being positioned at graph area 111 outside; The upper surface of described central layer and the clear area 112 of lower surface are provided with several equally distributed pads 13, leave spacing between adjacent pad 13; The upper surface of described copper frame 12 and lower surface are provided with several and equally distributedly lead glue groove 121, and several described center lines of leading glue groove 121 intersect at the geometric center of central layer 11, they radially can be arranged around the geometric center of central layer 11.
A kind of high sandwich circuit board, comprises at least two-layer above superimposed above-mentioned individual layer wiring board 1.The position of the pad 13 between adjacent two-layer individual layer wiring board 1 transversely shifts to install in direction, avoids without copper area overlapping.The position of leading glue groove 121 between adjacent two-layer individual layer wiring board 1 transversely shifts to install in direction, avoids leading glue groove 121 overlap and causes local nonlinearity harmomegathus or distortion.
A manufacture method for high sandwich circuit board, comprises the following steps:
1) making of individual layer wiring board
1-1) the making of pad a: central layer having made inner figure is provided, central layer comprises the graph area being positioned at middle part and the clear area being positioned at graph area outside; Be provided with several equally distributed pads at the upper surface of described central layer and the clear area of lower surface, ensure to leave spacing between adjacent pad; The diameter of described pad is 2mm; On same individual layer wiring board, the spacing between adjacent pad is 0.87mm, center distance 2.87mm, makes gummosis smooth and easy.
1-2) edge sealing: adopt copper frame to through step 1-1) outer edge of central layer after process carries out edge sealing; Be provided with several at the upper surface of described copper frame and lower surface and equally distributedly lead glue groove, several described center lines of leading glue groove intersect at the geometric center of central layer, they radially can be arranged around the geometric center of central layer;
2) typesetting: by least two-layer above step 1) described in individual layer wiring board carry out superimposed placement, between adjacent two-layer individual layer wiring board, place PP, between adjacent two-layer individual layer wiring board, place PP;
3) pressing plate: by pressing and forming machine, the superimposed each sandwich circuit board placed is carried out pressing and forming, namely obtain high sandwich circuit board.
Embodiment 2:
The feature of the present embodiment is: the diameter of described pad is 2mm; On same individual layer wiring board, the spacing between adjacent pad is 0.87mm, and center distance is 2.87mm.Other is identical with embodiment 1.
Embodiment 3:
The feature of the present embodiment is: the diameter of described pad is 2mm; On same individual layer wiring board, the spacing between adjacent pad is 0.87mm, and center distance is 2.87mm.Other is identical with embodiment 1.
Other embodiments:
The feature of described embodiment is: the upper surface of described central layer or the clear area 112 of lower surface are provided with several equally distributed pads 13; The upper surface of described copper frame 12 or lower surface are provided with several and equally distributedly lead glue groove 12.Other is identical with embodiment 1.
Properties of product detect:
New edge sealing design, lamination quality improvement effect is obvious.(1) after lamination, the test of thickness of slab homogeneity finds, the present invention can make the central layer thickness of slab tolerance of more than 2mm can be controlled in ± 3%, comparatively ± 6% improve 3 percentage points; (2) laminate defect (Copper Foil wrinkling, hickie) rate is reduced to 1% by 4% before.
For a person skilled in the art, according to technical scheme described above and design, other various corresponding change and distortion can be made, and all these change and distortion all should belong within the protection range of the claims in the present invention.
Claims (10)
1. an individual layer wiring board, is characterized in that: described wiring board comprises central layer and is located at the copper frame of central layer outer edge; Described central layer comprises the graph area being positioned at middle part and the clear area being positioned at graph area outside; The upper surface of described central layer and/or the clear area of lower surface are provided with several equally distributed pads, leave spacing between adjacent pad; The upper surface of described copper frame and/or lower surface are provided with several and equally distributedly lead glue groove, and several described center lines of leading glue groove intersect at the geometric center of central layer, they radially can be arranged around the geometric center of central layer.
2. individual layer wiring board according to claim 1, is characterized in that: the diameter of described pad is 2mm.
3. individual layer wiring board according to claim 1, is characterized in that: on same individual layer wiring board, and the spacing between adjacent pad is 0.87mm, center distance 2.87mm.
4. a high sandwich circuit board, is characterized in that: comprise at least two-layer above superimposed individual layer wiring board according to claim 1.
5. high sandwich circuit board according to claim 4, is characterized in that: the position of the pad between adjacent two-layer individual layer wiring board transversely shifts to install in direction.
6. high sandwich circuit board according to claim 4, is characterized in that: the position of leading glue groove between adjacent two-layer individual layer wiring board transversely shifts to install in direction.
7. a manufacture method for high sandwich circuit board according to claim 4, is characterized in that, comprise the following steps:
1) making of individual layer wiring board
1-1) the making of pad a: central layer having made inner figure is provided, central layer comprises the graph area being positioned at middle part and the clear area being positioned at graph area outside; Be provided with several equally distributed pads at the upper surface of described central layer and/or the clear area of lower surface, ensure to leave spacing between adjacent pad;
1-2) edge sealing: adopt copper frame to through step 1-1) outer edge of central layer after process carries out edge sealing; Be provided with several at the upper surface of described copper frame and/or lower surface and equally distributedly lead glue groove, several described center lines of leading glue groove intersect at the geometric center of central layer, they radially can be arranged around the geometric center of central layer;
2) typesetting: by least two-layer above step 1) described in individual layer wiring board carry out superimposed placement, between adjacent two-layer individual layer wiring board, place PP;
3) pressing plate: by pressing and forming machine, the superimposed each sandwich circuit board placed is carried out pressing and forming, namely obtain high sandwich circuit board.
8. the manufacture method of high sandwich circuit board according to claim 7, is characterized in that: step 1-1) in, the diameter of described pad is 2mm; On same individual layer wiring board, the spacing between adjacent pad is 0.87mm, center distance 2.87mm.
9. the manufacture method of high sandwich circuit board according to claim 7, is characterized in that: step 2) in, need the position of the pad ensured between adjacent two-layer individual layer wiring board transversely to shift to install in direction.
10. the manufacture method of high sandwich circuit board according to claim 7, is characterized in that: step 2) in, need to ensure that the position of leading glue groove between adjacent two-layer individual layer wiring board transversely shifts to install in direction.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201610008276.3A CN105491787A (en) | 2016-01-01 | 2016-01-01 | Single-layer circuit board, high-layer circuit board and fabrication method of high-layer circuit board |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201610008276.3A CN105491787A (en) | 2016-01-01 | 2016-01-01 | Single-layer circuit board, high-layer circuit board and fabrication method of high-layer circuit board |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN105491787A true CN105491787A (en) | 2016-04-13 |
Family
ID=55678387
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201610008276.3A Pending CN105491787A (en) | 2016-01-01 | 2016-01-01 | Single-layer circuit board, high-layer circuit board and fabrication method of high-layer circuit board |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN105491787A (en) |
Cited By (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN106163138A (en) * | 2016-08-26 | 2016-11-23 | 广州兴森快捷电路科技有限公司 | A kind of manufacture method of gold finger plate |
| CN106604575A (en) * | 2016-12-22 | 2017-04-26 | 深圳崇达多层线路板有限公司 | Method for improving cracking on board edge of Rogers material circuit board |
| CN110708889A (en) * | 2019-09-20 | 2020-01-17 | 大连崇达电子有限公司 | Method for improving press-fit cavity of printed circuit board |
| CN111935902A (en) * | 2020-09-23 | 2020-11-13 | 歌尔股份有限公司 | Printed circuit board |
| WO2022188415A1 (en) * | 2021-03-08 | 2022-09-15 | 京东方科技集团股份有限公司 | Flexible circuit board, display panel and preparation method therefor, and display device |
| CN115519850A (en) * | 2022-09-20 | 2022-12-27 | 宁波甬强科技有限公司 | Copper-clad plate manufacturing method |
Citations (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN201188718Y (en) * | 2008-04-30 | 2009-01-28 | 深圳市兴森快捷电路科技股份有限公司 | Equispaced printed circuit board |
| CN101478858A (en) * | 2009-01-21 | 2009-07-08 | 友达光电股份有限公司 | Circuit board construction, manufacturing method and liquid crystal display |
| CN101547555A (en) * | 2009-05-05 | 2009-09-30 | 福建星网锐捷网络有限公司 | Printed circuit board |
| CN201758487U (en) * | 2010-07-06 | 2011-03-09 | 深南电路有限公司 | Printed circuit board |
| CN202190457U (en) * | 2011-08-24 | 2012-04-11 | 胜宏科技（惠州）有限公司 | High-uniformity circuit board |
| CN203086841U (en) * | 2013-01-14 | 2013-07-24 | 广东生益科技股份有限公司 | A board edge structure of a thick-copper multilayer printed circuit board and a printed circuit board containing the board edge structure |
-
2016
- 2016-01-01 CN CN201610008276.3A patent/CN105491787A/en active Pending
Patent Citations (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN201188718Y (en) * | 2008-04-30 | 2009-01-28 | 深圳市兴森快捷电路科技股份有限公司 | Equispaced printed circuit board |
| CN101478858A (en) * | 2009-01-21 | 2009-07-08 | 友达光电股份有限公司 | Circuit board construction, manufacturing method and liquid crystal display |
| CN101547555A (en) * | 2009-05-05 | 2009-09-30 | 福建星网锐捷网络有限公司 | Printed circuit board |
| CN201758487U (en) * | 2010-07-06 | 2011-03-09 | 深南电路有限公司 | Printed circuit board |
| CN202190457U (en) * | 2011-08-24 | 2012-04-11 | 胜宏科技（惠州）有限公司 | High-uniformity circuit board |
| CN203086841U (en) * | 2013-01-14 | 2013-07-24 | 广东生益科技股份有限公司 | A board edge structure of a thick-copper multilayer printed circuit board and a printed circuit board containing the board edge structure |
Cited By (7)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN106163138A (en) * | 2016-08-26 | 2016-11-23 | 广州兴森快捷电路科技有限公司 | A kind of manufacture method of gold finger plate |
| CN106604575A (en) * | 2016-12-22 | 2017-04-26 | 深圳崇达多层线路板有限公司 | Method for improving cracking on board edge of Rogers material circuit board |
| CN110708889A (en) * | 2019-09-20 | 2020-01-17 | 大连崇达电子有限公司 | Method for improving press-fit cavity of printed circuit board |
| CN111935902A (en) * | 2020-09-23 | 2020-11-13 | 歌尔股份有限公司 | Printed circuit board |
| WO2022188415A1 (en) * | 2021-03-08 | 2022-09-15 | 京东方科技集团股份有限公司 | Flexible circuit board, display panel and preparation method therefor, and display device |
| CN115519850A (en) * | 2022-09-20 | 2022-12-27 | 宁波甬强科技有限公司 | Copper-clad plate manufacturing method |
| CN115519850B (en) * | 2022-09-20 | 2024-09-10 | 宁波甬强科技有限公司 | Manufacturing method of copper-clad plate |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| CN105491787A (en) | Single-layer circuit board, high-layer circuit board and fabrication method of high-layer circuit board | |
| CN102883534B (en) | The thick copper coin internal layer of printed circuit is without copper district decompression problem-solving approach | |
| CN105636368A (en) | Control method for uniformly laminating multi-layered PCB | |
| CN101203094B (en) | Method for multi-layer board semi-curing glue transferring of flexible printed wiring board | |
| CN103237422B (en) | A kind of thick copper multilayer plate laminates method | |
| CN104244616A (en) | Manufacturing method for thin coreless substrate | |
| CN101820728A (en) | Technological method for processing printed circuit board (PCB) with stepped groove | |
| CN102917554B (en) | Manufacturing method of multilayer double-copper conductor plate | |
| CN107623992A (en) | The optimization method and PCB of PCB inner figures, jigsaw structure and laminar structure | |
| CN104538320A (en) | Core-less board manufacturing method | |
| US10743414B2 (en) | Resin multilayer substrate and method of manufacturing the same | |
| CN104717840A (en) | Circuit board manufacturing method and circuit board | |
| CN110113899B (en) | Method for manufacturing target of multilayer core board | |
| CN210202170U (en) | Multilayer PCB structure with latticed process edges | |
| CN110678013A (en) | Processing method of embedded copper block printed board and printed board | |
| CN109152219B (en) | PCB (printed Circuit Board) internal thick copper structure, multilayer printed circuit board and preparation method thereof | |
| KR20080012390A (en) | Pressure bonding method of multilayer printed circuit board | |
| CN204968229U (en) | Structure of lamination in advance before circuit board pressfitting | |
| JP5194951B2 (en) | Circuit board manufacturing method | |
| CN210202171U (en) | Multilayer PCB structure with uniform plate thickness | |
| CN105704930B (en) | The manufacturing method of buried resistance board | |
| CN206024252U (en) | Circuit board | |
| CN116261284A (en) | Multilayer circuit board and laminated board manufacturing method thereof | |
| CN112867289A (en) | Manufacturing method of circuit board | |
| CN100461982C (en) | Circuit board with second metal layer without overlapping welding pad |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| C06 | Publication | ||
| PB01 | Publication | ||
| C10 | Entry into substantive examination | ||
| SE01 | Entry into force of request for substantive examination | ||
| RJ01 | Rejection of invention patent application after publication | ||
| RJ01 | Rejection of invention patent application after publication |
Application publication date: 20160413 |