CN105428412A - Algan/gan heterojunction field effect transistor and preparation method thereof - Google Patents

Abstract

The invention relates to an AlGaN/GaN heterojunction field effect transistor and a preparation method thereof. The field effect transistor includes a gate, a source, a drain, a substrate, an epitaxial structure, and an insulating dielectric layer, and the drain, the substrate, and the epitaxial structure are stacked in sequence; the epitaxial structure includes n-type GaN stacked in sequence layer, a vertical superjunction layer, a channel layer, and a barrier layer, wherein the vertical superjunction layer includes alternately arranged lightly doped p-type GaN layers and heavily doped n-type GaN layers, and the heavily doped n-type The thickness of the GaN layer is smaller than that of the lightly doped p-type GaN layer, and the channel layer and barrier layer are stacked on the lightly doped p-type GaN layer. The field effect transistor has a simple structure, avoids device performance degradation caused by complicated device processes, and ensures stability, and simultaneously realizes strong forward current transmission capability of the device and high reverse withstand voltage characteristics.

Description

AlGaN/GaN heterojunction field effect transistor and its preparation method

technical field

The invention relates to a semiconductor device, in particular to an AlGaN/GaN heterojunction field effect transistor and a preparation method thereof.

Background technique

In modern society, power electronics technology continues to keep up with new developments, and power electronic devices such as voltage regulators, rectifiers, and inverters are more and more widely used in daily life, involving high-voltage power supply, power management, factory automation, and energy distribution management for motor vehicles. and many other fields. Diodes and switching devices are an integral part of power electronics applications. In recent years, Schottky diodes with high frequency, high current and low power consumption have attracted more and more attention due to their unique performance advantages.

Traditional power Schottky diodes are mainly fabricated on silicon (Si)-based materials. The development of silicon materials has a long history, the cost of silicon single crystal preparation is low, and the processing technology of silicon devices is mature. Therefore, the development of silicon-based Schottky diodes is also the most mature. However, due to the limitation of material properties such as bandgap width and electron mobility, the performance of silicon-based power Schottky diodes is close to its theoretical limit, which cannot meet the current needs of high frequency, high power, and high temperature resistance. Silicon-based Schottky diodes have low withstand voltage, limited current transport capacity, and strict heat dissipation requirements for the system under high temperature conditions. Energy-saving development.

In order to break through the limitations of silicon materials, people began to look for materials with better performance, and the third-generation wide-bandgap semiconductor materials represented by gallium nitride (GaN) and silicon carbide (SiC) entered people's field of vision. They have excellent physical and chemical properties, such as large band gap, high breakdown electric field strength, high saturated electron drift velocity, strong radiation resistance, good chemical stability, etc., especially suitable for making high withstand voltage, high temperature, high frequency, high power Schottky diode devices. Another prominent feature of GaN materials is the use of their own polarization effects. As shown in Figure 1, undoped AlGaN/GaN can form a high-concentration two ^- dimensional electron gas (2DEG : Two-dimensional electronas). 2DEG has a large area density and high mobility in the two-dimensional plane of the channel. The lateral conduction GaN Schottky diode made by using this characteristic is currently the most common and most potential epitaxial structure form.

In traditional AlGaN/GaN field effect transistors, since the device conduction layer is on the surface of the semiconductor epitaxial structure, when the device is in the off state, the electric field distribution of the device is too concentrated on the surface of the epitaxial layer, which limits the withstand voltage characteristics of the device. Therefore, how to improve the withstand voltage characteristics of the device structure has become one of the technical difficulties that need to be solved urgently.

Superjunction technology (SuperJunction) is a power insulated gate field effect transistor (MOSFET) derived from Si base. The n-type column and p-type column in the epitaxial layer increase the carrier concentration in the epitaxial layer by an order of magnitude through the principle of charge compensation. At the same time, in the reverse depletion state, the ideal state where the distribution of the electric field in the epitaxial layer is close to equal is realized, so that the withstand voltage capability of the epitaxial layer is optimized.

In GaN materials, there is also a similar idea. As shown in FIG. 2 , the prior art proposes an AlGaN/GaN heterojunction field effect transistor based on a superjunction structure. The key technology of this invention is to form p-type GaN on the n-type GaN layer by means of ion implantation, so as to realize a super junction structure (as shown in Fig. 2 44). The electric field established by the superjunction structure is perpendicular to the electric field established between the gate and the drain, which changes the spatial distribution of the electric field and reduces the maximum value of the electric field in the epitaxial layer, thereby increasing the breakdown voltage accordingly. However, there is no report on the production data of this device in the existing scientific and technological literature, which is enough to show that the process of realizing this device is very difficult. In addition, the realization of p-GaN by means of ion implantation will seriously degrade the crystal quality of the epitaxial layer and the surface flatness of the epitaxial layer. On this basis, the characteristics of the AlGaN/GaN heterojunction interface formed by re-growth will also deteriorate at the same time, reducing the 2DEG. Conduction capability, which affects the current transmission capability and stability of the device.

There are also reports of similar devices for the vertical conduction AlGaN/GaN heterojunction field effect transistor structure based on the superjunction structure, as shown in Figure 3. However, in principle, this prior art only proposes a theoretical design structure, and does not specify a specific method for realizing the device. The epitaxial process of the device structure is also very difficult, and it is difficult to guide the development and production of the actual device. At the same time, the gate Schottky metal in the structure is easy to break down under reverse high voltage, which affects the improvement of the withstand voltage performance of the device.

From the research and analysis of the above-mentioned existing technical solutions, the application of super junction is reflected from the horizontal conduction structure to the vertical conduction structure, but there is no technical solution that is relatively easy for industrial production. The main disadvantages are: 1. The process has great damage to the crystal quality. The superjunction structure realized by the ion implantation process is very close to the GaN heterojunction active region, which has a great impact on the current transmission capability of the device. At the same time of withstand voltage, the output characteristics of larger devices are sacrificed; 2. The device structure is complex, and the actual device process is difficult to implement, which is not conducive to industrialization.

Contents of the invention

Based on this, it is necessary to provide an AlGaN/GaN heterojunction field effect transistor and a preparation method thereof.

An AlGaN/GaN heterojunction field effect transistor, comprising a gate, a source, a drain, a substrate, an epitaxial structure, and an insulating dielectric layer, wherein the drain, the substrate, and the epitaxial structure are sequentially stacked;

The epitaxial structure includes n-type GaN layers, vertical superjunction layers, channel layers, and barrier layers stacked in sequence, wherein the vertical superjunction layer includes alternately arranged lightly doped p-type GaN layers and heavily doped n-type GaN layer, the thickness of the heavily doped n-type GaN layer is smaller than that of the lightly doped p-type GaN layer, and the channel layer and barrier layer are stacked between the lightly doped p-type GaN layer superior;

The source is disposed on the side of the epitaxial structure, and one end extends to the upper surface of the barrier layer, and the other end extends to the lightly doped p-type GaN layer;

The insulating dielectric layer is arranged on the heavily doped n-type GaN layer, and the end extends to the barrier layer, thereby blocking the loss of electrons during conduction. The insulating dielectric layer can be compatible with the device itself. The passivation layer is prepared at the same time;

The gate is arranged on the insulating dielectric layer, and the end extends to the upper surface of the barrier layer.

Among them, the substrate of the present invention can be n-doped low-resistance silicon, silicon carbide or gallium nitride, etc., but it is not limited to the above-mentioned materials, as long as the growth of GaN epitaxial materials can be completed and a low-resistance conduction substrate can be formed. Any material can be used in the structure of the present invention.

In one embodiment, the thickness of the lightly doped p-type GaN layer ranges from 1 μm to 10 μm, and the thickness of the heavily doped n-type GaN layer is 100 nm to 100 nm smaller than the thickness of the lightly doped p-type GaN layer. 1 μm.

The function of the lightly doped p-type GaN layer is an electron blocking layer. When the device is in the reverse withstand voltage working state, it forms a superjunction structure of mutual depletion layers with the heavily doped n-type GaN layer. The heavily doped n-type GaN layer The GaN layer acts as a conduction channel for electrons when the device is turned on, and forms a superjunction structure of mutual depletion layers with the lightly doped p-type GaN layer when the device is turned off, and its growth thickness depends on the thickness of the lightly doped p-type GaN layer regulation.

In one embodiment, the doping concentration of the lightly doped p-type GaN layer is 10 ¹⁶ to 10 ¹⁷ cm ^-3 , and the doping concentration of the heavily doped n-type GaN layer is 10 ¹⁷ to 10 ¹⁹ cm ^-3 .

In one embodiment, the n-type GaN layer is a lightly doped n-type GaN layer with a doping concentration of 10 ¹⁶ to 10 ¹⁷ cm ^-3 and a thickness ranging from 1 μm to 20 μm. The growth of the lightly doped n-type GaN layer improves the crystal quality of the upper GaN epitaxial layer on the one hand, and on the other hand can form an electron drift region during vertical conduction.

In one embodiment, the material of the insulating dielectric layer is any one of SiO ₂ , SiN, Al ₂ O ₃ , AlN, HfO ₂ , MgO, Sc ₂ O ₃ , Ga ₂ O ₃ , AlHfO _x , HfSiON One or any combination of several, the thickness is 1nm to 100nm.

In one embodiment, the channel layer is a non-doped GaN layer with a thickness of 1 nm to 500 nm, thereby forming a high-quality flat GaN channel layer to facilitate 2DEG conduction; the barrier layer is a non-doped GaN layer. Doped AlGaN, AlN, AlInN layers or their combinations have a thickness of 1nm to 50nm, and the thickness and composition of different combinations can be adjusted to form high-concentration and high-mobility 2DEG at the barrier layer/channel layer interface.

In one of the embodiments, the materials of the drain electrode and the source electrode are respectively selected from Ti/Al/Ni/Au alloy, Ti/Al/Mo/Au alloy or Ti/Al/Ti/Au alloy; The pole material is Ni/Au alloy, Pt/Au alloy or Pd/Au alloy.

In one of the embodiments, the vertical super junction layer includes two lightly doped p-type GaN layers, and a heavily doped n-type GaN layer located between the two lightly doped p-type GaN layers, and the source It is symmetrically arranged on two opposite sides of the epitaxial structure, and one end extends to the upper surface of the barrier layer, and the other end extends to the lightly doped p-type GaN layer.

The present invention also provides the preparation method of the AlGaN/GaN heterojunction field effect transistor, comprising the following steps:

(1) sequentially growing the n-type GaN layer, lightly doped p-type GaN layer, channel layer and barrier layer on the substrate by epitaxial growth technology;

(2) Etching the lightly doped p-type GaN layer, channel layer, and barrier layer by wet or dry etching technology to form a connection between the upper surface of the barrier layer and the n-type GaN layer. The groove of the layer, and the accommodating area for accommodating the source, wherein the etching depth of the recess needs to reach the n-type GaN layer, and the accommodating area of the source needs to reach the lightly doped Doped p-type GaN layer;

(3) making a mask on the upper surface of the accommodation region and the barrier layer, and then growing the heavily doped n-type GaN layer in the groove by a selective area epitaxial growth technique;

(4) Remove the mask, use photolithography and electron beam evaporation techniques to form the source in the accommodation area, and form the drain on the lower surface of the substrate, and the source may be stepped shape, so as to form better contact with the lightly doped p-type GaN layer;

(5) Using dielectric layer growth technology, deposit an insulating dielectric layer on the upper surface of the heavily doped n-type GaN layer, and extend the end of the insulating dielectric layer to the barrier layer, and then use photolithography Forming the gate on the insulating dielectric layer using electron beam evaporation technology is sufficient.

The dielectric layer growth technique may be physical vapor phase (PVD), plasma enhanced chemical vapor deposition (PECVD), magnetron sputtering or atomic layer deposition (ALD).

In one embodiment, both the epitaxial growth technique in step (1) and the selective area epitaxial growth technique in step (3) are metal organic chemical vapor deposition (MOCVD) or molecular beam epitaxy (MBE).

Principle of the present invention and advantage are as follows:

According to the AlGaN/GaN heterojunction field effect transistor of the present invention, the device structure is reasonably set. When the device is in the open working state, the gate is applied with a forward voltage. At this time, the insulating medium and the non-doped GaN channel layer The n-type electron accumulation layer and the inversion layer are formed on the contact interface with the lightly doped p-type GaN layer, and the source electrons are injected into the heavily doped The doped n-type GaN layer, and finally reaches the drain through the lightly doped n-type GaN layer, so that the device is turned on, and the current transmission capability of the device is strong and stable.

When the device is in the off state, the gate Schottky applies a reverse voltage, and the conductive channel under the gate is blocked. At this time, the lightly doped p-type GaN layer and the heavily doped n-type GaN layer in the epitaxial layer The superjunction structure formed by the GaN layer forms a depletion region. According to the superjunction theory, the electric field established by the superjunction is perpendicular to the electric field between the drain and the gate, which makes the electric field in the epitaxial layer more uniform and reduces the peak value of the electric field. High withstand voltage characteristics of transistors.

Compared with the prior art, the present invention has the following beneficial effects:

The present invention proposes an innovative superjunction structure-based vertical conduction high withstand voltage AlGaN/GaN heterojunction field effect transistor, which avoids device performance degradation caused by complicated device technology and ensures stability.

Through the innovative selective area secondary epitaxial growth of heavily doped n-type GaN layer electronic conduction channels, and the lightly doped p-type GaN layer of primary epitaxial growth directly form a super junction structure, eliminating the need for post-ion implantation process, the The influence on 2DEG in the heterojunction is minimized; at the same time, by reasonably setting the position of each electrode, different from the planar electrode of the traditional device, the source ohmic electrode is connected to the barrier layer in the epitaxial structure to the lightly doped p-type The GaN layer connects the active region and the superjunction structure in the epitaxial layer, and simultaneously meets the superjunction depletion requirements for forward conduction and reverse operation. In this way, the strong forward current transmission capability of the device and the reverse high withstand voltage characteristics of the device are realized.

Description of drawings

Figure 1 is the AlGaN/GaN epitaxial structure (left picture) and energy band, electron concentration distribution diagram (right picture);

FIG. 2 is a schematic structural diagram of an existing AlGaN/GaN heterojunction field effect transistor based on a superjunction structure;

Fig. 3 is a schematic diagram of the structure of a vertical conduction AlGaN/GaN heterojunction field effect transistor based on a superjunction structure;

4 is a schematic structural diagram of an AlGaN/GaN heterojunction field effect transistor according to an embodiment of the present invention;

Fig. 5 is a schematic diagram of the structure obtained through step (1) in the method for manufacturing the AlGaN/GaN heterojunction field-effect crystal according to an embodiment of the present invention;

Fig. 6 is a schematic diagram of the structure obtained through step (2) in the manufacturing method of the AlGaN/GaN heterojunction field-effect crystal according to an embodiment of the present invention;

Fig. 7 is a schematic diagram of the structure obtained through step (3) in the method for manufacturing the AlGaN/GaN heterojunction field-effect crystal according to an embodiment of the present invention, wherein,

1-substrate; 2-n-type GaN layer; 3-lightly doped p-type GaN layer; 4-channel layer; 5-barrier layer; 6-2DEG channel; 7-heavily doped n-type GaN layer; 8-source; 9-insulating dielectric layer; 10-gate; 11-drain; 12-groove; 13-accommodating area.

detailed description

The AlGaN/GaN heterojunction field effect transistor and its preparation method of the present invention will be further described in detail below in conjunction with specific examples.

Example

An AlGaN/GaN heterojunction field effect transistor in this embodiment, as shown in FIG. 11. The substrate 1 and the epitaxial structure are stacked in sequence;

The epitaxial structure includes an n-type GaN layer 2, a vertical superjunction layer, a channel layer 4 and a barrier layer 5 stacked in sequence, wherein the vertical superjunction layer includes two lightly doped p-type GaN layers 3, and a heavily doped n-type GaN layer 7 located between the two lightly doped p-type GaN layers 3, the thickness of the lightly doped p-type GaN layer 3 is 1 μm-10 μm, and the doping concentration is 10 ¹⁶ -10 ¹⁷ cm ^-3 , the thickness of the heavily doped n-type GaN layer 7 is 100 nm to 1 μm smaller than that of the lightly doped p-type GaN layer 3 , and the doping concentration is 10 ¹⁷ to 10 ¹⁹ cm ^-3 , the channel layer 4 and barrier layer 5 are stacked on the lightly doped p-type GaN layer;

The substrate 1 is n-doped low-resistance silicon, silicon carbide or gallium nitride; the material of the drain 11 is selected from Ti/Al/Ni/Au alloy, Ti/Al/Mo/Au alloy or Ti/Al/ Ti/Au alloy;

The n-type GaN layer 2 is a lightly doped n-type GaN layer, the doping concentration is controlled to be 10 ¹⁶ to 10 ¹⁷ cm ^-3 , and the thickness range is controlled to be 1 μm to 20 μm. On the one hand, the crystal quality of the upper GaN epitaxial layer can be improved, and on the other hand, On the one hand, it can form an electron drift region during vertical conduction, and improve the forward transmission capability of current;

The channel layer 4 is a non-doped GaN layer with a thickness between 1nm and 500nm, thereby forming a high-quality flat GaN channel layer to facilitate the conduction of the 2DEG channel 6; the barrier layer 5 is non-doped AlGaN, AlN, AlInN layers or combinations thereof, with a thickness of 1nm to 50nm, can control the thickness and composition of different combinations to form high-concentration and high-mobility 2DEG at the barrier layer 5/channel layer 4 interface;

The source electrode 8 is arranged symmetrically on two opposite sides of the epitaxial structure, and is stepped, with one end extending to the upper surface of the barrier layer 5 and the other end extending to the lightly doped p-type GaN layer 3, The material is selected from Ti/Al/Ni/Au alloy, Ti/Al/Mo/Au alloy or Ti/Al/Ti/Au alloy;

The insulating dielectric layer 9 is disposed on the heavily doped n-type GaN layer 7, and the end portion extends at least to the barrier layer 5, and the insulating dielectric layer 9 is made of SiO ₂ , SiN, Al ₂ Any one or any combination of O ₃ , AlN, HfO ₂ , MgO, Sc ₂ O ₃ , Ga ₂ O ₃ , AlHfO _x , HfSiON, with a thickness of 1 nm to 100 nm. This prevents the channel layer 4 and the lightly doped p-type GaN layer 3 and the heavily doped n-type GaN layer 7 from losing electrons through the gate 10 during conduction. In this embodiment, the insulating dielectric layer 9 and the device itself The required passivation layer is prepared simultaneously, extending to cover the surface to be passivated on the barrier layer 5;

The gate 10 is disposed on the insulating dielectric layer 9 , and its end extends to the upper surface of the barrier layer 5 , and the material is Ni/Au alloy, Pt/Au alloy or Pd/Au alloy.

When the device is in the on-state working state, the gate 10 Schottky applies a forward voltage, and at this time the insulating dielectric layer 9 is formed on the contact interface between the non-doped GaN channel layer 4 and the lightly doped p-type GaN layer 3 The n-type electron accumulation layer and the inversion layer, the electrons of the source 8 are injected into the heavily doped n-type GaN layer 7 through the 2DEG channel 6 in the channel layer 4, the n-type electron accumulation layer and the inversion layer, and are injected into the heavily doped n-type GaN layer 7 through the light The doped n-type GaN layer finally reaches the drain 11 to realize the conduction of the device, and the current transmission capability of the device is strong and stable.

And when the device is in the off-state working state, the gate 10 Schottky applies a reverse voltage, and the conductive channel under the gate 10 is blocked. At this time, the lightly doped p-type GaN layer 3 in the epitaxial layer, the heavily doped The superjunction structure formed by the n-type GaN layer 7 forms a depletion region. It can be seen from the superjunction theory that the electric field established by the superjunction is perpendicular to the electric field between the drain 11 and the gate 10, making the electric field in the epitaxial layer more uniform, The peak value of the electric field is reduced, and the high withstand voltage characteristic of the transistor is realized.

The method for preparing the above-mentioned AlGaN/GaN heterojunction field effect transistor comprises the following steps:

(1) On the substrate 1, the n-type GaN layer 2, the lightly doped p-type GaN layer 3, the channel layer 4 and the barrier layer 5 are sequentially grown by metal-organic chemical vapor deposition, as shown in FIG. 5 Show;

(2) Etching the lightly doped p-type GaN layer 3, channel layer 4, and barrier layer 5 by wet etching technology to form the upper surface of the barrier layer 5 connected to the n-type The groove 12 of the GaN layer 2, and the accommodating region 13 for accommodating the source 8, wherein the etching depth of the recess is required to reach the n-type GaN layer 2, and the accommodating of the source 8 The region 13 is required to reach the lightly doped p-type GaN layer 3, as shown in FIG. 6;

(3) Fabricate a mask on the upper surface of the accommodation region 13 and the barrier layer 5, and then epitaxially grow the heavily doped n-type GaN in the groove 12 by metal-organic chemical vapor deposition method Layer 7, as shown in Figure 7, wherein the mask is not marked;

(4) Remove the mask, use photolithography technology and electron beam evaporation technology to form the source 8 in the accommodation area, and form the drain 11 on the lower surface of the substrate 1, the source 8 can be arranged in a step shape, so as to form better contact with the lightly doped p-type GaN layer 3;

(5) Deposit an insulating dielectric layer 9 on the upper surface of the heavily doped n-type GaN layer 7 by using physical vapor phase dielectric layer growth technology, and extend the end of the insulating dielectric layer 9 to the barrier layer 5. Forming the gate 10 on the insulating dielectric layer 9 by using photolithography technology and electron beam evaporation technology to obtain the AlGaN/GaN heterojunction field effect transistor.

The technical features of the above-mentioned embodiments can be combined arbitrarily. To make the description concise, all possible combinations of the technical features in the above-mentioned embodiments are not described. However, as long as there is no contradiction in the combination of these technical features, should be considered as within the scope of this specification.

The above-mentioned embodiments only express several implementation modes of the present invention, and the descriptions thereof are relatively specific and detailed, but should not be construed as limiting the patent scope of the invention. It should be pointed out that those skilled in the art can make several modifications and improvements without departing from the concept of the present invention, and these all belong to the protection scope of the present invention. Therefore, the protection scope of the patent for the present invention should be based on the appended claims.

Claims (10)

1. A kind of AlGaN/GaN heterojunction field-effect transistor, it is characterized in that, comprise gate, source electrode, drain electrode, substrate, epitaxial structure and insulating medium layer, described drain electrode, substrate, epitaxial structure are stacked successively set up; The epitaxial structure includes n-type GaN layers, vertical superjunction layers, channel layers, and barrier layers stacked in sequence, wherein the vertical superjunction layer includes alternately arranged lightly doped p-type GaN layers and heavily doped n-type GaN layer, the thickness of the heavily doped n-type GaN layer is smaller than that of the lightly doped p-type GaN layer, and the channel layer and barrier layer are stacked on the lightly doped p-type GaN layer ; The source is disposed on the side of the epitaxial structure, and one end extends to the upper surface of the barrier layer, and the other end extends to the lightly doped p-type GaN layer; The insulating dielectric layer is disposed on the heavily doped n-type GaN layer, and the end portion extends to the barrier layer; The gate is arranged on the insulating dielectric layer, and the end extends to the upper surface of the barrier layer. 2. The AlGaN/GaN heterojunction field effect transistor according to claim 1, wherein the thickness of the lightly doped p-type GaN layer ranges from 1 μm to 10 μm, and the thickness of the heavily doped n-type GaN layer The thickness is 100 nm-1 μm smaller than that of the lightly doped p-type GaN layer. 3. The AlGaN/GaN heterojunction field effect transistor according to claim 2, wherein the doping concentration of the lightly doped p-type GaN layer is 10 ¹⁶ to 10 ¹⁷ cm ^-3 , and the heavily doped The doping concentration of the hetero n-type GaN layer is 10 ¹⁷ -10 ¹⁹ cm ^-3 . 4. The AlGaN/GaN heterojunction field effect transistor according to claim 1, wherein the n-type GaN layer is a lightly doped n-type GaN layer with a doping concentration of 10 ¹⁶ to 10 ¹⁷ cm ^-3 , and the thickness ranges from 1 μm to 20 μm. 5. The AlGaN/GaN heterojunction field effect transistor according to claim 1, wherein the material of the insulating dielectric layer is SiO ₂ , SiN, Al ₂ O ₃ , AlN, HfO ₂ , MgO, Sc ₂ Any one or any combination of O ₃ , Ga ₂ O ₃ , AlHfO _x , HfSiON, with a thickness of 1 nm to 100 nm. 6. The AlGaN/GaN heterojunction field effect transistor according to any one of claims 1-5, wherein the channel layer is a non-doped GaN layer with a thickness of 1 nm to 500 nm; the potential The barrier layer is a non-doped AlGaN, AlN, AlInN layer or a combination thereof, and the thickness is 1nm-50nm. 7. The AlGaN/GaN heterojunction field-effect transistor according to any one of claims 1-5, characterized in that, the materials of the drain and the source are respectively selected from Ti/Al/Ni/Au alloy, Ti/Al/Mo/Au alloy or Ti/Al/Ti/Au alloy; the material of the gate is Ni/Au alloy, Pt/Au alloy or Pd/Au alloy. 8. The AlGaN/GaN heterojunction field effect transistor according to any one of claims 1-5, wherein the vertical superjunction layer comprises two lightly doped p-type GaN layers, and is located between two lightly A heavily doped n-type GaN layer between doped p-type GaN layers, the source is symmetrically arranged on opposite sides of the epitaxial structure, and one end extends to the upper surface of the barrier layer, and the other end extends to The lightly doped p-type GaN layer. 9. The method for preparing the AlGaN/GaN heterojunction field-effect transistor according to any one of claims 1-8, characterized in that it comprises the following steps: (1) sequentially growing the n-type GaN layer, lightly doped p-type GaN layer, channel layer and barrier layer on the substrate by epitaxial growth technology; (2) Etching the lightly doped p-type GaN layer, channel layer, and barrier layer by wet or dry etching technology to form a connection between the upper surface of the barrier layer and the n-type GaN layer. a groove for the layer, and a housing area for housing the source; (3) making a mask on the upper surface of the accommodation region and the barrier layer, and then growing the heavily doped n-type GaN layer in the groove by a selective area epitaxial growth technique; (4) removing the mask, using photolithography technology and electron beam evaporation technology, forming the source electrode in the accommodation area, and forming the drain electrode on the lower surface of the substrate; (5) Using dielectric layer growth technology, deposit an insulating dielectric layer on the upper surface of the heavily doped n-type GaN layer, and extend the end of the insulating dielectric layer to the barrier layer, and then use photolithography Forming the gate on the insulating dielectric layer using electron beam evaporation technology is sufficient. 10. The method for preparing an AlGaN/GaN heterojunction field effect transistor according to claim 9, wherein the epitaxial growth technology in step (1) and the selective region epitaxial growth technology in step (3) are both metal Organic chemical vapor deposition or molecular beam epitaxy.