CN105355739A - Patterned substrate, preparation method and light-emitting diode - Google Patents
Patterned substrate, preparation method and light-emitting diode Download PDFInfo
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- 239000000758 substrate Substances 0.000 title claims abstract description 87
- 238000002360 preparation method Methods 0.000 title abstract description 4
- PMHQVHHXPFUNSP-UHFFFAOYSA-M copper(1+);methylsulfanylmethane;bromide Chemical compound Br[Cu].CSC PMHQVHHXPFUNSP-UHFFFAOYSA-M 0.000 claims abstract description 72
- 230000007547 defect Effects 0.000 claims abstract description 12
- 239000013078 crystal Substances 0.000 claims description 22
- 238000000034 method Methods 0.000 claims description 16
- 229920002120 photoresistant polymer Polymers 0.000 claims description 16
- 239000000463 material Substances 0.000 claims description 4
- 239000011248 coating agent Substances 0.000 claims description 3
- 238000000576 coating method Methods 0.000 claims description 3
- 238000005530 etching Methods 0.000 claims description 3
- 229910002601 GaN Inorganic materials 0.000 abstract description 35
- JMASRVWKEDWRBT-UHFFFAOYSA-N Gallium nitride Chemical compound [Ga]#N JMASRVWKEDWRBT-UHFFFAOYSA-N 0.000 abstract description 16
- 239000004065 semiconductor Substances 0.000 abstract description 15
- 238000000151 deposition Methods 0.000 abstract description 7
- 238000005240 physical vapour deposition Methods 0.000 abstract description 5
- 238000002488 metal-organic chemical vapour deposition Methods 0.000 abstract description 4
- 150000004767 nitrides Chemical class 0.000 abstract description 2
- GYHNNYVSQQEPJS-UHFFFAOYSA-N Gallium Chemical compound [Ga] GYHNNYVSQQEPJS-UHFFFAOYSA-N 0.000 abstract 1
- 230000008021 deposition Effects 0.000 abstract 1
- 229910052733 gallium Inorganic materials 0.000 abstract 1
- 238000010586 diagram Methods 0.000 description 11
- 229910052594 sapphire Inorganic materials 0.000 description 3
- 239000010980 sapphire Substances 0.000 description 3
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 description 2
- 229910052782 aluminium Inorganic materials 0.000 description 2
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 description 2
- 230000006911 nucleation Effects 0.000 description 2
- 238000010899 nucleation Methods 0.000 description 2
- 230000001629 suppression Effects 0.000 description 2
- 229910052581 Si3N4 Inorganic materials 0.000 description 1
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 1
- 238000000149 argon plasma sintering Methods 0.000 description 1
- 230000009286 beneficial effect Effects 0.000 description 1
- 238000006243 chemical reaction Methods 0.000 description 1
- 238000005229 chemical vapour deposition Methods 0.000 description 1
- 238000004140 cleaning Methods 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 238000000605 extraction Methods 0.000 description 1
- 238000004519 manufacturing process Methods 0.000 description 1
- 238000005121 nitriding Methods 0.000 description 1
- 230000003287 optical effect Effects 0.000 description 1
- 238000000206 photolithography Methods 0.000 description 1
- 229910052710 silicon Inorganic materials 0.000 description 1
- 239000010703 silicon Substances 0.000 description 1
- HBMJWWWQQXIZIP-UHFFFAOYSA-N silicon carbide Chemical compound [Si+]#[C-] HBMJWWWQQXIZIP-UHFFFAOYSA-N 0.000 description 1
- 229910010271 silicon carbide Inorganic materials 0.000 description 1
- 235000012239 silicon dioxide Nutrition 0.000 description 1
- 239000000377 silicon dioxide Substances 0.000 description 1
- HQVNEWCFYHHQES-UHFFFAOYSA-N silicon nitride Chemical compound N12[Si]34N5[Si]62N3[Si]51N64 HQVNEWCFYHHQES-UHFFFAOYSA-N 0.000 description 1
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10H—INORGANIC LIGHT-EMITTING SEMICONDUCTOR DEVICES HAVING POTENTIAL BARRIERS
- H10H20/00—Individual inorganic light-emitting semiconductor devices having potential barriers, e.g. light-emitting diodes [LED]
- H10H20/01—Manufacture or treatment
- H10H20/011—Manufacture or treatment of bodies, e.g. forming semiconductor layers
- H10H20/013—Manufacture or treatment of bodies, e.g. forming semiconductor layers having light-emitting regions comprising only Group III-V materials
- H10H20/0133—Manufacture or treatment of bodies, e.g. forming semiconductor layers having light-emitting regions comprising only Group III-V materials with a substrate not being Group III-V materials
- H10H20/01335—Manufacture or treatment of bodies, e.g. forming semiconductor layers having light-emitting regions comprising only Group III-V materials with a substrate not being Group III-V materials the light-emitting regions comprising nitride materials
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10H—INORGANIC LIGHT-EMITTING SEMICONDUCTOR DEVICES HAVING POTENTIAL BARRIERS
- H10H20/00—Individual inorganic light-emitting semiconductor devices having potential barriers, e.g. light-emitting diodes [LED]
- H10H20/80—Constructional details
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10H—INORGANIC LIGHT-EMITTING SEMICONDUCTOR DEVICES HAVING POTENTIAL BARRIERS
- H10H20/00—Individual inorganic light-emitting semiconductor devices having potential barriers, e.g. light-emitting diodes [LED]
- H10H20/80—Constructional details
- H10H20/81—Bodies
- H10H20/815—Bodies having stress relaxation structures, e.g. buffer layers
Abstract
本发明提出了一种图形化衬底、制备方法及发光二极管,通过在具有复数个凸起的衬底表面沉积介质层,利用介质层的非晶体特性,使得PVD法沉积于凸起的侧面和顶面平台的氮化铝层为非晶态,而覆盖于凸起间隙的平整表面的氮化铝是由微小晶粒组成的多晶。随后该衬底应用于MOCVD法沉积氮化镓基外延层形成发光二极管时,利用在平整面上的氮化铝多晶态更易生长,而非晶态氮化铝不易沉积氮化镓基外延层的特性,外延层选择性生长于凸起间隙的平整表面氮化铝层上,而凸起侧面和顶面平台不易生长,减小侧面氮化镓基外延层生长,降低侧向生长的氮化镓基外延层与平整表面上正向生长的氮化镓基外延层合并时缺陷数量,提升最终形成的半导体元件的性能。同时,由于抑制了侧向氮化镓基外延层生长,正向生长的氮化镓基外延层更容易合并成一个平整表面。
The invention proposes a patterned substrate, a preparation method and a light-emitting diode. By depositing a dielectric layer on the surface of a substrate with a plurality of protrusions, the amorphous characteristics of the dielectric layer are used to make PVD deposition on the sides and sides of the protrusions. The aluminum nitride layer of the top platform is amorphous, while the aluminum nitride covering the flat surface of the raised gap is polycrystalline composed of tiny grains. When the substrate is then applied to deposit gallium nitride-based epitaxial layers by MOCVD to form light-emitting diodes, it is easier to grow using the polycrystalline aluminum nitride on a flat surface, while amorphous aluminum nitride is not easy to deposit gallium nitride-based epitaxial layers. The epitaxial layer is selectively grown on the flat surface aluminum nitride layer of the raised gap, while the raised side and top platform are not easy to grow, which reduces the growth of the side GaN-based epitaxial layer and reduces the nitride growth of the lateral growth. The number of defects when the gallium-based epitaxial layer is combined with the forward-grown gallium nitride-based epitaxial layer on the flat surface improves the performance of the final semiconductor element. At the same time, since the growth of the lateral GaN-based epitaxial layer is suppressed, the forwardly grown GaN-based epitaxial layer is easier to merge into a flat surface.
Description
技术领域 technical field
本发明属于半导体制造技术领域,特别涉及一种降低晶体缺陷的图形化衬底、制备方法及发光二极管。 The invention belongs to the technical field of semiconductor manufacturing, and in particular relates to a patterned substrate for reducing crystal defects, a preparation method and a light-emitting diode.
背景技术 Background technique
现在主流LED都是利用图形化衬底来进行外延生长,一方面其表面的图形为后期氮化镓外延层的生长提供多种生长晶相的选择,使氮化镓外延层由传统的二维生长变为三维生长,从而有效地降低氮化镓基LED材料中的位错密度,避免裂纹的产生,进而提高LED的内量子发光效率;另一方面,由于阵列图形结构增加了光的散射,改变了LED的光学线路,形成漫反射,进而提升光提取效率。但因目前广泛使用的蓝宝石衬底和氮化镓基材料层存在较大晶格失配,形核及生长困难,而为了克服形核难的问题,有人提出将衬底置于1000℃左右热处理后,再生长一层质量较差的低温缓冲层,然后转入高温条件生长高质量的氮化镓基外延层。由于此过程中存在高低温转换,降低了MOCVD机台的使用效率;同时不同层间温差大导致不同层间的应力增加,从而影响晶体性能。 Now mainstream LEDs use patterned substrates for epitaxial growth. On the one hand, the pattern on the surface provides a variety of growth crystal phase options for the growth of the GaN epitaxial layer in the later stage, so that the GaN epitaxial layer is changed from the traditional two-dimensional The growth becomes three-dimensional growth, thereby effectively reducing the dislocation density in GaN-based LED materials, avoiding the generation of cracks, and improving the internal quantum luminous efficiency of LEDs; on the other hand, because the array pattern structure increases light scattering, The optical circuit of the LED is changed to form diffuse reflection, thereby improving the light extraction efficiency. However, due to the large lattice mismatch between the widely used sapphire substrate and the gallium nitride-based material layer, nucleation and growth are difficult, and in order to overcome the problem of difficult nucleation, it was proposed to heat the substrate at about 1000 °C Finally, grow a low-quality low-temperature buffer layer, and then turn to high-temperature conditions to grow a high-quality GaN-based epitaxial layer. Due to the high and low temperature conversion in this process, the use efficiency of MOCVD equipment is reduced; at the same time, the large temperature difference between different layers leads to the increase of stress between different layers, thus affecting the crystal performance.
因此又有人提出在图形化衬底表面沉积一层氮化铝层,减小衬底与氮化镓基外延层层之间的晶格差异,而目前常用工艺是将图形化衬底置于PVD腔室,沉积氮化铝层于衬底表面,而由于常使用的蓝宝石衬底与氮化铝层晶格失配较小,故氮化铝层不仅覆盖于图形化衬底的凸起间隙表面,同时也覆盖于所述凸起的侧面和顶面平台,当再将此衬底置于化学气相沉积腔室中生长氮化镓基缓冲层、N型半导体层、发光层和P型半导体层形成半导体元件时,所述凸起侧面和间隙表面出现严重的外延层竞相生长,从而造成缓冲层表面不平整,位错缺陷增加;而位错线会沿着晶体生长方向延伸到发光区,影响器件的性能。 Therefore, it has been proposed to deposit a layer of aluminum nitride on the surface of the patterned substrate to reduce the lattice difference between the substrate and the GaN-based epitaxial layer. The current common process is to place the patterned substrate on PVD The aluminum nitride layer is deposited on the surface of the substrate, and because the commonly used sapphire substrate has a small lattice mismatch with the aluminum nitride layer, the aluminum nitride layer not only covers the raised gap surface of the patterned substrate , while also covering the raised side and top platform, when the substrate is placed in a chemical vapor deposition chamber to grow a gallium nitride-based buffer layer, an N-type semiconductor layer, a light-emitting layer and a P-type semiconductor layer When forming a semiconductor element, serious epitaxial layers compete to grow on the side of the protrusion and the surface of the gap, resulting in uneven surface of the buffer layer and increased dislocation defects; and dislocation lines will extend to the light-emitting region along the crystal growth direction, affecting device performance.
发明内容 Contents of the invention
针对上述问题,本发明提出了一种图形化衬底、制备方法及发光二极管,通过在具有复数个均匀分布的凸起的衬底表面沉积介质层,利用介质层的非晶体特性,使得PVD法沉积于凸起表面的氮化铝层为非晶态,而覆盖于相邻凸起间隙表面的氮化铝层为由微小晶粒组成的多晶态。随后该衬底应用于MOCVD法沉积外延层形成发光二极管时,利用在凸起间隙表面的多晶态氮化铝层更易生长氮化镓基外延层,而非晶态氮化铝层不易生长的特性,使外延层选择性生长于凸起间隙表面的氮化铝层表面,而凸起表面难于生长,减小衬底图形侧面氮化镓基外延层生长几率,降低侧向生长氮化镓基外延层与平整表面正向生长氮化镓基外延层合并时的晶格缺陷密度,提升最终形成的半导体元件的性能;同时,由于抑制了侧向氮化镓基外延层的生长,使正向生长的氮化镓基外延层更易合并成一个平整表面,提升外延层的晶体质量。 In view of the above problems, the present invention proposes a patterned substrate, a preparation method, and a light-emitting diode. By depositing a dielectric layer on the surface of a substrate with a plurality of uniformly distributed protrusions, the amorphous characteristics of the dielectric layer are used to make the PVD method The aluminum nitride layer deposited on the surface of the protrusion is amorphous, while the aluminum nitride layer covering the gap surface of the adjacent protrusion is in the polycrystalline state composed of tiny crystal grains. When the substrate is then applied to deposit epitaxial layers by MOCVD to form light-emitting diodes, it is easier to grow gallium nitride-based epitaxial layers by using polycrystalline aluminum nitride layers on the surface of the raised gaps, while amorphous aluminum nitride layers are not easy to grow. characteristics, so that the epitaxial layer is selectively grown on the surface of the aluminum nitride layer on the surface of the raised gap, while the raised surface is difficult to grow, reducing the growth probability of the gallium nitride-based epitaxial layer on the side of the substrate pattern, and reducing the lateral growth of the gallium nitride-based The lattice defect density when the epitaxial layer is combined with the flat surface of the forward-grown GaN-based epitaxial layer improves the performance of the final semiconductor device; at the same time, due to the suppression of the growth of the lateral GaN-based The grown GaN-based epitaxial layer is easier to merge into a flat surface, improving the crystal quality of the epitaxial layer.
本发明提供的技术方案为:图形化衬底,具有相对的第一表面和第二表面,其中第一表面均匀分布有复数个凸起,所述各个凸起之间具有间隙,其中,所述凸起表面沉积有介质层,所述凸起间隙的表面无所述介质层;所述介质层的表面及所述凸起间隙的表面沉积有氮化铝层,所述介质层表面的氮化铝层抑制图形化衬底表面的侧向外延生长。 The technical solution provided by the present invention is: a patterned substrate having opposite first and second surfaces, wherein a plurality of protrusions are uniformly distributed on the first surface, and there are gaps between the protrusions, wherein the A dielectric layer is deposited on the surface of the protrusion, and the surface of the protrusion gap does not have the dielectric layer; an aluminum nitride layer is deposited on the surface of the dielectric layer and the surface of the protrusion gap, and the nitride of the surface of the dielectric layer is The aluminum layer inhibits lateral epitaxial growth of the patterned substrate surface.
优选的,所述凸起间隙表面的氮化铝层比所述介质层表面的氮化铝层更易于生长氮化镓基材料。 Preferably, the aluminum nitride layer on the surface of the raised gap is easier to grow GaN-based material than the aluminum nitride layer on the surface of the dielectric layer.
优选的,所述凸起表面上的氮化铝层为非晶态层,所述凸起间隙表面上的氮化铝层为由微小晶粒组成的多晶态层。 Preferably, the aluminum nitride layer on the surface of the protrusion is an amorphous layer, and the aluminum nitride layer on the surface of the gap between the protrusions is a polycrystalline layer composed of tiny crystal grains.
优选的,所述相邻凸起间距为50nm~5000nm。 Preferably, the distance between adjacent protrusions is 50nm-5000nm.
优选的,所述介质层厚度为1nm~200nm。 Preferably, the dielectric layer has a thickness of 1 nm to 200 nm.
优选的,所述氮化铝层厚度为1nm~200nm。 Preferably, the thickness of the aluminum nitride layer is 1 nm to 200 nm.
同时,本发明提出一种图形化衬底的制备方法,包括如下步骤: At the same time, the present invention proposes a method for preparing a patterned substrate, comprising the following steps:
S1、提供一具有平坦表面的衬底,于所述平坦表面制备复数个均匀分布的凸起,各个凸起之间具有间隙; S1. Provide a substrate with a flat surface, prepare a plurality of uniformly distributed protrusions on the flat surface, and have gaps between each protrusion;
S2、在经过上述处理的衬底表面上形成介质层,其仅覆盖在所述凸起的表面上,未覆盖所述凸起间隙的表面; S2. Forming a dielectric layer on the surface of the substrate treated above, which only covers the raised surface and does not cover the surface of the raised gap;
S3、于所述介质层的表面上和所述凸起间隙的表面上沉积氮化铝层,构成图形化衬底,所述介质层表面的氮化铝层抑制图形化衬底表面的侧向外延生长,降低外延层正向生长合并时的晶体缺陷。 S3. Deposit an aluminum nitride layer on the surface of the dielectric layer and the surface of the raised gap to form a patterned substrate, and the aluminum nitride layer on the surface of the dielectric layer inhibits the lateral direction of the surface of the patterned substrate Epitaxial growth, reducing crystal defects when the epitaxial layer is growing forward and merging.
而所述步骤S2通过下面方法形成: And the step S2 is formed by the following method:
在经过步骤S1处理的衬底表面上形成介质层,其覆盖所述凸起的表面及所述凸起间隙的表面; forming a dielectric layer on the surface of the substrate processed in step S1, which covers the raised surface and the raised gap surface;
在所述介质层表面涂布光阻,利用刻蚀技术去除所述凸起间隙表面的光阻和介质层,保留所述凸起表面的光阻和介质层; Coating photoresist on the surface of the dielectric layer, removing the photoresist and the dielectric layer on the surface of the raised gap by using an etching technique, and retaining the photoresist and the dielectric layer on the raised surface;
去除所述凸起表面的光阻,形成凸起表面具有介质层、而凸起间隙表面无介质层的衬底。 The photoresist on the raised surface is removed to form a substrate with a dielectric layer on the raised surface and no dielectric layer on the raised gap surface.
优选的,所述介质层厚度为1nm~200nm。 Preferably, the dielectric layer has a thickness of 1 nm to 200 nm.
优选的,所述氮化铝层厚度为1nm~200nm。 Preferably, the thickness of the aluminum nitride layer is 1 nm to 200 nm.
此外,本发明提供的发光二极管,包括图形化衬底和形成于所述图形化衬底上的发光外延叠层,所述图形化衬底具有相对的第一表面和第二表面,其中第一表面均匀分布有复数个凸起,所述各个凸起之间具有间隙,所述凸起表面沉积有介质层,所述凸起间隙的表面无所述介质层;所述介质层的表面及所述凸起间隙表面沉积有氮化铝层,所述介质层表面的氮化铝层抑制图形化衬底表面的侧向外延生长。 In addition, the light-emitting diode provided by the present invention includes a patterned substrate and a light-emitting epitaxial stack formed on the patterned substrate, and the patterned substrate has a first surface and a second surface opposite to each other, wherein the first There are a plurality of protrusions evenly distributed on the surface, there are gaps between the protrusions, the surface of the protrusions is deposited with a dielectric layer, and the surface of the gap between the protrusions does not have the dielectric layer; the surface of the dielectric layer and the An aluminum nitride layer is deposited on the surface of the raised gap, and the aluminum nitride layer on the surface of the dielectric layer inhibits lateral epitaxial growth on the surface of the patterned substrate.
优选的,所述凸起表面上的氮化铝层为非晶态层,所述凸起间隙表面上的氮化铝层为由微小晶粒组成的多晶态层。 Preferably, the aluminum nitride layer on the surface of the protrusion is an amorphous layer, and the aluminum nitride layer on the surface of the gap between the protrusions is a polycrystalline layer composed of tiny crystal grains.
优选的,所述发光外延叠层选择性生长于所述凸起间隙表面上的氮化铝层。 Preferably, the light-emitting epitaxial stack is selectively grown on the aluminum nitride layer on the surface of the raised gap.
本发明至少具有以下有益效果: The present invention has at least the following beneficial effects:
本发明通过在图形化衬底的凸起表面沉积介质层、而凸起间隙表面不沉积介质层,由于介质层的非晶态特性,使得PVD法沉积于凸起表面的氮化铝层为非晶态,而覆盖于凸起间隙非介质层表面的氮化铝层为由微小晶粒组成的多晶态。随后该衬底应用于MOCVD法沉积外延层时,利用在凸起间隙表面的多晶态氮化铝层更易生长氮化镓基外延层,而凸起表面的非晶态氮化铝层不易生长的特性,使外延层选择性生长于凸起间隙表面的氮化铝层表面,而凸起表面不易生长外延层,减小侧面氮化镓基外延层生长几率,降低侧向生长氮化镓基外延层与平整表面正向生长的氮化镓基外延层合并时的晶格缺陷密度,提升最终形成的半导体元件的性能;同时,由于抑制了侧向氮化镓基外延层生长,使正向生长的氮化镓基外延层更容易合并成一个平整表面,提升外延层的晶体质量。 The present invention deposits a dielectric layer on the convex surface of the patterned substrate without depositing a dielectric layer on the surface of the convex gap. Due to the amorphous characteristics of the dielectric layer, the aluminum nitride layer deposited on the convex surface by PVD method is non-crystalline. crystalline state, while the aluminum nitride layer covering the surface of the raised gap non-dielectric layer is polycrystalline state composed of tiny crystal grains. When the substrate is subsequently applied to deposit epitaxial layers by MOCVD, it is easier to grow gallium nitride-based epitaxial layers by using the polycrystalline aluminum nitride layer on the surface of the raised gap, while the amorphous aluminum nitride layer on the raised surface is not easy to grow. The characteristics make the epitaxial layer selectively grow on the surface of the aluminum nitride layer on the surface of the raised gap, and the raised surface is not easy to grow the epitaxial layer, which reduces the growth probability of the side GaN-based epitaxial layer and reduces the lateral growth of the GaN-based layer. The lattice defect density when the epitaxial layer is merged with the GaN-based epitaxial layer grown on the flat surface, improves the performance of the final semiconductor device; at the same time, due to the suppression of the lateral GaN-based epitaxial layer growth, the forward The grown GaN-based epitaxial layer is more easily merged into a flat surface, improving the crystal quality of the epitaxial layer.
附图说明 Description of drawings
附图用来提供对本发明的进一步理解,并且构成说明书的一部分,与本发明的实施例一起用于解释本发明,并不构成对本发明的限制。此外,附图数据是描述概要,不是按比例绘制。 The accompanying drawings are used to provide a further understanding of the present invention, and constitute a part of the description, and are used together with the embodiments of the present invention to explain the present invention, and do not constitute a limitation to the present invention. In addition, the drawing data are descriptive summaries and are not drawn to scale.
图1为本发明实施例一之图形化衬底结构示意图。 FIG. 1 is a schematic diagram of the structure of a patterned substrate according to Embodiment 1 of the present invention.
图2a为本发明实施例一之具有平坦表面的衬底示意图。 FIG. 2a is a schematic diagram of a substrate with a flat surface according to Embodiment 1 of the present invention.
图2b为本发明实施例一之具有复数个凸起的图形化衬底示意图。 FIG. 2b is a schematic diagram of a patterned substrate with a plurality of protrusions according to Embodiment 1 of the present invention.
图3为本发明实施例一之沉积介质层后衬底结构示意图。 FIG. 3 is a schematic diagram of the substrate structure after depositing a dielectric layer according to Embodiment 1 of the present invention.
图4a为本发明实施例一之涂布光阻后衬底结构示意图。 FIG. 4a is a schematic diagram of the substrate structure after coating photoresist according to Embodiment 1 of the present invention.
图4b为本发明实施例一之去除凸起间隙面介质层后衬底结构示意图。 Fig. 4b is a schematic diagram of the structure of the substrate after removing the dielectric layer on the raised gap surface according to Embodiment 1 of the present invention.
图5为本发明实施例一之去除掩膜层后衬底结构示意图。 FIG. 5 is a schematic diagram of the structure of the substrate after removing the mask layer according to Embodiment 1 of the present invention.
图6为为本发明实施例一之沉积氮化铝层后衬底结构示意图。 FIG. 6 is a schematic diagram of the substrate structure after depositing an aluminum nitride layer according to Embodiment 1 of the present invention.
图7为本发明实施例一之外延结构示意图。 FIG. 7 is a schematic diagram of the epitaxial structure of Embodiment 1 of the present invention.
图8为本发明实施例二之图形化衬底示意图。 FIG. 8 is a schematic diagram of a patterned substrate according to Embodiment 2 of the present invention.
图9为本发明实施例二之沉积氮化铝层后衬底结构示意图。 FIG. 9 is a schematic diagram of the structure of the substrate after depositing an aluminum nitride layer according to Embodiment 2 of the present invention.
图中:10’.平坦衬底;10.图形化衬底;11.凸起;111.凸起间隙表面;112.凸起侧面;113.凸起顶面平台;20.介质层;21.凸起间隙表面介质层;22.凸起侧面介质层;23.凸起顶面平台介质层;30.光阻;31.凸起间隙表面光阻;32.凸起侧面光阻;40.氮化铝层;41.凸起间隙表面氮化铝层;42.凸起侧面氮化铝层;43.凸起顶面平台氮化铝层;50.缓冲层;60.N型半导体层;70.发光层;80.P型半导体层。 In the figure: 10'. Flat substrate; 10. Patterned substrate; 11. Raised; 111. Raised gap surface; 112. Raised side; 113. Raised top platform; 20. Dielectric layer; 21. Raised gap surface dielectric layer; 22. Raised side dielectric layer; 23. Raised top platform dielectric layer; 30. Photoresist; 31. Raised gap surface photoresist; 32. Raised side photoresist; 40. Nitriding Aluminum layer; 41. Aluminum nitride layer on the surface of the protrusion gap; 42. Aluminum nitride layer on the side of the protrusion; 43. Aluminum nitride layer on the top platform of the protrusion; 50. Buffer layer; 60. N-type semiconductor layer; 70. Light emitting layer; 80. P-type semiconductor layer.
具体实施方式 detailed description
下面结合附图和实施例对本发明的具体实施方式进行详细说明。 The specific implementation manner of the present invention will be described in detail below with reference to the drawings and embodiments.
实施例1Example 1
参看附图1,本发明提供的图形化衬底10,所述图形化衬底10具有相对的第一表面和第二表面,其中第一表面均匀其表面均匀分布有复数个凸起11,所述相邻凸起11间距为50nm~5000nm,凸起11顶端无平台结构,其优选三角锥体结构。凸起11的侧面112沉积有厚度为1nm~200nm的介质层22,而凸起间隙表面111无介质层,介质层22为二氧化硅层或氮化硅层中的任意一种。具有介质层22的衬底表面沉积有厚度为1nm~200nm的氮化铝层40,氮化铝层40覆盖于凸起11的介质层22表面和相邻凸起间隙表面111处,分别形成凸起间隙表面氮化铝层41和凸起侧面氮化铝层42;由于所述介质层22为非晶态,沉积其表面的氮化铝层42亦为非晶态;而相邻凸起间隙表面111处无介质层,为晶态表面,其沉积的凸起间隙表面氮化铝层41为由微小晶粒组成的多晶态;相较于介质层22表面的非晶态的凸起侧面氮化铝层42,多晶态氮化铝层41更易生长后续氮化镓基外延层;从而使得介质层22表面的非晶态抑制了图形化衬底10表面的侧向外延生长,降低了外延层正向生长合并时的晶体缺陷密度,提高外延层晶体质量。 Referring to accompanying drawing 1, the patterned substrate 10 that the present invention provides, described patterned substrate 10 has opposite first surface and second surface, wherein first surface is evenly distributed with plural protrusions 11 on its surface, so The distance between adjacent protrusions 11 is 50nm-5000nm, and there is no platform structure at the top of the protrusions 11, preferably a triangular pyramid structure. The side surface 112 of the protrusion 11 is deposited with a dielectric layer 22 with a thickness of 1 nm to 200 nm, while the gap surface 111 of the protrusion has no dielectric layer, and the dielectric layer 22 is any one of a silicon dioxide layer or a silicon nitride layer. The surface of the substrate with the dielectric layer 22 is deposited with an aluminum nitride layer 40 with a thickness of 1 nm to 200 nm. The aluminum nitride layer 40 covers the surface of the dielectric layer 22 of the protrusion 11 and the gap surface 111 of the adjacent protrusion, respectively forming a protrusion The aluminum nitride layer 41 on the surface of the gap and the aluminum nitride layer 42 on the side of the protrusion; because the dielectric layer 22 is amorphous, the aluminum nitride layer 42 deposited on its surface is also amorphous; and the adjacent protrusion gap There is no dielectric layer at the surface 111, which is a crystalline surface, and the aluminum nitride layer 41 deposited on the convex gap surface is polycrystalline composed of tiny crystal grains; compared with the amorphous convex side surface of the dielectric layer 22 surface The aluminum nitride layer 42 and the polycrystalline aluminum nitride layer 41 are more likely to grow subsequent gallium nitride-based epitaxial layers; thus the amorphous state on the surface of the dielectric layer 22 inhibits the lateral epitaxial growth on the surface of the patterned substrate 10, reducing the The crystal defect density when the epitaxial layer grows forward and merges, and improves the crystal quality of the epitaxial layer.
为实现上述图形化衬底的作用,本发明提出一种图形化衬底的制备方法,其步骤如下: In order to realize the effect of the above-mentioned patterned substrate, the present invention proposes a method for preparing a patterned substrate, the steps of which are as follows:
S1、提供一具有平坦表面的衬底10’(如图2a所示),于所述平坦衬底10’表面制备复数个均匀分布的凸起11(如图2b所示);所述衬底10’选自蓝宝石衬底、硅衬底、碳化硅衬底中的任意一种; S1. Provide a substrate 10' with a flat surface (as shown in FIG. 2a), and prepare a plurality of uniformly distributed protrusions 11 on the surface of the flat substrate 10' (as shown in FIG. 2b); the substrate 10' is selected from any one of sapphire substrates, silicon substrates, and silicon carbide substrates;
S2、如图3所示,于所述凸起侧面111沉积介质层20,所述介质层20覆盖于凸起侧面112及相邻凸起11之间的间隙表面111,形成位于凸起间隙表面112的介质层21,以及位于凸起侧面112表面的介质层22;所述介质层20厚度为1nm~200nm;随后,在所述介质层20表面涂覆光阻30(如图4a所示),利用光刻和刻蚀技术去除所述凸起间隙面111的光阻31和介质层21,保留所述凸起侧面112的光阻32和介质层22(如图4b所示);清洗去除所述凸起侧面111的光阻32,最终形成凸起表面具有介质层22、而凸起间隙表面111无介质层的衬底(如图5所示); S2. As shown in FIG. 3 , deposit a dielectric layer 20 on the raised side surface 111, and the dielectric layer 20 covers the raised side surface 112 and the gap surface 111 between the adjacent bumps 11, forming a gap surface located on the raised gap surface. The dielectric layer 21 of 112, and the dielectric layer 22 located on the surface of the convex side 112; the thickness of the dielectric layer 20 is 1nm~200nm; subsequently, the photoresist 30 is coated on the surface of the dielectric layer 20 (as shown in Figure 4a) , using photolithography and etching techniques to remove the photoresist 31 and the dielectric layer 21 on the raised gap surface 111, and retain the photoresist 32 and the dielectric layer 22 on the raised side 112 (as shown in Figure 4b); cleaning and removal The photoresist 32 on the raised side surface 111 finally forms a substrate with a dielectric layer 22 on the raised surface and no dielectric layer on the raised gap surface 111 (as shown in FIG. 5 );
S3、如图6所示,利用物理气相沉积法于所述具有介质层22的衬底表面沉积氮化铝层40,形成表面由凸起11、介质层22和氮化铝层40的图形化衬底10;而所述介质层22表面的氮化铝层42抑制图形化衬底10表面的侧向外延生长,降低外延层正向生长合并时的晶体缺陷。 S3. As shown in FIG. 6, deposit an aluminum nitride layer 40 on the substrate surface with a dielectric layer 22 by physical vapor deposition to form a patterned surface consisting of bumps 11, a dielectric layer 22 and an aluminum nitride layer 40 The substrate 10; and the aluminum nitride layer 42 on the surface of the dielectric layer 22 inhibits the lateral epitaxial growth on the surface of the patterned substrate 10, and reduces crystal defects when the epitaxial layers grow forward and merge.
参看附图7,于上述图形化衬底10上生长氮化镓基发光外延叠层形成发光二极管结构。具体为:提供图形化衬底10,具有相对的第一表面和第二表面,其中第一表面均匀分布有复数个凸起11,所述凸起11表面沉积有介质层22,所述介质层22表面和凸起间隙表面111沉积有氮化铝层40。当将此衬底10应用于外延生长时,利用相邻凸起间隙表面111处非介质层表面的多晶态氮化铝层41更易生长氮化镓基外延层,而凸起侧面112的非晶态氮化铝层42不易生长的特性,使氮化镓基外延层选择性生长于多晶态氮化铝层41表面;而凸起侧面112不易生长,减小了侧面氮化镓基外延层生长几率,降低侧向生长氮化镓基外延层与凸起间隙面111正向生长的氮化镓基外延层合并时的晶格缺陷密度,提升最终形成的半导体元件的性能;同时,由于抑制了侧向氮化镓基外延层生长,使正向生长的氮化镓基外延层更容易合并成一个平整表面,随后在此平整表面继续沉积第一半导体层60、发光层70和第二半导体层80得到晶体质量优良的半导体元件。 Referring to FIG. 7 , a gallium nitride-based light-emitting epitaxial stack is grown on the patterned substrate 10 to form a light-emitting diode structure. Specifically, a patterned substrate 10 is provided, which has opposite first and second surfaces, wherein a plurality of protrusions 11 are evenly distributed on the first surface, and a dielectric layer 22 is deposited on the surface of the protrusions 11, and the dielectric layer The surface 22 and the raised interstitial surface 111 are deposited with an aluminum nitride layer 40. When this substrate 10 is applied to epitaxial growth, it is easier to grow a gallium nitride-based epitaxial layer by using the polycrystalline aluminum nitride layer 41 on the surface of the non-dielectric layer adjacent to the raised gap surface 111, while the non-dielectric layer on the raised side surface 112 The characteristic that the crystalline aluminum nitride layer 42 is not easy to grow makes the gallium nitride-based epitaxial layer grow selectively on the surface of the polycrystalline aluminum nitride layer 41; and the convex side 112 is not easy to grow, which reduces the growth of the side gallium nitride-based epitaxial layer. layer growth probability, reduce the lattice defect density when the laterally grown GaN-based epitaxial layer is merged with the GaN-based epitaxial layer grown forwardly on the raised gap surface 111, and improve the performance of the final semiconductor element; at the same time, due to The growth of the lateral gallium nitride-based epitaxial layer is suppressed, so that the forward-growing gallium nitride-based epitaxial layer is more easily merged into a flat surface, and then the first semiconductor layer 60, the light-emitting layer 70 and the second semiconductor layer 60 are deposited on the flat surface. The semiconductor layer 80 yields a semiconductor element with excellent crystal quality.
实施例2Example 2
参看附图8和9,本实施例与实施例1的区别在于,本实施例中图形化衬底10的凸起还具有顶面平台113结构,所述凸起11为圆台结构、椭圆台结构、棱台结构中的一种;所述介质层20不仅沉积于凸起侧面112,也沉积于凸起顶面平台113,而后续制程中的氮化铝层40也依次沉积于凸起间隙面111、凸起侧面112处介质层22和凸起平台113处介质层23的表面;利用介质层22表面氮化铝层42和顶面平台介质层23表面氮化铝层43的非晶态特性及凸起间隙面112的氮化铝层41的晶态特性,抑制外延层在图形侧面及间隙面的竞相生长现象,从而提升半导体元件的晶体质量。 Referring to accompanying drawings 8 and 9, the difference between this embodiment and Embodiment 1 is that the protrusion of the patterned substrate 10 in this embodiment also has a top surface platform 113 structure, and the protrusion 11 is a circular frustum structure or an elliptical frustum structure. , one of the prism structures; the dielectric layer 20 is not only deposited on the raised side surface 112, but also deposited on the raised top surface platform 113, and the aluminum nitride layer 40 in the subsequent process is also deposited on the raised gap surface in turn 111, the surface of the dielectric layer 22 at the raised side 112 and the dielectric layer 23 at the raised platform 113; using the amorphous properties of the aluminum nitride layer 42 on the surface of the dielectric layer 22 and the aluminum nitride layer 43 on the surface of the top platform dielectric layer 23 And the crystalline properties of the aluminum nitride layer 41 on the raised gap surface 112 can suppress the competing growth phenomenon of the epitaxial layer on the pattern side and the gap surface, thereby improving the crystal quality of the semiconductor element.
应当理解的是,上述具体实施方案为本发明的优选实施例,本发明的范围不限于该实施例,凡依本发明所做的任何变更,皆属本发明的保护范围之内。 It should be understood that the above specific implementation is a preferred embodiment of the present invention, the scope of the present invention is not limited to this embodiment, and any changes made according to the present invention are within the protection scope of the present invention.
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CN111206213A (en) * | 2020-02-25 | 2020-05-29 | 西安交通大学 | A kind of AlN amorphous film and preparation method thereof |
CN114864774A (en) * | 2022-06-07 | 2022-08-05 | 淮安澳洋顺昌光电技术有限公司 | Preparation method of patterned substrate and LED epitaxial structure with air gap |
CN114864774B (en) * | 2022-06-07 | 2023-10-20 | 淮安澳洋顺昌光电技术有限公司 | Preparation method of patterned substrate and LED epitaxial structure with air gap |
CN117613663A (en) * | 2024-01-19 | 2024-02-27 | 武汉云岭光电股份有限公司 | Laser and manufacturing method thereof |
CN117613663B (en) * | 2024-01-19 | 2024-05-10 | 武汉云岭光电股份有限公司 | Laser and manufacturing method thereof |
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