CN108615798A - nitride LED epitaxial layer structure and manufacturing method - Google Patents

Abstract

The present invention proposes a nitride LED epitaxial layer structure and manufacturing method, which is characterized in that it includes: a sapphire substrate with convex patterns formed on the surface, a lower uGaN layer formed on the sapphire substrate, and a lower uGaN layer formed on the lower A stress release layer formed of bumpy or concave-convex gallium nitride crystals formed on the uGaN layer, a silicon nitride insertion layer formed on the stress release layer, and an upper uGaN layer formed on the silicon nitride insertion layer , and a GaN-based epitaxial layer formed on the upper uGaN layer. It not only solves the problem of dislocation defects when growing gallium nitride semiconductor layers on sapphire substrates, but also solves the problems of dislocation defects and cracks, which can minimize the image of defects caused by penetration potentials, thereby forming High-quality epitaxial layer, meanwhile, by increasing the uGaN layer thickness, can prevent the occurrence of cracks.

Description

Nitride LED epitaxial layer structure and manufacturing method

technical field

The invention belongs to the field of LED epitaxial wafer manufacturing, and in particular relates to a nitride LED epitaxial layer structure and a manufacturing method.

Background technique

When a forward voltage is applied to a semiconductor light-emitting element (LED), holes in the p-type semiconductor layer combine with electrons in the n-type semiconductor layer to emit light with a wavelength corresponding to the energy of the band gap. GaN-based semiconductors (AlxInyGa1-x-yN; 0≤x≤1,0≤y≤1,0≤x+y≤1) emit different wavelengths by changing the composition ratio of aluminum, indium and gallium in the epitaxial layer light, and has attracted attention as such a light-emitting element material.

GaN-based epitaxial layers are grown by high-temperature deposition processes and exposed by acidic or alkaline chemicals during fabrication processes such as wet etching. Therefore, a sapphire substrate with a hexagonal structure with a high melting point (2050° C.) and excellent chemical resistance and a crystallographic structure similar to GaN-based epitaxial layers is used as a growth substrate for GaN-based epitaxial layers. However, the lattice mismatch caused by the difference in lattice constant between the sapphire substrate and the gallium nitride semiconductor layer is serious, and the lattice inconsistency between the interfaces leads to dislocation. Such dislocations diffuse to the inside of the epitaxial layer, which is a key factor for reducing the luminous efficiency of LEDs.

In the prior art, in order to reduce the above-mentioned dislocation defects, a method for forming an undoped gallium nitride (uGaN) bottom layer has been studied. However, as the thickness of the uGaN bottom layer increases, cracks are likely to occur due to differences in thermal expansion coefficients, and the problems of dislocation defects and cracks in the gallium nitride semiconductor layer cannot be truly and reliably solved.

Contents of the invention

In view of the deficiencies in the existing technology and technical defects that are difficult to solve, the present invention provides a gallium nitride-based epitaxial layer structure scheme mainly aimed at improving the structure of the nitride bottom layer (Nitride template), which specifically adopts the following technical scheme:

A nitride LED epitaxial layer structure, characterized in that it includes: a sapphire substrate with convex patterns formed on the surface, a lower uGaN layer formed on the sapphire substrate, and a convex uGaN layer formed on the lower uGaN layer. A stress release layer made of hilly or concave-convex gallium nitride crystals, a silicon nitride insertion layer formed on the stress release layer, an upper uGaN layer formed on the silicon nitride insertion layer, and an upper uGaN layer formed on the upper GaN-based epitaxial layer formed on uGaN layer.

Preferably, the silicon nitride insertion layer has a thickness of 1 nm-1.5 nm.

Preferably, the silicon nitride insertion layer has a nanopore structure.

Preferably, a seed layer is provided between the sapphire substrate and the lower uGaN layer, and the seed layer is a nitride bottom layer including aluminum nitride.

A method for manufacturing a nitride LED epitaxial layer structure, comprising the following steps:

Step 1: Patterning the sapphire substrate to form multiple convex patterns on the surface;

Step 2: forming a lower uGaN layer on the sapphire substrate;

Step 3: forming a stress release layer composed of bumpy or concave-convex gallium nitride crystals on the lower uGaN layer;

Step 4: forming a silicon nitride insertion layer on the stress release layer;

Step 5: forming an upper uGaN layer on the silicon nitride insertion layer;

Step 6: forming a GaN-based epitaxial layer on the upper uGaN layer.

Preferably, in step 3, the temperature condition for forming the stress release layer made of bumpy or concave-convex gallium nitride crystals is: 800°C to 900°C.

Preferably, step 11 is further included between step 1 and step 2: forming a seed layer on the sapphire substrate, the seed layer is made of aluminum nitride at a temperature of 1050°C to 1200°C through a chemical vapor phase It is formed by deposition method by evaporation deposition; the step 2 is: forming a lower uGaN layer on the seed crystal layer.

Preferably, in step 2, the lower uGaN layer is formed by vapor deposition at a temperature above 950°C; in step 5, the upper uGaN layer is formed by vapor deposition at a temperature above 950°C.

Preferably, in step 3, the upper side of the stress release layer is a bumpy pattern formed by adjusting the growth time and temperature of the stress release layer, or a concave-convex pattern formed by patterning and etching.

Preferably, in step 4, during the formation of the silicon nitride insertion layer, the reaction chamber used for forming the lower uGaN layer and the stress release layer is used to inject a reaction source containing monosilane and nitrogen, and evaporate to form A silicon nitride insertion layer; the silicon nitride insertion layer has a nanopore structure.

The present invention and its preferred solution not only solve the problem of dislocation defects when growing gallium nitride semiconductor layers on sapphire substrates, but also solve the problems of dislocation defects and cracks, which can minimize the problems caused by penetration The potential induces the image of the defect, thereby forming a high-quality epitaxial layer, and at the same time, by increasing the thickness of the uGaN layer, the occurrence of cracks can be prevented.

Description of drawings

Below in conjunction with accompanying drawing and specific embodiment the present invention is described in further detail:

FIG. 1 is a schematic cross-sectional structure diagram of a nitride LED epitaxial layer structure in the prior art;

Fig. 2 is a schematic cross-sectional structure diagram of an embodiment of the present invention;

3 is a schematic flow chart of a manufacturing method according to an embodiment of the present invention;

In the figure: 20-sapphire substrate; 21-seed layer; 12-uGaN layer; 22-lower uGaN layer; 23-stress release layer; 25-silicon nitride insertion layer; 26-upper uGaN layer; 27-nitride Gallium-based epitaxial layer.

Detailed ways

In order to make the features and advantages of this patent more obvious and easy to understand, the following special examples are described in detail as follows:

As shown in FIG. 1 , in the prior art, in order to solve the problem of dislocation defects caused by lattice mismatch between the sapphire substrate 20 and the GaN-based epitaxial layer 27 grown thereon, an insertion layer The scheme of the uGaN layer 12 , wherein the seed layer 21 is provided for better growth of the uGaN layer 12 on the sapphire substrate 20 . However, although the thick uGaN layer 12 can more or less prevent dislocations occurring on the interface with the sapphire substrate 20 from propagating to the gallium nitride-based epitaxial layer 27, due to the gap between the sapphire substrate 20 and the uGaN layer 12 The difference in thermal expansion coefficient will generate stress, so when the thickness of the uGaN layer 12 exceeds 2㎛, it is easy to crack due to stress.

As shown in FIG. 2 , the present invention has improved the solutions in the prior art, and its gist is to form a lower uGaN layer 22 on a sapphire substrate 20 (patterned sapphire substrate 20 ) with convex patterns formed on its surface, On the lower uGaN layer 22, a stress release layer 23 composed of convex or concave gallium nitride crystals is formed, a silicon nitride insertion layer 25 is formed on the stress release layer 23, and an upper uGaN layer 26 is formed on the silicon nitride insertion layer 25. , and forming a GaN-based epitaxial layer 27 on the upper uGaN layer 26 .

Wherein, after the sapphire substrate 20 is patterned to form a convex pattern arranged in an array, defects generated during the growth of the nitride bottom layer can be reduced, internal total reflection can be prevented, and luminous efficiency can be increased at the same time.

A seed crystal layer 21 can be selectively grown on the sapphire substrate 20, and the seed crystal layer 21 can adjust the crystal nucleation rate of gallium nitride. The seed layer 21 contains aluminum nitride (AlN).

The lower uGaN layer 22 is formed on the sapphire substrate 20 or the seed layer 21 as a layer for reducing the dislocation defects caused by the difference in lattice coefficient between the sapphire substrate 20 and the sapphire substrate 20. The lower uGaN layer 22 contains undoped nitrogen gallium semiconductor.

The stress buffer layer is a gallium nitride crystal layer having a hillock or concave-convex pattern, which is formed at a low temperature and has many defects. The hillock or concavo-convex pattern of the stress buffer layer absorbs stress due to the difference in thermal expansion coefficient that occurs when heating or cooling, and functions to prevent cracks from occurring.

The thickness of the silicon nitride insertion layer 25 is only 1nm-1.5nm. A nanopore structure can be formed in the very thin silicon nitride insertion layer 25 . That is, in this case, the silicon nitride insertion layer 25 actually forms a plurality of silicon nitride islands on the stress buffer layer, and these silicon nitride islands can function as nano-masks.

The upper uGaN layer 26 is a gallium nitride crystal grown on the side of the stress buffer layer exposed from the nanopore structure of the silicon nitride insertion layer 25, and is a high-quality gallium nitride semiconductor layer with almost no defects. Moreover, the stress caused by the difference in thermal expansion coefficient of the sapphire substrate 20 can also be relieved by the stress buffer layer below it. Therefore, in order to further eliminate remaining dislocation defects and the like, an upper uGaN layer 26 having a sufficient thickness can be formed.

On this basis, the formed GaN-based epitaxial layer 27 can be a high-quality epitaxial layer with almost no defects.

As shown in Figure 3, the manufacturing method of this embodiment can be roughly divided into S10~S60, a total of 6 steps:

Step 1: Patterning the sapphire substrate 20 to form a plurality of convex patterns on the surface; (S10)

Step 2: forming the lower uGaN layer 22 on the sapphire substrate 20; (S20)

Step 3: forming a stress release layer 23 made of bumpy or concave-convex gallium nitride crystals on the lower uGaN layer 22; (S30)

Step 4: forming a silicon nitride insertion layer 25 on the stress release layer 23; (S40)

Step 5: forming an upper uGaN layer 26 on the silicon nitride insertion layer 25; (S50)

Step 6: forming a GaN-based epitaxial layer 27 on the upper uGaN layer 26 . (S60)

Patterning the sapphire substrate 20 to form a plurality of convex patterns on the surface (S10) refers to forming an etching mask by using photolithography technology, and then performing wet etching to form convex patterns. The convex pattern can be nanometer or micrometer sized. The convex pattern may have the effect of reducing the current density through the lower uGaN layer 22 and maximizing its total internal reflection. According to the etching mask and wet etching process, the convex pattern can be in various shapes such as pyramid, lens, and cylinder.

Between S10 and S20, a stage of forming the seed layer 21 may optionally be included. The seed layer 21 can be formed by evaporating aluminum nitride (AlN) on the surface of the patterned sapphire substrate 20 . Aluminum nitride (AlN) can be deposited by chemical vapor deposition at a temperature of 1050°C to 1200°C. Evaporation can also be performed by physical vapor deposition (Physical vapor deposition), sputtering (sputtering), hydride vapor deposition (Hydride vapor phase epitaxy, HVPE) or atomic layer deposition.

Forming the lower uGaN layer 22 on the sapphire substrate 20 ( S20 ) refers to a stage of depositing or growing a uGaN thin film on the surface of the patterned sapphire substrate 20 or the seed layer 21 . The lower uGaN layer 22 can be vapor deposited by chemical vapor deposition, physical vapor deposition, sputtering, hydride vapor deposition or atomic layer deposition at a high temperature above 950°C.

Forming the stress release layer 23 ( S30 ) made of bumpy or concave-convex GaN crystals on the lower uGaN layer 22 includes a stage of growing GaN at a temperature lower than that of forming the seed layer 21 and the lower uGaN layer 22 . The stress release layer 23 may be formed by depositing at a temperature of 800° C. to 900° C. by chemical vapor deposition or hydride vapor deposition. Adjusting the growth time and growth temperature of the stress release layer 23 can form hillocks on the surface. Alternatively, a concave-convex pattern can be formed on the surface of the deposited stress buffer layer by patterning and etching. The hillock or concave-convex pattern can make the silicon nitride insertion layer 25 deposited unevenly in the subsequent formation stage of the silicon nitride insertion layer 25 . Moreover, the hillock or concave-convex pattern reduces the stress generated by heating and cooling, and prevents cracking of the nitride bottom layer.

Forming the silicon nitride insertion layer 25 (S40) on the stress release layer 23 includes the stage of forming a very thin silicon nitride film on the stress release layer 23. In this embodiment, chemical vapor deposition, physical vapor deposition, etc. can be selected. Silicon nitride is deposited by conventional methods such as atomic layer deposition or sputtering. However, in order to simplify the manufacturing process and reduce manufacturing costs, this embodiment chooses to inject a reaction source containing monosilane and nitrogen into the same reaction chamber used for depositing the lower uGaN layer 22 and the stress release layer 23, and then vapor-deposit to form a silicon nitride insertion Layer 25. By adjusting the process time and temperature of the silicon nitride insertion layer 25, the silicon nitride insertion layer 25 with a nanopore structure is formed. The silicon nitride insertion layer 25 is formed on the hillock or concave-convex pattern formed by the stress release layer 23 , and the side faces are exposed.

Forming the upper uGaN layer 26 on the silicon nitride insertion layer 25 ( S50 ) refers to a stage of growing high-quality uGaN in the lateral direction using the silicon nitride insertion layer 25 as a mask. As mentioned above, when the silicon nitride insertion layer 25 has nanoholes or is not uniformly deposited due to the bump or concave-convex pattern of the stress release layer 23, starting from the stress release layer 23 exposed by the silicon nitride insertion layer 25, uGaN layer overgrowth in the lateral direction. The upper uGaN layer 26 can be evaporated and deposited by methods such as chemical vapor deposition, physical vapor deposition, sputtering, hydride vapor deposition or atomic layer deposition at the same high temperature as the lower uGaN layer 22 above 950°C.

The process of forming the GaN-based epitaxial layer 27 on the upper uGaN layer 26 ( S60 ) can be completed by a conventional GaN-based epitaxial layer 27 growth method.

The solution provided in this embodiment can minimize the defects generated by passing current, form a high-quality epitaxial layer, and prevent the uGaN layer from cracking as the thickness becomes thicker.

This patent is not limited to the best implementation mode. Anyone can draw other various forms of nitride LED epitaxial layer structures and manufacturing methods under the inspiration of this patent. Modifications should all fall within the scope of this patent.

Claims (10)

1. A nitride LED epitaxial layer structure, characterized in that it comprises: a sapphire substrate with convex patterns formed on the surface, a lower uGaN layer formed on the sapphire substrate, and a lower uGaN layer formed on the lower uGaN layer A stress release layer made of bumpy or concave-convex gallium nitride crystals, a silicon nitride insertion layer formed on the stress release layer, an upper uGaN layer formed on the silicon nitride insertion layer, and the GaN-based epitaxial layer formed on the upper uGaN layer. 2 . The nitride LED epitaxial layer structure according to claim 1 , wherein the silicon nitride insertion layer has a thickness of 1 nm-1.5 nm. 3 . The nitride LED epitaxial layer structure according to claim 2 , wherein the silicon nitride insertion layer has a nanohole structure. 4 . 4. The nitride LED epitaxial layer structure according to claim 1, characterized in that: a seed layer is arranged between the sapphire substrate and the lower uGaN layer, and the seed layer is a nitride containing aluminum nitride bottom layer. 5. A method for manufacturing a nitride LED epitaxial layer structure, comprising the following steps: Step 1: Patterning the sapphire substrate to form multiple convex patterns on the surface; Step 2: forming a lower uGaN layer on the sapphire substrate; Step 3: forming a stress release layer composed of bumpy or concave-convex gallium nitride crystals on the lower uGaN layer; Step 4: forming a silicon nitride insertion layer on the stress release layer; Step 5: forming an upper uGaN layer on the silicon nitride insertion layer; Step 6: forming a GaN-based epitaxial layer on the upper uGaN layer. 6. The method for manufacturing the nitride LED epitaxial layer structure according to claim 5, characterized in that: in step 3, the temperature condition for forming the stress release layer composed of bumpy or concave-convex gallium nitride crystals is: 800 °C to 900 °C. 7. The method for manufacturing a nitride LED epitaxial layer structure according to claim 5, characterized in that: between step 1 and step 2, step 11 is further included: forming a seed layer on the sapphire substrate, the The seed crystal layer is formed by vapor deposition of aluminum nitride at a temperature of 1050° C. to 1200° C. by chemical vapor deposition; the step 2 is: forming a lower uGaN layer on the seed crystal layer. 8. The method for manufacturing a nitride LED epitaxial layer structure according to claim 5, characterized in that: in step 2, the lower uGaN layer is formed by vapor deposition at a temperature above 950°C; in step 5 , the upper uGaN layer is formed by vapor deposition at a temperature above 950°C. 9. The method for manufacturing a nitride LED epitaxial layer structure according to claim 5, characterized in that: in step 3, the upper side of the stress release layer is a convex formed by adjusting the growth time and growth temperature of the stress release layer. Hilly pattern, or concave-convex pattern formed by patterning and etching. 10. The method for manufacturing the nitride LED epitaxial layer structure according to claim 5, characterized in that: in step 4, during the formation of the silicon nitride insertion layer, the process of forming the lower uGaN layer and the stress release layer is adopted. In the reaction chamber used, a reaction source containing monosilane and nitrogen is injected to form a silicon nitride insertion layer by vapor deposition; the silicon nitride insertion layer has a nanopore structure.