CN105206729A - GaN-LED chip for improving light extraction efficiency - Google Patents

Abstract

A GaN-LED chip that improves light extraction efficiency, relates to the field of LED chip production technology, including a chip area and a dicing line area arranged on an epitaxial wafer, and is characterized in that several tapered cones arranged in a dot matrix are arranged in the dicing line area. The bottom of each conical mesa is connected to the N-GaN layer of the epitaxial wafer, and each conical mesa has a side surface capable of reflecting the lateral light emitted by the multi-quantum well layer of the epitaxial wafer to the front of the chip. The present invention increases the reflection channel of the side light output of the LED chip through the tapered platform designed on the LED chip cutting line, thereby increasing the light extraction efficiency of the LED chip, increasing the light output of the forward light, thereby improving the brightness of the LED chip. The design of the chip area of the present invention is applicable to the existing front-mount, flip-chip or vertical structures and the like.

Description

A GaN-LED chip that improves light extraction efficiency

technical field

The invention relates to the technical field of LED chip production.

Background technique

In order to improve the light extraction efficiency of LEDs, practitioners propose a method of setting a number of tapered trusses arranged in a dot matrix on the chip dicing line to increase the reflection of the measured light.

The existing dicing method is as follows: GaN-LED epitaxial wafers are divided into GaN-LED chips by ICP etching, and dicing lines are formed between adjacent chips. Since the existing production dicing line is to directly planarize part of the P-GaN layer, the multi-quantum well layer and the N-GaN layer on the GaN-LED epitaxial wafer, that is, the dicing line is a planar structure, and the overall effective light emission of the LED is lower than that of the LED. layer, as shown in Figure 1, so the side light emitted from the effective light-emitting layer of the LED is not effectively utilized and reflected from the front, resulting in that the light extraction efficiency cannot be effectively improved.

Contents of the invention

The purpose of the present invention is to propose a GaN-LED chip that can overcome the above defects of the prior art method and improve the light extraction efficiency.

The present invention includes a chip area and a dicing lane area arranged on an epitaxial wafer, and is characterized in that a plurality of conical frustums arranged in a dot matrix are arranged in the dicing lane area, and the bottom of each conical frustum is connected to the N-GaN layer of the epitaxial wafer , each tapered mesa has a side surface capable of reflecting the lateral light emitted by the multi-quantum well layer of the epitaxial wafer to the front surface of the chip.

The present invention increases the reflection channel of the side light output of the LED chip through the tapered platform designed on the LED chip cutting line, thereby increasing the light extraction efficiency of the LED chip, increasing the light output of the forward light, thereby improving the brightness of the LED chip.

The design of the chip area of the present invention is applicable to the existing front-mount, flip-chip or vertical structures and the like.

Further, each tapered frustum of the present invention is composed of a P-GaN layer, a multi-quantum well layer and an N-GaN layer.

Description of drawings

FIG. 1 is a schematic cross-sectional structure diagram of a GaN-LED chip with dicing lines in the prior art.

FIG. 2 is a schematic diagram of the front structure of the GaN-LED chip of the present invention.

FIG. 3 is a schematic diagram of a partial cross-sectional structure in FIG. 2 .

Detailed ways

As shown in Figures 2 and 3, the present invention manufactures several chip areas A and several scribe line areas B on the wafer. A substrate 1 is provided on the epitaxial wafer, and a U-GaN layer 2 , an N-GaN layer 3 , a multi-quantum well layer 4 and a P-GaN layer 5 are grown sequentially on the substrate 1 .

A number of conical frustums C arranged in a dot matrix are set in the scribe area B. The bottom of each conical frustum C is connected to the N-GaN layer 3 of the extension sheet. Each conical frustum C is composed of a P-GaN layer, a multi-quantum well layer and N-GaN layer.

Each conical mesa C has a side surface capable of reflecting the lateral light emitted by the multi-quantum well layer 4 to the front surface of the chip.

The chip manufacturing process is consistent with the existing traditional chip manufacturing process. The only difference is that graphics are placed on the dicing lanes, and this technology does not increase the complexity of the process.

Claims (2)

1. A GaN-LED chip for improving light extraction efficiency, comprising a chip area and a dicing road area arranged on an epitaxial wafer, characterized in that a number of tapered trusses arranged in a dot matrix are set in the dicing road area, each tapered pedestal The bottom of each is connected to the N-GaN layer of the epitaxial wafer, and each tapered platform has a side surface capable of reflecting the lateral light emitted by the multi-quantum well layer of the epitaxial wafer to the front of the chip. 2. The manufacturing method according to claim 1, wherein each truncated cone is composed of a P-GaN layer, a multi-quantum well layer and an N-GaN layer.