CN105140280A - High-voltage multi-heterojunction device with normally-off channels - Google Patents
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Abstract
本发明涉及电力电子技术的新型增强机理的异质结器件,特别涉及一种具有常关沟道的高压多异质结器件,本发明的多异质结型常关沟道器件,主要通过第三半导体层、第四半导体层、第五半导体层、第六半导体层形成多异质结,在栅极下方具有非平面结构,非平面的异质结沟道的极化方向与第三半导体层、第四半导体层、第五半导体层和第六半导体层的材料生长方向有一定角度,实现异质结界面的二维电子气(2DEG)不连续,即源漏之间形成了非常闭型电气连接,最终实现多异质结常关沟道器件。本发明的有益效果为多异质结常关沟道器件,能在高温高场环境下稳定工作,版图和工艺易于实现,且易于控制常关沟道的阈值电压。
The present invention relates to a heterojunction device with a new enhancement mechanism of power electronics technology, and in particular to a high-voltage multi-heterojunction device with a normally-off channel. The multi-heterojunction normally-off channel device of the present invention mainly uses the The third semiconductor layer, the fourth semiconductor layer, the fifth semiconductor layer, and the sixth semiconductor layer form a multi-heterojunction, with a non-planar structure under the gate, and the polarization direction of the non-planar heterojunction channel is the same as that of the third semiconductor layer. , The material growth directions of the fourth semiconductor layer, the fifth semiconductor layer and the sixth semiconductor layer have a certain angle to realize the discontinuity of the two-dimensional electron gas (2DEG) at the heterojunction interface, that is, a very closed electric current is formed between the source and the drain. connection, and finally realize the multi-heterojunction normally-off channel device. The beneficial effect of the invention is that the multi-heterojunction normally-off channel device can work stably in a high-temperature and high-field environment, the layout and process are easy to realize, and the threshold voltage of the normally-off channel is easy to control.
Description
技术领域technical field
本发明涉及半导体技术,特别是多异质结常关沟道实现原理以及实现制备技术。The invention relates to semiconductor technology, in particular to the realization principle and preparation technology of multi-heterojunction normally-off channels.
背景技术Background technique
第三代半导体中的III-V半导体材料具有禁带宽度大、电子饱和速度高、击穿电场高、导热性能和抗腐蚀性强等特点,如GaN、AlN等,在电子器件方面,III-V族材料比硅更适合于制作耐高温、高频、高场和大功率的半导体器件。The III-V semiconductor materials in the third-generation semiconductors have the characteristics of large band gap, high electron saturation velocity, high breakdown electric field, strong thermal conductivity and corrosion resistance, such as GaN, AlN, etc. In terms of electronic devices, III-V Group V materials are more suitable than silicon for making semiconductor devices with high temperature resistance, high frequency, high field and high power.
在制备III-V族异质结结构的电子器件时,由于III-V族异质结结构中存在较强的二维电子气,如AlGaN/GaN异质结的高电子迁移率晶体管(HEMTs),大多是都是耗尽型器件,而对于增强型III-V族异质结的电子器件则不易实现,而在高频器件、功率开关器件和数字电路中很多情况下需要的是增强型器件,所以对增强型的III-V族异质结。When preparing electronic devices with III-V heterojunction structures, due to the strong two-dimensional electron gas in the III-V heterojunction structures, such as AlGaN/GaN heterojunction high electron mobility transistors (HEMTs) , most of them are depletion-type devices, and it is not easy to realize the electronic devices of enhanced III-V heterojunction, but in many cases in high-frequency devices, power switching devices and digital circuits, enhanced devices are needed , so for the enhanced III-V heterojunction.
实现增强型III-V族异质结的高电子迁移率晶体管(HEMTs)的方法主要有:(1)p型帽层增强型HEMTs;(2)凹势垒层增强型HEMTs;(3)双势垒层增强型HEMTs;(4)绝缘栅极异质结晶体管;(5)氟离子注入增强型HEMTs等。The main methods to realize enhanced III-V heterojunction high electron mobility transistors (HEMTs) are: (1) p-type cap layer enhanced HEMTs; (2) concave barrier layer enhanced HEMTs; (3) double Barrier layer enhanced HEMTs; (4) insulated gate heterojunction transistors; (5) fluorine ion implantation enhanced HEMTs, etc.
公开号为CN103715086A的中国专利中提出一种增强型AlGaN/GaN单异质结的器件,该器件利用至少一个的非平面单异质结结构,使得III-V族材料的极化方向与材料生长晶向有一定角度,进而减弱能产生二维电子气(2DEG)或二维空穴气(2DHG)的电场,进而实现增强型器件。但由于III-V生长材料生长比较复杂,从衬底中制作凹槽、凸起和台阶等形式,然后通过外延生长非平面单异质结沟道是比较难实现控制的。在现实工艺中,多异质结器件比较容易实现,且灵活多变。The Chinese patent with the publication number CN103715086A proposes an enhanced AlGaN/GaN single heterojunction device, which utilizes at least one non-planar single heterojunction structure, so that the polarization direction of the III-V group material and the material growth The crystal orientation has a certain angle, thereby weakening the electric field that can generate two-dimensional electron gas (2DEG) or two-dimensional hole gas (2DHG), thereby realizing an enhanced device. However, because the growth of III-V growth materials is relatively complicated, it is difficult to achieve control by making grooves, protrusions and steps from the substrate, and then growing non-planar single heterojunction channels by epitaxy. In the actual process, multi-heterojunction devices are relatively easy to realize and flexible.
发明内容Contents of the invention
正如背景技术中所述,通过在衬底中制作凹槽、凸起和台阶等形式,然后通过外延生长的方式,把衬底的形状转移到沟道层,使得沟道层的栅极区域形成非平面结构,利用非平面结构的非极性面、半极性面等形式实现二维电子气的中断,从而实现增强型器件。但是从现在的工艺技术,把衬底的形状通过几层的沉积生长转移到沟道层的工艺是非常复杂难控制的,并且非平面的单异质结的非极性面或半极性面方式比较难实现。As mentioned in the background technology, by making grooves, bumps and steps in the substrate, and then by epitaxial growth, the shape of the substrate is transferred to the channel layer, so that the gate region of the channel layer is formed The non-planar structure uses the non-polar surface and semi-polar surface of the non-planar structure to realize the interruption of the two-dimensional electron gas, thereby realizing the enhanced device. However, from the current process technology, the process of transferring the shape of the substrate to the channel layer through the deposition and growth of several layers is very complicated and difficult to control, and the non-polar or semi-polar surface of the non-planar single heterojunction way is more difficult to implement.
因此,本发明公开了一种增强型器件,该增强型器件实现夹断二维电子气或二维空穴气的原理是根据III-V族半导体是一种极性半导体的特性。如纤锌矿结构III-V族化合物中,在晶向[0001]或的AlGaN/GaN异质结,即使不掺杂,在所述异质结的GaN面上也会产生很高的二维电子气(2DEG)。如图1所示,压电极化σi’j’=Ci’j’k’m’εk’m’,其中Ci’j’k’m’为弹性刚度系数,εk’m’为应变系数,在形成异质结时,压电极化σi’j’可以通过Ci’j’k’m’、εk’m’在晶向上的取值求得,如图1a所示,当取(10-11)-平面、a-平面和r-平面的晶向时,可以得到不同的压电极化电场,在多异质结结构,压电极化电场对异质结界面处的二维电子气(2DEG)具有调节作用,压电电场强,二维电子气比较容易积聚,压电电场弱,积聚二维电子气的能力减弱;如图1b所示,在AlGaN和GaN内沿着[0001]和晶向的自发极化电场是最强的,而当AlGaN势垒层比较薄时,AlGaN/GaN异质结界面的二维电子气主要是自发极化电场引起的,所以在晶向[0001]和上的异质结产生的二维电子气(2DEG)是最强的,而沿着晶向与晶向[0001]和有一定角度的AlGaN/GaN异质结时,如图1b的(10-11)-平面、a-平面和r-平面,自发极化电场会减弱,甚者当沿着晶向与晶向[0001]和垂直时的异质结时,没有自发极化电场;本发明通过相异于c-平面的生长平面形成多异质结,通过调节非平面多异质结的材料生长晶向调节异质结界面处的压电极化电场和自发极化电场,使得界面处量子阱的导带在费米能级以上,从而在非平面多异质结沟道界面处难以形成二维电子气。Therefore, the present invention discloses an enhanced device. The principle of pinching off two-dimensional electron gas or two-dimensional hole gas of the enhanced device is based on the characteristic that III-V semiconductor is a kind of polar semiconductor. For example, in the wurtzite structure III-V group compound, in the crystal direction [0001] or Even if the AlGaN/GaN heterojunction is not doped, a very high two-dimensional electron gas (2DEG) will be generated on the GaN surface of the heterojunction. As shown in Figure 1, piezoelectric polarization σ i'j' = C i'j'k'm' ε k'm ' , where C i'j'k'm' is the elastic stiffness coefficient, ε k'm ' is the gauge factor. When forming a heterojunction, the piezoelectric polarization σ i'j' can be obtained from the values of C i'j'k'm' and ε k'm ' in the crystal direction, as shown in Figure 1a As shown, when taking the (10-11)-plane, a-plane and r-plane crystal orientations, different piezoelectric polarization electric fields can be obtained. In a multi-heterojunction structure, the piezoelectric polarization electric field is The two-dimensional electron gas (2DEG) at the junction interface has a regulating effect. The piezoelectric field is strong, and the two-dimensional electron gas is relatively easy to accumulate. The piezoelectric field is weak, and the ability to accumulate two-dimensional electron gas is weakened; and within GaN along [0001] and The spontaneous polarization electric field in the crystal direction is the strongest, and when the AlGaN barrier layer is relatively thin, the two-dimensional electron gas at the AlGaN/GaN heterojunction interface is mainly caused by the spontaneous polarization electric field, so in the crystal direction[0001] and The two-dimensional electron gas (2DEG) generated by the heterojunction on is the strongest, and along the crystal direction and crystal direction [0001] and When there is an AlGaN/GaN heterojunction with a certain angle, such as the (10-11)-plane, a-plane and r-plane in Figure 1b, the spontaneous polarization electric field will be weakened, and even when along the crystal direction and the crystal direction[ 0001] and When the heterojunction is vertical, there is no spontaneous polarization electric field; the present invention forms a multi-heterojunction through a growth plane different from the c-plane, and adjusts the heterojunction interface by adjusting the material growth crystal direction of the non-planar multi-heterojunction The piezoelectric polarization electric field and the spontaneous polarization electric field at , make the conduction band of the quantum well at the interface above the Fermi level, so it is difficult to form a two-dimensional electron gas at the interface of the non-planar multi-heterojunction channel.
为了实现上述目的,本发明提供的技术方案如下:一种具有常关沟道的高压多异质结器件,包括从下往上依次设置的第一半导体衬底层201、第二半导体缓冲层202、第三半导体层203、第四半导体层204和第五半导体层205;所述第四半导体层204的两端上表面分别设置有第一欧姆接触101和第二欧姆接触103;所述第五半导体层205上具有金属电极102;所述第三半导体层203与第四半导体层204在接触界面形成第一异质结,所述的第四半导体层204与第五半导体层205在接触界面形成第二异质结;其特征在于,所述金属电极102下方具有使其正下方二维电子气沟道中断的非平面异质结。In order to achieve the above object, the technical solution provided by the present invention is as follows: a high-voltage multi-heterojunction device with a normally-off channel, including a first semiconductor substrate layer 201, a second semiconductor buffer layer 202, The third semiconductor layer 203, the fourth semiconductor layer 204, and the fifth semiconductor layer 205; the upper surfaces of both ends of the fourth semiconductor layer 204 are respectively provided with a first ohmic contact 101 and a second ohmic contact 103; the fifth semiconductor layer There is a metal electrode 102 on the layer 205; the third semiconductor layer 203 and the fourth semiconductor layer 204 form a first heterojunction at the contact interface, and the fourth semiconductor layer 204 and the fifth semiconductor layer 205 form a first heterojunction at the contact interface. Two heterojunctions; it is characterized in that there is a non-planar heterojunction under the metal electrode 102 that interrupts the two-dimensional electron gas channel directly below it.
进一步的,如图2所示,所述非平面异质结为由第五半导体层205下凹穿过第四半导体层204与第三半导体层203的上表面连接形成;所述第五半导体层205与金属电极102之间形成凹槽,所述金属电极102填充在凹槽中;所述第五半导体层205与金属电极102之间具有第六半导体层206。Further, as shown in FIG. 2, the non-planar heterojunction is formed by the fifth semiconductor layer 205 recessed through the fourth semiconductor layer 204 and connected to the upper surface of the third semiconductor layer 203; the fifth semiconductor layer A groove is formed between 205 and the metal electrode 102 , and the metal electrode 102 is filled in the groove; there is a sixth semiconductor layer 206 between the fifth semiconductor layer 205 and the metal electrode 102 .
更进一步的,所述第六半导体层206的两端分别与第一欧姆接触101和第二欧姆接触103连接;所述第六半导体层206与金属电极102之间还具有第七半导体层207;所述第七半导体层207的两端分别与第一欧姆接触101和第二欧姆接触103连接。Furthermore, both ends of the sixth semiconductor layer 206 are respectively connected to the first ohmic contact 101 and the second ohmic contact 103; there is a seventh semiconductor layer 207 between the sixth semiconductor layer 206 and the metal electrode 102; Both ends of the seventh semiconductor layer 207 are respectively connected to the first ohmic contact 101 and the second ohmic contact 103 .
再进一步的,所述第一半导体衬底层201为蓝宝石、硅和碳化硅中的一种;所述的第二类半导体202为SiC、AlN、GaN、AlGaN中的一种;所述第三半导体层203、第四半导体层204、第五半导体层205、第六半导体层206和第七半导体层207均为III-V族化合物;所述第一欧姆接触101和第二欧姆接触103的电极材料为金、银、铝、钛、铂和铟中的一种或多种组合;所述的金属电极102的材料为钛、金、镍、铂、锘、钨、银、铝、钛、钼和铟中的一种或多种组合。Still further, the first semiconductor substrate layer 201 is one of sapphire, silicon and silicon carbide; the second semiconductor 202 is one of SiC, AlN, GaN, and AlGaN; the third semiconductor Layer 203, the fourth semiconductor layer 204, the fifth semiconductor layer 205, the sixth semiconductor layer 206 and the seventh semiconductor layer 207 are III-V compounds; the electrode materials of the first ohmic contact 101 and the second ohmic contact 103 It is one or more combinations of gold, silver, aluminum, titanium, platinum and indium; the material of the metal electrode 102 is titanium, gold, nickel, platinum, nuclei, tungsten, silver, aluminum, titanium, molybdenum and One or more combinations of indium.
一种具有常关沟道的高压多异质结器件,包括从下往上依次设置的第一半导体衬底层201、第二半导体缓冲层202、第三半导体层203和第四半导体层204;所述第三半导体层203的两端上表面分别设置有第一欧姆接触101和第二欧姆接触103;所述第四半导体层204上具有金属电极102;所述第三半导体层203与第四半导体层204在接触界面形成第一异质结;其特征在于,所述金属电极102下方具有使其正下方二维电子气沟道中断的非平面异质结。A high-voltage multi-heterojunction device with a normally-off channel, comprising a first semiconductor substrate layer 201, a second semiconductor buffer layer 202, a third semiconductor layer 203, and a fourth semiconductor layer 204 arranged sequentially from bottom to top; The upper surfaces of both ends of the third semiconductor layer 203 are respectively provided with a first ohmic contact 101 and a second ohmic contact 103; the fourth semiconductor layer 204 has a metal electrode 102; the third semiconductor layer 203 and the fourth semiconductor layer Layer 204 forms a first heterojunction at the contact interface; it is characterized in that there is a non-planar heterojunction under the metal electrode 102 that interrupts the two-dimensional electron gas channel directly below.
进一步的,所述第四类半导体层204由弯折面和水平面构成;所述第四半导体层204的弯折面处形成非平面异质结;所述第四半导体层204的弯折面位于金属电极102正下方。Further, the fourth type semiconductor layer 204 is composed of a bent surface and a horizontal plane; a non-planar heterojunction is formed at the bent surface of the fourth semiconductor layer 204; the bent surface of the fourth semiconductor layer 204 is located at directly below the metal electrode 102 .
进一步的,所述第四半导体层204的弯折面为向上弯折,所述第四半导体层204的弯折面处的下表面与第三半导体层203上表面之间的横截面形状为梯形,该梯形的下底边宽度大于上底边宽度,所述第三半导体层203填充在梯形中并与第四半导体层204的弯折面的下表面连接;所述第四半导体层204与金属电极102之间还具有第五半导体层205,所述第五半导体层205完全覆盖在第四半导体层204的上表面;所述金属电极102覆盖在第五半导体层205的弯折面部分的上表面。Further, the bending surface of the fourth semiconductor layer 204 is bent upward, and the cross-sectional shape between the lower surface at the bending surface of the fourth semiconductor layer 204 and the upper surface of the third semiconductor layer 203 is trapezoidal , the width of the lower base of the trapezoid is greater than the width of the upper base, and the third semiconductor layer 203 is filled in the trapezoid and connected with the lower surface of the bending surface of the fourth semiconductor layer 204; the fourth semiconductor layer 204 is connected with the metal There is also a fifth semiconductor layer 205 between the electrodes 102, and the fifth semiconductor layer 205 completely covers the upper surface of the fourth semiconductor layer 204; the metal electrode 102 covers the bending surface portion of the fifth semiconductor layer 205 surface.
进一步的,所述第四半导体层204的弯折面为向上弯折,所述第四半导体层204的弯折面处的下表面与第三半导体层203上表面之间的横截面形状为梯形,该梯形的下底边宽度大于上底边宽度;所述梯形中填充有第八半导体层208,所述第八半导体层208与第四半导体层的连接处形成第二异质结;所述金属电极102覆盖在第四半导体层204的弯折面的上表面。Further, the bending surface of the fourth semiconductor layer 204 is bent upward, and the cross-sectional shape between the lower surface at the bending surface of the fourth semiconductor layer 204 and the upper surface of the third semiconductor layer 203 is trapezoidal , the width of the lower base of the trapezoid is greater than the width of the upper base; the trapezoid is filled with an eighth semiconductor layer 208, and the connection between the eighth semiconductor layer 208 and the fourth semiconductor layer forms a second heterojunction; The metal electrode 102 covers the upper surface of the bent surface of the fourth semiconductor layer 204 .
进一步的,所述第四半导体层204的弯折面为向上弯折,所述第四半导体层204的弯折面处的下表面与第三半导体层203上表面之间的横截面形状为梯形,该梯形的下底边宽度大于上底边宽度;所述第三半导体层203填充在梯形中;所述金属电极102由第一垂直面、第二垂直面和平面构成;所述金属电极102的平面与第四半导体层204的水平面相互平行;所述金属电极102的平面与金属电极102的第一垂直面和金属电极102的第二垂直面连接形成倒U形结构;所述金属电极102的平面与金属电极102的第一垂直面和金属电极102的第二垂直面相互垂直;所述金属电极102的第一垂直面下表面与第四半导体层204的弯折面一侧的水平面上表面连接,其上表面与金属电极102的平面一端下表面连接;所述金属电极102的第二垂直面下表面与第四半导体层204的弯折面另一侧水平面的上表面连接,其上表面与金属电极102的平面另一端下表面连接;所述金属电极102的平面与第四半导体层204弯折面的上底面表面之间具有第十半导体层210;所述第十半导体层210、金属电极102的垂直面、金属电极102的水平和第四半导体层204的弯折面之间具有第九半导体层209。Further, the bending surface of the fourth semiconductor layer 204 is bent upward, and the cross-sectional shape between the lower surface at the bending surface of the fourth semiconductor layer 204 and the upper surface of the third semiconductor layer 203 is trapezoidal , the width of the lower base of the trapezoid is greater than the width of the upper base; the third semiconductor layer 203 is filled in the trapezoid; the metal electrode 102 is composed of a first vertical plane, a second vertical plane and a plane; the metal electrode 102 The plane of the metal electrode 102 is parallel to the horizontal plane of the fourth semiconductor layer 204; the plane of the metal electrode 102 is connected with the first vertical plane of the metal electrode 102 and the second vertical plane of the metal electrode 102 to form an inverted U-shaped structure; the metal electrode 102 The plane of the metal electrode 102 is perpendicular to the first vertical plane of the metal electrode 102 and the second vertical plane of the metal electrode 102; The surface is connected, and its upper surface is connected with the lower surface of one end of the plane of the metal electrode 102; the lower surface of the second vertical plane of the metal electrode 102 is connected with the upper surface of the horizontal plane on the other side of the bending surface of the fourth semiconductor layer 204, and the upper surface The surface is connected to the lower surface of the other end of the plane of the metal electrode 102; there is a tenth semiconductor layer 210 between the plane of the metal electrode 102 and the upper bottom surface of the bending surface of the fourth semiconductor layer 204; the tenth semiconductor layer 210, There is a ninth semiconductor layer 209 between the vertical surface of the metal electrode 102 , the horizontal surface of the metal electrode 102 and the bent surface of the fourth semiconductor layer 204 .
进一步的,所述第四半导体层204的弯折面为第四半导体层204下凹形成,所述第四半导体层204弯折处上表面与第四半导体层204水平面之间的横截面形状为梯形,该梯形的下底边宽度大于上底边宽度;所述金属电极102由平面和垂直面构成,所述金属电极102的平面下表面与第四半导体层204的上表面位于同一平面,金属电极102的垂直面设置在梯形状弯折面中;金属电极102的平面和金属电极102的垂直面成正交形成T型结构;所述金属电极102的垂直面与第四半导体层204上表面之间具有第十半导体层210,其与梯形状弯折面侧边之间具有第九半导体层209。Further, the bending surface of the fourth semiconductor layer 204 is formed by the fourth semiconductor layer 204 being concave, and the cross-sectional shape between the upper surface of the bending place of the fourth semiconductor layer 204 and the horizontal plane of the fourth semiconductor layer 204 is Trapezoid, the width of the lower base of the trapezoid is greater than the width of the upper base; the metal electrode 102 is composed of a plane and a vertical plane, and the plane lower surface of the metal electrode 102 is on the same plane as the upper surface of the fourth semiconductor layer 204, and the metal electrode 102 The vertical surface of the electrode 102 is arranged in the trapezoidal bending surface; the plane of the metal electrode 102 is perpendicular to the vertical surface of the metal electrode 102 to form a T-shaped structure; the vertical surface of the metal electrode 102 is aligned with the upper surface of the fourth semiconductor layer 204 There is a tenth semiconductor layer 210 in between, and a ninth semiconductor layer 209 between it and the sides of the trapezoidal bending surface.
更进一步的,所述第一半导体衬底层201为蓝宝石、硅和碳化硅中的一种;所述的第二类半导体202为SiC、AlN、GaN、AlGaN中的一种;所述第三半导体层203、第四半导体层204、第八半导体层208、第九半导体层209和第十半导体层210均为III-V族化合物;所述第一欧姆接触101和第二欧姆接触103的电极材料为金、银、铝、钛、铂和铟中的一种或者多种组合,所述金属电极102的材料为钛、金、镍、铂、锘、钨、银、铝、钛、钼和铟中的一种或多种组合。Furthermore, the first semiconductor substrate layer 201 is one of sapphire, silicon and silicon carbide; the second semiconductor 202 is one of SiC, AlN, GaN, and AlGaN; the third semiconductor Layer 203, the fourth semiconductor layer 204, the eighth semiconductor layer 208, the ninth semiconductor layer 209 and the tenth semiconductor layer 210 are III-V compounds; the electrode materials of the first ohmic contact 101 and the second ohmic contact 103 It is one or more combinations of gold, silver, aluminum, titanium, platinum and indium, and the material of the metal electrode 102 is titanium, gold, nickel, platinum, nuclei, tungsten, silver, aluminum, titanium, molybdenum and indium One or more combinations of them.
由于这种增强型器件在制作时,是通过刻蚀、沉积等方法在沟道层上的金属电极区域形成的非平面多异质结结构,工艺相对容易实现,且形成的非平面多异质结比较灵活多变。Since this enhanced device is fabricated with a non-planar multi-heterojunction structure formed on the metal electrode region on the channel layer by etching, deposition, etc., the process is relatively easy to implement, and the formed non-planar multi-heterojunction Knots are more flexible.
附图说明Description of drawings
图1是III-V族化合物的晶格结构示意图;Fig. 1 is the lattice structure schematic diagram of III-V group compound;
其中图1(a)是III-V族化合物的纤锌矿结构图,图1(b)是III-V族化合物的纤锌矿结构的晶格结构图;Wherein Fig. 1 (a) is the wurtzite structure figure of III-V compound, and Fig. 1 (b) is the lattice structure figure of the wurtzite structure of III-V compound;
图2是本发明的一种具有常关沟道的高压多异质结器件的实施例1的结构示意图;2 is a schematic structural view of Embodiment 1 of a high-voltage multi-heterojunction device with a normally-off channel of the present invention;
图3是本发明的一种具有常关沟道的高压多异质结器件的实施例2的结构示意图;3 is a schematic structural view of Embodiment 2 of a high-voltage multi-heterojunction device with a normally-off channel of the present invention;
图4是本发明的一种具有常关沟道的高压多异质结器件的实施例3的结构示意图;Fig. 4 is a schematic structural view of Embodiment 3 of a high-voltage multi-heterojunction device with a normally-off channel of the present invention;
图5是本发明的一种具有常关沟道的高压多异质结器件的实施例4的结构示意图;5 is a schematic structural view of Embodiment 4 of a high-voltage multi-heterojunction device with a normally-off channel of the present invention;
图6是本发明的一种具有常关沟道的高压多异质结器件的实施例5的结构示意图;Fig. 6 is a schematic structural view of Embodiment 5 of a high-voltage multi-heterojunction device with a normally-off channel of the present invention;
图7是本发明的一种具有常关沟道的高压多异质结器件的实施例6的结构示意图;7 is a schematic structural view of Embodiment 6 of a high-voltage multi-heterojunction device with a normally-off channel of the present invention;
图8是本发明的一种具有常关沟道的高压多异质结器件制作工艺流程中在衬底上沉积第二类半导体、第三半导体层和第四半导体层材料后示意图;8 is a schematic diagram of a high-voltage multi-heterojunction device manufacturing process with a normally-off channel of the present invention after depositing the second type of semiconductor, the third semiconductor layer and the fourth semiconductor layer on the substrate;
图9是本发明的一种具有常关沟道的高压多异质结器件制作流程中在器件上刻蚀第四半导体层材料形成凹槽后结构示意图;9 is a schematic diagram of the structure of a high-voltage multi-heterojunction device with a normally-off channel in the manufacturing process of the present invention after etching the fourth semiconductor layer material on the device to form grooves;
图10是本发明的一种具有常关沟道的高压多异质结器件制作流程中在第四半导体层上依次沉积第五半导体层、第六半导体层和第七半导体层材料后的结构示意图;Fig. 10 is a schematic structural view of a high-voltage multi-heterojunction device with a normally-off channel in the manufacturing process of the present invention after sequentially depositing materials for the fifth semiconductor layer, the sixth semiconductor layer, and the seventh semiconductor layer on the fourth semiconductor layer ;
图11是本发明的一种具有常关沟道的高压多异质结器件制作流程中在第四半导体层两端制作欧姆接触后的结构示意图;Fig. 11 is a schematic diagram of the structure after making ohmic contacts at both ends of the fourth semiconductor layer in the manufacturing process of a high-voltage multi-heterojunction device with a normally-off channel according to the present invention;
图12是本发明的一种具有常关沟道的高压多异质结器件在第七半导体层上完成金属电极沉积的示意图。FIG. 12 is a schematic diagram of a high-voltage multi-heterojunction device with a normally-off channel of the present invention on which metal electrodes are deposited on the seventh semiconductor layer.
具体实施方式Detailed ways
实施例1Example 1
本例的一种常关沟道的高压异质结器件,如图2所示,包括从下往上依次设置的第一半导体衬底层201、第二半导体缓冲层202、第三半导体层203、第四半导体层204、第五半导体层205、第六半导体层206;所述第四半导体层204的两端分别设置有第一欧姆接触101与第二欧姆接触103;所述的第六半导体层206上具有金属电极102,金属电极102在第一欧姆接触101与第二欧姆接触103之间;所述第三半导体层203和第四半导体层204的连接处形成第一异质结,所述第四半导体层204和第五半导体层205的连接处形成第二异质结,所述第五半导体层205与第三半导体层203的连接处形成第三异质结,第五半导体层205和第六半导体层206的连接处形成第四异质结;第五半导体层205与第六半导体层206的异质结的自极化电场与第四半导体层204和第五半导体层的异质结的自极化电场相反且在金属电极102下方形成非平面多异质结。A high-voltage heterojunction device with a normally-off channel in this example, as shown in FIG. 2 , includes a first semiconductor substrate layer 201, a second semiconductor buffer layer 202, a third semiconductor layer 203, The fourth semiconductor layer 204, the fifth semiconductor layer 205, and the sixth semiconductor layer 206; the two ends of the fourth semiconductor layer 204 are respectively provided with a first ohmic contact 101 and a second ohmic contact 103; the sixth semiconductor layer 206 has a metal electrode 102, and the metal electrode 102 is between the first ohmic contact 101 and the second ohmic contact 103; the junction of the third semiconductor layer 203 and the fourth semiconductor layer 204 forms a first heterojunction, and the The junction of the fourth semiconductor layer 204 and the fifth semiconductor layer 205 forms a second heterojunction, the junction of the fifth semiconductor layer 205 and the third semiconductor layer 203 forms a third heterojunction, the fifth semiconductor layer 205 and The junction of the sixth semiconductor layer 206 forms a fourth heterojunction; the self-polarization electric field of the heterojunction between the fifth semiconductor layer 205 and the sixth semiconductor layer 206 and the heterojunction between the fourth semiconductor layer 204 and the fifth semiconductor layer The self-polarization electric field of is opposite and forms a non-planar multi-heterojunction under the metal electrode 102 .
所述第一半导体衬底层201为蓝宝石、硅和碳化硅中的一种;所述的第二半导体缓冲层202主要为SiC、AlN、GaN、AlGaN中的一种;所述第三半导体层203、第四半导体层204、第五半导体层205、第六半导体层206主要为GaN、InN、AlGaN、InGaN、InAlGaN或者AlN所述的第一欧姆接触101和第二欧姆接触103的电极材料包含金、银、铝、钛、铂、或者铟中的一种或多种组合;所述的金属电极102的材料包含钛、金、镍、铂、锘、钨、银、铝、钛、钼或者铟中的一种或多种组合。The first semiconductor substrate layer 201 is one of sapphire, silicon and silicon carbide; the second semiconductor buffer layer 202 is mainly one of SiC, AlN, GaN, and AlGaN; the third semiconductor layer 203 , the fourth semiconductor layer 204, the fifth semiconductor layer 205, and the sixth semiconductor layer 206 are mainly GaN, InN, AlGaN, InGaN, InAlGaN or AlN. The electrode materials of the first ohmic contact 101 and the second ohmic contact 103 include gold. , silver, aluminum, titanium, platinum, or one or more combinations of indium; the material of the metal electrode 102 includes titanium, gold, nickel, platinum, nuclei, tungsten, silver, aluminum, titanium, molybdenum, or indium One or more combinations of them.
实施例1的一种具有常关沟道的高压多异质结器件的原理,是通过在金属电极102下方的第三半导体层203、第四半导体层204、第五半导体层205、第六半导体层206形成非平面的梯形凹槽多异质结结构;凹槽的上表面和下表面以及器件中除凸起外的半导体是沿晶向[0001]或晶向沉积生长的,由弯折段构成的凹槽侧面的第四半导体层204、第五半导体层205和第六半导体层206是沿着与晶向[0001]或晶向有一定角度沉积生长的;沿着[0001]或方向生长的III-V族半导体形成异质结时,异质结界面的极化电场最强,该梯形凹槽下表面的第五半导体层205与第三半导体层203连接形成的第三异质结处很容易形成二维电子气(2DEG)沟道;在凹槽侧面,由于此处的第四半导体层204、第五半导体层205、第六半导体层206的生长方向与[0001]或不平行,所以第四半导体层204和第五半导体层205连接形成的第二异质结及第五半导体层205与第六半导体层206连接形成的第四异质结的极化电场较弱,且第五半导体层205和第六半导体206的第四异质结的自极化电场的方向与第四半导体层204和第五半导体层205的第二异质结的自极化电场方向相反,进一步削弱第四半导体层204和第三半导体层203的第一异质结的自极化电场,使得凹槽侧面的第一异质结截面处的二维电子气(2DEG)耗尽。The principle of a high-voltage multi-heterojunction device with a normally-off channel in Embodiment 1 is through the third semiconductor layer 203, the fourth semiconductor layer 204, the fifth semiconductor layer 205, and the sixth semiconductor layer under the metal electrode 102. Layer 206 forms a non-planar trapezoidal groove multi-heterojunction structure; the upper surface and lower surface of the groove and the semiconductor in the device except the protrusion are along the crystal direction [0001] or the crystal direction The fourth semiconductor layer 204, the fifth semiconductor layer 205, and the sixth semiconductor layer 206 on the side of the groove formed by the bent segments are deposited and grown along the crystal direction [0001] or the crystal direction Deposited at an angle; along [0001] or When the III-V group semiconductor grown in the same direction forms a heterojunction, the polarization electric field at the interface of the heterojunction is the strongest, and the fifth semiconductor layer 205 on the lower surface of the trapezoidal groove is connected to the third semiconductor layer 203 to form a third heterojunction A two-dimensional electron gas (2DEG) channel is easily formed at the junction; on the side of the groove, because the growth directions of the fourth semiconductor layer 204, the fifth semiconductor layer 205, and the sixth semiconductor layer 206 are in line with [0001] or are not parallel, so the polarization electric field of the second heterojunction formed by connecting the fourth semiconductor layer 204 and the fifth semiconductor layer 205 and the fourth heterojunction formed by connecting the fifth semiconductor layer 205 and the sixth semiconductor layer 206 is relatively weak, And the direction of the self-polarization electric field of the fourth heterojunction of the fifth semiconductor layer 205 and the sixth semiconductor layer 206 is opposite to the direction of the self-polarization electric field of the second heterojunction of the fourth semiconductor layer 204 and the fifth semiconductor layer 205, The self-polarization electric field of the first heterojunction of the fourth semiconductor layer 204 and the third semiconductor layer 203 is further weakened, so that the two-dimensional electron gas (2DEG) at the cross section of the first heterojunction on the side of the groove is depleted.
实施例2Example 2
本例的一种常关沟道的高压多异质结器件,如图3所示,包括从下往上依次设置的第一半导体衬底层201、第二半导体缓冲层202、第三半导体层203、第四半导体层204、第五半导体层205、第六半导体层206、第七半导体层207;所述第四半导体层204的两端分别设置有第一欧姆接触101与第二欧姆接触103;所述的第七半导体层207上具有金属电极102,金属电极102在第一欧姆接触101与第二欧姆接触103之间;所述第三半导体层203和第四半导体层204的连接处形成第一异质结,所述第四半导体层204和第五半导体层205的连接处形成第二异质结,第五半导体层205和第三半导体层203的连接处形成第三异质结,第五半导体层205和第六半导体层206的连接处形成第四异质结,第六半导体206和第七半导体层207的连接处形成第五异质结,第五半导体层205与第六半导体层206的第四异质结及第六半导体层206和第七半导体层207的第五异质结的自极化电场与第四半导体层204和第五半导体层205的第二异质结的自极化电场相反且在金属电极102下方形成非平面多异质结。A high-voltage multi-heterojunction device with a normally-off channel in this example, as shown in FIG. , the fourth semiconductor layer 204, the fifth semiconductor layer 205, the sixth semiconductor layer 206, and the seventh semiconductor layer 207; the two ends of the fourth semiconductor layer 204 are respectively provided with a first ohmic contact 101 and a second ohmic contact 103; The seventh semiconductor layer 207 has a metal electrode 102, and the metal electrode 102 is between the first ohmic contact 101 and the second ohmic contact 103; the connection between the third semiconductor layer 203 and the fourth semiconductor layer 204 forms the first A heterojunction, the junction of the fourth semiconductor layer 204 and the fifth semiconductor layer 205 forms a second heterojunction, the junction of the fifth semiconductor layer 205 and the third semiconductor layer 203 forms a third heterojunction, and the junction of the fifth semiconductor layer 205 and the third semiconductor layer 203 forms a third heterojunction. The junction of the fifth semiconductor layer 205 and the sixth semiconductor layer 206 forms a fourth heterojunction, the junction of the sixth semiconductor layer 206 and the seventh semiconductor layer 207 forms a fifth heterojunction, and the junction of the fifth semiconductor layer 205 and the sixth semiconductor layer The self-polarization electric field of the fourth heterojunction of 206 and the fifth heterojunction of the sixth semiconductor layer 206 and the seventh semiconductor layer 207 and the self-polarization electric field of the second heterojunction of the fourth semiconductor layer 204 and the fifth semiconductor layer 205 The polarizing electric fields are opposite and a non-planar multiple heterojunction is formed under the metal electrode 102 .
所述第一半导体衬底层201为蓝宝石、硅和碳化硅中的一种;所述的第二半导体缓冲层202主要为SiC、AlN、GaN、AlGaN中的一种;所述第三半导体层203、第四半导体层204、第五半导体层205、第六半导体层206和第七半导体层207主要为GaN、InN、AlGaN、InGaN、InAlGaN或者AlN;所述的第一欧姆接触101和第二欧姆接触103的电极材料包含金、银、铝、钛、铂、及铟中的一种或多种组合;所述的金属电极102的材料包含钛、金、镍、铂、锘、钨、银、铝、钛、钼及铟中的一种或多种组合。The first semiconductor substrate layer 201 is one of sapphire, silicon and silicon carbide; the second semiconductor buffer layer 202 is mainly one of SiC, AlN, GaN, and AlGaN; the third semiconductor layer 203 , the fourth semiconductor layer 204, the fifth semiconductor layer 205, the sixth semiconductor layer 206 and the seventh semiconductor layer 207 are mainly GaN, InN, AlGaN, InGaN, InAlGaN or AlN; the first ohmic contact 101 and the second ohmic The electrode material of the contact 103 includes one or more combinations of gold, silver, aluminum, titanium, platinum, and indium; the material of the metal electrode 102 includes titanium, gold, nickel, platinum, nolium, tungsten, silver, One or more combinations of aluminum, titanium, molybdenum and indium.
实施例2的原理,是通过在金属电极102下方的第三半导体层203、第四半导体层204、第五半导体层205、第六半导体层206和第七半导体层207形成非平面的梯形凹槽多异质结结构;凹槽的上表面和下表面以及器件中除凹槽外的半导体是沿晶向[0001]或晶向沉积生长的,由弯折段构成的凹槽侧面的第四半导体层204、第五半导体层205、第六半导体层206、第七半导体层207是沿着与晶向[0001]或晶向有一定角度沉积生长的;沿着[0001]或方向生长的III-V族半导体形成异质结时,异质结界面的极化电场最强,所以该梯形凹槽的下表面的第五半导体层205与第三半导体层203连接形成的第三异质结很容易形成二维电子气(2DEG)沟道;在凹槽侧面,由于此处的第四半导体层204、第五半导体层205、第六半导体层206和第七半导体层的生长方向与[0001]或不平行,所以第四半导体层204和第五半导体层205连接处形成的第二异质结,第五半导体层205与第六半导体层206连接处形成的第四异质结,第六半导体层206和第七半导体层207连接处形成的第五异质结的极化电场较弱,且第五半导体层205和第六半导体206形成的第四异质结及第六半导体层206和第七半导体层207形成的第五异质结的自极化电场的方向与第四半导体层204和第五半导体层205形成的第二异质结的自极化电场方向相反,进一步第二异质结的自极化电场,使得凹槽侧面的第二异质结界面处二维电子气(2DEG)耗尽。The principle of Embodiment 2 is to form a non-planar trapezoidal groove through the third semiconductor layer 203, the fourth semiconductor layer 204, the fifth semiconductor layer 205, the sixth semiconductor layer 206 and the seventh semiconductor layer 207 under the metal electrode 102. Multi-heterojunction structure; the upper and lower surfaces of the groove and the semiconductor in the device except the groove are along the crystal direction [0001] or the crystal direction Deposition and growth, the fourth semiconductor layer 204, the fifth semiconductor layer 205, the sixth semiconductor layer 206, and the seventh semiconductor layer 207 on the side of the groove composed of bent segments are along the crystal direction [0001] or the crystal direction Deposited at an angle; along [0001] or When the III-V group semiconductors grown in the same direction form a heterojunction, the polarization electric field at the interface of the heterojunction is the strongest, so the fifth semiconductor layer 205 on the lower surface of the trapezoidal groove is connected to the third semiconductor layer 203 to form the third semiconductor layer 205. The heterojunction is easy to form a two-dimensional electron gas (2DEG) channel; on the groove side, due to the growth direction of the fourth semiconductor layer 204, the fifth semiconductor layer 205, the sixth semiconductor layer 206 and the seventh semiconductor layer here with [0001] or are not parallel, so the second heterojunction formed at the junction of the fourth semiconductor layer 204 and the fifth semiconductor layer 205, the fourth heterojunction formed at the junction of the fifth semiconductor layer 205 and the sixth semiconductor layer 206, and the sixth semiconductor layer The polarization electric field of the fifth heterojunction formed at the connection between 206 and the seventh semiconductor layer 207 is relatively weak, and the fourth heterojunction formed by the fifth semiconductor layer 205 and the sixth semiconductor layer 206 and the sixth semiconductor layer 206 and the seventh semiconductor layer The direction of the self-polarization electric field of the fifth heterojunction formed by the semiconductor layer 207 is opposite to the direction of the self-polarization electric field of the second heterojunction formed by the fourth semiconductor layer 204 and the fifth semiconductor layer 205, further the second heterojunction The self-polarization electric field depletes the two-dimensional electron gas (2DEG) at the second heterojunction interface on the side of the groove.
实施例3Example 3
本例的一种常关沟道的高压多异质结器件,如图4所示,包括从下往上依次设置的第一半导体衬底层201、第二半导体缓冲层202、第三半导体层203、第四半导体层204、第五半导体层205;所述第三半导体层203的两端分别设置有第一欧姆接触101与第二欧姆接触103;所述的第五半导体层205上具有金属电极102,金属电极102在第一欧姆接触101与第二欧姆接触103之间;所述第三半导体层203和第四半导体层204的连接处形成第一异质结,所述第四半导体层204和第五半导体层205的连接处形成第二异质结,第四半导体层204与第五半导体层205的异质结的自极化电场与第三半导体层203和第四半导体层204的异质结的自极化电场相反且在金属电极102下方形成非平面多异质结。A high-voltage multi-heterojunction device with a normally-off channel in this example, as shown in FIG. , the fourth semiconductor layer 204, the fifth semiconductor layer 205; the two ends of the third semiconductor layer 203 are respectively provided with a first ohmic contact 101 and a second ohmic contact 103; the fifth semiconductor layer 205 has a metal electrode 102, the metal electrode 102 is between the first ohmic contact 101 and the second ohmic contact 103; the junction of the third semiconductor layer 203 and the fourth semiconductor layer 204 forms a first heterojunction, and the fourth semiconductor layer 204 The junction with the fifth semiconductor layer 205 forms a second heterojunction, and the self-polarization electric field of the heterojunction between the fourth semiconductor layer 204 and the fifth semiconductor layer 205 is the same as that of the heterojunction between the third semiconductor layer 203 and the fourth semiconductor layer 204. The self-polarization electric field of the junction is opposite and a non-planar multi-heterojunction is formed under the metal electrode 102 .
所述第一半导体衬底层201为蓝宝石、硅和碳化硅中的一种;所述的第二半导体缓冲层202主要为SiC、AlN、GaN、AlGaN中的一种;所述第三半导体层203、第四半导体层204、第五半导体层205主要为GaN、InN、AlGaN、InGaN、InAlGaN或者AlN;所述的第一欧姆接触101和第二欧姆接触103的电极材料包含金、银、铝、钛、铂及铟中的一种或多种组合;所述的金属电极102的材料包含钛、金、镍、铂、锘、钨、银、铝、钛、钼及铟中的一种或多种组合。The first semiconductor substrate layer 201 is one of sapphire, silicon and silicon carbide; the second semiconductor buffer layer 202 is mainly one of SiC, AlN, GaN, and AlGaN; the third semiconductor layer 203 , the fourth semiconductor layer 204, and the fifth semiconductor layer 205 are mainly GaN, InN, AlGaN, InGaN, InAlGaN or AlN; the electrode materials of the first ohmic contact 101 and the second ohmic contact 103 include gold, silver, aluminum, One or more combinations of titanium, platinum and indium; the material of the metal electrode 102 includes one or more of titanium, gold, nickel, platinum, nuclei, tungsten, silver, aluminum, titanium, molybdenum and indium kind of combination.
实施例3的原理,是通过在金属电极102下方的第三半导体层203、第四半导体层204、第五半导体层205形成非平面的梯形凸起双异质结结构;凸起的上表面和下表面以及器件中除凸起外的半导体是沿晶向[0001]或晶向沉积生长的,由弯折段构成的凸起侧面的第四半导体层204、第五半导体层205是沿着与晶向[0001]或晶向有一定角度沉积生长的;沿着[0001]或方向生长的III-V族半导体形成异质结时,异质结界面的极化电场最强,所以该梯形凸起的上表面的第四半导体层204与第三半导体层203连接形成的第一异质结处很容易形成二维电子气(2DEG)沟道;在凸起侧面,由于此处的第三半导体层203、第四半导体层204、第五半导体层205的生长方向与[0001]或不平行,所以侧面处的第四半导体层204和第三半导体层203连接形成的第一异质结及第五半导体层205与第四半导体层204连接形成的第二异质结的自发极化电场较弱,且第五半导体层205和第四半导体204的第二异质结的自极化电场的方向与第四半导体层204和第三半导体层203的第一异质结的自极化电场方向相反,进一步削弱第四半导体层204和第三半导体层203的第一异质结的自极化电场,使得凸起侧面的第一异质结处的二维电子气(2DEG)耗尽。The principle of Embodiment 3 is to form a non-planar trapezoidal raised double heterojunction structure through the third semiconductor layer 203, the fourth semiconductor layer 204, and the fifth semiconductor layer 205 below the metal electrode 102; the raised upper surface and The bottom surface and the semiconductor in the device except the bumps are along the crystal direction [0001] or the crystal direction Deposited and grown, the fourth semiconductor layer 204 and the fifth semiconductor layer 205 on the convex side composed of bent segments are aligned with the crystal direction [0001] or the crystal direction Deposited at an angle; along [0001] or When the III-V group semiconductor grown in the same direction forms a heterojunction, the polarization electric field at the interface of the heterojunction is the strongest, so the fourth semiconductor layer 204 on the upper surface of the trapezoidal protrusion is connected to the third semiconductor layer 203 to form the first Two-dimensional electron gas (2DEG) channels are easily formed at the heterojunction; on the side of the protrusion, because the growth directions of the third semiconductor layer 203, the fourth semiconductor layer 204, and the fifth semiconductor layer 205 are in line with [0001] or are not parallel, so the spontaneous polarization of the first heterojunction formed by the connection of the fourth semiconductor layer 204 and the third semiconductor layer 203 at the side and the second heterojunction formed by the connection of the fifth semiconductor layer 205 and the fourth semiconductor layer 204 The electric field is weak, and the direction of the self-polarization electric field of the second heterojunction of the fifth semiconductor layer 205 and the fourth semiconductor layer 204 is the same as the self-polarization of the first heterojunction of the fourth semiconductor layer 204 and the third semiconductor layer 203 The direction of the electric field is opposite, further weakening the self-polarization electric field of the first heterojunction of the fourth semiconductor layer 204 and the third semiconductor layer 203, so that the two-dimensional electron gas (2DEG) at the first heterojunction on the side of the protrusion is depleted .
实施例4Example 4
本例的一种常关沟道的高压异质结器件,如图5所示,包括从下往上依次设置的第一半导体衬底层201、第二半导体缓冲层202、第三半导体层203、第四半导体层204、第八半导体层208;所述第三半导体层203的两端分别设置有第一欧姆接触101与第二欧姆接触103;所述第三半导体层203和第四半导体层204的连接处形成第一异质结,所述第四半导体层204的弯折段为第四半导体层204向上凸起形成梯形状弯折段,该梯形状弯折段的下底边宽度大于上底边宽度;所述梯形状弯折段中填充有第八半导体层208,所述第八半导体层与第四半导体层的上底边连接处形成第二异质结;所述金属电极102覆盖在梯形状弯折段的侧边外表面和上底边上表面;金属电极102下方形成非平面异质结。A high-voltage heterojunction device with a normally-off channel in this example, as shown in FIG. 5 , includes a first semiconductor substrate layer 201, a second semiconductor buffer layer 202, a third semiconductor layer 203, The fourth semiconductor layer 204, the eighth semiconductor layer 208; the two ends of the third semiconductor layer 203 are respectively provided with the first ohmic contact 101 and the second ohmic contact 103; the third semiconductor layer 203 and the fourth semiconductor layer 204 The first heterojunction is formed at the junction of the fourth semiconductor layer 204. The bent section of the fourth semiconductor layer 204 is that the fourth semiconductor layer 204 protrudes upwards to form a trapezoidal bent section. The width of the bottom edge; the trapezoidal bending section is filled with an eighth semiconductor layer 208, and the connection between the eighth semiconductor layer and the upper bottom edge of the fourth semiconductor layer forms a second heterojunction; the metal electrode 102 covers A non-planar heterojunction is formed on the outer side surface of the trapezoidal bending section and the upper surface of the upper bottom edge; below the metal electrode 102 .
所述第一半导体衬底层201为蓝宝石、硅和碳化硅中的一种;所述的第二半导体缓冲层202主要为SiC、AlN、GaN、AlGaN中的一种;所述第三半导体层203、第四半导体层204、第八半导体层208主要为GaN、InN、AlGaN、InGaN、InAlGaN或者AlN;进一步的,所述的第一欧姆接触101和第二欧姆接触103的电极材料包含金、银、铝、钛、铂及铟中的一种或多种组合;所述的金属电极102的材料包含钛、金、镍、铂、锘、钨、银、铝、钛、钼及铟中的一种或多种组合。The first semiconductor substrate layer 201 is one of sapphire, silicon and silicon carbide; the second semiconductor buffer layer 202 is mainly one of SiC, AlN, GaN, and AlGaN; the third semiconductor layer 203 , the fourth semiconductor layer 204, and the eighth semiconductor layer 208 are mainly GaN, InN, AlGaN, InGaN, InAlGaN or AlN; further, the electrode materials of the first ohmic contact 101 and the second ohmic contact 103 include gold, silver , aluminum, titanium, platinum, and indium; the material of the metal electrode 102 includes one of titanium, gold, nickel, platinum, nuclei, tungsten, silver, aluminum, titanium, molybdenum, and indium one or more combinations.
实施例4的一种具有多异质结的高压异质结器件的原理,是通过在金属电极102下方的第三半导体层203与第四半导体层204之间沉积生长有第八半导体层208,且第三半导体层203、第四半导体层204、第八半导体层208形成非平面的梯形凸起异质结结构,凸起的上表面和下表面以及器件中除凸起以外的半导体是沿晶向[0001]或晶向沉积生长的,由弯折段构成的凸起侧面的第四半导体层204、第八半导体层208是沿着与晶向[0001]或晶向有一定角度沉积生长的;该梯形凸起的下表面的第八半导体层208和第三半导体层203形成第三异质结,由于第八半导体层208的厚度比较厚,使得此处的第第三异质结界面处未能形成二维电子气(2DEG);梯形凸起上表面的第四半导体层204与第八半导体层208的第二异质结,是沿着[0001]或方向生长的III-V族半导体异质结,异质结界面的极化电场最强,所以凸起上表面的第二异质结界面处很容易形成二维电子气(2DEG)沟道;相反,在凸起侧面的第二异质结,由于侧面的第三半导体层204、第八半导体层208的生长方向与[0001]或不平行,所以凸起侧面的多异质结的极化电场较弱,使得凸起侧面的第二异质结界面处难以形成2DEG。The principle of a high-voltage heterojunction device with multiple heterojunctions in Embodiment 4 is that an eighth semiconductor layer 208 is deposited and grown between the third semiconductor layer 203 and the fourth semiconductor layer 204 under the metal electrode 102, And the third semiconductor layer 203, the fourth semiconductor layer 204, and the eighth semiconductor layer 208 form a non-planar trapezoidal raised heterojunction structure. To [0001] or crystal direction Deposited and grown, the fourth semiconductor layer 204 and the eighth semiconductor layer 208 on the convex side composed of bent segments are along the crystal direction [0001] or the crystal direction Deposited and grown at a certain angle; the eighth semiconductor layer 208 and the third semiconductor layer 203 on the lower surface of the trapezoidal protrusion form a third heterojunction, because the thickness of the eighth semiconductor layer 208 is relatively thick, so that the first semiconductor layer here Two-dimensional electron gas (2DEG) cannot be formed at the interface of the three heterojunctions; the second heterojunction between the fourth semiconductor layer 204 and the eighth semiconductor layer 208 on the upper surface of the trapezoidal protrusion is along [0001] or In the III-V semiconductor heterojunction grown in the direction of growth, the polarization electric field at the heterojunction interface is the strongest, so it is easy to form a two-dimensional electron gas (2DEG) channel at the second heterojunction interface on the upper surface of the protrusion; on the contrary , the second heterojunction on the side of the protrusion, because the growth direction of the third semiconductor layer 204 and the eighth semiconductor layer 208 on the side is the same as [0001] or are not parallel, so the polarization electric field of multiple heterojunctions on the side of the protrusion is weaker, making it difficult to form 2DEG at the interface of the second heterojunction on the side of the protrusion.
实施例5Example 5
本例的一种常关沟道的高压异质结器件,如图6所示,包括从下往上依次设置的第一半导体衬底层201、第二半导体缓冲层202、第三半导体层203、第四半导体层204、第九半导体层209、第十类半导体210;所述第三半导体层203的两端分别设置有第一欧姆接触101与第二欧姆接触103;所述的第九半导体层209和第十半导体层210上具有金属电极102,金属电极102在第一欧姆接触101与第二欧姆接触103之间;所述第三半导体层203和第四半导体层204的连接处形成第一异质结,所述第九半导体层209和第四半导体层204的连接处形成第二异质结,所述第十半导体层210与第四半导体层204的连接处形成第三异质结;第九半导体层209与第四半导体层204的第二异质结及第十半导体层210和第四半导体层204的第三异质结的自极化电场与第四半导体层204和第三半导体层203的第一异质结的自极化电场相反且在金属电极102下方形成非平面多异质结。A high-voltage heterojunction device with a normally-off channel in this example, as shown in FIG. 6 , includes a first semiconductor substrate layer 201, a second semiconductor buffer layer 202, a third semiconductor layer 203, The fourth semiconductor layer 204, the ninth semiconductor layer 209, and the tenth type semiconductor 210; the two ends of the third semiconductor layer 203 are respectively provided with a first ohmic contact 101 and a second ohmic contact 103; the ninth semiconductor layer 209 and the tenth semiconductor layer 210 have a metal electrode 102, and the metal electrode 102 is between the first ohmic contact 101 and the second ohmic contact 103; the junction of the third semiconductor layer 203 and the fourth semiconductor layer 204 forms a first A heterojunction, the junction of the ninth semiconductor layer 209 and the fourth semiconductor layer 204 forms a second heterojunction, and the junction of the tenth semiconductor layer 210 and the fourth semiconductor layer 204 forms a third heterojunction; The self-polarization electric field of the second heterojunction between the ninth semiconductor layer 209 and the fourth semiconductor layer 204 and the third heterojunction between the tenth semiconductor layer 210 and the fourth semiconductor layer 204 and the fourth semiconductor layer 204 and the third semiconductor layer The self-polarizing electric field of the first heterojunction of layer 203 is opposite and forms a non-planar multiple heterojunction under metal electrode 102 .
所述第一半导体衬底层201为蓝宝石、硅和碳化硅中的一种;所述的第二半导体缓冲层202主要为SiC、AlN、GaN、AlGaN中的一种;所述第三半导体层203、第四半导体层204、第九半导体层209及第十类半导体210主要为GaN、InN、AlGaN、InGaN、InAlGaN或者AlN;所述的第一欧姆接触101和第二欧姆接触103的电极材料包含金、银、铝、钛、铂、或者铟;所述的金属电极102的材料包含钛、金、镍、铂、锘、钨、银、铝、钛、钼或者铟。The first semiconductor substrate layer 201 is one of sapphire, silicon and silicon carbide; the second semiconductor buffer layer 202 is mainly one of SiC, AlN, GaN, and AlGaN; the third semiconductor layer 203 , the fourth semiconductor layer 204, the ninth semiconductor layer 209 and the tenth semiconductor layer 210 are mainly GaN, InN, AlGaN, InGaN, InAlGaN or AlN; the electrode materials of the first ohmic contact 101 and the second ohmic contact 103 include Gold, silver, aluminum, titanium, platinum, or indium; the material of the metal electrode 102 includes titanium, gold, nickel, platinum, nuclei, tungsten, silver, aluminum, titanium, molybdenum, or indium.
实施例5的一种具有常关沟道的高压多异质结器件,是通过在金属电极102下方的第三半导体层203、第四半导体层204形成非平面的梯形凸起异质结结构,且在凸起上表面的第四半导体层204的弯折段和水平段分别沉积生长第九半导体层209和第十半导体层210;凹槽的上表面和下表面以及器件中除凹槽以外的半导体是沿晶向[0001]或晶向沉积生长的,由弯折段构成的凸起侧面的第三半导体层203、第四半导体层204和第九半导体层209是沿着与晶向[0001]或晶向有一定角度沉积生长的;该梯形凸起上表面的第四类半导体204与第三半导体层203连接形成了第一异质结结构,沿着[0001]或方向生长的III-V族半导体形成异质结时,异质结界面的极化电场最强,所以第三异质结处很容易形成二维电子气(2DEG)沟道;在凸起侧面,由于第三半导体层203、第四半导体层204、第九半导体层209的生长方向与[0001]或不平行,第九半导体层209与第四半导体层204的第二异质结及第四半导体层204和第三半导体层203的第一异质结的极化电场较弱,且第二异质结的自极化电场的方向与第一异质结的自极化电场方向相反,进一步削弱第四半导体层204和第三半导体层203的第一异质结的自极化电场,使得凸起侧面的第三半导体层203上表面的二维电子气(2DEG)耗尽。A high-voltage multi-heterojunction device with a normally-off channel in Embodiment 5 is a non-planar trapezoidal raised heterojunction structure formed by the third semiconductor layer 203 and the fourth semiconductor layer 204 under the metal electrode 102, And the ninth semiconductor layer 209 and the tenth semiconductor layer 210 are respectively deposited and grown on the bending section and the horizontal section of the fourth semiconductor layer 204 on the raised upper surface; The semiconductor is along the crystal direction [0001] or the crystal direction The third semiconductor layer 203, the fourth semiconductor layer 204, and the ninth semiconductor layer 209 on the convex side formed by the bent segments are deposited and grown along the crystal direction [0001] or the crystal direction Deposited and grown at a certain angle; the fourth type semiconductor 204 on the upper surface of the trapezoidal protrusion is connected to the third semiconductor layer 203 to form a first heterojunction structure, along [0001] or When the III-V group semiconductor grown in the direction of the heterojunction forms a heterojunction, the polarization electric field at the heterojunction interface is the strongest, so it is easy to form a two-dimensional electron gas (2DEG) channel at the third heterojunction; on the side of the protrusion, Since the growth directions of the third semiconductor layer 203, the fourth semiconductor layer 204, and the ninth semiconductor layer 209 are the same as [0001] or are not parallel, the polarization electric field of the second heterojunction between the ninth semiconductor layer 209 and the fourth semiconductor layer 204 and the first heterojunction between the fourth semiconductor layer 204 and the third semiconductor layer 203 is relatively weak, and the second heterojunction The direction of the self-polarization electric field of the junction is opposite to the direction of the self-polarization electric field of the first heterojunction, further weakening the self-polarization electric field of the first heterojunction of the fourth semiconductor layer 204 and the third semiconductor layer 203, so that the protrusion The two-dimensional electron gas (2DEG) on the upper surface of the third semiconductor layer 203 at the side is depleted.
实施例6Example 6
本例的一种常关沟道的高压多异质结器件,如图7所示,包括从下往上依次设置的第一半导体衬底层201、第二半导体缓冲层202、第三半导体层203、第四半导体层204、第九半导体层209、第十半导体层210;所述第三半导体层203的两端分别设置有第一欧姆接触101与第二欧姆接触103;所述的第九半导体层209和第十半导体层210上具有金属电极102,金属电极102在第一欧姆接触101与第二欧姆接触103之间;所述第三半导体层203和第四半导体层204的连接处形成第一异质结,所述第九半导体层209和第四半导体层204的连接处形成第二异质结,所述第十半导体层210与第四半导体层204的连接处形成第三异质结;第九半导体层209与第六半导体层204的第二异质结及第十半导体层210和第四半导体层204的第三异质结的自极化电场与第四半导体层204和第三半导体层203的第一异质结的自极化电场相反且在金属电极102下方形成非平面多异质结。A high-voltage multi-heterojunction device with a normally-off channel in this example, as shown in FIG. , the fourth semiconductor layer 204, the ninth semiconductor layer 209, and the tenth semiconductor layer 210; the two ends of the third semiconductor layer 203 are respectively provided with a first ohmic contact 101 and a second ohmic contact 103; the ninth semiconductor layer There is a metal electrode 102 on the layer 209 and the tenth semiconductor layer 210, and the metal electrode 102 is between the first ohmic contact 101 and the second ohmic contact 103; the junction of the third semiconductor layer 203 and the fourth semiconductor layer 204 forms the first A heterojunction, the junction of the ninth semiconductor layer 209 and the fourth semiconductor layer 204 forms a second heterojunction, and the junction of the tenth semiconductor layer 210 and the fourth semiconductor layer 204 forms a third heterojunction The self-polarization electric field of the second heterojunction of the ninth semiconductor layer 209 and the sixth semiconductor layer 204 and the third heterojunction of the tenth semiconductor layer 210 and the fourth semiconductor layer 204 and the fourth semiconductor layer 204 and the third The self-polarization electric field of the first heterojunction of the semiconductor layer 203 is opposite and forms non-planar multiple heterojunctions under the metal electrode 102 .
所述第一半导体衬底层201为蓝宝石、硅和碳化硅中的一种;所述的第二半导体缓冲层202主要为SiC、AlN、GaN、AlGaN中的一种;所述第三半导体层203、第四半导体层204、第九半导体层209及第十半导体层210主要为GaN、InN、AlGaN、InGaN、InAlGaN或者AlN;进一步的,所述的第一欧姆接触101和第二欧姆接触103的电极材料包含金、银、铝、钛、铂及铟中的一种或多种组合;所述的金属电极102的材料包含钛、金、镍、铂、锘、钨、银、铝、钛、钼及铟中的一种或多种组合。The first semiconductor substrate layer 201 is one of sapphire, silicon and silicon carbide; the second semiconductor buffer layer 202 is mainly one of SiC, AlN, GaN, and AlGaN; the third semiconductor layer 203 , the fourth semiconductor layer 204, the ninth semiconductor layer 209 and the tenth semiconductor layer 210 are mainly GaN, InN, AlGaN, InGaN, InAlGaN or AlN; further, the first ohmic contact 101 and the second ohmic contact 103 The electrode material includes one or more combinations of gold, silver, aluminum, titanium, platinum, and indium; the material of the metal electrode 102 includes titanium, gold, nickel, platinum, nuclei, tungsten, silver, aluminum, titanium, One or more combinations of molybdenum and indium.
实施例五的原理,是通过在金属电极102下方的第三半导体层203、第四半导体层204形成非平面的梯形凹槽异质结结构,且在凹槽上表面的第四半导体层204的弯折段和水平段分别沉积生长第九半导体层209和第十半导体层210;凹槽的上表面和下表面以及器件中除凹槽以外的半导体是沿晶向[0001]或晶向沉积生长的,由弯折段构成的凹槽侧面的第三半导体层203、第四半导体层204和第九半导体层209是沿着与晶向[0001]或晶向有一定角度沉积生长的;该梯形凹槽下表面的第五半导体层204与第三半导体层203连接形成了第一异质结结构,沿着[0001]或方向生长的III-V族半导体形成异质结时,异质结界面的极化电场最强,所以凹槽下表面第一异质结处很容易形成二维电子气(2DEG)沟道;在凹槽侧面,由于第三半导体层203、第四半导体层204、第九半导体层209的生长方向与[0001]或不平行,侧面的第九半导体层209与第四半导体层204的第二异质结及第四半导体层204和第三半导体层203的第一异质结的极化电场较弱,且第九半导体层209和第四半导体层204的第二异质结的自极化电场的方向与第四半导体层204和第三半导体层203的第一异质结的自极化电场方向相反,进一步削弱第四半导体层204和第三半导体层203的第一异质结的自极化电场,使得凹槽侧面的第三半导体层203上表面的二维电子气(2DEG)耗尽。The principle of the fifth embodiment is to form a non-planar trapezoidal groove heterojunction structure through the third semiconductor layer 203 and the fourth semiconductor layer 204 under the metal electrode 102, and the fourth semiconductor layer 204 on the upper surface of the groove Deposit and grow the ninth semiconductor layer 209 and the tenth semiconductor layer 210 respectively in the bending section and the horizontal section; the upper surface and the lower surface of the groove and the semiconductor in the device except the groove are along the crystal direction [0001] or the crystal direction The third semiconductor layer 203, the fourth semiconductor layer 204, and the ninth semiconductor layer 209 on the side of the groove formed by the bent segments are grown along the crystal direction [0001] or the crystal direction Deposited and grown at a certain angle; the fifth semiconductor layer 204 on the lower surface of the trapezoidal groove is connected to the third semiconductor layer 203 to form a first heterojunction structure, along [0001] or When the III-V semiconductors grown in the same direction form a heterojunction, the polarization electric field at the heterojunction interface is the strongest, so it is easy to form a two-dimensional electron gas (2DEG) channel at the first heterojunction on the lower surface of the groove; Groove side, because the growth direction of the third semiconductor layer 203, the fourth semiconductor layer 204, the ninth semiconductor layer 209 and [0001] or are not parallel, the polarization electric field of the second heterojunction between the ninth semiconductor layer 209 and the fourth semiconductor layer 204 on the side and the first heterojunction between the fourth semiconductor layer 204 and the third semiconductor layer 203 is relatively weak, and the ninth The direction of the self-polarization electric field of the second heterojunction of the semiconductor layer 209 and the fourth semiconductor layer 204 is opposite to the direction of the self-polarization electric field of the first heterojunction of the fourth semiconductor layer 204 and the third semiconductor layer 203, further weakening The self-polarization electric field of the first heterojunction between the fourth semiconductor layer 204 and the third semiconductor layer 203 depletes the two-dimensional electron gas (2DEG) on the upper surface of the third semiconductor layer 203 at the side of the groove.
为了更好的理解本发明的结构,本发明提供一种具有常关沟道异质结高压器件的制作流程:In order to better understand the structure of the present invention, the present invention provides a manufacturing process of a heterojunction high-voltage device with a normally-off channel:
第一步:在硅衬底上采用有机化学沉积方法,依次沉积AlN缓冲层和GaN,AlxGa1-xN,x的取值为0~1;AlxGa1-xN和GaN连接处形成AlxGa1-xN/GaN异质结,如图8,然后用脉冲激光沉积约500nm的Si3N4薄膜作为掩膜,在AlxGa1-xN上刻蚀出凹槽窗口,如图9所示;Step 1: Deposit AlN buffer layer and GaN, Al x Ga 1-x N in sequence on the silicon substrate by organic chemical deposition method, and the value of x is 0 to 1; Al x Ga 1-x N and GaN are connected Form an Al x Ga 1-x N/GaN heterojunction at , as shown in Figure 8, then use a pulsed laser to deposit a Si 3 N 4 film of about 500nm as a mask, and etch a groove on the Al x Ga 1-x N window, as shown in Figure 9;
第二步:在AlxGa1-xN以及凹槽底部GaN上采用有机化学气相沉积法(MOCVD)、原子层外延沉积法(ALD)或分子束外延方法(MBE)在沉积AlyGa1-yN、AlzGa1-zN、AlwGa1-wN层,其中y,z,w的取值为0~1;且AlyGa1-yN和GaN连接处形成AlxGa1-xN/GaN异质结,AlyGa1-yN和AlxGa1-xN连接处形成AlyGa1-y/AlxGa1-xN异质结,AlzGa1-zN和AlyGa1-yN连接处形成AlzGa1-zN/AlyGa1-yN异质结,AlwGa1-wN和AlzGa1-zN连接处形成AlwGa1-wN/AlzGa1-zN异质结如图10;The second step: Deposit Al y Ga 1 on Al x Ga 1-x N and GaN at the bottom of the groove by organic chemical vapor deposition (MOCVD), atomic layer epitaxy (ALD) or molecular beam epitaxy (MBE) -y N, Al z Ga 1-z N, Al w Ga 1-w N layers, where the values of y, z, and w range from 0 to 1; and Al x is formed at the junction of Aly Ga 1-y N and GaN Ga 1-x N/GaN heterojunction, AlyGa 1 -y / Al x Ga 1 -x N heterojunction, Al z Ga Al z Ga 1-z N/ Aly Ga 1-y N heterojunction is formed at the junction of 1- z N and Al y Ga 1 -y N, and the junction of Al w Ga 1-w N and Al z Ga 1-z N Al w Ga 1-w N/Al z Ga 1-z N heterojunction is formed at , as shown in Figure 10;
第三步:用酒精、丙酮和去离子水分别对AlwGa1-wN/AlzGa1-zN、AlzGa1-zN/AlyGa1-yN、AlyGa1-y/AlxGa1-xN、AlxGa1-x/GaN异质结进行超声清洗,氮气吹干后用离子刻蚀方法刻蚀出欧姆接触区,刻蚀气体为BCl3,然后用电子束蒸发生长欧姆接触电极(Ti/Al/Au)并在850℃N2氛围下快速退火约30s,如图11;The third step: Al w Ga 1-w N/Al z Ga 1-z N, Al z Ga 1-z N/Al y Ga 1-y N, Al y Ga 1 -y /Al x Ga 1-x N, Al x Ga 1-x /GaN heterojunctions were ultrasonically cleaned, and after drying with nitrogen gas, the ohmic contact area was etched by ion etching. The etching gas was BCl 3 , and then Use electron beam evaporation to grow ohmic contact electrodes (Ti/Al/Au) and rapidly anneal for about 30s in N2 atmosphere at 850°C, as shown in Figure 11;
第五步:再用电子束在凹槽蒸发生长金属电极102,如图12。Step 5: Evaporate and grow the metal electrode 102 in the groove with the electron beam, as shown in FIG. 12 .
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