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CN105097749A - 组合的qfn和qfp半导体封装 - Google Patents

组合的qfn和qfp半导体封装 Download PDF

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Publication number
CN105097749A
CN105097749A CN201410199269.7A CN201410199269A CN105097749A CN 105097749 A CN105097749 A CN 105097749A CN 201410199269 A CN201410199269 A CN 201410199269A CN 105097749 A CN105097749 A CN 105097749A
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CN
China
Prior art keywords
encapsulated type
wire
type lead
lead
integrated circuit
Prior art date
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Granted
Application number
CN201410199269.7A
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English (en)
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CN105097749B (zh
Inventor
白志刚
陈兰珠
姚晋钟
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NXP USA Inc
Original Assignee
Freescale Semiconductor Inc
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Priority to CN201410199269.7A priority Critical patent/CN105097749B/zh
Priority to US14/552,497 priority patent/US9589928B2/en
Publication of CN105097749A publication Critical patent/CN105097749A/zh
Application granted granted Critical
Publication of CN105097749B publication Critical patent/CN105097749B/zh
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Abstract

本发明涉及组合的QFP和QFN半导体封装。一种半导体封装包括具有第一类型封装引线的第一引线框架类型和预模制部分，以及具有围绕管芯焊盘并且由预模制部分支撑的第二类型封装引线的第二引线框架类型。集成电路附着到管芯焊盘并且通过接合线电连接到第一和第二类型引线。形成模制盖的模制复合物覆盖第一和第二引线框架类型、集成电路和接合线。第一引线框架类型可以是QFP型并且第二引线框架类型可以是QFN型。

Description

组合的QFN和QFP半导体封装
技术领域
本发明涉及半导体封装，尤其是，涉及组合的QFN(四方扁平无引线)和QFP(四方扁平封装)半导体封装。
背景技术
可获得的半导体器件封装有很多种。公知的一种常用的封装类型为QFN或四方扁平无引线封装。在这种基于引线框架的封装类型中，露出的器件接触与封装壳体的底边和侧边齐平。另外一种基于引线框架的封装类型是QFP或四方扁平封装。在这种封装类型中，引线从封装壳体的侧面凸出。
为了提供具有附加输入/输出的半导体器件，具有组合QFN和QFP引线的半导体封装会是有利的。
附图说明
以示例的方式对本发明进行说明，并且本发明不限于在附图中所示的其实施例，在附图中相似的附图标记表示类似的元件。附图中的元件是为了简单和清楚而示出的，并且不一定按比例绘制。
图1A是根据本发明实施例的半导体封装的底部平面图；
图1B是根据本发明实施例的半导体封装的底视图；
图2A是图1A的半导体封装沿着A-A线的横截面侧视图；
图2B是图1B的半导体封装沿着B-B线的横截面侧视图；
图3是根据本发明的实施例的QFN引线框架的顶部平面图；
图4A是图3中所示的QFN引线框架在经历预模制工艺后的顶视图；
图4B是图4A的预模制QFN引线框架沿着C-C线的横截面侧视图；
图4C是图4A的预模制QFN引线框架的一部分沿着D-D线的横截面侧视图；
图5A是根据本发明的实施例的预模制组件的顶视图；
图5B是图5A的预模制组件沿着E-E线的横截面侧视图；
图6是根据本发明的一个实施例的具有至少一个树脂流动槽(resinbleedingslot)的预模制组件的底部平面图；
图7是图6的预模制组件沿着F-F线的横截面侧视图；
图8是包括管芯焊盘和引线的预模制QFN组件和QFP引线框架的组合的横截面侧视图；
图9是根据本发明的一个实施例的具有电源和接地条(groundbar)的预模制组件的顶部平面图；以及
图10是根据本发明的实施例装配组合的QFN和QFP封装的方法的流程图。
具体实施方式
对附图的详细说明是旨在作为对本发明当前的优选实施例的说明，而并不是旨在表示本发明可以实现的唯一形式。应当理解的是，相同或等同的功能可以通过旨在包含在本发明的精神和范围内的不同实施例来实现。
在一个实施例中，本发明提供了一种半导体封装，其包括管芯焊盘，集成电路，多条第一封装类型引线，多条第二封装类型引线，以及模制盖。管芯焊盘具有上表面和下表面，并且集成电路附着于管芯焊盘的上表面上。第一封装类型引线围绕管芯焊盘并且通过第一接合线电连接到集成电路。第二封装类型引线设置在第一封装类型引线之上并且通过第二接合线电连接到集成电路。第二封装类型不同于第一封装类型。模制盖至少部分地覆盖管芯焊盘、集成电路、第一和第二封装类型引线、以及第一和第二接合线。
在另一个实施例中，本发明提供了一种装配半导体封装的方法。该方法包括提供包含第一封装类型引线框架的预模制组件，以及将第二封装类型引线框架设置于预模制组件之上。预模制组件包括具一多条第—封装类型引线的第一封装类型引线框架，以及用于设置第一封装类型引线的预模制部分。第一封装类型不同于第二封装类型。第二封装类型引线框架包括管芯焊盘和围绕管芯焊盘的多条第二封装类型引线。第二封装类型引线由预模制部分支撑。该方法还包括将集成电路附着在管芯焊盘的上表面上，通过第一接合线将第一封装类型引线电连接到集成电路，通过第二接合线将第二封装类型引线电连接到集成电路，以及形成模制盖，所述模制盖至少部分地覆盖预模制组件、第二封装类型引线框架、集成电路以及第一和第二接合线。
之前已经相当宽泛地概述了本发明的特征和技术优势，因此接下来的对本发明的详细说明可以被更好地理解。本发明的附加特征以及优势将在下面阐述，其形成了本发明的权利要求的主题。本领域技术人员应当理解，所公开的概念和具体实施方式可以容易地作为用于实现与本发明相同的目的所进行的修改或设计其他结构或工艺的基础。本领域技术人员还应当认识到这种等同的结构不会脱离如所附权利要求所阐述的本发明的精神和范围。
图1A是根据本发明实施例的半导体封装10的底视图，以及图2A是图1A的半导体封装10沿着A-A线的横截面侧视图。半导体封装10是QFN封装和QFP封装的组合。在所示的实施例中，半导体封装10是不暴露焊盘(EP)类型封装。然而，对本领域技术人员来说显而易见的是，本发明也可以具有暴露的焊盘，如图1B和图2B中所示。图1B是根据本发明实施例的具有暴露的管芯焊盘20’的半导体封装10’的底视图，以及图2B是图1B的半导体封装10’沿着B-B线的横截面侧视图。
如图1A和2A中所示，半导体封装10包括管芯焊盘20、集成电路30、多条第一封装类型引线40、多条第二封装类型引线50以及模制盖或封装体60。在当前的优选实施例中，第一封装类型是QFN封装，即第一封装类型引线40是QFN引线，并且第二封装类型是QFP封装，即第二封装类型引线50是QFP引线。
在一个实施例中，管芯焊盘20与QFP引线50一起形成，并且具有上表面22和下表面24。用管芯粘合剂或银糊膏将集成电路30附着在管芯焊盘20的上表面22上，如本领域所公知。集成电路30可以是任何类型的集成电路，例如处理器、控制器、存储器、片上系统(SOC)、或专用集成电路(ASIC)。
QFN引线40围绕管芯焊盘20设置。QFN引线40通过第一接合线42电连接到集成电路30的电极或管芯接合焊盘。QFP引线50具有第一端或近端(接近于集成电路)，其位于QFN引线40上方并由QFN引线40支撑(如将在下面被更详细地描述)，具有从模制盖60凸出的中间部分，以及具有在模制盖60的外侧并且位于与QFN引线40相同的平面中的远端。虽然图2中所示的QFP引线50具有急剧的弯曲(90°)，使得远端位于与QFN引线40相同的平面中，但是本领域技术人员应该理解该弯曲可以小于90°。
QFP引线50的近端位于QFN引线40之上并且由QFN引线40支撑。如将被更详细地描述地，QFP引线50被优选地用粘合剂14固定到QFN引线40。粘合剂14可以包括管芯粘附膜、环氧树脂或粘合带。每条QFP引线50通过第二接合线52电连接到集成电路30。第一和第二接合线42、52可以包括裸导线(例如金或铜导线)、电镀导线、绝缘导线或者其组合。将接合线42、52附着到集成电路30和引线40、50的使用商业上可获得的导线接合装置的方法是本领域技术人员所公知的。
如图所示，QFN引线40在封装体10的底部露出并且QFP引线50凸出到模制盖60的侧面之外。QFN引线40和QP引线50分别提供在集成电路30和外部器件(未示出，例如其上安装半导体封装10的电路板)之间的电连接。模制盖60覆盖管芯焊盘20、集成电路30、第一和第二接合线42和52、以及QFN和QFP引线的一部分。
为了装配半导体封装10，首先形成预模制组件44(图2A)。预模制组件44包括QFN引线40和用于设置QFN引线40的预模制部分46(图5-8中所示)。
图10是示出根据本发明的实施例的装配半导体封装10方法的流程图。现在将参考图3-5以及图10讨论装配预模制组件44和半导体封装10的工艺。方法70开始于步骤72，在该步骤提供QFN引线框架48。图3是根据本发明实施例的包括QFN引线40的QFN引线框架48的顶视图。QFN引线通之外部连接条60和内部连接条62连接。
在步骤74，预模制QFN引线框架48。图4A是图3中所示的预模制QFN引线框架48的顶视图，其具有预模制部分46。图4B是图4A的预模制QFN引线框架48沿着C-C线的横截面侧视图，并且图4C是图4A的预模制QFN引线框架48的一部分的沿着D-D线的横截面侧视图。在优选实施例中，预模制部分46的靠近外部连接条60或内部连接条62的部分的厚度与外部和内部连接条60和62的厚度相同，使得预模制QFN引线框架48能够被夹住，以便冲压外部和内部连接条60和62。
在步骤76，修整预模制QFN引线框架并且通过冲压外部和内部连接条60和62来分离QFN引线40以形成预模制组件44。图5A是根据本发明的实施例的预模制组件44的顶视图，并且图5B是图5A的预模制组件沿着E-E线的横截面侧视图，其中预模制组件44通过冲压图4A中的制模的QFN引线框架48以分离所有的引线来形成。
QFN引线框架48以类似于常规QFN引线框架的方式形成，其中QFN引线框架48包括围绕中心开口设置成一行或多行(所示是两行)的多条QFN型引线40。在所示的实施例中，QFN引线框架48不包括管芯焊盘，只包括中心开口。
QFN引线框架48被预模制以将QFN引线40保持在适当的位置。用于预模制引线框架48的材料可以包括任何商业上可获得的塑料或密封材料或者可以使用粘合带。
在用第一模制材料将QFN引线40固定在适当的位置后，引线框架48被修整以分离QFN引线40。该修整可以包括冲压掉引线框架48和预模制部分46的不需要的部分。这样，形成预模制组件44。虽然附图示出了单个引线框架，但是如本领域技术人员应该理解，引线框架48或预模制组件44可以以条或者阵列的方式提供，从而使得可以同时装配多个预模制QFN引线框架。
图6是根据本发明的一个实施例的预模制组件44的底视图。在这个实施例中，预模制组件44包括至少一个树脂流动槽16，所述树脂流动槽形成在预模制组件44底部，用以防止树脂流到QFN引线40上。树脂流动槽16可以在预模制期间通过模制凹槽(modechase)形成，或者在预模制后通过蚀刻预模制部分46形成。
图7是图6的沿着F-F线的预模制组件44的截面图。如图6和7中所示，一个树脂流动槽16在QFN引线框架48的外侧中的QFN引线40附近设置，并且另一个树脂流动槽16在QFN引线框架48的内侧中的QFN引线40附近设置。在接下来的模制工艺中，树脂流动槽16保护QFN引线40不被模制复合物覆盖。
在步骤78，提供QFP引线框架，以及在步骤80，将QFP引线框架附着到预模制组件44。图8是包括管芯焊盘20和QFP引线50的预模制组件44和QFP引线框架58的组合的横截面侧视图。QFP引线框架58通常包括常规dQFP引线框架，不同的是其按与预模制组件44匹配的尺寸和形状来制造。QFP引线框架58设置于预模制组件44之上并且用粘合剂14固定于其上，使得QFP引线50被预模制部分46支撑。
一旦两个引线框架(QFN和QFP)匹配，那么剩下的工艺步骤是有些常规的，并且包括管芯接合、导线接合、密封、模后固化(PMC)、去除毛到(de-flash)、修整和成型、以及检验，如图10中在步骤82-92所示。本领域技术人员熟悉该工艺，因此对这些步骤的详细说明对于本发明的充分理解而言不是必须的。然而，根据本发明的实施例，去除毛刺步骤可以在模制预模制组件44和QFP引线框架58的组合之后进行以便于提供额外的电连接。
因此，本发明将QFN和QFP封装组合在一起，从而提供了一种具有更多数量引线的封装，而不会增加半导体封装10的大小(即，占用面积)。例如，对于当前的14×14的65μm节距的QFP，本发明可以具有140条QFN引线以及80条QFP引线。如果有必要，当制备相应的QFN引线框架时，可以增加电源环和/或接地h。图9是根据本发明的一个实施例的预模制组件44的顶部平面图，其中预模制QFN引线框架48被冲压以分离引线40。如图9中所示，QFN引线框架48包括电源环43和接地环45两者。
虽然已经示出和说明了本发明的各种实施例，但是应当清楚的是本发明不限于这些实施例。在不脱离如权利要求书所述的本发明精神和范围的情况下，各种修改、改变、变化、替换或等同物对于本领域技术人员来说都是显而易见的。

Claims (16)

1.一种半导体封装，包括：
管芯焊盘，其具有上表面和下表面；
集成电路，其附着于所述管芯焊盘的上表面上；
多个第一封装类型引线，围绕所述管芯焊盘，其中所述多个第一封装类型引线中的每一个通过第一接合线电连接到所述集成电路；
多个第二封装类型引线，围绕第一封装类型引线，其中所述第二封装类型引线具有位于所述多个第一封装类型引线之上的近端，其中所述第二封装类型引线的近端通过第二接合线电连接到所述集成电路，并且其中第二封装类型不同于第一封装类型；以及
模制盖，至少部分地覆盖所述管芯焊盘、所述集成电路、所述多个第一封装类型引线和所述多个第二封装类型引线、以及所述第一接合线和所述第二接合线。
2.根据权利要求1所述的半导体封装，其中所述第二封装类型引线具有从所述模制盖的侧面凸出的中间部分和位于与所述第一封装类型引线相平行的平面内的远端。
3.根据权利要求2所述的半导体封装，其中所述管芯焊盘的下表面未被所述模制盖覆盖并且是暴露的。
4.根据权利要求2所述的半导体封装，其中所述管芯焊盘的下表面被所述模制盖覆盖。
5.根据权利要求1所述的半导体封装，其中所述第一封装类型是四方扁平无引线封装(QFN)，并且所述第二封装类型是四方扁平封装(QFP)的一种。
6.根据权利要求1所述的半导体封装，还包括接地环，所述接地环被所述第一封装类型引线围绕并且电耦合到所述集成电路。
7.根据权利要求1所述的半导体封装，还包括电源环，所述电源环被所述第一封装类型引线围绕并且电耦合到所述集成电路。
8.根据权利要求1所述的半导体封装，还包括预模制部分，用于设置所述第一封装类型引线并且在所述第一封装类型引线上支撑所述第二封装类型引线。
9.根据权利要求8所述的半导体封装，其中通过粘合剂将所述第二封装类型引线附着到所述预模制部分。
10.一种装配半导体封装的方法，包括：
提供预模制组件，其包括具有多条第一封装类型引线的第一封装类型引线框架，以及用于设置所述多条第一封装类型引线的预模制部分；
将第二封装类型引线框架设置在所述预模制组件之上，其中所述第二封装类型引线框架包括管芯焊盘和围绕所述管芯焊盘的多条第二封装类型引线，其中所述第二封装类型引线被所述预模制部分支撑，并且其中第一封装类型不同于第二封装类型；
将集成电路附着于所述管芯焊盘的上表面；
通过第一接合线将第一封装类型引线电连接到所述集成电路；
通过第二接合线将第二封装类型引线电连接到所述集成电路；以及
形成模制盖，所述模制盖至少部分地覆盖所述预模制组件、所述第二封装类型引线框架、所述集成电路、所述第一接合线、以及所述第二接合线。
11.根据权利要求10所述的方法，其中所述第一封装类型是四方扁平无引线封装(QFN)，以及所述第二封装类型是四方扁平封装(QFP)的一种。
12.根据权利要求10所述的方法，其中所述预模制组件还包括被所述第一封装类型引线围绕的接地环。
13.根据权利要求10所述的方法，其中所述预模制组件还包括被所述第一封装类型引线围绕的电源环。
14.根据权利要求10所述的方法，其中通过粘合剂将所述第二封装类型引线附着到所述预模制部分。
15.根据权利要求10所述的方法，还包括对所述模制盖去除毛刺。
16.根据权利要求10所述的方法，其中所述第一封装类型引线包括两行引线末端，所述引线末端暴露于所述模制盖的底表面处。
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