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CN105027280A - 具有穿过封装互连的半导体装置组合件及相关联系统、装置与方法 - Google Patents

具有穿过封装互连的半导体装置组合件及相关联系统、装置与方法 Download PDF

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Publication number
CN105027280A
CN105027280A CN201480012133.9A CN201480012133A CN105027280A CN 105027280 A CN105027280 A CN 105027280A CN 201480012133 A CN201480012133 A CN 201480012133A CN 105027280 A CN105027280 A CN 105027280A
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China
Prior art keywords
semiconductor device
encapsulant
active surface
interconnect
semiconductor
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CN201480012133.9A
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CN105027280B (zh
Inventor
辰·游
塔德·O·伯肯
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Micron Technology Inc
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Micron Technology Inc
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Abstract

本文揭示用于制造半导体装置的方法。一种根据特定实施例配置的方法包含在囊封剂上形成间隔件材料使得所述囊封剂将所述间隔件材料与半导体装置的作用表面及突出远离所述作用表面的至少一个互连分离。所述方法进一步包含模制所述囊封剂使得所述互连的至少部分延伸通过所述囊封剂且延伸到所述间隔件材料中。所述互连可包含与所述半导体装置的所述作用表面实质上共面以提供与所述半导体装置的电连接的接触表面。

Description

具有穿过封装互连的半导体装置组合件及相关联系统、装置与方法
技术领域
本技术涉及形成延伸通过半导体装置封装的壳体的穿过封装互连。特定来说，本技术的一些实施例涉及形成半导体装置封装的组合件中的此类互连。
背景技术
封装半导体装置(例如，存储器芯片及微处理器芯片)通常包含安装到衬底且围封于保护覆盖物中的半导体装置。所述装置包含功能性特征，例如存储器单元、处理器电路及互连电路。所述装置通常也包含电耦合到所述功能性特征的结合垫。所述结合垫耦合到延伸至所述保护覆盖物外部用于将所述半导体装置连接到总线、电路及/或其它半导体装置的引脚或其它类型的终端。
用以减少由紧凑型电子产品中的封装半导体装置占据的表面面积的一种常规方法为将一个封装装置堆叠在具有同样配置的另一封装装置上。举例来说，如图1中所展示，常规半导体装置组合件10包含使用焊料球16彼此连接且连接到印刷电路板(PCB)14的两个同样封装装置12(展示为上封装装置12a及下封装装置12b)。每一封装装置12可包含安装到支撑PCB 20且用囊封剂22围封的半导体裸片18。每一裸片18具有使用支撑PCB 20内部的电路与支撑PCB 20的对应结合垫24a连接的裸片结合垫(未展示)。焊料球16将上封装12a的结合垫24a连接到下封装12b的结合垫24b。额外焊料球16将下封装12b连接到PCB 14的对应结合垫24b。
图1的常规布置的一个缺点为结合垫24a及24b助长组合件10的整体占据面积。特定来说，结合垫24a及24b占据PCB 14及支撑PCB 20的周边的部分26。因此，存在对占据较小表面面积的改进的半导体装置组合件的需要。
附图说明
参考以下图示可更好地理解本技术的许多方面。图中的组件不一定按比例。取而代之的是，重点放置在清楚地说明本技术的原理。
图1为根据现有技术的半导体装置组合件的部分示意性横截面侧视图。
图2为根据本技术的所选择的实施例而配置的半导体装置组合件的部分示意性及部分分解的横截面侧视图。
图3A到3J为说明用于制造根据本技术的所选择的实施例的穿过封装互连的方法中的所选择的步骤处的半导体装置的部分示意性横截面图。
图4为用于制造根据本技术的所选择的实施例而配置的半导体装置组合件的方法的流程图。
图5为说明合并有根据本技术的实施例的半导体装置的系统的框图。
具体实施方式
本文描述连同相关方法、装置与系统一起的用于形成延伸半导体装置封装的外壳的穿过封装互连的方法的若干实施例的特定细节。术语“半导体装置”一般指包含半导体材料的固态装置。半导体装置的实例包含逻辑装置、存储器装置及二极管等。此外，术语“半导体装置”可指制成的装置或在成为制成的装置之前的各种处理阶段处的组合件或其它结构。取决于使用衬底的上下文，术语“衬底”可指晶片级衬底或单一化的裸片级衬底。所属领域的技术人员将认识到可在晶片级或裸片级执行本文所描述的方法的合适步骤。此外，除非上下文另外指示，否则能够使用常规半导体制造技术形成本文所揭示的结构。能够(例如)使用化学气相沉积、物理气相沉积、原子层沉积、旋涂及/或其它合适的技术来沉积材料。类似地，能够(例如)使用等离子蚀刻、湿式蚀刻、化学机械平面化或其它合适的技术来移除材料。
术语“半导体装置封装”可指堆叠或以其它方式并入到共同封装中的半导体装置的组合件。半导体封装可包含部分或完全囊封半导体装置的组合件的外壳。术语“半导体装置组合件”可指半导体装置的组合件。此术语也可指半导体装置的组合件及耦合到所述半导体装置的组合件的支撑衬底。支撑衬底包含印刷电路板(PCB)或承载半导体装置的组合件且将电连接提供到半导体装置组合件的其它合适的衬底。所属领域的技术人员也将理解本技术可具有额外实施例且可在无下文参考图2到5描述的实施例的若干细节的情况下实践本技术。
图2说明根据本发明的所选择的实施例而配置的半导体装置组合件100。所述装置组合件包含使用互连106(在图2中展示为焊料球106)彼此连接且连接到载体衬底104的半导体装置封装102(展示为第一到第三封装装置102a到102c)。每一装置封装102可包含多个半导体裸片108(个别地识别为第一半导体裸片108a及第二半导体裸片108b)，所述多个半导体裸片108通过粘合剂材料112(例如，环氧树脂、裸片附接带及/或其它合适的粘合剂材料)彼此附接且附接到封装支撑衬底110。个别装置封装102也可包含第一线结合123a及第二线结合123b，第一线结合123a耦合到第一半导体裸片108a的第一结合垫124a且耦合到支撑衬底110的衬底结合垫124c，第二线结合123b电耦合到第二半导体裸片108b的第二结合垫124b且电耦合到其它衬底结合垫124c。衬底结合垫124c通过支撑衬底110的内部电路125电耦合到外部接触垫124d。个别装置封装102可包含壳体126，其囊封半导体裸片108及第一及第二线结合123a及123b。壳体126包含囊封剂，例如塑料材料、环氧树脂化合物或其它合适的电介质材料。
个别装置封装102可进一步包含在第一半导体裸片108a的作用表面132处的第三结合垫130及电耦合到第三结合垫130的穿过封装互连125。个别互连128延伸通过壳体126且具有延伸超过壳体126的外表面134偏移高度t1的第一部分128a。互连的第二部分128b在壳体126的外表面134与第一半导体裸片108a处的个别第三结合垫130之间延伸。电连接的再分布网络(未展示)或其它合适的网络可将第三结合垫130耦合到第一半导体裸片108a的第一结合垫124a。
装置封装102之间的焊料球106在支撑衬底110的外部结合垫124d与穿过封装互连128的第一部分128a之间提供电耦合。焊料球106及穿过封装互连128的第一部分128a在装置封装102之间界定封装间隔s1。此外，焊料球106及穿过封装互连128的第一部分128a可提供机械支撑。在一些实施例中，通过支撑衬底110的外部结合垫124d与穿过封装互连128的第一部分128a之间的回流焊接来减少封装间隔s1。
根据本技术的各种实施例，封装半导体装置102提供相对于常规半导体装置组合件具有减少占据面积的半导体装置组合件，例如图1中展示的组合件。特定来说，半导体装置组合件100不需要周边焊料球，但实际上穿过封装互连128相对于界定半导体装置封装102的周边为在内侧(例如，穿过封装互连128直接延伸远离完全在第一裸片108a的周边的区域内的第一裸片108a)。因此，半导体装置组合件100可具有类似于或等效于半导体装置封装102的平面形状的平面形状。此外，封装间隔s1不显著助长半导体装置组合件100的整体突出高度。
所属领域的技术人员将认识到，穿过封装互连可并入到各种半导体装置组合件及/或半导体装置封装中。因此，半导体装置组合件100及/或半导体装置封装102可包含除图2中所说明的特征及配置以外或替代图2中所说明的特征及配置的特征及配置。举例来说，可使用在装置封装102的裸片108之间延伸的互连替代第一及第二线结合123a及123b。在此配置中，裸片108中的一或多者可包含延伸通过裸片108且电耦合到裸片108之间及/或裸片与支撑衬底110之间的互连(未展示)的穿衬底通孔(即，穿硅通孔)。然而，在一些实施例中，制造第一及第二线结合123a及123b与制造穿衬底通孔及裸片到裸片互连相比可为较不昂贵且较不复杂的。此外，在一些实施例中，可省略半导体装置组合件100及/或半导体装置封装102的某些特征及结构。例如，半导体装置封装102可包含位于半导体裸片108的仅一侧上(例如，裸片108的左侧上或裸片108的右侧上)的线结合。
图3A到3J为说明用于制造根据本技术的所选择的实施例的穿过封装互连或其它连接器的方法中的各种阶段处的半导体装置240的一部分的部分示意性横截面图。首先参考图3A，半导体装置240包含衬底242(例如，硅晶片)及形成于衬底242中且通过切割道244彼此分离的多个第一半导体裸片108a。第一半导体裸片108a在已通过后端工艺(BEOL)金属沉积过程或其它合适的金属化过程形成的作用表面132处具有第一结合垫124a。第一结合垫124a可包含铝(Al)、镍(Ni)、金(Au)、各种合金或其它合适的导电材料。
第一结合垫124a的至少部分可通过导电互连及迹线的网络电耦合到第一半导体裸片108a的内部电路246。在一些实施例中，第一结合垫124a中的一或多者可与内部电路246电隔离。举例来说，如图3A中所展示，最左边结合垫124a连接到内部电路(如由耦合个别半导体裸片108a的最左边结合垫124a的虚线所指示)，但最右边结合垫124a不连接到内部电路。
图3B展示已在作用表面132处形成再分布网络248且已从衬底242单一化第一半导体裸片108a之后的半导体装置240的单个第一裸片108a(图3A)。然而，所属领域的技术人员将理解可将半导体装置240与其它半导体装置同时制造。再分布网络248可形成于钝化材料250上且可包含第三结合垫130、导电迹线(图3B中未展示)及用于电连接第三结合垫130与第一结合垫124a的其它特征。在一些实施例中，再分布网络248可任选地使个别第一结合垫124a彼此互连(图中未展示)。再分布网络248的钝化材料250可包含聚酰亚胺或其它合适的电介质材料。此外，钝化材料250可经图案化以通过钝化材料250暴露第一结合垫124a。可将第三结合垫130直接沉积在钝化材料250上。导电迹线可通过沉积晶种材料且在所述晶种材料上电镀导电材料而结合到第一结合垫124a。在一些实施例中，可在用以形成再分布网络248的导电迹线的相同阶段期间形成第三结合垫130。或者，可在单独阶段形成第三结合垫130。第三结合垫130及导电迹线可包含Cu、Ni、钛(Ti)、各种合金或其它合适的材料。
图3C为展示图3B中所展示的相同阶段处的第一结合垫124a、第三结合垫130及再分布网络248的导电迹线252的一种可能布局的半导体装置240的俯视平面图。第一结合垫124a可具有提供用于线结合或形成其它电连接的合适的平台表面及间隔的第一表面面积A1及第一间距P1。特定来说，表面面积A1及第一间距P1可经选择以间隔第一结合垫124a使其彼此远离以防止连接到第一结合垫124a(未展示)的线结合的电短路。第三结合垫130可具有与第一结合垫124a的第一表面面积A1(如图示)相同的第二表面面积A2，或第二表面面积A2可小于或大于第一表面面积A1。类似地，第三结合垫130可具有大体上相同于、小于或大于第一结合垫124a的第一间距P1的第二间距P2。在一些实施例中，因为穿过封装互连128(图2)不需要用于线结合的平台表面(例如，不同于提供线结合位置时的第一结合垫124a)，所以可实现第三结合垫130的更小第二表面面积A2及/或更小第二间距P2。举例来说，在一些实施例中，在个别半导体装置封装102之间可使用各向异性导电材料替代焊料球106(图2)。而且，在一些实施例中，第三结合垫130中的一些或全部可具有经选择以界定互连128的形状的形状，例如，圆形、椭圆形、三角形或其它合适的形状。举例来说，图3C以虚线展示可为第三结合垫130的正方形形状的替代形状的圆形形状230。
图3D展示在第三结合垫130上形成穿过封装互连128之后的半导体装置240。个别互连128可为柱、支座结构或突出远离第一半导体裸片108a的表面132的另一合适的导电特征。在一些实施例中，穿过封装互连128及第三结合垫130可包含相同材料及/或可在相同过程期间形成。因此，在某些实施例中，个别互连128及结合垫130可为同质结构。个别互连128及个别结合垫130可在钝化材料再分布网络248的表面252(或表面132)上方一起具有经选择以穿过壳体126的囊封(图2)的突出高度t2。突出高度t2也可经选择使得个别互连延伸超过在第一结合垫124a处形成且突出远离第一裸片108a的线结合的拱形的高度。在一些实施例中，突出高度t2大于50μm。在其它实施例中，突出高度t2大于100μm。
个别互连128包含接触表面254及横向于接触表面254的侧壁256。接触表面254大体上可为平面的，以提供用于与其它半导体装置或导电特征的焊接连接的合适表面。此外，接触表面254可与第一半导体裸片108a的作用表面132及/或钝化材料250的外表面252共面。接触表面254可具有由个别第三结合垫130的第二表面面积A2(图3C)界定的表面面积(图3D中不可见)。
如图3D中所展示，个别互连128的侧壁256实质上可为垂直的或笔直的以防止在模制过程期间形成微空隙。举例来说，弯曲的或形成底切区域的侧壁可产生未填充有囊封剂的局部化空气凹穴或空隙。此外，底切区域可限制个别互连128与第三结合垫130之间的接触表面的大小。因此，流动囊封剂潜在地可导致具有底切区域(及小接触表面)的互连(尤其在高压及/或高流动模制过程期间)从结合垫断开。在一个实施例中，个别互连具有通过侧壁256及第三结合垫130界定的矩形形状(图3C)。然而，互连128也可具有由笔直侧壁界定的其它形状，例如，分别以图3D的插入物259a及259b展示的圆柱形状257a或截头圆锥形状257b。举例来说，可通过将金属电镀在圆形或椭圆形形状结合垫上而形成圆柱形状257a。此外或或者，可由在无电电镀过程中使用的经图案化的掩模(例如，光致抗蚀剂掩模或硬掩模)的侧壁界定截头圆锥形状。
可通过将金属或其它导电材料沉积到第三结合垫130上而形成穿过封装互连128。沉积材料及技术可包含现有技术中已知的任何种类的材料及技术，例如Au、Cu或其它合适的导电材料的电镀。在一些实施例中，可通过沉积或电镀材料的交替层形成互连。一般来说，我们预期经电镀的金属可将坚固结合提供给个别第三结合垫130。相比之下，归因于机械和热应力，焊料沉积(例如，焊料球)可尤其易受焊料结合失败的影响。因此，我们预期在模制阶段期间经电镀金属比焊料更可能保持完整。此外，我们预期再分布网络248的钝化材料250也可改进穿过封装互连128及第三结合垫130的温度及压力容限。举例来说，经结合金属与硅衬底在热膨胀系数(CTE)上可具有较大差异。因此，我们预期钝化材料250可提供减小高温处理期间分层的可能性的绝缘缓冲器。
一起参考图3E及3F，展示在将第一及第二半导体裸片108a及108b附接到支撑衬底110之后的半导体装置240。如在图3E中所说明，第二半导体裸片108b通过粘合剂材料112附接到支撑衬底110。第二半导体裸片108b的第二结合垫124b使用第二线结合123b线结合到支撑衬底110的衬底结合垫124c。可使用类似于上文参考图3A及3B所描述的过程来形成第二半导体裸片108b，但预期任选地可省略再分布网络。如在图3F中所说明，第一半导体第二裸片108a通过粘合剂材料112附接到第二半导体第二裸片108b。第一结合垫124a使用第一线结合123a线结合到支撑衬底110的衬底结合垫124c。
图3G展示在模制设备260的模穴258中接收半导体装置240之后的半导体装置240。模制设备260具有上模制板262及下模制板264。上模制板262包含模制表面266，所述模制表面266至少部分覆盖有可临时、半永久或永久附接到模制表面266的间隔件材料268。下模制板264包含用于在模制阶段期间将半导体装置240定位及/或固持在上模制板262下方的夹具(未展示)或其它合适结构。
为了清楚的目的，已省略模制设备260的其它特征。举例来说，模制设备260可包含将囊封剂供应到模穴258中的输送泵及注射口、用于在模制阶段期间从模穴258移除多余囊封剂的逸出通道、用于固化囊封剂材料的加热元件，以及用于成形、固化及界定模制形状或图案的其它组件。在所说明的实施例中，模制设备260可同时模制由支撑衬底110承载的多个半导体装置。然而，在其它实施例中，可单独模制半导体装置。此外，在一些实施例中，下模制板264及/或上模制板262可包含用于在囊封剂中模制特征或压痕的图案。所属领域的技术人员将认识到在本发明的各种实施例中可使用许多不同类型的模制板及设备。合适的模制设备及装备可从(例如)日本京都Towa Corp.、日本福冈Asahi Engineering Co.,Ltd.及荷兰德伊芬BE Semiconductor Industries N.V.(Besi)购得(仅举几例)。
图3H展示在模制阶段期间的半导体装置240，在所述模制阶段中，囊封剂270流动到模穴258中。模制设备260的上及下模制板262及264压缩囊封剂270以分布囊封剂。可按压上及下模制板262及264中的至少一者以驱走囊封剂270的部分，如由箭头F所展示。可在溢流腔(未展示)中俘获多余囊封剂。在一些实施例中，可将囊封剂270加热到高于室温的温度以降低囊封剂270的粘性且增大模穴258中的流体流动速率及/或压力。
图3I展示发生在图3H的模制阶段之后的模制阶段期间的半导体装置240。已使模制设备260的上板及下板262及264更靠近在一起以驱走囊封剂270的额外部分，如由箭头G所展示。如所说明，暴露穿过封装互连128的第一部分128a(也参见图2)。特定来说，已将互连128的第一部分128a驱动通过囊封剂270且驱动到间隔件材料268中，使得个别互连128的第一部分128a突出超过囊封剂的外表面272。图3I的模制阶段的压缩可施加足够压力以确保囊封剂270充分覆盖半导体装置240但不会覆盖个别互连128的接触表面254。
间隔件材料268可包含将囊封剂270与上模制板262的模制表面266分离的薄膜、薄片或其它合适的柔性材料。间隔件材料268可经设计以经受住某些处理化学物及温度范围。而且，间隔件材料268可为抗刺穿的，使得穿过封装互连128实质上由间隔件材料268吸收但不会接触及损害上模制板262的模制表面266。此外，且如上文参考图3D所论述，穿过封装互连128可经形成使得互连128在不刺穿间隔件材料的情况下由间隔件材料268容易地吸收。举例来说，互连128的接触表面254可跨越间隔件材料268均匀分布压力。在一个实施例中，间隔件材料268可为脱模薄膜(例如，聚四氟乙烯(PTFE)薄膜)。所述脱模薄膜可为保护上模制板262的模制表面266且防止与囊封剂及其它污染物直接接触的一次性薄膜。
在一些实施例中，间隔件材料268可最初形成于囊封剂270的表面上而不是上模制板262的模制表面266上。举例来说，间隔件材料268可在压缩上及下模制板262及264之前形成于囊封剂270的外表面272上。而且，在其它实施例中，间隔件材料268可为从上模制板262的模制表面266更易于释放但保持附接到围封半导体装置240的囊封剂的材料。在此配置中，间隔件材料268可在后续处理期间保护穿过封装互连128的经暴露的第一部分128a。可在于互连128的经暴露的部分128a处形成电连接之前移除间隔件材料268。
图3J展示通过固化及/或冷却囊封剂270且单一化个别半导体装置240而形成壳体126之后的半导体装置240。单一化可包含用于将半导体装置240与其它装置隔离的用刀、用锯或激光切割方法及其它合适的方法。制造单一化半导体装置240可继续到其它制造阶段(例如，装置测试或组装)。举例来说，可在后续阶段(例如，包含将半导体装置240并入到图2的半导体装置组合件100中的阶段)将助焊剂施加在穿过封装互连128的接触表面254处。
图4为用于制造根据本技术的所选择的实施例而配置的半导体装置组合件的方法280的流程图。可(例如)使用上文参考图3A到3J描述的过程中的任一者来执行方法280。方法280包含使用第一材料至少部分囊封半导体装置及附接到半导体装置的特征(框282)。框282可对应于(例如)图3H的模制阶段，图3H展示囊封剂270覆盖半导体装置240及互连128。在此实施例中，第一材料可包含囊封剂270且特征可包含个别互连180的经电镀的材料。
方法280进一步包含形成覆盖第一材料的外表面的第二材料(框284)。框284可对应于(例如)图3G及3H，图3G及3H展示模制设备260的模穴中的间隔件材料268及形成于囊封剂270的外表面272上的间隔件材料268(图3H)。在此实施例中，第二材料可包含间隔件材料268。
方法280进一步包含使第二材料与特征的至少部分接触使得特征延伸通过第一材料(框286)。框286可对应于(例如)图3I，图3I展示被按压通过囊封剂270且到间隔件材料268中的个别互连128。举例来说，上模制板260可朝向半导体装置240移动以使间隔件材料268与个别互连128的第一部分128a接触(图2)。此外或或者，半导体装置240可朝向上模制板264移动使得个别互连128被按压通过囊封剂270且接触间隔件材料268。举例来说，下模制板266或另一合适的机械结构(例如，压机或机械钳)可朝向上板264移动半导体装置240。
上文参考图2到3J描述的具有特征的半导体装置中的任一者可并入到无数更大及/或更复杂的系统的任一者中，所述系统的代表实例为图5中示意性展示的系统390。系统390可包含处理器392、存储器394(例如，SRAM、DRAM、快闪存储器及/或其它存储器裝置)、输入/输出装置396，及/或其它子系统或组件398。图5中所展示的元件中的任一者可包含上文参考图2到3J描述的半导体组合件、装置及装置封装。所得系统390可经配置以执行广泛种类的合适的计算、处理、存储、感测、成像及/或其它功能中的任一者。因此，系统390的代表实例包含(不限于)计算机及/或其它数据处理器，例如台式计算机、膝上型计算机、因特网器具、手持式装置(例如，掌上型计算机、可佩戴计算机、蜂窝式或移动电话、个人数字助理、音乐播放器等等)、平板计算机、多处理器系统、基于处理器的或可编程的消费型电子产品、网络计算机及小型计算机。系统390的额外代表实例包含灯、相机、车辆等等。考虑这些及其它实例，系统390可(例如)通过通信网络装纳于单个单元中或分布在多个互连单元上。因此，系统390的组件可包含本地及/或远程存储器存储装置及广泛种类的合适的计算机可读媒体的任一者。
不希望本发明为详尽的或将本技术限于本文中所揭示的精确形式。尽管本文为说明性目的揭示特定实施例，但所属领域的技术人员将认识到，在不脱离本技术的情况下的各种等效修改为可能的。在一些情况下，未详细展示或描述众所周知的结构及功能以避免不必要地模糊本技术的实施例的描述。虽然本文中以特定顺序呈现方法的步骤，但替代实施例可以不同的顺序执行步骤。类似地，在其它实施例中，可组合或排除在特定实施例的上下文中所揭示的本技术的某些方面。此外，尽管可能已在那些实施例的上下文中揭示与本技术的某些实施例相关联的优点，但其它实施例也可展现此类优点且并非所有实施例必须展现此类优点或本文中所揭示的其它优点以落入本技术的范围内。因此，本发明及相关技术可涵盖本文中未明确展示或描述的其它实施例。
贯穿本发明，单数术语“一”、“一个”及“所述”包含复数个参考物，除非上下文另有清楚指示。类似地，除非单词“或”明确限于表示排除相对于具有两个或两个以上项目的列表中的其它项目的仅单个项目，则此列表中使用“或”应解释为包含(a)列表中的任何单个项目、(b)列表中的所有项目或(c)列表中的项目的任何组合。此外，贯穿全文，术语“包括”用以表示包含至少所列举的特征使得不会排除相同特征的任何更大数目及/或其它特征的额外类型。本文中可使用方向性术语(例如，“上”、“下”、“前”、“后”、“垂直”及“水平”)来表达及阐明各种元件之间的关系。应了解此类术语不指示绝对定向。本文中参考“一个实施例”、“实施例”或类似陈述表示本技术的至少一个实施例中可包含结合实施例描述的特定特征、结构、操作或特性。因此，本文中出现的此类短语或陈述不一定全部指代相同实施例。此外，各种特定特征、结构、操作或特性可以任何合适的方式组合在一或多个实施例中。

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1.一种用于制造半导体装置组合件的方法，其包括：
在囊封剂上形成间隔件材料，其中所述囊封剂将所述间隔件材料与半导体装置的作用表面及突出远离所述作用表面的至少一个互连分离；及
模制所述囊封剂，使得所述互连的至少部分延伸通过所述囊封剂且延伸到所述间隔件材料中，其中所述互连包含与所述半导体装置的所述作用表面实质上共面的大体上平面表面。
2.根据权利要求1所述的方法，其进一步包括：
在所述半导体装置的所述作用表面与所述囊封剂之间形成钝化材料；及
其中形成所述互连，
包含在所述钝化材料上形成结合垫；及
在所述结合垫上电镀导电材料。
3.根据权利要求2所述的方法，其中在所述结合垫上电镀所述导电材料包括形成具有大于所述间隔件材料与所述钝化材料之间的所述囊封剂的厚度的突出高度的导电柱。
4.根据权利要求2所述的方法，其进一步包括：
在所述钝化材料上形成再分布网络，其中所述再分布网络包含所述结合垫及耦合到所述结合垫的至少一个导电迹线；及
形成经由所述再分布网络的所述导电迹线电耦合到所述结合垫的线结合。
5.根据权利要求1所述的方法，其中所述半导体装置的所述作用表面包括结合垫，且其中所述方法进一步包括通过将导电材料电镀在所述结合垫上而形成所述互连。
6.根据权利要求1所述的方法，其中模制所述囊封剂包括形成使用所述囊封剂至少部分囊封所述半导体装置的壳体。
7.根据权利要求1所述的方法，其中所述半导体装置包括具有包含所述半导体装置的所述作用表面的作用表面的第一半导体裸片，且其中所述方法进一步包括：
将第二半导体裸片附接到支撑衬底；
将所述第一半导体裸片附接到所述第二半导体裸片；及
将所述第一半导体裸片的所述作用表面处的一或多个第一结合垫线结合到所述支撑衬底处的一或多个第二结合垫。
8.根据权利要求1所述的方法，其中所述半导体装置及所述囊封剂形成第一半导体装置封装的至少部分，且其中所述方法进一步包括：
将第二半导体装置封装附接到所述第一半导体装置封装，其中所述第二半导体装置封装包含经由延伸通过所述囊封剂的所述互连的所述部分电耦合到所述第一装置封装的接触件。
9.根据权利要求8所述的方法，其中延伸通过所述囊封剂的所述互连的所述部分包括第一互连，且其中将所述第二半导体装置封装附接到所述第一半导体装置封装包括在所述第一互连处形成第二互连，其中所述第二互连配合在由所述第一半导体装置封装界定的平面形状内。
10.根据权利要求8所述的方法，其中将所述第二半导体装置封装附接到所述第一半导体装置封装包括在延伸通过所述囊封剂的所述互连的所述部分处形成焊料球。
11.根据权利要求8所述的方法，其进一步包括在所述第一半导体装置封装的所述半导体装置的所述作用表面处形成再分布网络，其中所述互连电耦合所述第二半导体装置与所述再分布网络。
12.根据权利要求8所述的方法，其中所述第一半导体装置封装的所述半导体装置包括具有包含所述半导体装置的所述作用表面的作用表面的半导体裸片，且其中所述方法进一步包括：
在所述第一半导体装置封装的所述半导体裸片的所述作用表面处形成再分布网络，其中所述再分布网络包含所述互连，且其中所述互连在所述第二半导体装置与所述第一半导体装置封装的所述半导体裸片之间不提供电耦合的情况下将所述第二半导体装置电耦合到所述再分布网络。
13.一种制造半导体装置封装的方法，所述方法包括：
在模穴中接收半导体装置，其中所述半导体装置在所述半导体装置的作用表面处包含导电特征，其中所述导电特征具有接触表面及笔直侧壁，所述笔直侧壁横向于所述接触表面且突出远离所述半导体装置的所述作用表面一距离；
在所述模穴中的模制表面与所述半导体装置的所述作用表面之间安置间隔件；
在所述模穴中使囊封剂流动；及
使所述模制表面及所述半导体装置的所述作用表面朝向彼此移动以使所述间隔件与所述导电特征的至少部分接触。
14.根据权利要求13所述的方法，其中使所述囊封剂流动包括在所述模穴中注射所述囊封剂。
15.根据权利要求13所述的方法，其中安置所述间隔件包括在所述模穴中的所述模制表面上安置间隔件材料。
16.根据权利要求13所述的方法，其中安置所述间隔件包括在模具的所述模制表面上层压间隔件材料。
17.根据权利要求13所述方法，其中所述囊封剂在所述模穴的所述模制表面与所述半导体装置的所述作用表面之间，且其中安置所述间隔件包括在所述囊封剂的作用表面上安置间隔件材料。
18.根据权利要求13所述的方法，其中将所述模制表面及所述半导体装置的所述作用表面朝向彼此进行按压包括将模制设备的板及所述半导体装置的所述作用表面朝向彼此进行按压。
19.一种制造半导体装置组合件的方法，其包括：
使用第一材料至少部分囊封半导体装置及附接到所述半导体装置的特征，其中所述特征包含经电镀材料；
形成覆盖所述第一材料的外表面的第二材料；及
使所述第二材料与所述特征的至少部分接触。
20.根据权利要求19所述的方法，其中使所述第二材料与所述特征的所述部分接触包括按压所述特征的所述部分使其通过所述第一材料且使所述特征的所述部分穿透到所述第二材料中。
21.根据权利要求19所述的方法，其进一步包括：
形成包含所述半导体装置、所述特征及所述第一材料的至少部分的半导体装置封装；及
经由所述特征与所述半导体装置封装形成电连接。
22.根据权利要求19所述的方法，其进一步包括通过包含在所述半导体裸片的表面处形成导电支座结构的一或多个过程形成所述特征。
23.一种半导体装置组合件，其包括：
囊封剂，其包含外表面；
半导体装置，其至少部分被围封在所述囊封剂内且具有作用表面；及
至少一个互连，其附接到所述半导体装置的所述作用表面，其中所述互连的至少部分延伸超过所述囊封剂的所述外表面，且其中所述互连的所述部分包含电连接到所述半导体装置的所述作用表面的接触表面。
24.根据权利要求23所述的半导体装置组合件，其进一步包括间隔件材料，所述间隔件材料覆盖所述囊封剂的所述外表面及所述互连的所述部分的所述接触表面。
25.根据权利要求23所述的半导体装置组合件，其进一步包括：
结合垫，其在所述半导体装置的所述作用表面处，
其中所述互连包括附接到所述结合垫的导电柱。
26.根据权利要求25所述的半导体装置组合件，其中所述导电柱具有实质上笔直侧壁。
27.根据权利要求25所述的半导体装置组合件，其中所述导电柱具有圆柱形状。
28.根据权利要求25所述的半导体装置组合件，其中所述导电柱具有截头圆锥形状。
29.根据权利要求25所述的半导体装置组合件，其进一步包括：
再分布网络，其在所述半导体装置的所述作用表面处，其中所述再分布网络电耦合到所述结合垫；及
至少一个线结合，其电耦合到所述再分布网络。
30.根据权利要求25所述的半导体装置组合件，其中所述半导体装置的所述作用表面进一步包括第一作用表面，且其中所述半导体装置进一步包括半导体裸片，所述半导体裸片具有包含所述半导体装置的所述第一作用表面的第二作用表面，且其中所述半导体装置组合件进一步包括：
支撑衬底；
至少一个线结合，其将所述半导体裸片的所述第二作用表面耦合到所述支撑衬底处的结合垫。
31.根据权利要求30所述的半导体装置组合件，其中所述半导体裸片进一步包括第一半导体裸片，且其中所述半导体装置组合件在所述第一半导体裸片与所述支撑衬底之间进一步包括第二半导体裸片。
32.根据权利要求30所述的半导体装置组合件，其中所述半导体裸片及所述囊封剂形成第一半导体装置封装的至少部分，且其中所述半导体装置组合件进一步包括附接到所述第一半导体装置封装的第二半导体装置封装，其中所述第二半导体装置封装经由延伸超过所述囊封剂的所述第一表面的所述互连的所述部分电耦合到所述第一装置封装。
33.根据权利要求32所述的半导体装置组合件，其中延伸超过所述囊封剂的所述第一表面的所述互连的所述部分包括第一互连，且其中所述半导体装置组合件进一步包括与由所述第一半导体装置封装界定的平面形状配合的第二互连。
34.根据权利要求32所述的方法，其进一步包括所述第一半导体装置封装与所述第二半导体装置封装之间的焊料球及延伸超过所述囊封剂的所述第一表面的所述互连的所述部分。
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