CN104684240A - Circuit board and circuit board manufacturing method - Google Patents

Abstract

The invention relates to a circuit board, which comprises a substrate, a first conductive line layer, a second conductive line layer, a first covering film and solder resist ink, wherein the first conductive line layer and the second conductive line layer are arranged at two opposite sides of the substrate; the second conductive line layer is provided with a connection area; the connection area is internally distributed with multiple electrical contact pads; the first conductive line layer comprises multiple first conductive lines; multiple gaps exist between the first conductive line layer and the first conductive lines in the region corresponding to the connection area; the first covering film covers the first conductive line layer; the region in the connection area corresponding to the first covering film is provided with multiple openings; the first openings and the gaps are in one-to-one correspondence so as to enable corresponding gaps to be exposed; and the solder resist ink fills the multiple first openings and the multiple gaps. The invention also relates to a circuit board manufacturing method.

Description

Circuit board and circuit board manufacturing method

technical field

The invention relates to circuit board manufacturing technology, in particular to a circuit board and a circuit board manufacturing method.

Background technique

With the gradual thinning of electronic products, the application of mounting chips directly on circuit boards is gradually increasing. Usually there is a gap between the conductive lines on the opposite side of the electrical contact pads used for wire bonding, which is easy to cause a gap when the cover film is pressed, so that part of the electrical connection pads are sunken after pressing, so that when punching When the chip is mounted with a wire, a disconnection occurs at the recess, which affects the electrical connection between the chip and the circuit board.

Contents of the invention

In view of this, it is necessary to provide a circuit board and a method for manufacturing the circuit board.

A circuit board, comprising a base, a first conductive circuit layer, a second conductive circuit layer, a first covering film and solder resist ink. The first conductive circuit layer and the second conductive circuit layer are formed on opposite sides of the base. The first conductive circuit layer includes a plurality of first conductive circuits. The second conductive circuit layer has a connection area. A plurality of electrical contact pads are distributed in the connection area. There are multiple gaps between the first conductive circuit layer and the first conductive circuit in the area corresponding to the connection area. The first covering film covers the first conductive circuit layer. There are a plurality of first openings in a region of the first covering film corresponding to the connecting region. The first openings are in one-to-one correspondence with the gaps to expose the corresponding gaps. The solder resist ink fills the first openings and the gaps.

A method for manufacturing a circuit board, comprising the steps of: providing a substrate, including a base, a first copper foil layer, and a second copper foil layer, the first copper foil layer and the second copper foil layer being located on opposite sides of the base ;

The first copper foil layer is manufactured to form a first conductive circuit layer, the first conductive circuit layer includes a plurality of first conductive circuits, and the second copper foil layer is manufactured to form a second conductive circuit layer, the first conductive circuit layer The second conductive circuit layer has a connection area, and a plurality of electrical contact pads are distributed in the connection area, and there are multiple gaps between the first conductive circuit layer and the first conductive circuit in the corresponding area of the connection area; The first conductive circuit layer is laminated with a first cover film, the first cover film has a plurality of first openings, and the first openings are in one-to-one correspondence with the gaps to expose the corresponding gaps; and

Filling the plurality of first openings and corresponding spaces exposed from the plurality of first openings with solder resist ink to obtain the circuit board.

Compared with the prior art, in the circuit board and circuit board manufacturing method provided by this technical solution, a plurality of first openings are opened in the area corresponding to the connection area of the first covering film. A space between the wires in the region corresponding to the first conductive circuit layer and the connection area is exposed from the first opening. The first opening and the gap exposed from the first opening are filled with solder resist ink, which avoids the occurrence of gaps, makes the electrical connection pads after pressing are in the same horizontal plane, and reduces the risk of subsequent wire bonding to connect chips. There is a possibility of disconnection.

Description of drawings

FIG. 1 is a schematic cross-sectional view of a circuit board provided by an embodiment of the present invention.

FIG. 2 is a schematic cross-sectional view of a substrate provided by an embodiment of the present invention.

FIG. 3 is a schematic cross-sectional view after forming conductive holes in the thickness direction of the substrate in FIG. 2 .

FIG. 4 is a schematic cross-sectional view after the first copper foil layer in FIG. 3 is fabricated to form a first conductive circuit layer, and the second copper foil layer is fabricated to form a second conductive circuit layer.

FIG. 5 is a schematic cross-sectional view of laminating a first cover film on the surface of the first conductive circuit layer in FIG. 4 and laminating a second cover film on the surface of the second conductive circuit layer.

Description of main component symbols

circuit board 100 base 110 first adhesive layer 120 Second adhesive layer 130 first conductive circuit layer 140 second conductive line layer 150 first cover film 160 Second cover film 170 Solder Resist Ink 180 conductive hole 111 first conductive line 141 gap 142 connection area 151 surrounding area 152 electrical contact pad 1511 second conductive line 1521 first opening 161 first electrical connection pad 143 second opening 162 third opening 171 second electrical connection pad 153 Substrate 10 first copper foil layer 14 Second Copper Foil Layer 15

The following specific embodiments will further illustrate the present invention in conjunction with the above-mentioned drawings.

Detailed ways

The circuit board and the manufacturing method of the circuit board provided by the technical solution will be further described in detail below in conjunction with the accompanying drawings and embodiments.

Please refer to FIG. 1, the circuit board 100 provided by this technical solution includes a substrate 110, a first adhesive layer 120, a second adhesive layer 130, a first conductive circuit layer 140, a second conductive circuit layer 150, a first cover film 160, a second Two cover films 170 and solder resist inks 180 .

The base 110 includes a dielectric layer and an inner conductive circuit layer. The number of the dielectric layers is at least one. The number of the inner conductive circuit layer is one less than the number of the dielectric layer. The dielectric layer is spaced apart from the inner conductive circuit layer. Adjacent inner conductive circuit layers are electrically connected through conductive holes in the dielectric layer between the adjacent inner conductive circuit layers. In this embodiment, the number of the dielectric layer is one, that is, the substrate 110 only includes a dielectric layer. The dielectric layer can be made of polyimide (PI) material with good flexibility, fatigue resistance, wear resistance, heat resistance and other properties. A plurality of conductive holes 111 are formed in the dielectric layer. The conductive hole 111 can be a conductive through hole or a conductive blind hole. In this embodiment, the conductive hole 111 is a conductive through hole. The conductive hole 111 penetrates through the dielectric layer in the thickness direction.

The first adhesive layer 120 and the second adhesive layer 130 are respectively located on opposite sides of the base 110 . The conductive hole 111 also penetrates the first adhesive layer 120 and the second adhesive layer 130 in the thickness direction.

The first conductive circuit layer 140 is formed on a side of the first adhesive layer 120 away from the base 110 . The second conductive circuit layer 150 is formed on a side of the second adhesive layer 130 away from the base 110 . The first conductive circuit layer 140 is electrically connected to the second conductive circuit layer 150 through the conductive hole 111 . The second conductive circuit layer 150 includes a connection area 151 and a peripheral area 152 surrounding the connection area 151 . A plurality of electrical contact pads 1511 are distributed in the connection area 151 for wire bonding to connect chips. Part of the second adhesive layer 130 is exposed from the gaps between the plurality of electrical contact pads 1511 . The peripheral area 152 includes a plurality of second conductive lines 1521 . The first conductive circuit layer 140 includes a plurality of first conductive circuits 141 . A plurality of gaps 142 exist between the plurality of first conductive circuits 141 in the region corresponding to the first conductive circuit layer 140 and the connection area 151 , and part of the first adhesive layer 120 is exposed from the plurality of gaps 142 .

The first cover film 160 covers the first conductive circuit layer 140 and the first adhesive layer 120 exposed from the first conductive circuit layer 140 . A region of the first covering film 160 corresponding to the connecting region 151 has a plurality of first openings 161 . The first openings 161 correspond to the gaps 142 one by one, exposing the corresponding gaps 142 . The first covering film 160 also includes a plurality of second openings 162 . The second opening 162 is located in at least one of the region corresponding to the first conductive circuit layer 140 and the peripheral region 152 or the region corresponding to the first conductive circuit layer 140 and the connection region 151 . Part of the first conductive circuit layer 140 is exposed from the second opening 162 to form a first electrical connection pad 143 .

The second covering film 170 covers the second conductive circuit 1521 of the peripheral region 152 and the second adhesive layer 130 exposed from the second conductive circuit 1521 . The second covering film 170 has a plurality of third openings 171 , exposing part of the second conductive circuit layer 150 to form a plurality of second electrical connection pads 153 .

The solder resist ink 180 fills up the plurality of first openings 161 and the corresponding voids 142 exposed from the plurality of first openings 161 .

The technical solution also provides a manufacturing method of the circuit board 100, including steps:

The first step, referring to FIG. 2 , is to provide a substrate 10 including a base 110 , a first adhesive layer 120 , a second adhesive layer 130 , a first copper foil layer 14 , and a second copper foil layer 15 . The first adhesive layer 120 and the second adhesive layer 130 are located on opposite sides of the base 110 . The first copper foil layer 14 is located on a side of the first adhesive layer 120 away from the substrate 110 . The second copper foil layer 15 is located on a side of the second adhesive layer 130 away from the substrate 110 .

The base 110 includes a dielectric layer and an inner conductive circuit layer. The number of the dielectric layer is at least one. The number of the inner conductive circuit layer is one less than the number of the dielectric layer. The dielectric layer is spaced apart from the inner conductive circuit layer. Adjacent inner conductive circuit layers are electrically connected through conductive holes in the dielectric layer between the adjacent inner conductive circuit layers. In this embodiment, the number of the dielectric layer is one, that is, the substrate 110 only includes a dielectric layer. The dielectric layer can be made of polyimide (PI) material with good flexibility, fatigue resistance, wear resistance, heat resistance and other properties.

The second step, referring to FIG. 3 , is to make a plurality of conductive holes 111 on the substrate 10 , and the thickness direction of each conductive hole 111 runs through the first copper foil layer 14 , the first adhesive layer 120 , and the substrate 110 , the second adhesive layer 130 and the second copper foil layer 15 . The formation of the conductive hole 111 includes the following steps:

First, through mechanical drilling or laser ablation, a plurality of through holes are formed;

Then, a layer of copper is formed on the wall of the through hole by chemical deposition or electroplating, and the first copper foil layer 14 and the second copper foil layer 15 are electrically connected to obtain the conductive hole 111 .

The third step, please refer to FIG. 4 , selectively removes part of the first copper foil layer 14 to form the first conductive circuit layer 140 ; selectively removes part of the second copper foil layer 15 to form the second conductive circuit layer 150 . The first conductive circuit layer 140 is electrically connected to the second conductive circuit layer 150 through the conductive hole 111 . Both the first conductive circuit layer 140 and the second conductive circuit layer 150 can be formed by image transfer and etching.

The second conductive circuit layer 150 includes a connection region 151 and a peripheral region 152 surrounding the connection region 151 (the connection region 151 and the peripheral region 152 are separated by a dotted line in FIGS. 1 , 4 and 5 ). A plurality of electrical contact pads 1511 are distributed in the connection area 151 for wire bonding to connect chips. The peripheral area 152 includes a plurality of second conductive lines 1521 . The first conductive circuit layer 140 includes a plurality of first conductive circuits 141 . There are a plurality of gaps 142 between the first conductive circuit layer 140 and the plurality of first conductive circuits 141 in corresponding regions of the connection area 151 . Part of the first adhesive layer 120 is exposed from the plurality of gaps 142 .

In the fourth step, please refer to FIG. 5 , lamination of a first covering film 160 on the first conductive circuit layer 140 ; lamination of a second covering film 170 on the second conductive circuit layer 150 .

The first cover film 160 covers the first conductive circuit layer 140 and the first adhesive layer 120 exposed from the first conductive circuit layer 140 . A region of the first covering film 160 corresponding to the connecting region 151 has a plurality of first openings 161 . The first openings 161 correspond to the gaps 142 one by one. The gap 142 is exposed from the corresponding first opening 161 . The first covering film 160 also has a plurality of second openings 162 exposing a portion of the first conductive circuit layer 140 to form a plurality of first electrical connection pads 143 . The second covering film 170 covers the second conductive circuit 1521 of the peripheral region 152 and the second adhesive layer 130 exposed from the second conductive circuit 1521 . The second covering film 170 has a plurality of third openings 171 , exposing part of the second conductive circuit layer 150 to form a plurality of second electrical connection pads 153 .

In the fifth step, the solder resist ink 180 is filled in the plurality of first openings 161 and the corresponding gaps 142 exposed from the plurality of first openings 161 to obtain the circuit board 100 as shown in FIG. 1 .

It can be understood that, after the plurality of first openings 161 and the corresponding gaps 142 exposed from the plurality of first openings 161 are filled with solder resist ink 180, it also includes baking the circuit board 100, A step of curing the solder resist ink 180 .

It can be understood that, after the solder resist ink 180 is baked and cured, a step of performing surface treatment on the first electrical connection pad 143 , the second electrical connection pad 153 and the electrical contact pad 1511 is also included.

It can be understood that the circuit board 100 can also be made of an adhesive-free substrate. At this time, when performing the first step of the step, a substrate is provided, and the substrate includes a base, a first copper foil layer and a second copper foil layer. foil layer. The first copper foil layer and the second copper foil layer are respectively located on opposite sides of the base.

In the circuit board and the circuit board manufacturing method provided by the technical solution, a plurality of second openings are opened in the area corresponding to the connection area of the second covering film. The gap between the wires in the area corresponding to the second conductive circuit layer and the connection area is exposed from the second opening. The second opening and the gap exposed from the second opening are filled with solder resist ink, which avoids the generation of gaps, makes the electrical connection pads after pressing are in the same horizontal plane, and reduces the risk of subsequent wire bonding to connect chips. There is a possibility of disconnection.

It can be understood that those skilled in the art can make various other corresponding changes and modifications according to the technical concept of the present invention, and all these changes and modifications should belong to the protection scope of the claims of the present invention.

Claims (10)

1. a circuit board, it comprises substrate, first conductive circuit layer, second conductive circuit layer, first coverlay and anti-solder ink, described first conductive circuit layer and the second conductive circuit layer are formed at the relative both sides of described substrate, described second conductive circuit layer has bonding pad, multiple electric contact mat is distributed with in described bonding pad, described first conductive circuit layer comprises many first conducting wires, multiple space is there is between many first conducting wires in the region that described first conductive circuit layer is corresponding with described bonding pad, described first coverlay covers described first conductive circuit layer, described first coverlay has multiple first opening corresponding in the region of described bonding pad, described multiple first opening and described multiple spaces one_to_one corresponding, to expose respective voids, described anti-solder ink fills up described multiple first opening and described multiple space.

2. circuit board as claimed in claim 1, it is characterized in that, described circuit board also comprises the first glue-line and the second glue-line, described first glue-line is between described first conductive circuit layer and substrate, described second glue-line is between described second conductive circuit layer and substrate, and described first glue-line exposes from described space.

3. circuit board as claimed in claim 2, it is characterized in that, described substrate has multiple conductive hole, and each described conductive hole all runs through the first glue-line, the second glue-line and substrate in described substrate thickness direction, and described first conductive circuit layer and the second conductive circuit layer are electrically connected by described conductive hole.

4. circuit board as claimed in claim 1, it is characterized in that, described first coverlay also has multiple second opening, and the first conductive circuit layer described in exposed portion forms multiple first electric connection pad.

5. circuit board as claimed in claim 1, it is characterized in that, described circuit board also comprises the second coverlay, described second conductive circuit layer also has surrounding zone, described surrounding zone is around described bonding pad, described surrounding zone comprises many second conducting wires, and described second coverlay covers described many second conducting wires and from the second glue-line exposed between described many second conducting wires.

6. circuit board as claimed in claim 5, it is characterized in that, described second coverlay also has multiple 3rd opening, and the second conductive circuit layer described in exposed portion forms multiple second electric connection pad.

7. circuit board as claimed in claim 1, it is characterized in that, described substrate comprises at least one dielectric layer and at least one inner layer conductive line layer, few one of the number of number at least one dielectric layer comparatively described of at least one inner layer conductive line layer described, at least one dielectric layer described and at least one inner layer conductive line layer are spaced.

8. a circuit board manufacturing method, comprises step:

There is provided a substrate, comprise substrate, the first copper foil layer and the second copper foil layer, described first copper foil layer and the second copper foil layer are positioned at the relative both sides of described substrate;

Described first copper foil layer is made formation first conductive circuit layer, described first conductive circuit layer comprises many first conducting wires, described second copper foil layer is made formation second conductive circuit layer, described second conductive circuit layer has bonding pad, distribute in described bonding pad multiple electric contact mat, there is multiple space between many first conducting wires in described first conductive circuit layer and corresponding region, described bonding pad;

At described first conductive circuit layer pressing first coverlay, described first coverlay has multiple first opening, and described first is opened on described space one_to_one corresponding, to expose respective voids; And

Fill up anti-solder ink at described multiple first opening and from the respective voids that described multiple first opening exposes, obtain described circuit board.

9. circuit board manufacturing method as claimed in claim 8, it is characterized in that, described first copper foil layer is being made formation first conductive circuit layer, before described second copper foil layer is made formation second conductive circuit layer, described circuit board manufacturing method is also included in described substrate and forms multiple conductive hole, and each described conductive hole all runs through the step of described substrate at the thickness direction of described substrate.

10. circuit board manufacturing method as claimed in claim 8, it is characterized in that, after filling up anti-solder ink at described multiple first opening and from the respective voids that described multiple first opening exposes, described circuit board manufacturing method also comprises and toasting and surface-treated step described circuit board.