CN103582325B - Circuit board and preparation method thereof - Google Patents

Abstract

A circuit board, comprising a press-bonded substrate and an inner circuit substrate, the inner circuit substrate includes an insulating layer and a conductive circuit layer bonded on the surface of the insulating layer, the conductive circuit layer has an exposed area and a press-bonded area, the surface of the exposed area is provided with a solder resist layer, and a plurality of connection pads in the exposed area are exposed from the solder resist layer, and the laminated substrate includes a bonded film with an opening, a laminated film and a conductive The graphics layer, the adhesive film is formed on the pressing area of the inner circuit substrate, the adhesive film is in contact with the pressing film, and a groove penetrating through the pressing substrate is formed in the multilayer circuit board, and the groove is in contact with the pressing film. Corresponding to the exposed area, the solder resist layer and the connection pads exposed from the solder resist layer are exposed in the groove, and the groove is used for accommodating electronic components. The invention also provides a manufacturing method of the circuit board.

Description

Circuit board and manufacturing method thereof

technical field

The invention relates to the field of circuit board production, in particular to a circuit board with a groove structure and a production method thereof.

Background technique

Printed circuit boards have been widely used due to their advantages such as high assembly density. For the application of the circuit board, please refer to the literature Takahashi, A.Ooki, N.Nagai, A.Akahoshi, H.Mukoh, A.Wajima, M.Res.Lab, Highdensity multilayer printed circuit board for HITAC M-880, IEEE Trans. on Components, Packaging, and Manufacturing Technology, 1992, 15(4): 418-425.

Due to the need for miniaturization of electronic equipment, a groove structure is usually provided in the circuit board, and the packaging groove is used to cooperate with other packaged or plugged electronic components, thereby reducing the space occupied by the entire circuit board package. However, in the prior art, in the process of making the above-mentioned grooves, it is necessary to form corresponding openings in the adhesive layer of the circuit board and then perform steps such as pressing and circuit making. Since an opening is formed in the film corresponding to the groove portion. During the pressing process, it is easy to cause poor bonding between the groove bottom of the groove portion and the pressed conductive layer. In this way, during the circuit manufacturing process, it is easy to cause the liquid medicine to flow into the conductive circuit at the bottom of the groove due to the damage of the outer conductive layer, thereby causing the conductive circuit at the bottom of the groove to be damaged.

Contents of the invention

Therefore, it is necessary to provide a circuit board manufacturing method and the circuit board manufacturing method, which can effectively protect the circuit pattern inside the groove.

A circuit board, comprising a press-bonded substrate and an inner layer circuit substrate, the inner layer circuit substrate includes a base and a conductive circuit layer attached to the surface of the base, the conductive circuit layer has an exposed area and a surrounding connection exposed area The surface of the exposed area is provided with a solder resist layer, and a plurality of connection pads in the exposed area are exposed from the solder resist layer, and the laminated substrate includes a bonded adhesive film, a laminated film and Conductive graphic layer, the bonding film is bonded between the pressing area of the inner circuit substrate and the pressing film, and is bonded with the pressing film bonded to it to form a dielectric layer, the inside of the circuit board There is a groove that only runs through the press-bonded substrate, and the groove corresponds to the exposed area, so that the solder resist layer on the surface of the exposed area and the plurality of connection pads exposed from the solder resist layer are exposed to the exposed area. Among the grooves, the grooves are used to accommodate electronic components.

A method for manufacturing a circuit board, comprising the steps of: providing an inner layer circuit substrate, the circuit substrate comprising an insulating layer and a first conductive circuit layer formed on the surface of the insulating layer, the first conductive circuit layer comprising a first exposed area and Surrounding the first pressing area connecting the first exposed area; setting a first protective film on the first exposed area of the first conductive circuit layer; riveting the first adhesive film on the first conductive circuit layer side of the inner circuit substrate , the first adhesive film has a first opening corresponding to the first exposed area, the first protective film is located in the first opening; a first pressure is formed on one side of the first adhesive film of the inner circuit substrate laminated substrates to obtain a multilayer substrate, the first laminated substrate includes at least one layer of laminated film, at least one layer of conductive pattern layer and the first bonding film, the at least one layer of laminated film, at least one layer The conductive pattern layers are arranged alternately, and the first bonding film is in contact with a laminated film in the first laminated substrate, and bonded with the laminated film in contact with it to form a first dielectric layer; and Cutting the first laminated substrate along the boundary of the first exposed region on the side of the multilayer substrate close to the first laminated substrate to form a ring that only passes through the first laminated substrate and corresponds to the boundary of the first exposed region removing the part of the first laminated substrate surrounded by the first cut, and removing the first protective film, thereby forming a groove corresponding to the first exposed area.

Compared with the prior art, in the circuit board manufacturing method provided by this technical solution, two films are laminated on the surface of the inner conductive circuit layer, and one of the films has an opening corresponding to the exposed area of the inner conductive circuit layer , while the other sheet is not provided with an opening corresponding to the groove. Compared with the method of pressing only one piece of film with a corresponding opening, it can ensure that more flow glue flows between the protective film and the pressed copper foil during pressing, so that it is located in the inner conductive circuit. The copper foil on the exposed area of the layer is tightly bonded to the inner circuit substrate at the corresponding position, and the thickness of the dielectric layer formed by the two films can be guaranteed to meet the requirements, so as to prevent the dielectric The thickness of the layer cannot meet the requirements, causing the liquid to corrode the conductive lines of the inner substrate.

Description of drawings

FIG. 1 is a schematic cross-sectional view of an inner substrate provided by an embodiment of the technical solution.

FIG. 2 is a top view of FIG. 1 .

Fig. 3 is a bottom view of Fig. 1 .

Fig. 4 is a schematic cross-sectional view of the inner layer circuit substrate in Fig. 1 after the first solder resist layer and the first protective film are formed on the side of the first conductive circuit layer, and the second conductive circuit layer is formed with the second solder resist layer and the second protective film .

Fig. 5 is a schematic cross-sectional view of the first adhesive film and the first laminated film provided by the technical solution.

FIG. 6 is a cross-sectional view of the laminate structure formed after the inner substrate of FIG. 4 is riveted with the first bonding film and the first pressing film.

FIG. 7 is a cross-sectional view of the laminate structure in FIG. 6 after pressing the second bonding film and the first copper foil on one side, and pressing the second bonding film and the second copper foil on the other side.

Fig. 8 is a cross-sectional view of the multilayer substrate obtained after the first copper foil is fabricated to form the first conductive pattern layer and the second copper foil is fabricated to form the second conductive circuit layer in Fig. 7 .

FIG. 9 is a cross-sectional view of the third solder resist layer formed on the first conductive pattern layer and the fourth solder resist layer formed on the second conductive pattern layer in FIG. 8 .

FIG. 10 is a cross-sectional view of the multilayer substrate of FIG. 9 after forming a first cutout and a second cutout.

FIG. 11 is a cross-sectional view of the multilayer circuit board obtained by removing the material surrounded by the first cutout in FIG. 10 to form a first groove, and removing the material surrounded by the second cutout to form a second groove.

Description of main component symbols

circuit board 100

Rivets 101

first cut 102

First Groove 103

Second cut 104

Second groove 105

Inner circuit substrate 110

Laminated structure 110a

multilayer substrate 110b

The first press-bonded substrate 110c

Second laminated substrate 110d

First alignment hole 1100

The first conductive circuit layer 111

Conductive hole structure 1101

First conductive line 1111

First connection pad 1112

First Exposure Area 1113

The first nip zone 1114

Second conductive line layer 112

Second conductive line 1121

Second connection pad 1122

Second Exposure Zone 1123

Second nip zone 1124

base 113

First solder mask layer 114

First through hole 1141

First Protective Film 115

Second solder mask layer 116

Second through hole 1161

Second protective film 117

first dielectric layer 130

First conductive blind via 131

second dielectric layer 140

Second conductive blind via 141

The first conductive pattern layer 150

The second conductive pattern layer 160

Third solder mask layer 170

The fourth solder mask layer 180

Conductive vias 190

First bond film 20

first opening 21

Second alignment hole 22

Second bonding film 30

Second opening 31

Third alignment hole 32

The first copper foil 41

Second copper foil 42

First lamination film 51

Second lamination film 52

The following specific embodiments will further illustrate the present invention in conjunction with the above-mentioned drawings.

detailed description

The circuit board manufacturing method provided by the technical solution includes the following steps:

The first step, please refer to FIG. 1 to FIG. 3 together, provides an inner layer circuit substrate 110 .

The inner circuit substrate 110 includes a base 113 , a first conductive circuit layer 111 and a second conductive circuit layer 112 . The first conductive circuit layer 111 and the second conductive circuit layer 112 are respectively formed on two opposite surfaces of the substrate 113 .

The first conductive circuit layer 111 includes a plurality of first conductive circuits 1111 and a plurality of first connection pads 1112 . The middle area of the first conductive circuit layer 111 is defined as a first exposed area 1113 for making the bottom of the groove of the circuit board having a groove structure. Outside the first exposed area 1113 is the first pressing area 1114 . The first pressing area 1114 surrounds and connects to the first exposed area 1113 . The shape of the first exposed area 1113 can be set according to the shape of the groove of the circuit board to be manufactured actually. In this embodiment, the shape of the first exposed area 1113 is roughly a rectangle. The first connection pad 1112 and part of the first conductive circuit 1111 are disposed in the first exposed area 1113 . The first connection pad 1112 is used to electrically connect the electronic components packaged in the groove of the circuit board, and the first conductive circuit 1111 in the first exposed area 1113 is used to connect the first connection pad 1112 to the outside of the first exposed area 1113. The other first conductive lines 1111 are electrically connected to each other. Of course, those skilled in the art can understand that only one first connection pad 1112 and a few first conductive lines 1111 are shown in FIG. The number, shape and distribution of 1112 are not limited.

The second conductive circuit layer 112 includes a second conductive circuit 1121 and a second connection pad 1122 . The middle portion of the second conductive circuit layer 112 is defined as the second exposed area 1123 for making the bottom of the groove of the circuit board with the groove structure. Outside the second exposed area 1123 is the second pressing area 1124 . The shape of the second exposed area 1123 can be set according to the shape of the groove of the circuit board to be manufactured actually. In this embodiment, the shape of the second exposed area 1123 is roughly a rectangle. The second connection pad 1122 and part of the second conductive circuit 1121 are disposed in the second exposed area 1123 . The second connection pad 1122 is used to electrically connect the electronic components packaged in the groove of the circuit board, and the second conductive circuit 1121 in the second exposed area 1123 is used to connect the second connection pad 1122 to the outside of the second exposed area 1123. The other second conductive lines 1121 are electrically connected to each other. Certainly, the second conductive line 1121 may not be provided in the second exposed area 1123 .

It can be understood that the inner layer circuit substrate 110 may be a multi-layer board or a double-sided circuit board. In this embodiment, the inner circuit substrate 110 is a double-sided circuit board, that is, the base 113 is an insulating layer. A conductive hole structure 1101 is formed in the base 113 of the inner circuit substrate 110 to electrically connect the first conductive circuit layer 111 and the second conductive circuit layer 112 . When the inner circuit substrate 110 is a multilayer circuit board, the base 113 may be a multilayer structure including at least two insulating layers and at least one conductive circuit layer. In the multi-layer structure, the conductive circuit layers can be electrically connected to each other through the conductive holes.

In this embodiment, a plurality of first alignment holes 1100 are opened in the inner circuit substrate 110 , and the plurality of first alignment holes 1100 are through holes penetrating through the inner circuit substrate 110 . The first alignment hole 1100 does not penetrate through the first exposed area 1113 and the second exposed area 1123 .

The second step, please refer to FIG. 4 together, forms a first solder resist layer 114 on the surface of the first conductive circuit 1111 in the first exposed area 1113 to cover the first conductive circuit 1111 in the first exposed area 1113, and The first connection pads 1112 are exposed from the first solder resist layer 114 . And a first protective film 115 covering the entire first exposed area 1113 is formed on the surface of the first solder resist layer 114 and the first connection pad 1112 . The second solder resist layer 116 is formed on the surface of the second conductive circuit 1121 in the second exposed area 1123 to cover the second conductive circuit 1121 in the second exposed area 1123, and the second connection pad 1122 is removed from the second solder resist layer. 116 exposed. And a second protective film 117 covering the entire second exposed area 1123 is formed on the surface of the second solder resist layer 116 and the second connection pad 1122 .

In this embodiment, the first solder resist layer 114 is formed on the surface of the first conductive circuit 1111 corresponding to the first exposed area 1113 and the surface of the substrate 113 exposed through the first conductive circuit layer 111 by screen printing solder resist ink. . The second solder resist layer 116 is formed on the surface of the second conductive circuit 1121 corresponding to the second exposed area 1123 and the surface of the substrate 113 exposed through the second conductive circuit layer 112 . A first through hole 1141 is formed in a region of the first solder resist layer 114 corresponding to the first connection pad 1112 , so that each first connection pad 1112 is exposed from its corresponding first through hole 1141 . A second through hole 1161 is formed in a region of the second solder resist layer 116 corresponding to the second connection pad 1122 , so that each second connection pad 1122 is exposed from its corresponding second through hole 1161 .

When the first exposed area 1113 does not include the first conductive line 1111 , the first solder resist layer 114 may not be formed in the first exposed area 1113 . When the second exposed area 1123 does not include the second conductive line 1121 , the second solder resist layer 116 may not be formed in the second exposed area 1123 .

In this embodiment, in order to enable the formed solder resist layer to better protect the conductive circuit, the area covered by the first solder resist layer 114 is larger than the first exposed area 1113, that is, the first solder resist layer 114 also covers the first exposed area Part of the first nip area 1114 around 1113 . The area covered by the second solder resist layer 116 is larger than the second exposed area 1123 , that is, the second solder resist layer 116 also covers part of the second pressing area 1124 around the second exposed area 1123 .

In this embodiment, the first protective film 115 is formed by printing liquid ink material on the surface of the first solder resist layer 114 and the first connection pad 1112 corresponding to the first exposed area 1113 . The second protective film 117 is formed by printing liquid ink material on the surface of the second solder resist layer 116 and the second connection pad 1122 corresponding to the second exposed area 1123 . The liquid ink material can be thermosetting peelable ink, or developing ink. After the liquid ink material used is solidified, the highest temperature it can withstand should be greater than 200 degrees Celsius, and it can withstand a pressure of 25 kilograms per square centimeter. Moreover, the liquid ink material has good corrosion resistance to acids, alkalis and oxidants after curing.

When thermosetting peelable ink is used, the liquid ink material can be directly printed on the surface of the first solder resist layer 114 and the first connection pad 1112 corresponding to the first exposed area 1113 and the second surface corresponding to the second exposed area 1123. The surfaces of the solder resist layer 116 and the second connection pad 1122 are heated to cure the liquid ink material to form the first protective film 115 and the second protective film 117 . The thermosetting peelable ink has the characteristics of easy peeling, so as to avoid damage to the first connection pad 1112 , the first solder resist layer 114 , the second connection pad 1122 and the second solder resist layer 116 during the peeling process. The thermosetting ink used can be LM-600PSMS thermosetting peelable ink.

When developing ink is used, the liquid ink material can be printed directly on the surface of the first solder resist layer 114 and the first connection pad 1112 corresponding to the first exposed area 1113 and the second solder resist corresponding to the second exposed area 1123. layer 116 and the surface of the second connection pad 1122 , and then expose and develop the formed liquid ink material, so as to obtain the hardened first protective film 115 and the second protective film 117 . After the developing ink material is cured, it needs to be removed with the corresponding stripping solution. The developing ink material used can be PR 2000SA photosensitive ink.

It can be understood that, when the first solder resist layer 114 is not formed in the first exposed area 1113 , the first protective film 115 can be directly formed on the surface of the first conductive circuit layer 111 . When the second solder resist layer 116 is not formed in the second exposed area 1123 , the second protective film 117 may be directly formed on the surface of the second conductive circuit layer 112 .

In this embodiment, the shape and size of the first protective film 115 are the same as the shape and size of the first exposed area 1113 . The shape and size of the second protective film 117 are the same as those of the second exposed area 1123 .

In order to make the second conductive circuit layer 112 , the first conductive circuit layer 111 and the adhesive layer subsequently laminated thereon have a good and strong fixation force after lamination. After this step, the exposed second conductive circuit layer 112 and the exposed first conductive circuit layer 111 after the formation of the first protective film 115 and the second protective film 117 can be roughened to increase the second conductive circuit layer The roughness of the surface of the layer 112 and the first conductive circuit layer 111. The roughening treatment may adopt blackening or browning treatment, that is, to oxidize the copper on the surface of the second conductive circuit layer 112 and the exposed first conductive circuit layer 111, so that part of the copper is oxidized to monovalent copper or divalent copper, The surfaces of the second conductive circuit layer 112 and the first conductive circuit layer 111 are roughened.

The third step, please refer to FIG. 5 , provides the first adhesive film 20 and the second adhesive film 30 . A first opening 21 corresponding to the first exposed area 1113 is opened in the first adhesive film 20 , and a second opening 31 corresponding to the second exposed area 1123 is opened in the second adhesive film 30 .

In this embodiment, both the first bonding film 20 and the second bonding film 30 are prepreg films. The cross-sectional shape of the first opening 21 is the same as that of the first exposed region 1113 , and the cross-sectional area of the first opening 21 is larger than that of the first exposed region 1113 . The cross-sectional shape of the second opening 31 is the same as that of the second exposed region 1123 , and the cross-sectional area of the second opening 31 is larger than that of the second exposed region 1123 . In this embodiment, the cross-sectional shape of the first opening 21 is also rectangular, the length of the cross-section of the first opening 21 is greater than the length of the corresponding first exposed area 1113, and the width of the cross-section of the first opening 21 is greater than that of the corresponding first exposure area 1113. The width of an exposed region 1113, the length of the cross section of the first opening 21 is 10 to 20 microns greater than the length of the first exposed region 1113, the width of the cross section of the first opening 21 is greater than the width of the first exposed region 1113 by 10 to 20 microns 20 microns. The cross-sectional shape of the second opening 31 is also rectangular, the length of the cross-section of the second opening 31 is greater than the length of the corresponding second exposed area 1123, and the width of the cross-section of the second opening 31 is greater than that of the corresponding second exposed area 1123. Width, the length of the cross section of the second opening 31 is 10 to 20 microns larger than the length of the second exposed region 1123 , and the width of the cross section of the second opening 31 is 10 to 20 microns larger than the width of the second exposed region 1123 .

In this embodiment, a plurality of second alignment holes 22 are opened in the first adhesive film 20, and a plurality of third alignment holes 32 are opened in the second adhesive film 30, and each second alignment hole 22 and each third alignment hole 32 corresponds to one first alignment hole 1100 .

The fourth step, please refer to FIG. 6, align and stack the first adhesive film 20, the inner circuit substrate 110 and the second adhesive film 30 in sequence, so that the first protective film 115 is located in the first opening 21, and the second protective film 115 is located in the first opening 21. The film 117 is located in the second opening 31 , and is riveted to the first adhesive film 20 , the inner circuit substrate 110 and the second adhesive film 30 to obtain the laminated board structure 110 a.

In this step, a riveting device is used to set rivets 101 in the corresponding first alignment holes 1100, second alignment holes 22, and third alignment holes 32, and under the action of the pressure of the rivets 101, the first alignment holes around the rivets 101 are A bonding film 20 , the inner circuit substrate 110 and the second bonding film 30 are in close contact. Through riveting, it can be ensured that the first adhesive film 20 and the second adhesive film 30 are all in precise alignment with the inner circuit substrate 110, so that the first protective film 115 is located in the first opening 21, and the second protective film 117 is located in the second opening 21. Inside the opening 31. Preferably, the width of the gap between the edge of the first protective film 115 and the first adhesive film 20 around the first opening 21 is substantially equal. The width of the gap between the edge of the second protective film 117 and the second opening 31 is substantially equal.

The fifth step, please refer to FIGS. 7-8, form the first laminated substrate 110c on the side of the first adhesive film 20 of the inner circuit substrate 110, and form the first laminated substrate 110c on the side of the second adhesive film 30 of the laminate structure 110a. The two laminate the substrate 110d to obtain the multi-layer substrate 110b.

The first laminated substrate 110c may include at least one laminated film, at least one conductive pattern layer, and the first adhesive film 20, and the at least one laminated film and at least one conductive pattern layer are arranged alternately. , the first adhesive film 20 is in contact with a layer of laminated film in the first laminated substrate, and is bonded with the laminated film in contact with it to form the first dielectric layer 130 .

In this embodiment, the specific method of the fifth step will be described by taking the first laminated substrate 110c as an example comprising only one layer of laminated film and one layer of conductive pattern.

Firstly, the first copper foil 41, the second copper foil 42, the first lamination film 51 and the second lamination film 52 are provided, and the first copper foil 41, the first lamination film 51, and the laminate are sequentially stacked and laminated. The structure 110a, the first copper foil 41, and the second lamination film 52, the first adhesive film 20 and the first lamination film 51 together form the first dielectric layer 130, the second adhesive film 30 and the second lamination film The film 52 together constitutes the second dielectric layer 140 . The material of the first lamination film 51 and the material of the first bonding film 20 may be the same or different. The first lamination film 51 can be made of a material with higher fluidity than the first bonding film 20 during lamination. The material of the second bonding film 30 and the material of the second pressing film 52 may be the same or different. The second lamination film 52 can be made of a material with higher fluidity than the third-year bonding film 30 during lamination. The first lamination film 51 and the second lamination film 52 may be flat prepregs respectively. During the lamination process, the adhesive flow of the first lamination film 51 fills the gap between the first protective film 115 and the first copper foil 41, and the flow adhesive of the second lamination film 52 fills the second protective film 117. and the gap between the second copper foil 42 . Therefore, the first copper foil 41 and the second copper foil 42 can be closely bonded to the inner circuit substrate 110 . And it can ensure that the thickness of the first dielectric layer 130 formed by the first adhesive film 20 and the first lamination film 51 on the first pressing area 1114 located around the first exposed area 1113 can meet the requirements, and the thickness of the first dielectric layer 130 in the second exposed area The thickness of the second dielectric layer 140 formed by the second bonding film 30 and the second bonding film 52 on the second pressing area 1124 around 1123 can meet the requirements.

Then, a first conductive blind hole 131 is formed in the first copper foil 41 and the first dielectric layer 130, a second conductive blind hole 141 is formed in the second copper foil 42 and the second dielectric layer 140, and a through hole is formed. A copper foil 41, the first dielectric layer 130, the inner circuit substrate 110, the second dielectric layer 140 and the conductive via 190 of the second copper foil 42, and selectively etches the first copper foil 41 to form a first conductive pattern layer 150, and selectively etches the second copper foil 42 to form a second conductive pattern layer 160 to obtain a multilayer substrate 110b.

In this embodiment, the first conductive blind hole 131 and the conductive via 190 are formed before the first conductive pattern 150 and the second conductive pattern 160 are formed. The formation of the first conductive blind hole 131 can be made in the following manner: first, holes are opened in the first copper foil 41 and the first dielectric layer 130, and then a conductive material is formed in the hole by electroless plating and electroplating. A first conductive blind hole 131 is obtained. The first conductive circuit layer 111 is electrically connected to the first copper foil 41 through the first conductive blind hole 131 . The forming method of the second conductive blind hole 141 is the same as that of the first conductive blind hole 131 , and the second conductive circuit layer 112 is electrically connected to the second copper foil 42 through the second conductive blind hole 141 .

The conductive through hole 190 can pass through the first copper foil 41, the first dielectric layer 130, the inner circuit substrate 110, the second dielectric layer 140 and the second copper foil 42, and then fill the through hole with conductive material. The way the material is formed.

Both the first conductive pattern layer 150 and the second conductive pattern layer 160 are formed by an image transfer process and an etching process. The first conductive pattern layer 150 is electrically connected to the first conductive circuit layer 111 through the first conductive blind hole 131 , and the second conductive pattern layer 160 is electrically connected to the second conductive circuit layer 112 through the second conductive blind hole 141 . In this embodiment, the first conductive pattern layer 150 covers the first exposed region 1113 , and the second conductive pattern layer 160 covers the second exposed region 1123 .

After that, the operation of the sixth step above can be repeated to obtain more layers of the first laminated substrate 110c and the second laminated substrate 110d.

In the sixth step, please refer to FIG. 9 , a third solder resist layer 170 is formed on the first conductive pattern layer 150 , and a fourth solder resist layer 180 is formed on the second conductive pattern layer 160 .

In this step, the third solder resist layer 170 and the fourth solder resist layer 180 may be formed by printing solder resist ink. There are openings in the third solder resist layer 170 and the fourth solder resist layer 180 respectively, so that part of the first conductive pattern 150 is exposed from the opening of the first solder resist layer 170, and part of the second conductive pattern 160 is exposed from the opening of the second solder resist layer 180. exposed at the opening.

The seventh step, please refer to Figure 10 and Figure 11 together, along the boundary line between the first exposed area 1113 and the first pressing area 1114, form a ring-shaped first slit 102, which will be surrounded by the first slit 102 The first pressing substrate 110c is removed to form the first groove 103 corresponding to the first exposed area 1113 . The first solder resist layer 114 covering the first exposed region 1113 and the first connection pads 1112 exposed from the first solder resist layer 114 are exposed in the first groove 103 . Along the boundary line between the second exposed area 1123 and the second pressing area 1124, a second cutout 104 is formed from the surface of the multi-layer substrate 110b to the second protective film 117, and the second cutout 104 surrounded by the second cutout 104 is formed. The conductive pattern layer 160 , the second dielectric layer 140 and the second protective film 117 are removed to form the second groove 105 corresponding to the second exposed area 1123 . The second solder resist layer 116 covering the second exposed region 1123 and the second connection pads 1122 exposed from the second solder resist layer 116 are exposed in the second groove 105 . In this way, the multilayer circuit board 100 with grooves can be manufactured.

The first groove 103 and the second groove 105 are respectively used for installing electronic components. The first connection pads 1112 exposed in the first groove 103 are used to electrically connect with the electronic components accommodated in the first groove 103 . The second connection pads 1122 exposed in the second groove 105 are used to electrically connect with the electronic components accommodated in the second groove 105 .

In this embodiment, the shape of the first cutout 102 corresponds to the shape of the first exposed area 1113 , and the shape surrounding the first cutout 102 is a quadrangle. The first cut 102 only runs through the first conductive pattern layer 150 , the first dielectric layer 130 and the first protective film 115 . The first conductive pattern layer 150 , the first dielectric layer 130 and the first protective film 115 surrounded by the first cutout 102 can be removed manually. The first conductive pattern layer 150 and the first dielectric layer 130 can be removed first, and then the first protective film 115 can be removed. The first conductive pattern layer 150 , the first dielectric layer 130 and the first protective film 115 may also be removed at the same time.

In this embodiment, the shape of the second cutout 104 corresponds to the shape of the second exposed area 1123 , and the shape surrounding the second cutout 104 is also a quadrangle. The second cut 104 only runs through the second conductive pattern layer 160 , the second dielectric layer 140 and the second protective film 117 . The second conductive pattern layer 160 , the second dielectric layer 140 and the second protective film 117 surrounded by the second cutout 104 can be removed manually. The second conductive pattern layer 160 and the second dielectric layer 140 can be removed first, and then the second protective film 117 can be removed. The second conductive pattern layer 160 , the second dielectric layer 140 and the second protective film 117 may also be removed at the same time.

In this embodiment, the first slit 102 and the second slit 104 can be formed by means of ultraviolet laser depth cutting. Since the first protective film 115 and the second protective film 117 are provided, the first dielectric layer 130 is not in contact with the first connection pad 1112 and the first solder resist layer 114 in the first exposed area 1113, and the second dielectric layer 140 is not in contact with the second connection pad 1122 and the second solder resist layer 116 in the second exposed area 1123, so that the first connection pad 1112, the first solder resist layer 114, the second connection pad 1122 and the second solder resist layer 116 can be protected. Solder layer 116. Moreover, the first protective film 115 and the second protective film 117 have good peelability and are easy to remove.

It can be understood that the number, position and depth of the grooves in the multilayer circuit board 100 are not limited by this embodiment, and the number, position and depth of the grooves in the multilayer circuit board 100 can be determined according to the number of grooves in the multilayer circuit board. Settings are required.

After this step, a step of molding the multilayer circuit board 100 may also be included to obtain a multilayer circuit board whose shape meets requirements.

The circuit board manufacturing method provided in this embodiment can also manufacture a circuit board with only the first groove 103 but not the second groove 105 , so that the second conductive circuit layer 112 does not need to have the second exposed region 1123 . During lamination, only the second lamination film 52 needs to be laminated between the second copper foil 42 and the inner circuit substrate 110 to form the second dielectric layer 140 , and the second bonding film 30 does not need to be provided.

Not every step in the manufacturing method provided by this embodiment is a necessary step. For example, the sixth step may not be used, but the first copper foil 41, the first laminated film 51, the first The bonding film 20 , the inner circuit substrate 110 , the second bonding film 30 , the second copper foil 42 and the second bonding film 52 . In addition, the manufacturing method of the circuit board may not include the step of forming the third solder resist layer 170 and the fourth solder resist layer 180 .

The technical solution also provides a multilayer circuit board 100, including a first laminated substrate 110c, an inner layer circuit substrate 110, and a second laminated substrate 110d that are laminated together. The inner layer circuit substrate 110 includes a base 113 and a bonded The first conductive circuit layer 111 and the second conductive circuit layer 112 are on two opposite surfaces of the substrate 113 . The first conductive circuit layer 111 has a first exposed area 1113 and a first bonding area 1114, the surface of the first exposed area 1113 is provided with a first solder resist layer 114, and a plurality of first exposed areas 1113 The connection pads 1112 are exposed from the first solder resist layer 114 . The second conductive circuit layer 112 has a second exposed area 1123 and a second bonding area 1124, the surface of the second exposed area 1123 is provided with a second solder resist layer 116, and the plurality of second exposed areas 1123 The connection pads 1122 are exposed from the second solder resist layer 116 .

In this embodiment, both the first laminated substrate 110c and the second laminated substrate 110d include a conductive pattern layer. That is, the first laminated substrate 110c includes a first adhesive film 20, a first laminated film 51, and a first conductive pattern layer 150 that are laminated together with an opening. The first adhesive film 20 is formed on the inner circuit substrate 110. On the first pressing area 1114 , the first adhesive film 20 is adjacent to the first pressing film 51 . A first groove 103 penetrating through the first press-fit substrate 110c is formed in the multilayer circuit board 100, the first groove 103 corresponds to the first solder resist layer 114, so that the first solder resist The layer 114 and the first connection pad 1112 exposed from the first solder mask layer 114 are exposed in the first groove 103 , and the first groove 103 is used for accommodating electronic components.

The second laminated substrate 110d includes a second bonding film 30 having an opening, a second bonding film 52 and a second conductive pattern layer 160 that are bonded together. The second bonding film 30 is formed on the first layer of the inner circuit substrate 110. On the second pressing area 1124 , the second bonding film 30 is adjacent to the second pressing film 52 . A second groove 105 penetrating through the second press-bonded substrate 110d is formed in the multilayer circuit board 100, and the second groove 105 corresponds to the second solder mask 116, so that the second solder mask The layer 116 and the second connection pads 1122 exposed from the second solder resist layer 116 are exposed in the second groove 105, and the second groove 105 is used for accommodating electronic components.

When the first laminated substrate 110c and the second laminated substrate 110d are multilayer substrates, their structures may be as follows.

The first laminated substrate 110c includes a first bonding film 20 with openings, a first laminated film 51 with multiple layers of grooves, and a first conductive pattern layer 150 with multiple layers of openings that are bonded together. The film 20 is adjacent to the first lamination film 51, the first lamination film 51 with multi-layer grooves and the first conductive pattern layer 150 with multi-layer openings are alternately arranged, and the first lamination film 51 with two adjacent layers of grooves is arranged alternately. There is only one first conductive pattern layer 150 with an opening between the laminated sheets 51, and the first laminated substrate 110c has a first groove 103, and the first groove 103 runs through each layer of the first laminated substrate 110c. The grooved first lamination film 51 and the first conductive pattern layer 150 with openings on each layer, the first groove 103 corresponds to the first solder resist layer 114, so that the first solder resist layer 114 And the first connection pad 1112 exposed from the first solder resist layer 114 is exposed in the first groove 103 , and the first groove 103 is used for accommodating electronic components.

The second laminated substrate 110d includes the second adhesive film 30 with openings, the second laminated film 52 with multiple layers of grooves, and the second conductive pattern layer 160 with multiple layers of openings that are laminated together. The second laminated film 52 with layers of grooves and the second conductive pattern layer 160 with multiple layers of openings are alternately arranged, and there is only one layer of second conductive pattern layer with openings between every adjacent two layers of grooved second laminated films 52 160, the second laminated substrate 110d has a second groove 105, and the second groove 105 runs through the second laminated film 52 of each layer of the second laminated substrate 110d and the second laminated film 52 of each layer of opening. Two conductive pattern layers 160, the second groove 103 corresponds to the second solder resist layer 116, so that the second solder resist layer 116 and the second connection pad exposed from the second solder resist layer 116 1122 is exposed in the second groove 105, and the second groove 105 is used for accommodating electronic components.

In the manufacturing method of the circuit board provided by this technical solution, two films are laminated on the surface of the inner conductive circuit layer, one of which has an opening corresponding to the exposed area of the inner conductive circuit layer, and the other does not An opening corresponding to the exposed area is provided. Compared with the method of pressing only one piece of film with a corresponding opening, it can ensure that more flow glue flows between the protective film and the pressed copper foil during pressing, so that it is located in the inner conductive circuit. The copper foil on the exposed area of the layer is tightly bonded to the inner circuit substrate at the corresponding position, and the thickness of the dielectric layer formed by the two films can be guaranteed to meet the requirements, so as to prevent the dielectric The thickness of the layer cannot meet the requirements, causing the liquid to corrode the conductive lines of the inner substrate.

It can be understood that those skilled in the art can make various other corresponding changes and modifications according to the technical concept of the present invention, and all these changes and modifications should belong to the protection scope of the claims of the present invention.

Claims (15)

1. a manufacture method for circuit board, including step:

Thering is provided internal layer circuit substrate, described internal layer circuit substrate includes substrate and is formed at the first conducting wire of substrate surface Layer, described first conductive circuit layer includes the first exposed region and around the first pressing district connecting the first exposed region；

The first exposed region in the first conductive circuit layer arranges the first protection film；

At first conductive circuit layer side riveted the first adhesive sheet of internal layer circuit substrate, described first adhesive sheet have with The first opening that first exposed region is corresponding, described first protection film is positioned at the first opening；

First Copper Foil and the first pressing film, and the of pressing the first Copper Foil, the first pressing film to internal layer circuit substrate are provided One adhesive sheet side, makes the first Copper Foil and forms the first conductive pattern layer, thus in the first bonding of internal layer circuit substrate Film side forms the first solderless substrate and obtains multilager base plate, described first solderless substrate include at least one of which pressing film, At least one of which conductive pattern layer and described first adhesive sheet, described at least one of which pressing film and described at least one of which conductive pattern Shape layer is alternately arranged, and described first adhesive sheet contacts with the lamination rubber alloy sheet in described first solderless substrate, and described At least one of which conductive pattern layer be positioned at the pressing film that contacts with this first adhesive sheet away from this first adhesive sheet Side, this first adhesive sheet constitutes the first dielectric layer with pressing film in contact bonding；And

At multilager base plate, near the side of the first solderless substrate, the first solderless substrate is cut, with shape in border along the first exposed region Become only to run through the first solderless substrate and corresponding with the border of the first exposed region the first annular otch, remove and cut by first Choma around this part first solderless substrate, and remove the first protection film, thus form the groove corresponding with the first exposed region.

2. the manufacture method of circuit board as claimed in claim 1, it is characterised in that described first conductive circuit layer includes a plurality of First conducting wire and multiple first connection gasket, the plurality of first connection gasket and part the first conducting wire are positioned at described first In exposed region.

3. the manufacture method of circuit board as claimed in claim 2, it is characterised in that the first conductor wire in the first exposed region Before the surface of road floor forms the first protection film, it is additionally included in the step that the first welding resisting layer is set on the first exposed region, described First welding resisting layer covers a plurality of first conducting wire in the first exposed region, covers the surface of substrate in the first exposed region, and Exposing multiple first connection gaskets of the first exposed region, described first protection film covers surface and the institute of described first welding resisting layer State the surface of multiple first connection gasket.

4. the manufacture method of circuit board as claimed in claim 3, it is characterised in that it is sudden and violent that described first welding resisting layer also covers first Part the first pressing district around dew district.

5. the manufacture method of circuit board as claimed in claim 1, it is characterised in that lead the first Copper Foil is made formation first Before electricity graph layer, in being additionally included in the first pressing film and the first Copper Foil, form the first conductive blind hole, described first conductor wire Road floor and the first Copper Foil are mutually conducted by the first conductive blind hole.

6. the manufacture method of circuit board as claimed in claim 1, it is characterised in that lead the first Copper Foil is made formation first Before electrograph shape, also include being formed and run through the first Copper Foil, the first pressing film and the conductive through hole of internal layer circuit substrate, internal layer electricity The first conductive circuit layer in base board is mutually conducted by described conductive through hole with the first Copper Foil.

7. the manufacture method of circuit board as claimed in claim 1, it is characterised in that the shape of cross section of described first opening with The shape of the first protection film is identical, and the area of the cross section of the first opening is more than the area of the first protection film, in riveted institute After stating the first adhesive sheet and internal layer circuit substrate, the edge of described first protection film and the first parameatal first bonding There is between film the gap of an annular.

8. a manufacture method for circuit board, including step:

Thering is provided internal layer circuit substrate, described internal layer circuit substrate includes substrate, is formed at the first conductive circuit layer of substrate surface And it being formed at second conductive circuit layer of another apparent surface of substrate, described first conductive circuit layer includes the first exposed region and ring Around connecting the first pressing district of the first exposed region, described second conductive circuit layer includes the second exposed region and sudden and violent around connecting second The second pressing district in dew district；

The first exposed region in the first conductive circuit layer arranges the first protection film, at the second exposed region of the second conductive circuit layer Second protection film is set；

At first conductive circuit layer side riveted the first adhesive sheet of described internal layer circuit substrate, and at internal layer circuit substrate Second conductive circuit layer side riveted the second adhesive sheet, described first adhesive sheet has corresponding with the first exposed region One opening, described first protection film is positioned at the first opening, and described second adhesive sheet has corresponding with the second exposed region The second opening, described second protection film be positioned at the second opening；

The first solderless substrate is formed, in the second bonding of internal layer circuit substrate in the first adhesive sheet side of internal layer circuit substrate Film side forms the second solderless substrate, and obtains multilager base plate, and described first solderless substrate includes at least one of which the first pressing Film, at least one of which the first conductive pattern layer and described first adhesive sheet, described at least one of which the first pressing film is with described At least one of which the first conductive pattern layer is alternately arranged, described first adhesive sheet and a layer first in described first solderless substrate Pressing film contacts, and constitutes the first dielectric layer, described second pressing base with the first pressing film bonding in contact Plate includes at least one of which the second pressing film, at least one of which the second conductive pattern layer and described second adhesive sheet, described at least One layer of second pressing film is alternately arranged with described at least one of which the second conductive pattern layer, described second adhesive sheet and described the One layer of second pressing film in two solderless substrates contacts, and with in contact second pressing film bonding composition second Dielectric layer；And

At multilager base plate, near the side of the first solderless substrate, the first solderless substrate is cut, with shape in border along the first exposed region Become only to run through the first solderless substrate and corresponding with the border of the first exposed region the first annular otch, remove and cut by first Choma around this part first solderless substrate, and remove the first protection film, thus form corresponding with the first exposed region first Groove, at multilager base plate, near the side of the second solderless substrate, the second solderless substrate is cut on border along the second exposed region, with Formed and only run through the second solderless substrate and corresponding with the border of the second exposed region the second annular otch, remove by second This part second solderless substrate of otch cincture, and remove the second protection film, thus form corresponding with the second exposed region the Two grooves.

9. the manufacture method of circuit board as claimed in claim 8, it is characterised in that described first conductive circuit layer includes a plurality of First conducting wire and multiple first connection gasket, the plurality of first connection gasket and part the first conducting wire are positioned at described first In exposed region, described second conductive circuit layer includes a plurality of second conducting wire and multiple second connection gasket, and described second connects Pad and part the second conducting wire are positioned at described second exposed region.

10. the manufacture method of circuit board as claimed in claim 9, it is characterised in that the first conductor wire in the first exposed region The first protection film is formed on the floor of road, before the first conductive circuit layer in the second exposed region is formed the second protection film, The surface of the first conducting wire being additionally included in the first exposed region forms the first welding resisting layer, with by first in the first exposed region Conducting wire covers and the first connection gasket exposes from described first welding resisting layer, and it is anti-welding that described first protection film is formed at first Layer and the surface of the first connection gasket, the surface of the second conducting wire in the second exposed region forms the second welding resisting layer, with by the The second conducting wire in two exposed regions covers and the second connection gasket exposes from described second welding resisting layer, described second protection glue Sheet is formed at the second welding resisting layer and the surface of the second connection gasket.

The manufacture method of 11. 1 kinds of circuit boards, including step:

Thering is provided internal layer circuit substrate, described internal layer circuit substrate includes substrate and is formed at the first conductor wire of substrate opposite sides Road floor and the second conductive circuit layer, described first conductive circuit layer includes the first exposed region and around connecting the of the first exposed region One pressing district；

The first exposed region in the first conductive circuit layer arranges the first protection film；

At first conductive circuit layer side riveted the first adhesive sheet of internal layer circuit substrate, described first adhesive sheet have with The first opening that first exposed region is corresponding, described first protection film is positioned at the first opening；

The first solderless substrate is formed, in the second bonding of internal layer circuit substrate in the first adhesive sheet side of internal layer circuit substrate Film side forms the second solderless substrate, and obtains multilager base plate, and described first solderless substrate includes at least one of which the first pressing Film, at least one of which the first conductive pattern layer and described first adhesive sheet, described at least one of which the first pressing film is with described At least one of which the first conductive pattern layer is alternately arranged, described first adhesive sheet and a layer first in described first solderless substrate Pressing film contacts, and constitutes the first dielectric layer, described second pressing base with the first pressing film bonding in contact Plate includes at least one of which the second pressing film, at least one of which the second conductive pattern layer, described at least one of which the second pressing film with Described at least one of which the second conductive pattern layer is alternately arranged, and one layer in described second solderless substrate connects with internal layer circuit substrate Touch, and constitute the second dielectric layer；And

At multilager base plate, near the side of the first solderless substrate, the first solderless substrate is cut, with shape in border along the first exposed region Become only to run through the first solderless substrate and corresponding with the border of the first exposed region the first annular otch, remove and cut by first Choma around this part first solderless substrate, and remove the first protection film, thus form the groove corresponding with the first exposed region.

The manufacture method of 12. circuit boards as claimed in claim 11, it is characterised in that described first conductive circuit layer includes many Bar the first conducting wire and multiple first connection gasket, the plurality of first connection gasket and part the first conducting wire are positioned at described In one exposed region.

The manufacture method of 13. circuit boards as claimed in claim 12, it is characterised in that the first conductor wire in the first exposed region The first protection film is formed on the floor of road, before the first conductive circuit layer in the second exposed region is formed the second protection film, The surface of the first conducting wire being additionally included in the first exposed region forms the first welding resisting layer, with by first in the first exposed region Conducting wire covers and the first connection gasket exposes from described first welding resisting layer, and it is anti-welding that described first protection film is formed at first Layer and the surface of the first connection gasket.

14. 1 kinds of circuit boards, including the first solderless substrate being pressed on together, internal layer circuit substrate and the second solderless substrate, interior Layer circuit substrate includes substrate, the first conductive circuit layer being formed at substrate one surface and is formed at another apparent surface's of substrate Second conductive circuit layer, described first conductive circuit layer has the first exposed region and is connected the first pressing of the first exposed region with cincture District, described first exposed region surface configuration has the first welding resisting layer, and multiple first connection gaskets of the first exposed region are from described first Exposing in welding resisting layer, described second conductive circuit layer has the second exposed region and is connected the second pressing of the second exposed region with cincture District, described second exposed region surface configuration has the second welding resisting layer, and multiple second connection gaskets of the second exposed region are from described second Exposing in welding resisting layer, described first solderless substrate includes being pressed on the first adhesive sheet together, the first pressing film and first Conductive pattern layer, described first adhesive sheet is bonded between the first pressing district of internal layer circuit substrate and the first pressing film, And constitute dielectric layer with this first pressing film bonding, have in described circuit board and run through the first recessed of the only first solderless substrate Groove, described first groove is corresponding with described first exposed region, so that first welding resisting layer on the first exposed region surface and from first The plurality of first connection gasket exposed in welding resisting layer is exposed in described first groove, and the second solderless substrate includes being pressed on one The second adhesive sheet, the second pressing film and the second conductive pattern layer risen, the second adhesive sheet is bonded in internal layer circuit substrate The second pressing district and the second pressing film between, and with this second pressing film bonding constitute another dielectric layer, described circuit Having the second groove only running through the second solderless substrate in plate, described second groove is corresponding with described second exposed region, so that Second welding resisting layer and the plurality of second connection gasket exposed from the second welding resisting layer on the second exposed region surface are exposed to described In second groove, described first groove and the second groove are used to holding electronic components and parts.

15. 1 kinds of circuit boards, including the first solderless substrate being pressed on together, internal layer circuit substrate and the second solderless substrate, interior Layer circuit substrate includes substrate, the first conductive circuit layer being formed at substrate one surface and is formed on another apparent surface of substrate The second conductive circuit layer, described first conductive circuit layer have the first exposed region with around is connected the first exposed region first press Closing district, described first exposed region surface configuration has the first welding resisting layer, and multiple first connection gaskets of the first exposed region are from described the Exposing in one welding resisting layer, described second conductive circuit layer has the second exposed region and is connected the second pressing of the second exposed region with cincture District, described second exposed region surface configuration has the second welding resisting layer, and multiple second connection gaskets of the second exposed region are from described second Welding resisting layer exposes, described first solderless substrate include being pressed on the first adhesive sheet together, multilamellar the first pressing film and Multilamellar the first conductive pattern layer, the first adhesive sheet is bonded in floor the first pressing glue of the first pressing district and the first solderless substrate Between sheet, and constituting dielectric layer with the first pressing film bondd with it, described multilamellar the first pressing film and multilamellar first are led Electricity graph layer is alternately arranged, only has one layer of first conductive pattern layer, described first pressure between every adjacent two layers the first pressing film Closing substrate and have first groove, described first groove runs through every layer of first pressing film in the first solderless substrate and every layer First conductive pattern layer, thus the first adhesive sheet in the first solderless substrate, every layer of first pressing film and every layer first Being respectively formed opening in conductive pattern layer, described first groove is corresponding with described first exposed region, so that described first exposed region First welding resisting layer and the plurality of first connection gasket exposed from the first welding resisting layer on surface are exposed in described first groove, Described second solderless substrate includes the second adhesive sheet, multilamellar the second pressing film and multilamellar the second conductive pattern being pressed on together Shape layer, the first adhesive sheet is bonded between the second pressing district and floor the second pressing film of the second solderless substrate, and with Second pressing film of its bonding constitutes another dielectric layer, described multilamellar the second pressing film and multilamellar the second conductive pattern layer and hands over For arrangement, only having one layer of second conductive pattern layer between every adjacent two layers the second pressing film, described second solderless substrate has One the second groove, described second groove run through the second adhesive sheet in the second solderless substrate, every layer of second pressing film and Every layer of second conductive pattern layer, thus the second adhesive sheet in the second solderless substrate, every layer of second pressing film and every layer Being respectively formed opening in second conductive pattern layer, described second groove is corresponding with described second exposed region, so that described second sudden and violent Dew second welding resisting layer on surface, district and the plurality of second connection gasket exposed from the second welding resisting layer are exposed to described second recessed In groove, described first groove and the second groove are used to install electronic devices and components.