CN104465645A - Semiconductor switch chip and manufacturing method thereof - Google Patents

Abstract

The invention discloses a semiconductor switch chip and a manufacturing method thereof in the technical field of semiconductor chips and manufacturing techniques thereof. The present invention includes a switching device, used for pulse modulation of the input voltage; the switching device includes a first lateral double-diffused MOS transistor; a high-voltage starting device, used for turning on the control chip on the periphery of the semiconductor switch chip, and the control chip uses The switching device is used to turn on and off; the high-voltage starting device includes a second lateral double-diffused MOS transistor, a Zener diode and a high-resistance resistor; a temperature detection device is used to detect the temperature of the switching device in real time. The invention is not disturbed by external environmental factors, and can detect the temperature change of the switching device very sensitively; the switching device and the high-voltage starting device are integrated in the same chip, which can improve the starting efficiency and reduce the static power consumption.

Description

Semiconductor switch chip and manufacturing method thereof

technical field

The invention relates to the technical field of a semiconductor chip and its manufacturing process, in particular to a semiconductor switch chip and its manufacturing method.

Background technique

Double diffused metal oxide transistor (DMOS) is one of the most common semiconductor devices. Its main function is to be used as a switching chip in switching power supplies (SMPS) of various equipment and facilities, such as communication equipment, mobile equipment, industrial equipment, household Electrical appliances, personal computers, etc. In the switching power supply, in addition to the switching chip, another important component is the control chip, that is, through the control chip, the switching chip is continuously "on" and "off", so that the switching chip performs pulse modulation on the input voltage. So as to realize AC-DC conversion, DC-DC conversion, automatic voltage stabilization and other functions.

Double-diffused metal-oxide transistors include vertical double-diffused metal-oxide transistors (VDMOS) and lateral double-diffused metal-oxide transistors (LDMOS). Among them, VDMOS is difficult to be compatible with other semiconductor devices in the same chip, so it is generally It is used in the form of discrete devices. LDMOS is easily compatible with other semiconductor devices in the same chip, so it is generally integrated in integrated circuits (Integrated Circuit, IC for short).

It is worth mentioning that in practical applications, the switching power supply also integrates functions such as high-voltage start-up and temperature detection. In order to realize the various functions required by the switching power supply, the traditional methods are as follows:

The first method is to use external passive components (resistors, capacitors) to achieve high-voltage start-up, and integrate functions such as temperature detection in the control circuit (or, external thermistors to achieve temperature detection), this method is the current mainstream solution, but it is not suitable for occasions with particularly fine static power consumption requirements (for example, we always hope that chargers and adapters will generate less heat). Today, the requirements for energy saving and environmental protection are getting higher and higher. In many applications, this method is being replaced by other methods (such as the second method below);

The second is to use BCD integrated circuits (integrate bipolar transistors, complementary metal oxide transistors and LDMOS in the same chip). This method is being used more and more in many applications, but the cost is high;

The third is to use VDMOS to integrate with high-voltage startup and temperature detection circuits in the same chip, but as mentioned above, VDMOS is difficult to be compatible with other semiconductor devices in the same chip, and problems such as high electromagnetic interference (EMI) will occur. Therefore, this method must be configured with more complex control circuits and peripheral printed circuit board (PCB) circuits, which is also discounted in terms of cost performance.

In order to better understand the present invention, first give a brief explanation to the LDMOS device:

LDMOS can be specifically divided into two types: N-channel LDMOS and P-channel LDMOS. Among them, the conduction efficiency of N-channel LDMOS is faster than that of P-channel LDMOS, so N-channel LDMOS is used in more occasions (hereinafter, LDMOS refers to N-channel LDMOS).

The structure of LDMOS includes source, drain, polysilicon gate, body region, drift region, gate oxide layer, field oxide layer; source and drain are composed of silicon (N+) in N-type heavily doped region, doped The impurity concentration is 1E19-1E21 atoms/cubic centimeter, the polysilicon gate is generally composed of N-type heavily doped polysilicon (N+ polysilicon), the doping concentration is 1E20-1E22 atoms/cubic centimeter, and the body region is made of P-type lightly doped polysilicon. Composed of silicon, the doping concentration is 1E16-1E17 atoms/cubic centimeter. In order to reduce the impedance, the body region is generally drawn from the silicon surface by P-type heavily doped silicon (P+), and the doping concentration of P+ is 1E19-1E21 atom/cubic centimeter, the gate oxide layer is much thinner than the field oxide layer, and the area covered by the field oxide layer is called the field area in the industry, and the area not covered by the field oxide layer is called the active area.

Contents of the invention

The invention provides a semiconductor switch chip and a manufacturing method thereof to solve the problems of high power consumption, high manufacturing cost, susceptibility to electromagnetic interference and the like existing in the existing switching power supply.

In order to solve the above technical problems, the present invention provides a semiconductor switch chip, which includes:

a switching device, used for pulse modulation of the input voltage; the switching device includes a first lateral double-diffused MOS transistor;

A high-voltage starting device is used to turn on the control chip on the periphery of the semiconductor switch chip, and the control chip is used to turn on and off the switching device; the high-voltage starting device includes a second lateral double-diffused MOS transistor, a voltage regulator Diodes and high-value resistors;

A temperature detection device is used to detect the temperature of the switching device in real time.

Further, the second lateral double-diffused MOS transistor, the Zener diode and the high resistance resistor are electrically connected according to set functional requirements.

Further, the Zener diode includes a polysilicon Zener diode.

Further, the high-resistance resistor includes a polysilicon high-resistance resistor.

Further, the temperature detection device includes a diode.

Further, the diode is a body silicon diode.

The present invention also provides a method for manufacturing a semiconductor switch chip, comprising the following steps:

forming a drift region in the surface of the front side of the P-type substrate, the drift region comprising a first drift region and a second drift region;

A body region is formed in the surface of the front surface of the P-type substrate, the body region includes a first body region and a second body region; the first body region is close to the first drift region; the second body region close to the second drift region;

A field oxide layer is formed on the surface of the front surface of the P-type substrate, and the field oxide layer includes a first field oxide layer, a second field oxide layer, a third field oxide layer and a fourth field oxide layer, and the first field oxide layer A field oxide layer is located on the surface of the first drift region, and the second field oxide layer is located on the surface of the second drift region;

forming a gate oxide layer in areas other than the areas covered by the first field oxide layer, the second field oxide layer, the third field oxide layer, and the fourth field oxide layer;

A polysilicon gate and a polysilicon high-resistance resistor are formed on the surface of the field oxide layer and the gate oxide layer, the polysilicon gate includes a first polysilicon gate and a second polysilicon gate, and the first polysilicon gate The silicon gate is located on the surface of the gate oxide layer and extends to the surface of the first field oxide layer, and the second polysilicon gate is located on the surface of the gate oxide layer and extends to the surface of the second field oxide layer; the polysilicon high resistance value The resistor is located on the surface of the third field oxide layer, including the first polysilicon high-resistance resistor and the second polysilicon high-resistance resistor;

An N-type heavily doped region and a P-type heavily doped region are formed in the set region.

Further, the second polysilicon high-resistance resistor is an N-type lightly doped polysilicon high-resistance resistor or a P-type lightly doped polysilicon high-resistance resistor.

Further, forming the N-type heavily doped region and the P-type heavily doped region in the set region includes:

A first N-type heavily doped region is formed in the surface of the first drift region, and a second N-type heavily doped region and a first P-type heavily doped region are formed in the surface of the first body region, so The first drift region, the first body region, the first N-type heavily doped region, the second N-type heavily doped region, the first P-type heavily doped region, the first The field oxide layer, the first polysilicon gate and the gate oxide layer form a first lateral double-diffused MOS transistor;

A third N-type heavily doped region is formed in the surface of the second drift region, and a fourth N-type heavily doped region and a second P-type heavily doped region are formed in the surface of the second body region, so The second drift region, the second body region, the third N-type heavily doped region, the fourth N-type heavily doped region, the second P-type heavily doped region, the second The field oxide layer, the second polysilicon gate and the gate oxide layer form a second lateral double-diffused MOS transistor;

A fifth N-type heavily doped region and a third P-type heavily doped region are formed in the surface of the front surface of the P-type substrate, and the fifth N-type heavily doped region and the third P-type heavily doped region region constitutes a bulk silicon diode;

A fourth P-type heavily doped region is formed at one end of the second polysilicon high resistance resistor, or a sixth N type heavily doped region is formed at one end of the second polysilicon high resistance resistor.

Further, a fourth P-type heavily doped region is formed at one end of the second polysilicon high-resistance resistor, or a sixth N-type heavily doped region is formed at one end of the second polysilicon high-resistance resistor. Miscellaneous areas, specifically:

When the second polysilicon high-resistance resistor is an N-type lightly doped polysilicon high-resistance resistor, a fourth P-type heavily doped region is formed at one end of the second polysilicon high-resistance resistor, Constitute a polysilicon Zener diode;

or,

When the second polysilicon high-resistance resistor is a P-type lightly doped polysilicon high-resistance resistor, a sixth N-type heavily doped region is formed at one end of the second polysilicon high-resistance resistor, Constitute a polysilicon Zener diode.

Further, after forming the N-type heavily doped region and the P-type heavily doped region in the setting region, it also includes:

Make contact holes and metal leads, and use the metal leads for electrical connection according to the set functional requirements to form a semiconductor switch chip that integrates a high-voltage starting device, a temperature detection device and a switching device inside, and the high-voltage starting device includes all The second lateral double-diffused MOS transistor, the polysilicon Zener diode and the first polysilicon high-resistance resistor, the temperature detection device includes the body silicon diode, and the switching device includes the first lateral double diffused MOS transistor.

Compared with the prior art, the beneficial effects of the technical solution of the present invention are as follows:

1. The temperature detection device of the present invention is arranged inside the semiconductor switch chip of the present invention, and is not disturbed by external environmental factors, and can detect temperature changes of the switch device very sensitively, compared with those on the periphery of the switch device (such as in the control It is more accurate to detect temperature by using heat-sensitive elements in or around the circuit;

2. The switching device and the high-voltage starting device in the present invention are integrated in the same chip, which can improve the starting efficiency and reduce the static power consumption compared with those methods for realizing high-voltage starting with external passive components;

3. The switching device in the present invention is a horizontal double-diffused metal oxide transistor, and the horizontal double-diffused metal oxide transistor is a planar device, and its substrate is connected to a heat sink. The radiation electromagnetic interference generated by the heat sink connected to the drain) is lower, so the requirements for the control circuit and the peripheral PCB circuit are simpler.

Description of drawings

Fig. 1 shows the structural representation of the present invention.

Detailed ways

The specific implementation manners of the present invention will be further described in detail below in conjunction with the accompanying drawings and embodiments. The following examples are used to illustrate the present invention, but are not intended to limit the scope of the present invention.

In order to solve the problems of high power consumption, high manufacturing cost, susceptibility to electromagnetic interference and the like existing in the existing switching power supply. The invention provides a semiconductor switch chip and a manufacturing method thereof.

Example 1

This embodiment provides a semiconductor switch chip, which is used in semiconductor devices, such as communication equipment, mobile equipment, industrial equipment, household appliances, personal computers, and the like. More precisely, it is applied to semiconductor chips and their manufacturing processes. Semiconductor switch chip of the present invention comprises:

a switching device, used for pulse modulation of the input voltage; the switching device includes a first lateral double-diffused MOS transistor;

A high-voltage starting device is used to turn on the control chip on the periphery of the semiconductor switch chip, and the control chip is used to turn on and off the switching device; the high-voltage starting device includes a second lateral double-diffused MOS transistor, a voltage regulator Diodes and high-value resistors;

A temperature detection device is used to detect the temperature of the switching device in real time.

The temperature detection device of the present invention is arranged inside the semiconductor switch chip of the present invention, and is not disturbed by external environmental factors. , or the peripheral use of heat-sensitive elements) for temperature detection should be more accurate; the switching device and the high-voltage starting device in the present invention are integrated in the same chip, which can improve the starting efficiency and Reduce static power consumption; the switching device among the present invention is the horizontal double-diffused metal oxide transistor, and the horizontal double-diffused metal oxide transistor is a planar device, and its substrate is connected to a heat sink, which is better than the vertical double-diffused metal oxide transistor integration method (for Vertical devices, heat sink connected to the drain) produce lower radiated electromagnetic interference, so the requirements for the control circuit and peripheral PCB circuits are simpler.

In practical applications, especially in large-scale circuits or highly integrated circuits (such as printed circuit boards), the connection relationship between devices is very complicated. Therefore, the second lateral double-diffused MOS transistor in the high-voltage starting device of the present invention . The Zener diode and the high-resistance resistor need to be electrically connected according to actually set functional requirements.

In addition, since polysilicon has excellent semiconductor characteristics, the voltage stabilizing diode of the present invention adopts polysilicon voltage stabilizing diodes. High resistance resistors also use polysilicon high resistance resistors.

The temperature detection device of the present invention and the detected device (in the present invention, the detected device is a switching device) are integrated in the same chip, and the diode has excellent temperature characteristics, small volume and high detection sensitivity. Therefore, the temperature detecting device of the present invention is realized by using a diode, specifically, a bulk silicon diode can be selected.

Example 2

This embodiment and Embodiment 1 belong to the same inventive concept. This embodiment provides a method for manufacturing a semiconductor switch chip, including the following steps:

S1: generating a switching device, the switching device is used for pulse modulation of the input voltage; the switching device includes a first lateral double-diffused MOS transistor;

S2: Generate a high-voltage starting device, the high-voltage starting device is used to turn on the control chip on the periphery of the semiconductor switch chip, and the control chip is used to realize the function of turning on and off the switching device; the high-voltage starting device includes a second lateral double Diffused MOS transistors, Zener diodes and high resistance resistors;

S3: generating a temperature detection device, which is used to detect the temperature of the switching device in real time.

As can be seen from the above description, the temperature detection device in the method of the present invention is arranged inside the semiconductor switch chip of the present invention, and is not disturbed by external environmental factors, and can detect the temperature change of the switch device very sensitively, compared with those in the switch device It is more accurate to detect temperature on the periphery of the control circuit (such as in the control circuit, or using a thermal element in the periphery); the switching device and the high-voltage starting device in the method of the present invention are integrated in the same chip, and compared with those external passive components to achieve high-voltage The start-up method can improve start-up efficiency and reduce static power consumption; the switching device in the present invention is a horizontal double-diffused metal oxide transistor, and the horizontal double-diffused metal oxide transistor is a planar device, and its substrate is connected to a heat sink. The diffused metal oxide transistor integration method (for a vertical device, the heat sink is connected to the drain) produces lower radiated electromagnetic interference, so the requirements for the control circuit and the peripheral PCB circuit are simpler.

The specific operation is as follows:

Step 1: forming a drift region in the surface of the front surface of the P-type substrate, the drift region including a first drift region and a second drift region;

Step 2: forming a body region in the surface of the front surface of the P-type substrate, the body region includes a first body region and a second body region; the first body region is close to the first drift region; the second body region a two-body region adjacent to the second drift region;

Step 3: forming a field oxide layer on the surface of the front surface of the P-type substrate, the field oxide layer includes a first field oxide layer, a second field oxide layer, a third field oxide layer and a fourth field oxide layer, so The first field oxide layer is located on the surface of the first drift region, and the second field oxide layer is located on the surface of the second drift region;

Step 4: forming a gate oxide layer in areas other than the areas covered by the first field oxide layer, the second field oxide layer, the third field oxide layer, and the fourth field oxide layer;

Step 5: forming a polysilicon gate and a polysilicon high-resistance resistor on the surface of the field oxide layer and the gate oxide layer, the polysilicon gate includes a first polysilicon gate and a second polysilicon gate, and the first polysilicon gate A polysilicon gate is located on the surface of the gate oxide layer and extends to the surface of the first field oxide layer, and the second polysilicon gate is located on the surface of the gate oxide layer and extends to the surface of the second field oxide layer; The high resistance resistor is located on the surface of the third field oxide layer, including the first polysilicon high resistance resistor and the second polysilicon high resistance resistor;

The second polysilicon high-resistance resistor is an N-type lightly doped polysilicon high-resistance resistor or a P-type lightly doped polysilicon high-resistance resistor, and the doping concentration is 1E17-8E18 atoms/cm3.

Step 6: Form an N-type heavily doped region and a P-type heavily doped region in the set area, the doping concentration of the N-type heavily doped region and the P-type heavily doped region is 1E19-1E21 atoms/cubic centimeter. Specifically include:

Step 601: forming a first N-type heavily doped region in the surface of the first drift region, forming a second N-type heavily doped region and a first P-type heavily doped region in the surface of the first body region region, the first drift region, the first body region, the first N-type heavily doped region, the second N-type heavily doped region, the first P-type heavily doped region, the The first field oxide layer, the first polysilicon gate and the gate oxide layer constitute a first lateral double-diffused MOS transistor;

Step 602: forming a third N-type heavily doped region in the surface of the second drift region, forming a fourth N-type heavily doped region and a second P-type heavily doped region in the surface of the second body region region, the second drift region, the second body region, the third N-type heavily doped region, the fourth N-type heavily doped region, the second P-type heavily doped region, the The second field oxide layer, the second polysilicon gate and the gate oxide layer form a second lateral double-diffused MOS transistor;

Step 603: forming a fifth N-type heavily doped region and a third P-type heavily doped region in the surface of the front surface of the P-type substrate, the fifth N-type heavily doped region and the third P-type The heavily doped region constitutes a bulk silicon diode;

Step 604: Forming a fourth P-type heavily doped region at one end of the second polysilicon high-resistance resistor, or forming a sixth N-type heavily doped region at one end of the second polysilicon high-resistance resistor Miscellaneous area.

When the second polysilicon high-resistance resistor is an N-type lightly doped polysilicon high-resistance resistor, a fourth P-type heavily doped region is formed at one end of the second polysilicon high-resistance resistor, Constitute a polysilicon voltage regulator diode; or, when the second polysilicon high resistance resistor is a P-type lightly doped polysilicon high resistance resistor, a first polysilicon high resistance resistor is formed at one end of the second polysilicon high resistance resistor Six N-type heavily doped regions form a polysilicon Zener diode.

After completing the above steps, it is necessary to connect the high-voltage starting device, temperature detecting device and switching device of the present invention according to actual functional requirements.

Step 7: Make contact holes and metal leads, and use the metal leads for electrical connection according to the set functional requirements to form a semiconductor switch chip that integrates a high-voltage starting device, a temperature detection device and a switching device inside, and the high-voltage starting device The device includes the second lateral double-diffused MOS transistor, the polysilicon Zener diode and the first polysilicon high resistance resistor, the temperature detection device includes the body silicon diode, and the switching device includes the A first lateral double-diffused MOS transistor.

The present invention integrates the horizontal double-diffusion MOS transistor and the high-voltage start-up and temperature detection circuits in the same chip. On the one hand, it does not need external passive components to realize high-voltage start-up, thereby improving start-up efficiency and reducing static power consumption; and temperature detection The circuit and LDMOS are integrated in the same chip, and the accuracy of temperature detection will be higher; on the other hand, with this solution, the external control circuit and peripheral PCB circuit will be simpler.

This LDMOS integrated device with its own high-voltage start-up function and temperature detection function truly realizes the meaning of "smart LDMOS".

Example 3

The present invention is described below through an actual scene.

The semiconductor switch chip of this embodiment includes at least two LDMOS, a bulk silicon diode, a polysilicon voltage regulator diode, and a polysilicon high-resistance resistor. These elements are integrated in the same chip and connected with metal according to functional requirements; One LDMOS is connected with the polysilicon voltage regulator diode and the polysilicon high-resistance resistor to realize the high-voltage start-up function, and the other LDMOS is used as a switching device; the body silicon diode realizes the temperature detection function; thereby realizing the high-voltage start-up function LDMOS switching device with temperature detection function;

Wherein, the bulk silicon diode is composed of N-type doped silicon and P-type doped silicon, and the doping concentration of N-type doped silicon and P-type doped silicon is not limited; the polysilicon high resistance resistor is composed of N Type lightly doped polysilicon (N-polysilicon) or P-type lightly doped polysilicon (P-polysilicon), with a doping concentration of 1E17-8E18 atoms/cubic centimeter; the polysilicon voltage regulator diode is made of N-type lightly doped polysilicon (N-polysilicon) and P-type heavily doped polysilicon (P+polysilicon), in which the doping concentration of N-polysilicon is 1E17-8E18 atoms/cubic centimeter, and the doping concentration of P+ polysilicon is 1E19-1E21 atoms/cubic centimeter , or composed of N-type heavily doped polysilicon (N+ polysilicon) and P-type lightly doped polysilicon (P-polysilicon). The concentration is 1E19-1E21 atoms/cubic centimeter; the structure of the LDMOS includes a gate oxide layer, a field oxide layer, a body region, a drift region, a source and a drain composed of N-type heavily doped silicon (N+), N+ The doping concentration of P+ is 1E19-1E21 atoms/cubic centimeter, and the body region P+ is composed of P-type heavily doped silicon (P+). The doping concentration of P+ is 1E19-1E21 atoms/cubic centimeter. (N+ polysilicon) polysilicon gate, the doping concentration of the polysilicon gate is 1E20-1E22 atoms/cubic centimeter; preferably, the bulk silicon diode is made of P-type heavily doped silicon (P+) and N-type heavily doped silicon ( N+) composition, which can reduce the doping types of bulk silicon and reduce the process cost.

Correspondingly, the manufacturing method of the semiconductor switch chip of the present invention is:

S301: forming a drift region, a body region, a field oxide layer, a gate oxide layer, and polysilicon on the substrate;

S302: Doping polysilicon to form N-type lightly doped polysilicon (N-polysilicon) [or P-type lightly doped polysilicon (P-polysilicon)] and N-type heavily doped polysilicon (N+polysilicon), wherein, N-type The doping concentration of lightly doped polysilicon (or P-type lightly doped polysilicon) is 1E17-8E18 atoms/cubic centimeter, and the doping concentration of N-type heavily-doped polysilicon is 1E20-1E22 atoms/cubic centimeter;

S303: adopt photolithography and etching process to form a polysilicon gate (composed of N+polysilicon), polysilicon high-resistance resistor (composed of N-polysilicon or P-polysilicon);

S304: Adopt photolithography and ion implantation doping process to form N-type doped silicon, P-type doped silicon, P-type heavily doped polysilicon (P+ polysilicon) [or N-type heavily doped polysilicon (N+ polysilicon), wherein, The doping concentration of P-type heavily doped polysilicon (or N-type heavily doped polysilicon) is 1E19-1E21 atoms/cubic centimeter;

Wherein, the P-type heavily doped polysilicon (P+ polysilicon) is formed in a part of the N-type lightly doped polysilicon (N-polysilicon), thereby forming a polysilicon voltage regulator diode composed of N-polysilicon and the P+ polysilicon; Or the N-type heavily doped polysilicon (N+ polysilicon) is formed in a part of the P-type lightly doped polysilicon (P-polysilicon), thereby forming a polysilicon voltage regulator diode composed of P-polysilicon and the N+ polysilicon;

The N-type doped silicon and the P-type doped silicon constitute the source N+, the drain N+, the body region P+ and the body silicon diode of the LDMOS.

The present invention can include a plurality of LDMOS, and the implementation of the above method in practice will be described in detail below by including two LDMOS, as shown in Figure 1:

Step 1: forming a drift region in the front surface of the P-type substrate 301, the drift region including a first drift region 302 and a second drift region 303;

Step 2: forming a body region on the front surface of the P-type substrate 301, the body region includes a first body region 304 and a second body region 305; the first body region 304 is close to the first drift region 302; the second body region 305 is close to the second drift region 303;

Step 3: Forming a field oxide layer on the front surface of the P-type substrate 301, the field oxide layer includes a first field oxide layer 306, a second field oxide layer 307, a third field oxide layer 308 and a fourth field oxide layer an oxide layer 309, the first field oxide layer 306 is located on the surface of the first drift region 302, and the second field oxide layer 307 is located on the surface of the second drift region 303;

Step 4: forming a gate oxide layer 310 in a region outside the area covered by the first field oxide layer 306, the second field oxide layer 307, the third field oxide layer 308 and the fourth field oxide layer 309;

Step 5: forming a polysilicon gate and a polysilicon high-resistance resistor on the surface of the field oxide layer and the gate oxide layer 310, the polysilicon gate includes a first polysilicon gate 311 and a second polysilicon gate 312, The first polysilicon gate 311 is located on the surface of the gate oxide layer 310 and extends to the surface of the first field oxide layer 306, and the second polysilicon gate 312 is located on the surface of the gate oxide layer 310 and extends to the second field The surface of the oxide layer 307; the polysilicon high resistance resistor is located on the surface of the third field oxide layer 308, including a first polysilicon high resistance resistor 313 and a second polysilicon high resistance resistor 314;

The second polysilicon high-resistance resistor 314 is an N-type lightly doped polysilicon high-resistance resistor or a P-type lightly doped polysilicon high-resistance resistor.

Step 6: forming an N-type heavily doped region and a P-type heavily doped region in the set region. Specifically include:

Step 601: forming a first N-type heavily doped region 315 in the surface of the first drift region 302, forming a second N-type heavily doped region 316 and a first P in the surface of the first body region 304 type heavily doped region 320, the first drift region 302, the first body region 304, the first N-type heavily doped region 315, the second N-type heavily doped region 316, the first A P-type heavily doped region 320, the first field oxide layer 306, the first polysilicon gate 311 and the gate oxide layer 310 constitute a first lateral double-diffused MOS transistor;

Step 602: forming a third N-type heavily doped region 317 in the surface of the second drift region 303, forming a fourth N-type heavily doped region 318 and a second P in the surface of the second body region 305 type heavily doped region 321, the second drift region 303, the second body region 305, the third N type heavily doped region 317, the fourth N type heavily doped region 318, the first Two P-type heavily doped regions 321, the second field oxide layer 307, the second polysilicon gate 312 and the gate oxide layer 310 form a second lateral double-diffused MOS transistor;

Step 603: forming a fifth N-type heavily doped region 319 and a third P-type heavily doped region 322 in the front surface of the P-type substrate 301, the fifth N-type heavily doped region 319 and the The third P-type heavily doped region 322 constitutes a bulk silicon diode;

Step 604: Form a fourth P-type heavily doped region at one end of the second polysilicon high-resistance resistor 314, or form a sixth N-type region at one end of the second polysilicon high-resistance resistor 314 heavily doped region. The final result is shown in FIG. 1 , where the fourth P-type heavily doped region (or the sixth N-type heavily doped region) is not shown in the figure.

When the second polysilicon high-resistance resistor 314 is an N-type lightly doped polysilicon high-resistance resistor, a fourth P-type heavily doped resistor is formed at one end of the second polysilicon high-resistance resistor 314 region, forming a polysilicon Zener diode; or, when the second polysilicon high resistance resistor 314 is a P-type lightly doped polysilicon high resistance resistor, in the second polysilicon high resistance resistor 314 One end of one end forms a sixth N-type heavily doped region, forming a polysilicon Zener diode.

The temperature change of the switching power supply mainly comes from the switching device (LDMOS in the present invention). In the present invention, the bulk silicon diode and the LDMOS that realize the temperature detection function are made in the bulk silicon. When the temperature of the LDMOS changes, The body silicon diode can detect its temperature change very sensitively, which is more accurate than those in the periphery of the switching device (such as in the control circuit, or using thermal elements in the periphery);

The switching device and the high-voltage starting device in the present invention are integrated in the same chip, which can improve the starting efficiency and reduce the static power consumption compared with those methods of realizing high-voltage starting with external passive components;

The switching device in the present invention is LDMOS (for planar device, substrate is connected to heat sink), and the radiated EMI (electromagnetic interference) that produces than VDMOS integration method (for vertical device, heat sink is connected to drain) is lower, so to control The circuit and peripheral PCB circuit requirements are simpler.

The above is only a preferred embodiment of the present invention, it should be pointed out that for those of ordinary skill in the art, without departing from the technical principle of the present invention, some improvements and replacements can also be made, these improvements and replacements It should also be regarded as the protection scope of the present invention.

Claims (11)

1. A semiconductor switch chip, characterized in that, the semiconductor switch chip comprises: a switching device, used for pulse modulation of the input voltage; the switching device includes a first lateral double-diffused MOS transistor; A high-voltage starting device is used to turn on the control chip on the periphery of the semiconductor switch chip, and the control chip is used to turn on and off the switching device; the high-voltage starting device includes a second lateral double-diffused MOS transistor, a voltage regulator Diodes and high-value resistors; A temperature detection device is used to detect the temperature of the switching device in real time. 2 . The semiconductor switch chip according to claim 1 , wherein the second lateral double-diffused MOS transistor, the Zener diode and the high resistance resistor are electrically connected according to set functional requirements. 3 . 3. The semiconductor switch chip according to claim 2, wherein the Zener diode comprises a polysilicon Zener diode. 4. The semiconductor switch chip according to claim 2, wherein the high resistance resistor comprises a polysilicon high resistance resistor. 5. The semiconductor switch chip according to claim 1, wherein the temperature detection device comprises a diode. 6. The semiconductor switch chip according to claim 5, wherein the diode is a body silicon diode. 7. A method for manufacturing a semiconductor switch chip, comprising the following steps: forming a drift region in the surface of the front side of the P-type substrate, the drift region comprising a first drift region and a second drift region; A body region is formed in the surface of the front surface of the P-type substrate, the body region includes a first body region and a second body region; the first body region is close to the first drift region; the second body region close to the second drift region; A field oxide layer is formed on the surface of the front surface of the P-type substrate, and the field oxide layer includes a first field oxide layer, a second field oxide layer, a third field oxide layer and a fourth field oxide layer, and the first field oxide layer A field oxide layer is located on the surface of the first drift region, and the second field oxide layer is located on the surface of the second drift region; forming a gate oxide layer in areas other than the areas covered by the first field oxide layer, the second field oxide layer, the third field oxide layer, and the fourth field oxide layer; A polysilicon gate and a polysilicon high-resistance resistor are formed on the surface of the field oxide layer and the gate oxide layer, the polysilicon gate includes a first polysilicon gate and a second polysilicon gate, and the first polysilicon gate The silicon gate is located on the surface of the gate oxide layer and extends to the surface of the first field oxide layer, and the second polysilicon gate is located on the surface of the gate oxide layer and extends to the surface of the second field oxide layer; the polysilicon high resistance value The resistor is located on the surface of the third field oxide layer, including the first polysilicon high-resistance resistor and the second polysilicon high-resistance resistor; An N-type heavily doped region and a P-type heavily doped region are formed in the set region. 8. The method for manufacturing a semiconductor switch chip according to claim 7, wherein the second polysilicon high-resistance resistor is an N-type lightly doped polysilicon high-resistance resistor or a P-type lightly doped polysilicon resistor. Polysilicon high resistance value resistors. 9. The method for manufacturing a semiconductor switch chip according to claim 7, wherein said forming an N-type heavily doped region and a P-type heavily doped region in the set region comprises: A first N-type heavily doped region is formed in the surface of the first drift region, and a second N-type heavily doped region and a first P-type heavily doped region are formed in the surface of the first body region, so The first drift region, the first body region, the first N-type heavily doped region, the second N-type heavily doped region, the first P-type heavily doped region, the first The field oxide layer, the first polysilicon gate and the gate oxide layer form a first lateral double-diffused MOS transistor; A third N-type heavily doped region is formed in the surface of the second drift region, and a fourth N-type heavily doped region and a second P-type heavily doped region are formed in the surface of the second body region, so The second drift region, the second body region, the third N-type heavily doped region, the fourth N-type heavily doped region, the second P-type heavily doped region, the second The field oxide layer, the second polysilicon gate and the gate oxide layer form a second lateral double-diffused MOS transistor; A fifth N-type heavily doped region and a third P-type heavily doped region are formed in the surface of the front surface of the P-type substrate, and the fifth N-type heavily doped region and the third P-type heavily doped region region constitutes a bulk silicon diode; A fourth P-type heavily doped region is formed at one end of the second polysilicon high resistance resistor, or a sixth N type heavily doped region is formed at one end of the second polysilicon high resistance resistor. 10. The manufacturing method of the semiconductor switch chip according to claim 9, characterized in that, a fourth P-type heavily doped region is formed at one end of the second polysilicon high-resistance resistor, or, One end of the two polysilicon high-resistance resistors forms a sixth N-type heavily doped region, specifically: When the second polysilicon high-resistance resistor is an N-type lightly doped polysilicon high-resistance resistor, a fourth P-type heavily doped region is formed at one end of the second polysilicon high-resistance resistor, Constitute a polysilicon Zener diode; or, When the second polysilicon high-resistance resistor is a P-type lightly doped polysilicon high-resistance resistor, a sixth N-type heavily doped region is formed at one end of the second polysilicon high-resistance resistor, Constitute a polysilicon Zener diode. 11. The manufacturing method of the semiconductor switch chip according to claim 7, characterized in that, after forming the N-type heavily doped region and the P-type heavily doped region in the set region, further comprising: Make contact holes and metal leads, and use the metal leads for electrical connection according to the set functional requirements to form a semiconductor switch chip that integrates a high-voltage starting device, a temperature detection device and a switching device inside, and the high-voltage starting device includes all The second lateral double-diffused MOS transistor, the polysilicon Zener diode and the first polysilicon high-resistance resistor, the temperature detection device includes the body silicon diode, and the switching device includes the first lateral double diffused MOS transistor.