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CN104460148A - 提升不良检出率的像素结构及检测方法 - Google Patents

提升不良检出率的像素结构及检测方法 Download PDF

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Publication number
CN104460148A
CN104460148A CN201410668375.5A CN201410668375A CN104460148A CN 104460148 A CN104460148 A CN 104460148A CN 201410668375 A CN201410668375 A CN 201410668375A CN 104460148 A CN104460148 A CN 104460148A
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China
Prior art keywords
pixel
electrically connected
film transistor
electric charge
thin film
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CN201410668375.5A
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CN104460148B (zh
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王醉
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TCL China Star Optoelectronics Technology Co Ltd
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Shenzhen China Star Optoelectronics Technology Co Ltd
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Priority to CN201410668375.5A priority Critical patent/CN104460148B/zh
Priority to PCT/CN2015/072367 priority patent/WO2016078230A1/zh
Priority to US14/423,431 priority patent/US9523899B2/en
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    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
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    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
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  • Physics & Mathematics (AREA)
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  • Optics & Photonics (AREA)
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Abstract

本发明提供一种提升不良检出率的像素结构及检测方法。该提升不良检出率的像素结构包括主像素(10)和次像素(20)两个区域，次像素(20)内具有电荷共享薄膜晶体管(T3)、与电荷共享电容(CST3)；电荷共享薄膜晶体管(T3)的栅极电性连接于电荷共享扫描线(Gate2(m))；电荷共享电容(CST3)由ITO层上电极板(42)、金属层下电极板(2)、以及夹于ITO层上电极板(42)与金属层下电极板(2)之间的绝缘层(3)构成；ITO层上电极板(42)与ITO像素电极(41)位于同一层，且所述ITO层上电极板(42)作为像素公共电极连接至公共电压信号线(Com(m))，所述金属层下电极板(2)连接至电荷共享晶体管(T3)的漏极。

Description

提升不良检出率的像素结构及检测方法
技术领域
本发明涉及显示技术领域，尤其涉及一种提升不良检出率的像素结构及检测方法。
背景技术
液晶显示器(LCD，Liquid Crystal Display)具有机身薄、省电、无辐射等众多优点，得到了广泛的应用。如：液晶电视、移动电话、个人数字助理(PDA)、数字相机、计算机屏幕或笔记本电脑屏幕等，在平板显示领域中占主导地位。
现有市场上的液晶显示器大部分为背光型液晶显示器，其包括壳体、设于壳体内的液晶显示面板及设于壳体内的背光模组。液晶显示面板是液晶显示器的主要组件，但液晶显示面板本身不发光，需要借由背光模组提供的光源来正常显示影像。
通常液晶显示面板由两片玻璃基板贴合而成，且在两片玻璃基板之间灌入液晶，分别在两片玻璃基板的相对内侧设置像素电极、公共电极，通过通电与否来控制液晶分子改变方向，将背光模组的光线折射出来产生画面。
现有的LCD中，大视角下会发生严重的色偏现象，尤其在垂直配向(Vertical Alignment，VA)型的LCD中更为明显。如图1所示，为了改善VA型液晶显示器在大视角出现的色偏现象，现有技术会采用电荷共享(ChargeSharing)的像素设计，即将像素分为主像素(Main Pixel)100和次像素(SubPixel)200两个区域，主像素100内具有相互电性连接的第一薄膜晶体管T1、第一存储电容CST1、及第一液晶电容CLC1，次像素200内具有第二薄膜晶体管T2、第二存储电容CST2、第二液晶电容CLC2、电荷共享薄膜晶体管T3、及电荷共享电容CST3，所述第一薄膜晶体管T1与第二薄膜晶体管T2的栅极均电性连接于充电扫描线Gate1(m)、源极均电性连接于数据信号线Date(n)，m与n均为正整数，Gate1(m)代表第m条充电扫描线Gate1，Date(n)代表第n条数据信号线Date；所述第一存储电容CST1、第二存储电容CST2、及电荷共享电容CST3的一端分别电性连接第一薄膜晶体管T1的漏极、第二薄膜晶体管T2的漏极及电荷共享薄膜晶体管T3的漏极，另一端均电性连接于公共电压信号线Com(m)；所述电荷共享薄膜晶体管T3的栅极电性连接于电荷共享扫描线Gate2(m)，漏极电性连接于电荷共享电容CST3。在正常显示时，充电扫描线Gate1(m)打开，同时电荷共享扫描线Gate2(m)关闭，主像素100和次像素200充电到相同电位；随后充电扫描线Gate1(m)关闭，同时电荷共享扫描线Gate2(m)打开，由于电荷共享电容CST3的作用使得次像素200的电位低于主像素100的电位。不同的电位使得两个显示区域的液晶分子转向分布不同，从而具备改善大视角色偏的作用。如图2、图3所示所示，现有的采用电荷共享技术的像素中的电荷共享电容CST3由氧化铟锡(Indium Tin Oxide，ITO)层上电极板420、金属层下电极板20以及夹于两层之间的绝缘层30构成，其中ITO层上电极板420与ITO像素电极410位于同一层，且ITO层上电极板420通过过孔(VIA)305与电荷共享晶体管T3的漏极相连接，金属层下电极板20作为像素公共电极连接至公共电压信号线Com(m)。
然而，实际生产中可能会出现ITO残留问题，使得电荷共享电容CST3的ITO层上电极板420与ITO像素电极410短路，导致电荷共享功能失效。同样灰阶下存在短路问题的像素的次像素会比其他像素的次像素更亮，在液晶显示面板上呈现微亮点现象。目前通常采用的检测方式是将所有的充电扫描线同时打开或分奇偶打开，并给所有像素或所有对应的奇偶行像素充电，使得主像素和次像素都处于同样电位，在这种检测方式下即使出现上述ITO间短路的现象也无法有效检出，导致良率下降，产品成本增加。
发明内容
本发明的目的在于提供一种提升不良检出率的像素结构，能够提高电荷共享电容的ITO层上电极板与ITO像素电极间发生短路的检出率，改善产品微亮点问题，提高良率，降低成本。
本发明的目的还在于提供一种提升不良检出率的检测方法，能够提高电荷共享电容的ITO层上电极板与ITO像素电极间发生短路的检出率，改善产品微亮点问题，提高良率，降低成本。
为实现上述目的，本发明提供一种提升不良检出率的像素结构，包括主像素和次像素两个区域，所述次像素内具有电荷共享薄膜晶体管、与电荷共享电容；所述电荷共享薄膜晶体管的栅极电性连接于电荷共享扫描线；所述电荷共享电容由ITO层上电极板、金属层下电极板、以及夹于所述ITO层上电极板与金属层下电极板之间的绝缘层构成；所述ITO层上电极板与ITO像素电极位于同一层，且所述ITO层上电极板作为像素公共电极连接至公共电压信号线，所述金属层下电极板连接至电荷共享晶体管的漏极。
所述ITO层上电极板作为像素公共电极通过过孔连接至公共电压信号线。
所述次像素内还具有相互电性连接的第二薄膜晶体管、第二存储电容、与第二液晶电容；所述第二薄膜晶体管的栅极电性连接于充电扫描线，源极电性连接于数据信号线，漏极电性连接于所述电荷共享薄膜晶体管的源极；所述第二存储电容的一端电性连接于第二薄膜晶体管的漏极、另一端电性连接于公共电压信号线。
所述主像素内具有相互电性连接的第一薄膜晶体管、第一存储电容、及第一液晶电容；所述第一薄膜晶体管的栅极电性连接于充电扫描线，源极电性连接于数据信号线；所述第一存储电容的一端电性连接于第一薄膜晶体管的漏极，另一端电性连接于公共电压信号线。
所述ITO像素电极与所述电荷共享电容的ITO层上电极板短路时，相应的次像素显示为暗点。
本发明还提供一种提升不良检出率的检测方法，包括如下步骤：
步骤1、提供需检测的液晶显示面板，该液晶显示面板包括多条充电扫描线、多条公共电压信号线、多条电荷共享扫描线、多条数据信号线、及多个呈阵列式排布的像素；每一像素包括主像素和次像素两个区域，所述次像素内具有电荷共享薄膜晶体管、与电荷共享电容；所述电荷共享薄膜晶体管的栅极电性连接于电荷共享扫描线；所述电荷共享电容由ITO层上电极板、金属层下电极板、以及夹于所述ITO层上电极板与金属层下电极板之间的绝缘层构成；所述ITO层上电极板与ITO像素电极位于同一层；
步骤2、将所述电荷共享电容的ITO层上电极板作为像素公共电极连接至公共电压信号线，将所述金属层下电极板连接至电荷共享晶体管的漏极；
步骤3、将所有的充电扫描线同时打开或分奇偶打开，并给所有像素或所有对应的奇偶行像素充电，使得主像素和次像素都处于同样电位；
步骤4、检测该液晶显示面板上的暗点，检出与所述暗点相应的次像素内的ITO像素电极与电荷共享电容的ITO层上电极板发生短路。
所述步骤2中，所述ITO层上电极板作为像素公共电极通过过孔连接至公共电压信号线。
所述次像素内还具有相互电性连接的第二薄膜晶体管、第二存储电容、与第二液晶电容；所述第二薄膜晶体管的栅极电性连接于充电扫描线，源极电性连接于数据信号线，漏极电性连接于所述电荷共享薄膜晶体管的源极；所述第二存储电容的一端电性连接于第二薄膜晶体管的漏极、另一端电性连接于公共电压信号线。
所述主像素内具有相互电性连接的第一薄膜晶体管、第一存储电容、及第一液晶电容；所述第一薄膜晶体管的栅极电性连接于充电扫描线，源极电性连接于数据信号线；所述第一存储电容的一端电性连接于第一薄膜晶体管的漏极，另一端电性连接于公共电压信号线。
本发明的有益效果：本发明提供的一种提升不良检出率的像素结构及检测方法，将电荷共享电容的ITO层上电极板作为像素公共电极连接至公共电压信号线，将电荷共享电容的金属层下电极板连接至电荷共享晶体管，使得ITO像素电极与电荷共享电容的ITO层上电极板短路时，相应的次像素显示为暗点，暗点更容易检出，能够提高电荷共享电容的ITO层上电极板与ITO像素电极间发生短路的检出率，改善产品微亮点问题，提高良率，降低成本。
附图说明
下面结合附图，通过对本发明的具体实施方式详细描述，将使本发明的技术方案及其它有益效果显而易见。
附图中，
图1为现有电荷共享的像素结构的等效电路图；
图2为现有电荷共享的像素结构中显示电荷共享电容的剖面示意图；
图3为对应图2的平面俯视示意图；
图4为本发明提升不良检出率的像素结构的等效电路图；
图5为本发明提升不良检出率的像素结构中显示电荷共享电容的剖面示意图；
图6为对应图5的平面俯视示意图；
图7为本发明提升不良检出率的检测方法的流程图。
具体实施方式
为更进一步阐述本发明所采取的技术手段及其效果，以下结合本发明的优选实施例及其附图进行详细描述。
请同时参阅图4至图6，本发明提供一种提升不良检出率的像素结构，包括主像素10和次像素20两个区域。
所述主像素10内具有相互电性连接的第一薄膜晶体管T1、第一存储电容CST1、及第一液晶电容CLC1；次像素20内具有第二薄膜晶体管T2、第二存储电容CST2、第二液晶电容CLC2、电荷共享薄膜晶体管T3、及电荷共享电容CST3。
所述第一薄膜晶体管T1与第二薄膜晶体管T2的栅极均电性连接于充电扫描线Gate1(m)、源极均电性连接于数据信号线Date(n)，m与n均为正整数，Gate1(m)代表第m条充电扫描线Gate1，Date(n)代表第n条数据信号线Date；所述第一存储电容CST1、第二存储电容CST2、及电荷共享电容CST3的一端分别电性连接于第一薄膜晶体管T1的漏极、第二薄膜晶体管T2的漏极及电荷共享薄膜晶体管T3的漏极，另一端均电性连接于公共电压信号线Com(m)，Com(m)代表第m条公共电压信号线Com；所述电荷共享薄膜晶体管T3的栅极电性连接于电荷共享扫描线Gate2(m)，源极电性连接于第二薄膜晶体管T2的漏极，Gate2(m)代表第m条电荷共享扫描线Gate2。
进一步的，所述电荷共享电容CST3由ITO层上电极板42、金属层下电极板2、以及夹于所述ITO层上电极板42与金属层下电极板2之间的绝缘层3构成，所述金属层下电极板2与绝缘层3均形成于一玻璃基板1上。所述ITO层上电极板42与ITO像素电极41位于同一层，且所述ITO层上电极板42作为像素公共电极通过一过孔35连接至公共电压信号线Com(m)，所述金属层下电极板2连接至电荷共享晶体管T3的漏极。这种结构与现有技术中将电荷共享电容的ITO层上电极板连接至电荷共享晶体管的漏极、将电荷共享电容的金属层下电极板连接至公共电压信号线相反。
在正常显示时，所述充电扫描线Gate1(m)打开，同时电荷共享扫描线Gate2(m)关闭，所述主像素10和次像素20充电到相同电位；随后所述充电扫描线Gate1(m)关闭，同时电荷共享扫描线Gate2(m)打开，由于所述电荷共享电容CST3的作用使得次像素20的电位低于主像素10的电位。不同的电位使得两个显示区域的液晶分子转向分布不同，从而具备改善大视角色偏的作用。
当由于ITO残留问题使得电荷共享电容CST3的ITO层上电极板42与ITO像素电极41短路时，ITO像素电极41即与作为像素公共电极的ITO层上电极板42导通，同时与公共电压信号线Com(m)导通，导致同样灰阶下发生短路的相应的次像素20在液晶显示面板上呈现为暗点，相比于微亮点，暗点更容易被有效检出，便于及时修补，能够提高电荷共享电容CST3的ITO层上电极板42与ITO像素电极41间发生短路的检出率，改善产品微亮点问题，提高良率，降低成本。
请参阅图7，同时参阅图4至图6，本发明还提供一种提升不良检出率的检测方法，包括如下步骤：
步骤1、提供需检测的液晶显示面板。
该液晶显示面板包括多条充电扫描线Gate1(m)、多条公共电压信号线Com(m)、多条电荷共享扫描线Gate2(m)、多条数据信号线Date(n)、及多个呈阵列式排布的像素。每一像素包括主像素10和次像素20两个区域。
所述主像素10内具有相互电性连接的第一薄膜晶体管T1、第一存储电容CST1、及第一液晶电容CLC1；次像素20内具有第二薄膜晶体管T2、第二存储电容CST2、第二液晶电容CLC2、电荷共享薄膜晶体管T3、及电荷共享电容CST3。
所述电荷共享电容CST3由ITO层上电极板42、金属层下电极板2、以及夹于所述ITO层上电极板42与金属层下电极板2之间的绝缘层3构成。所述ITO层上电极板42与ITO像素电极41位于同一层。
所述第一薄膜晶体管T1与第二薄膜晶体管T2的栅极均电性连接于充电扫描线Gate1(m)、源极均电性连接于数据信号线Date(n)；所述第一存储电容CST1、与第二存储电容CST2的一端分别电性连接第一薄膜晶体管T1的漏极与第二薄膜晶体管T2的漏极，另一端均电性连接于公共电压信号线Com(m)。所述电荷共享薄膜晶体管T3的栅极电性连接于电荷共享扫描线Gate2(m)，源极电性连接于第二薄膜晶体管T2的漏极。
步骤2、将所述电荷共享电容CST3的ITO层上电极板42作为像素公共电极通过一过孔35连接至公共电压信号线Com(m)，将所述金属层下电极板2连接至电荷共享晶体管T3的漏极。
步骤3、将所有的充电扫描线Gate1(m)同时打开或分奇偶打开，并给所有像素或所有对应的奇偶行像素充电，使得主像素10和次像素20都处于同样电位。
步骤4、检测该液晶显示面板上的暗点，检出与所述暗点相应的次像素20内的ITO像素电极41与电荷共享电容CST3的ITO层上电极板42发生短路。
由于电荷共享电容CST3的ITO层上电极板42与ITO像素电极41发生短路时，ITO像素电极41即与作为像素公共电极的ITO层上电极板42导通，同时与公共电压信号线Com(m)导通，导致同样灰阶下发生短路的相应的次像素20在液晶显示面板上呈现为暗点，相比于微亮点，暗点更容易被有效检出，能够提高电荷共享电容CST3的ITO层上电极板42与ITO像素电极41间发生短路的检出率，改善产品微亮点问题，提高良率，降低成本。
综上所述，本发明的一种提升不良检出率的像素结构及检测方法，将电荷共享电容的ITO层上电极板作为像素公共电极连接至公共电压信号线，将电荷共享电容的金属层下电极板连接至电荷共享晶体管，使得ITO像素电极与电荷共享电容的ITO层上电极板短路时，相应的次像素显示为暗点，暗点更容易检出，能够提高电荷共享电容的ITO层上电极板与ITO像素电极间发生短路的检出率，改善产品微亮点问题，提高良率，降低成本。
以上所述，对于本领域的普通技术人员来说，可以根据本发明的技术方案和技术构思作出其他各种相应的改变和变形，而所有这些改变和变形都应属于本发明权利要求的保护范围。

Claims (9)

1.一种提升不良检出率的像素结构，其特征在于，包括主像素(10)和次像素(20)两个区域，所述次像素(20)内具有电荷共享薄膜晶体管(T3)、与电荷共享电容(CST3)；所述电荷共享薄膜晶体管(T3)的栅极电性连接于电荷共享扫描线(Gate2(m))；所述电荷共享电容(CST3)由ITO层上电极板(42)、金属层下电极板(2)、以及夹于所述ITO层上电极板(42)与金属层下电极板(2)之间的绝缘层(3)构成；所述ITO层上电极板(42)与ITO像素电极(41)位于同一层，且所述ITO层上电极板(42)作为像素公共电极连接至公共电压信号线(Com(m))，所述金属层下电极板(2)连接至电荷共享晶体管(T3)的漏极。
2.如权利要求1所述的提升不良检出率的像素结构，其特征在于，所述ITO层上电极板(42)作为像素公共电极通过过孔(35)连接至公共电压信号线(Com(m))。
3.如权利要求1所述的提升不良检出率的像素结构，其特征在于，所述次像素(20)内还具有相互电性连接的第二薄膜晶体管(T2)、第二存储电容(CST2)、与第二液晶电容(CLC2)；所述第二薄膜晶体管(T2)的栅极电性连接于充电扫描线(Gate1(m))，源极电性连接于数据信号线(Date(n))，漏极电性连接于所述电荷共享薄膜晶体管(T3)的源极；所述第二存储电容(CST2)的一端电性连接于第二薄膜晶体管(T2)的漏极、另一端电性连接于公共电压信号线(Com(m))。
4.如权利要求1所述的提升不良检出率的像素结构，其特征在于，所述主像素(10)内具有相互电性连接的第一薄膜晶体管(T1)、第一存储电容(CST1)、及第一液晶电容(CLC1)；所述第一薄膜晶体管(T1)的栅极电性连接于充电扫描线(Gate1(m))，源极电性连接于数据信号线(Date(n))；所述第一存储电容(CST1)的一端电性连接于第一薄膜晶体管(T1)的漏极，另一端电性连接于公共电压信号线(Com(m))。
5.如权利要求1所述的提升不良检出率的像素结构，其特征在于，所述ITO像素电极(41)与所述电荷共享电容(CST3)的ITO层上电极板(42)短路时，相应的次像素(20)显示为暗点。
6.一种提升不良检出率的检测方法，其特征在于，包括如下步骤：
步骤1、提供需检测的液晶显示面板，该液晶显示面板包括多条充电扫描线(Gate1(m))、多条公共电压信号线(Com(m))、多条电荷共享扫描线(Gate2(m))、多条数据信号线(Date(n))、及多个呈阵列式排布的像素；每一像素包括主像素(10)和次像素(20)两个区域，所述次像素(20)内具有电荷共享薄膜晶体管(T3)、与电荷共享电容(CST3)；所述电荷共享薄膜晶体管(T3)的栅极电性连接于电荷共享扫描线(Gate2(m))；所述电荷共享电容(CST3)由ITO层上电极板(42)、金属层下电极板(2)、以及夹于所述ITO层上电极板(42)与金属层下电极板(2)之间的绝缘层(3)构成；所述ITO层上电极板(42)与ITO像素电极(41)位于同一层；
步骤2、将所述电荷共享电容(CST3)的ITO层上电极板(42)作为像素公共电极连接至公共电压信号线(Com(m))，将所述金属层下电极板(2)连接至电荷共享晶体管(T3)的漏极；
步骤3、将所有的充电扫描线(Gate1(m))同时打开或分奇偶打开，并给所有像素或所有对应奇偶行像素充电，使得主像素(10)和次像素(20)都处于同样电位；
步骤4、检测该液晶显示面板上的暗点，检出与所述暗点相应的次像素(20)内的ITO像素电极(41)与电荷共享电容(CST3)的ITO层上电极板(42)发生短路。
7.如权利要求6所述的提升不良检出率的检测方法，其特征在于，所述步骤2中，所述ITO层上电极板(42)作为像素公共电极通过过孔(35)连接至公共电压信号线(Com(m))。
8.如权利要求6所述的提升不良检出率的检测方法，其特征在于，所述次像素(20)内还具有相互电性连接的第二薄膜晶体管(T2)、第二存储电容(CST2)、与第二液晶电容(CLC2)；所述第二薄膜晶体管(T2)的栅极电性连接于充电扫描线(Gate1(m))，源极电性连接于数据信号线(Date(n))，漏极电性连接于所述电荷共享薄膜晶体管(T3)的源极；所述第二存储电容(CST2)的一端电性连接于第二薄膜晶体管(T2)的漏极、另一端电性连接于公共电压信号线(Com(m))。
9.如权利要求6所述的提升不良检出率的检测方法，其特征在于，所述主像素(10)内具有相互电性连接的第一薄膜晶体管(T1)、第一存储电容(CST1)、及第一液晶电容(CLC1)；所述第一薄膜晶体管(T1)的栅极电性连接于充电扫描线(Gate1(m))，源极电性连接于数据信号线(Date(n))；所述第一存储电容(CST1)的一端电性连接于第一薄膜晶体管(T1)的漏极，另一端电性连接于公共电压信号线(Com(m))。
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