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CN103972359A - Light emitting diode and on-chip packaging structure thereof - Google Patents

Light emitting diode and on-chip packaging structure thereof Download PDF

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Publication number
CN103972359A
CN103972359A CN201310079405.4A CN201310079405A CN103972359A CN 103972359 A CN103972359 A CN 103972359A CN 201310079405 A CN201310079405 A CN 201310079405A CN 103972359 A CN103972359 A CN 103972359A
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semiconductor epitaxial
layer
light
epitaxial layers
emitting diode
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宋健民
甘明吉
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Zhizuan Technology Co Ltd
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    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10HINORGANIC LIGHT-EMITTING SEMICONDUCTOR DEVICES HAVING POTENTIAL BARRIERS
    • H10H20/00Individual inorganic light-emitting semiconductor devices having potential barriers, e.g. light-emitting diodes [LED]
    • H10H20/80Constructional details
    • H10H20/85Packages
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10HINORGANIC LIGHT-EMITTING SEMICONDUCTOR DEVICES HAVING POTENTIAL BARRIERS
    • H10H20/00Individual inorganic light-emitting semiconductor devices having potential barriers, e.g. light-emitting diodes [LED]
    • H10H20/80Constructional details
    • H10H20/85Packages
    • H10H20/858Means for heat extraction or cooling
    • H10H20/8581Means for heat extraction or cooling characterised by their material

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Abstract

一种发光二极管,包括:基板;半导体外延层,其包括第一半导体外延层、活性中间层、以及第二半导体外延层;反射层;金属层;以及碳化物层;其中,该活性中间层及该碳化物层间的距离可为1至10微米。此外,本发明亦有关于一种芯片板上封装结构,其包括:电路载板;半导体外延层,其包括第一半导体外延层、活性中间层、以及第二半导体外延层;反射层;金属层;以及碳化物层;其中,该活性中间层及该碳化物层间的距离可为1至10微米。据此,本发明的发光二极管及其芯片板上封装结构,可以快速移除高温热点及提升输出光率。

A light-emitting diode, including: a substrate; a semiconductor epitaxial layer, which includes a first semiconductor epitaxial layer, an active intermediate layer, and a second semiconductor epitaxial layer; a reflective layer; a metal layer; and a carbide layer; wherein, the active intermediate layer and The distance between the carbide layers may be 1 to 10 microns. In addition, the present invention also relates to a chip-on-board packaging structure, which includes: a circuit carrier board; a semiconductor epitaxial layer, which includes a first semiconductor epitaxial layer, an active intermediate layer, and a second semiconductor epitaxial layer; a reflective layer; and a metal layer ; And a carbide layer; wherein, the distance between the active intermediate layer and the carbide layer may be 1 to 10 microns. Accordingly, the light-emitting diode and its chip-on-board packaging structure of the present invention can quickly remove high-temperature hot spots and increase the output light rate.

Description

发光二极管及其芯片板上封装结构Light-emitting diode and its package structure on chip board

技术领域technical field

本发明是关于一种发光二极管及其芯片板上封装结构,尤其指一种可以快速移除热点(Hot spot)及提升输出光率的发光二极管与使用其的芯片板上封装结构。The present invention relates to a light-emitting diode and its chip-on-chip package structure, in particular to a light-emitting diode that can quickly remove hot spots and increase output light rate and a chip-on-chip package structure using the same.

背景技术Background technique

公元1962年,通用电气公司的尼克·何伦亚克(Nick Holonyak Jr.)开发出第一种实际应用的可见光发光二极管(Light Emitting Diode,LED),而随着科技日益更新,各种色彩发光二极管开发也应蕴而生。而对于现今人类所追求永续发展为前提的情形下,发光二极管的低耗电量以及长效性的发光等优势下,已逐渐取代日常生活中用来照明或各种电器设备的指示灯或光源等用途。更有甚者,发光二极管朝向多色彩及高亮度的发展,已应用在大型户外显示广告牌或交通号志。In 1962 AD, Nick Holonyak Jr. of General Electric Company developed the first practical visible light-emitting diode (Light Emitting Diode, LED). Diode development should also emerge. Under the premise of the pursuit of sustainable development by human beings today, the advantages of low power consumption and long-lasting luminescence of light-emitting diodes have gradually replaced the indicator lights or lights used for lighting or various electrical equipment in daily life. light source etc. What's more, LEDs are developing towards multi-color and high brightness, and have been applied in large outdoor display billboards or traffic signals.

以公知蓝光发光二极管为例,其铟掺杂氮化镓为一公知的多量子井(multiple quantum wells,MQW),其中,具有49个电子的铟原子因其远大于晶格内的镓原子及氮原子,而使得铟原子容易从晶格中分离,促使MQW产生缺陷而使得该蓝光发光二极管无法作用。更具体地,存在于氮化镓晶格中的铟原子会造成反压电以及内应力的问题,其中,反压电效应会驱使铟原子偏离其平衡位置,而内应力则会造成铟原子产生差排。上述不可逆的劣化过程将使得该发光二极管的发光效率快速地下降。Taking the known blue light-emitting diode as an example, its indium-doped gallium nitride is a known multiple quantum well (multiple quantum wells, MQW), wherein, the indium atom with 49 electrons is much larger than the gallium atom and the Nitrogen atoms make the indium atoms easy to separate from the crystal lattice, which causes defects in the MQW and makes the blue light emitting diode unable to function. More specifically, the presence of indium atoms in the GaN lattice causes problems of inverse piezoelectricity, which drives the indium atoms away from their equilibrium positions, and internal stress, which causes the indium atoms to generate bad row. The aforementioned irreversible degradation process will rapidly reduce the luminous efficiency of the light emitting diode.

于公知发光二极管中,当电子与空穴再结合时,约有1/3的能量以光子形式辐射,而约2/3的能量则转换为热能以晶格振动的方式逸散。据此,若发光二极管晶格中的热能无法快速移除,将导致如上述的发光二极管劣化问题,而促使发光二极管发光效率快速降低,据此,申请人于所提出的中国台湾专利申请号第100146548、100146551以及101120872号中均已揭示以类金刚石与导电材料所组成的堆叠结构或多层结构可有效地改善发光二极管的散热效率以及缓和或去除发光二极管受热膨胀的不良影响。虽相关前案揭示其类金刚石因其超硬材料的特征,能快速地从发光二极管中移除热量而达到整体散热的目的。然而,实际上,如图1所示,产生于MQW中,尺寸小于1纳米的热点才是真正直接导致发光二极管劣化的原因。申请人经详加研究后,更具体提出由限制MQW与类金刚石层的间距,从而通过声子传递方式由发光二极管中快速移除热点,而达到优化发光二极管的散热效率,进而可维持发光二极管的发光效率。In the known LED, when electrons and holes recombine, about 1/3 of the energy is radiated in the form of photons, and about 2/3 of the energy is converted into heat and dissipated in the form of lattice vibration. Accordingly, if the heat energy in the lattice of the LED cannot be removed quickly, it will lead to the degradation problem of the LED as mentioned above, which will lead to a rapid decrease in the luminous efficiency of the LED. Accordingly, the applicant filed the Taiwan Patent Application No. No. 100146548, No. 100146551 and No. 101120872 have disclosed that the stacked structure or multi-layer structure composed of diamond-like carbon and conductive materials can effectively improve the heat dissipation efficiency of LEDs and alleviate or eliminate the adverse effects of thermal expansion of LEDs. Although related previous documents reveal that diamond-like carbon can quickly remove heat from light-emitting diodes to achieve the purpose of overall heat dissipation due to its superhard material characteristics. However, in fact, as shown in Figure 1, the hot spots with a size smaller than 1 nanometer generated in the MQW are the real cause of the degradation of the LED directly. After detailed research, the applicant proposed that by limiting the distance between the MQW and the diamond-like carbon layer, the hot spot can be quickly removed from the light-emitting diode through phonon transfer, so as to optimize the heat dissipation efficiency of the light-emitting diode, and then maintain the light-emitting diode. luminous efficiency.

发明内容Contents of the invention

本发明的目的在于提供一种发光二极管及其芯片板上封装结构,以改进公知技术中存在的缺陷。The object of the present invention is to provide a light-emitting diode and its on-chip packaging structure, so as to improve the defects in the known technology.

为实现上述目的,本发明提供的发光二极管,包括:In order to achieve the above object, the light emitting diode provided by the present invention includes:

一基板;a substrate;

一半导体外延层,其位于该基板表面,该半导体外延层包括一第一半导体外延层、一活性中间层、以及一第二半导体外延层;A semiconductor epitaxial layer, which is located on the surface of the substrate, the semiconductor epitaxial layer includes a first semiconductor epitaxial layer, an active intermediate layer, and a second semiconductor epitaxial layer;

一反射层,其夹置于该半导体外延层及该基板之间;a reflective layer sandwiched between the semiconductor epitaxial layer and the substrate;

一金属层,其夹置于该反射层及该基板之间;以及a metal layer sandwiched between the reflective layer and the substrate; and

一碳化物层,其夹置于该金属层及该基板之间;a carbide layer sandwiched between the metal layer and the substrate;

其中,该活性中间层及该碳化物层间的距离为1至10微米。Wherein, the distance between the active intermediate layer and the carbide layer is 1 to 10 microns.

所述的发光二极管,其中,该活性中间层及该碳化物层间的距离为2微米。Said light emitting diode, wherein, the distance between the active intermediate layer and the carbide layer is 2 microns.

所述的发光二极管,其中,该金属层为钛、锆、钼或钨。Said LED, wherein the metal layer is titanium, zirconium, molybdenum or tungsten.

所述的发光二极管,其中,该碳化物层为类金刚石、石墨烯或其组合。Said light emitting diode, wherein the carbide layer is diamond-like carbon, graphene or a combination thereof.

所述的发光二极管,其中,该类金刚石为一导电性的四面体结构,且该类金刚石的碳原子含量高于95%以上,及该类金刚石的25%以上碳原子具有一扭曲四面体键结结构。The light-emitting diode, wherein the diamond-like carbon has a conductive tetrahedral structure, and the carbon atom content of the diamond-like carbon is higher than 95%, and more than 25% of the carbon atoms of the diamond-like carbon have a twisted tetrahedral bond knot structure.

所述的发光二极管,其中,该金属层及该碳化物层为相互堆叠的多层结构。Said light emitting diode, wherein, the metal layer and the carbide layer are multi-layer structures stacked on each other.

所述的发光二极管,其中,该第一半导体外延层夹置于该反射层及该活性中间层之间,该活性中间层夹置于该第一半导体外延层与该第二半导体外延层之间。The light emitting diode, wherein the first semiconductor epitaxial layer is sandwiched between the reflective layer and the active intermediate layer, and the active intermediate layer is sandwiched between the first semiconductor epitaxial layer and the second semiconductor epitaxial layer .

所述的发光二极管,其中,该半导体外延层含有一掺杂物,该掺杂物为铟。In the above light emitting diode, the semiconductor epitaxial layer contains a dopant, and the dopant is indium.

所述的发光二极管,其中,该基板包含一绝缘层以及一电路基板,该绝缘层的材质选自由类金刚石、氧化铝、陶瓷以及含金刚石的环氧树脂所组群组的至少一种。In the light-emitting diode, the substrate includes an insulating layer and a circuit substrate, and the material of the insulating layer is at least one selected from the group consisting of diamond-like carbon, aluminum oxide, ceramics, and diamond-containing epoxy resin.

所述的发光二极管,其中,该电路基板为一金属板、一陶瓷板或一硅基板。Said LED, wherein the circuit substrate is a metal plate, a ceramic plate or a silicon substrate.

所述的发光二极管,其中,包括一第二电极,该第二电极设置于该第二半导体外延层表面。The light emitting diode, wherein, includes a second electrode, and the second electrode is arranged on the surface of the second semiconductor epitaxial layer.

所述的发光二极管,其中,该第一半导体外延层、该反射层、该金属层及碳化物层为P型电性,而该第二半导体外延层及该第二电极为N型电性。Said LED, wherein, the first semiconductor epitaxial layer, the reflective layer, the metal layer and the carbide layer are of P-type electrical type, and the second semiconductor epitaxial layer and the second electrode are of N-type electrical type.

所述的发光二极管,其中,该碳化物层是用以提供该半导体外延层的超声波方式散热。Said light emitting diode, wherein, the carbide layer is used to provide heat radiation of the semiconductor epitaxial layer by means of ultrasonic waves.

本发明提供的芯片板上封装结构(chip on board,COB),包括:The chip-on-board packaging structure (chip on board, COB) provided by the present invention includes:

一电路载板,其包括至少一电性连接垫;a circuit carrier including at least one electrical connection pad;

一半导体外延层,其位于该电路载板表面,该半导体外延层包括一第一半导体外延层、一活性中间层以及一第二半导体外延层;A semiconductor epitaxial layer, which is located on the surface of the circuit carrier, the semiconductor epitaxial layer includes a first semiconductor epitaxial layer, an active intermediate layer and a second semiconductor epitaxial layer;

一反射层,其夹置于该半导体外延层及该电路载板之间;a reflective layer sandwiched between the semiconductor epitaxial layer and the circuit carrier;

一金属层,其夹置于该反射层及该电路载板之间;以及a metal layer sandwiched between the reflective layer and the circuit carrier; and

一碳化物层,其夹置于该金属层及该电路载板之间;a carbide layer sandwiched between the metal layer and the circuit carrier;

其中,该活性中间层及该碳化物层间的距离为1至10微米。Wherein, the distance between the active intermediate layer and the carbide layer is 1 to 10 microns.

所述的芯片板上封装结构,其中,该活性中间层及该碳化物层间的距离为2微米。In the chip-on-board package structure, the distance between the active intermediate layer and the carbide layer is 2 microns.

所述的芯片板上封装结构,其中,该金属层为钛、锆、钼或钨。In the package-on-chip structure, the metal layer is titanium, zirconium, molybdenum or tungsten.

所述的芯片板上封装结构,其中,该碳化物层为类金刚石、石墨烯或其组合。In the chip-on-board package structure, the carbide layer is diamond-like carbon, graphene or a combination thereof.

所述的芯片板上封装结构,其中,该类金刚石为一导电性的四面体结构,且该类金刚石的碳原子含量高于95%以上,及该类金刚石的25%以上碳原子具有一扭曲四面体键结结构。The above chip-on-chip package structure, wherein the diamond-like carbon has a conductive tetrahedral structure, and the carbon atom content of the diamond-like carbon is higher than 95%, and more than 25% of the carbon atoms of the diamond-like carbon have a twist Tetrahedral bonding structure.

所述的芯片板上封装结构,其中,该金属层及该碳化物层为相互堆叠的多层结构。In the package-on-chip structure described above, the metal layer and the carbide layer are multi-layer structures stacked on each other.

所述的芯片板上封装结构,其中,该第二半导体外延层夹置于该反射层及该活性中间层之间,该活性中间层夹置于该第一半导体外延层与该第二半导体外延层之间,且该第一半导体外延层部分未覆盖该活性中间层及该第二半导体外延层。The package on chip structure, wherein, the second semiconductor epitaxial layer is sandwiched between the reflective layer and the active intermediate layer, and the active intermediate layer is sandwiched between the first semiconductor epitaxial layer and the second semiconductor epitaxial layer. between layers, and the first semiconductor epitaxial layer partially does not cover the active intermediate layer and the second semiconductor epitaxial layer.

所述的芯片板上封装结构,其中,该半导体外延层含有一掺杂物,该掺杂物为铟。In the chip-on-board packaging structure, the semiconductor epitaxial layer contains a dopant, and the dopant is indium.

所述的芯片板上封装结构,其中,该电路载板包含一绝缘层以及一电路基板,该绝缘层的材质是选自由类金刚石、氧化铝、陶瓷以及含金刚石的环氧树脂所组群组的至少一种。In the chip-on-board package structure, wherein the circuit carrier includes an insulating layer and a circuit substrate, the material of the insulating layer is selected from the group consisting of diamond-like carbon, aluminum oxide, ceramics, and diamond-containing epoxy resin at least one of .

所述的芯片板上封装结构,其中,该电路基板为一金属板、一陶瓷板或一硅基板。In the package-on-chip structure described above, the circuit substrate is a metal plate, a ceramic plate or a silicon substrate.

所述的芯片板上封装结构,其中,该第二半导体外延层为P型电性,而该第一半导体外延层为N型电性。In the chip-on-board package structure, the second semiconductor epitaxial layer is of P-type electrical type, and the first semiconductor epitaxial layer is of N-type electrical type.

所述的芯片板上封装结构,其中,该碳化物层是用以提供该半导体外延层的超声波方式散热。In the package-on-chip structure, the carbide layer is used to provide ultrasonic heat dissipation for the semiconductor epitaxial layer.

所述的芯片板上封装结构,其中,包括一基板,该基板设置于该第一半导体外延层上。The package-on-chip structure includes a substrate disposed on the first semiconductor epitaxial layer.

所述的芯片板上封装结构,其中,该基板为一蓝宝石基板。In the chip-on-board package structure, the substrate is a sapphire substrate.

所述的芯片板上封装结构,其中,包括一焊接层,该焊接层设置于该电路载板及该碳化物层之间。The chip-on-board package structure includes a soldering layer, and the soldering layer is arranged between the circuit carrier board and the carbide layer.

本发明的发光二极管及使用其的芯片板上封装结构,因其具有超声波散热的结构设计,可在发光二极管运作产生热量的过程中快速移除所产生的热点,以稳定其晶格结构,从而达到优化其散热效率,以维持其发光效率。The light-emitting diode of the present invention and the chip-on-chip packaging structure using it, because of its structural design of ultrasonic heat dissipation, can quickly remove the hot spots generated during the operation of the light-emitting diode to stabilize its lattice structure, thereby To optimize its heat dissipation efficiency to maintain its luminous efficiency.

附图说明Description of drawings

图1是产生于发光二极管中的热源尺寸对应热源温度的示意图。FIG. 1 is a schematic diagram of the size of the heat source generated in a light-emitting diode versus the temperature of the heat source.

图2A至图2E是本发明实施例一的发光二极管制备流程结构示意图。FIG. 2A to FIG. 2E are schematic structural diagrams of the fabrication process of the light-emitting diode according to Embodiment 1 of the present invention.

图3A至图3F是本发明实施例二的芯片板上封装结构制备流程示意图。FIG. 3A to FIG. 3F are schematic diagrams of the manufacturing process of the package-on-chip structure according to Embodiment 2 of the present invention.

图4是本发明实施例三的芯片板上封装结构结构示意图。FIG. 4 is a schematic structural diagram of a chip-on-chip package structure according to Embodiment 3 of the present invention.

图5A及5B是本发明试验例一的光场分析结果图。5A and 5B are diagrams of light field analysis results of Test Example 1 of the present invention.

图6A及6B是本发明试验例三中的热阻分析结果图。6A and 6B are diagrams of thermal resistance analysis results in Test Example 3 of the present invention.

图7A及7B是本发明试验例四的温度分布结果图。7A and 7B are graphs showing the temperature distribution results of Test Example 4 of the present invention.

图8A及8B是本发明试验例五的温度分布结果图。8A and 8B are graphs showing the temperature distribution results of Test Example 5 of the present invention.

附图中主要组件符号说明:Explanation of main component symbols in the attached drawings:

发光二极管1,3;基板10,30;反射层11,31;半导体外延层12,32;第一半导体外延层121,321;活性中间层122,322;第二半导体外延层123,323;第二电极13;第一电极34;金属层151,351;碳化物层152,352;多层结构15,35;第一金属焊接层36;第二金属焊接层37;电路载板7;绝缘层1070,70;电路基板1071,71;焊料72;电性连接垫73;芯片板上封装结构300,400。Light-emitting diodes 1, 3; substrates 10, 30; reflective layers 11, 31; semiconductor epitaxial layers 12, 32; first semiconductor epitaxial layers 121, 321; active intermediate layers 122, 322; second semiconductor epitaxial layers 123, 323; Two electrodes 13; first electrodes 34; metal layers 151, 351; carbide layers 152, 352; multilayer structures 15, 35; first metal welding layer 36; second metal welding layer 37; circuit carrier 7; insulating layer 1070, 70; circuit substrates 1071, 71; solder 72; electrical connection pads 73; on-chip packaging structures 300, 400.

具体实施方式Detailed ways

本发明提供的发光二极管,其通过调整多量子井层及碳化物层的结构设计,可在发光二极管运作产生热量的过程中,通过超声波方式散热,快速移除发光二极管中的热点,以稳定发光二极管的晶格结构,从而达到优化发光二极管散热效率,并维持其发光效率。The light-emitting diode provided by the present invention, by adjusting the structural design of the multi-quantum well layer and the carbide layer, can dissipate heat through ultrasonic waves in the process of generating heat during the operation of the light-emitting diode, and quickly remove hot spots in the light-emitting diode to stabilize light emission The lattice structure of the diode optimizes the heat dissipation efficiency of the LED and maintains its luminous efficiency.

本发明的一态样提供一种发光二极管,包括:一基板;一半导体外延层,其位于该基板表面,该半导体外延层包括一第一半导体外延层、一活性中间层、以及一第二半导体外延层;一反射层,其夹置于该半导体外延层及该基板之间;一金属层,其夹置于该反射层及该基板之间;以及一碳化物层,其夹置于该金属层及该基板之间;其中,该活性中间层及该碳化物层间的距离可为1至10微米。An aspect of the present invention provides a light-emitting diode, including: a substrate; a semiconductor epitaxial layer located on the surface of the substrate, the semiconductor epitaxial layer includes a first semiconductor epitaxial layer, an active intermediate layer, and a second semiconductor epitaxial layer epitaxial layer; a reflective layer sandwiched between the semiconductor epitaxial layer and the substrate; a metal layer sandwiched between the reflective layer and the substrate; and a carbide layer sandwiched between the metal layer and the substrate; wherein, the distance between the active intermediate layer and the carbide layer can be 1 to 10 microns.

于本发明上述发光二极管中,该活性中间层及该碳化物层间的距离较佳可为2微米。In the above light emitting diode of the present invention, the distance between the active intermediate layer and the carbide layer is preferably 2 microns.

于本发明上述发光二极管中,该反射层可为由银、或铝、或其合金所组成。然而,应了解的是,反射层的材质并不仅限于此,举例而言,亦可为铟锡氧化物(indium tin oxide,ITO)、氧化铝锌(aluminum zinc oxide,AZO)、氧化锌(ZnO)、石墨烯(graphene)、镍(Ni)、钴(Co)、钯(Pd)、铂(Pt)、金(Au)、锌(Zn)、锡(Sn)、锑(Sb)、铅(Pb)、铜(Cu)、铜银(CuAg)、镍银(NiAg)、其合金、或其金属混合物。上述铜银(CuAg)与镍银(NiAg)等是指共晶金属(eutectic metal),除了用于达到反射效果之外,也可以达到形成奥姆接触(ohmic contact)的效用。In the above light-emitting diode of the present invention, the reflective layer may be composed of silver, or aluminum, or an alloy thereof. However, it should be understood that the material of the reflective layer is not limited thereto. For example, it may also be indium tin oxide (ITO), aluminum zinc oxide (AZO), zinc oxide (ZnO) ), graphene (graphene), nickel (Ni), cobalt (Co), palladium (Pd), platinum (Pt), gold (Au), zinc (Zn), tin (Sn), antimony (Sb), lead ( Pb), copper (Cu), copper silver (CuAg), nickel silver (NiAg), alloys thereof, or metal mixtures thereof. The above-mentioned copper silver (CuAg) and nickel silver (NiAg) refer to eutectic metals, which can not only achieve the reflective effect, but also achieve the effect of forming ohmic contact.

于本发明上述发光二极管中,该金属层可为钛、锆、钼、或钨,且该金属层的厚度为5纳米至500纳米。再者,该碳化物层则可为类金刚石、石墨烯、或其组合,且该碳化物层的厚度可为5纳米至1000纳米。据此,该金属层及该碳化物层可形成为相互堆叠的多层结构。于本发明的一态样中,该金属层及该碳化物层可各自独立以1至10层相互堆叠,从而形成为一2至20层相互堆叠的多层结构。In the above light emitting diode of the present invention, the metal layer can be titanium, zirconium, molybdenum, or tungsten, and the thickness of the metal layer is 5 nm to 500 nm. Furthermore, the carbide layer can be diamond-like carbon, graphene, or a combination thereof, and the thickness of the carbide layer can be 5 nm to 1000 nm. Accordingly, the metal layer and the carbide layer can be formed into a multilayer structure stacked on each other. In an aspect of the present invention, the metal layer and the carbide layer can be independently stacked with 1 to 10 layers to form a multilayer structure with 2 to 20 layers stacked with each other.

于本发明上述发光二极管中,该金属层及该碳化物层的形成方法并不特别限制,举例而言,可以电弧沉积法或溅镀法形成该金属层或该碳化物层。于本发明的一态样中,该碳化物层可以电弧沉积法形成于该金属层上。于本发明的另一态样中,该碳化物层则以溅镀法形成于该金属层上。In the light-emitting diode of the present invention, the methods for forming the metal layer and the carbide layer are not particularly limited. For example, the metal layer or the carbide layer can be formed by arc deposition or sputtering. In one aspect of the present invention, the carbide layer can be formed on the metal layer by arc deposition. In another aspect of the present invention, the carbide layer is formed on the metal layer by sputtering.

于本发明上述发光二极管中,该碳化物层是形成于基板及半导体外延层间,是以该碳化物层需具导电的功能,因此,当所选用的碳化物层为类金刚石时,该类金刚石需为一导电性的四面体结构,且该类金刚石的碳原子含量高于95%以上,及该类金刚石的25%以上碳原子具有一扭曲四面体键结结构。据此,使得介于半导体外延层及基板间的金属层及碳化物层可具有导电的性质。In the above-mentioned light-emitting diode of the present invention, the carbide layer is formed between the substrate and the semiconductor epitaxial layer, so the carbide layer needs to have a conductive function. Therefore, when the selected carbide layer is a diamond-like carbon, the diamond-like carbon It needs to be a conductive tetrahedral structure, and the carbon atom content of the diamond-like carbon is higher than 95%, and more than 25% of the carbon atoms of the diamond-like carbon have a twisted tetrahedral bonding structure. Accordingly, the metal layer and the carbide layer between the semiconductor epitaxial layer and the substrate can have the property of conduction.

于本发明上述发光二极管中,该第一半导体外延层是夹置于该反射层及该活性中间层之间,该活性中间层是夹置于该第一半导体外延层与该第二半导体外延层之间。于本发明的一态样中,该发光二极管可为一直通式发光二极管,其第一半导体外延层可被该活性中间层及该第二半导体外延层完全覆盖,其中,该第一半导体外延层、该反射层、该金属层及碳化物层具有相同电性,并且相互电性连接。该发光二极管还可包括一第二电极,其设置于该第二半导体外延层表面,其中,该第二电极与该第二半导体外延层具有相同电性,以相互电性连接。于本发明的一具体态样中,该第一半导体外延层、该反射层、该金属层及碳化物层为P型电性,而该第二半导体外延层及该第二电极为N型电性。据此,本发明的发光二极管即可形成一直通式发光二极管。In the light-emitting diode of the present invention, the first semiconductor epitaxial layer is sandwiched between the reflective layer and the active intermediate layer, and the active intermediate layer is sandwiched between the first semiconductor epitaxial layer and the second semiconductor epitaxial layer between. In one aspect of the present invention, the light-emitting diode can be a straight-through light-emitting diode, and its first semiconductor epitaxial layer can be completely covered by the active intermediate layer and the second semiconductor epitaxial layer, wherein the first semiconductor epitaxial layer , the reflective layer, the metal layer and the carbide layer have the same electrical properties and are electrically connected to each other. The light-emitting diode may further include a second electrode disposed on the surface of the second semiconductor epitaxial layer, wherein the second electrode and the second semiconductor epitaxial layer have the same electrical property to be electrically connected to each other. In a specific aspect of the present invention, the first semiconductor epitaxial layer, the reflective layer, the metal layer and the carbide layer are P-type electrical, and the second semiconductor epitaxial layer and the second electrode are N-type electrical. sex. Accordingly, the light emitting diode of the present invention can form a straight-through light emitting diode.

于本发明上述发光二极管中,该半导体外延层可含有一掺杂物,该掺杂物可为铟。据此,该半导体外延层的活性中间层可形成为一多量子井层(multiple quantum well layer),以提升发光二极管中电能转换成光能的效率,但本发明并不以此为限。In the above light-emitting diode of the present invention, the semiconductor epitaxial layer may contain a dopant, and the dopant may be indium. Accordingly, the active intermediate layer of the semiconductor epitaxial layer can be formed as a multiple quantum well layer to improve the efficiency of converting electrical energy into light energy in the LED, but the invention is not limited thereto.

于本发明上述发光二极管中,该基板可包含一绝缘层、以及一电路基板,其中,该绝缘层的材质可选自由类金刚石、氧化铝、陶瓷、以及含金刚石的环氧树脂所组群组的至少一种;该电路基板则可为一金属板、一陶瓷板或一硅基板。In the above light-emitting diode of the present invention, the substrate may include an insulating layer and a circuit substrate, wherein the material of the insulating layer may be selected from a group consisting of diamond-like carbon, aluminum oxide, ceramics, and diamond-containing epoxy resin at least one of; the circuit substrate can be a metal plate, a ceramic plate or a silicon substrate.

一般而言,公知金刚石材料因其具有超硬材料的特性,能以15,000m/s的超声波速度传递热量,相当于5倍的银热传速度,若应用于发光二极管中,可降低其平均温度或能使其温度分布均匀,达到有效散热的目的。而本发明的重要技术特征即在于通过超声波散热方式,快速移除半导体外延层中的热点,以优化发光二极管的发光效率。因此,于上述本发明的发光二极管中,通常热点产生位置为半导体外延层的活性中间层,因此,活性中间层与金刚石材料间的距离变得相当重要。举例而言,于上述本发明发光二极管中,可选用类金刚石作为该碳化物层并设置于半导体外延层及该基板间,使该类金刚石可提供该半导体外延层一超声波散热功能,达到消除热点的目的。此外,类金刚石亦可为基板的绝缘层,只要类金刚石与热点的距离够近,可使其具有超声波散热的功效即可,本发明并不特别限制其位置。Generally speaking, it is known that diamond material can transfer heat at an ultrasonic speed of 15,000m/s due to its superhard material properties, which is equivalent to five times the heat transfer speed of silver. If it is used in light-emitting diodes, its average temperature can be reduced Or it can make the temperature distribution even and achieve the purpose of effective heat dissipation. The important technical feature of the present invention is to quickly remove the hot spot in the semiconductor epitaxial layer by means of ultrasonic heat dissipation, so as to optimize the luminous efficiency of the light emitting diode. Therefore, in the light-emitting diode of the present invention, the location of the hot spot is generally the active intermediate layer of the semiconductor epitaxial layer, so the distance between the active intermediate layer and the diamond material becomes very important. For example, in the above-mentioned light-emitting diode of the present invention, diamond-like carbon can be selected as the carbide layer and arranged between the semiconductor epitaxial layer and the substrate, so that the diamond-like carbon can provide the semiconductor epitaxial layer with an ultrasonic heat dissipation function to eliminate hot spots the goal of. In addition, the diamond-like carbon can also be the insulating layer of the substrate, as long as the distance between the diamond-like carbon and the hot spot is close enough to enable it to have the effect of ultrasonic heat dissipation, the present invention does not particularly limit its location.

本发明的另一目的在于提供芯片板上封装结构(chip on board,COB),其通过调整多量子井层及碳化物层的结构设计,使芯片板上封装结构的发光二极管于运作产生热量的过程中,通过超声波方式散热,快速移除发光二极管中的热点,以稳定发光二极管的晶格结构,从而达到优化发光二极管散热效率,并维持其发光效率。Another object of the present invention is to provide a package structure on chip (chip on board, COB). By adjusting the structural design of the multi-quantum well layer and the carbide layer, the light-emitting diodes of the package structure on the chip can be used to generate heat during operation. During the process, heat is dissipated by means of ultrasonic waves, and hot spots in the LEDs are quickly removed to stabilize the lattice structure of the LEDs, thereby optimizing the heat dissipation efficiency of the LEDs and maintaining their luminous efficiency.

本发明的一态样提供一种芯片板上封装结构(chip on board,COB),包括:一电路载板,其包括至少一电性连接垫;一半导体外延层,其位于该电路载板表面,该半导体外延层包括一第一半导体外延层、一活性中间层、以及一第二半导体外延层;一反射层,其夹置于该半导体外延层及该电路载板之间;一金属层,其夹置于该反射层及该电路载板之间;以及一碳化物层,其夹置于该金属层及该电路载板之间;其中,该活性中间层及该碳化物层间的距离可为1至10微米。An aspect of the present invention provides a chip on board (COB), comprising: a circuit carrier including at least one electrical connection pad; a semiconductor epitaxial layer located on the surface of the circuit carrier , the semiconductor epitaxial layer includes a first semiconductor epitaxial layer, an active intermediate layer, and a second semiconductor epitaxial layer; a reflective layer, which is sandwiched between the semiconductor epitaxial layer and the circuit carrier; a metal layer, It is sandwiched between the reflective layer and the circuit carrier; and a carbide layer is sandwiched between the metal layer and the circuit carrier; wherein, the distance between the active intermediate layer and the carbide layer Can be 1 to 10 microns.

于本发明上述芯片板上封装结构中,该活性中间层及该碳化物层间的距离较佳可为2微米。In the chip-on-board package structure of the present invention, the distance between the active intermediate layer and the carbide layer is preferably 2 microns.

于本发明上述芯片板上封装结构中,该反射层可为由银、或铝、或其合金所组成。然而,应了解的是,反射层的材质并不仅限于此,举例而言,亦可为铟锡氧化物(indium tin oxide,ITO)、氧化铝锌(aluminum zinc oxide,AZO)、氧化锌(ZnO)、石墨烯(graphene)、镍(Ni)、钴(Co)、钯(Pd)、铂(Pt)、金(Au)、锌(Zn)、锡(Sn)、锑(Sb)、铅(Pb)、铜(Cu)、铜银(CuAg)、镍银(NiAg)、其合金、或其金属混合物。上述铜银(CuAg)与镍银(NiAg)等是指共晶金属(eutectic metal),除了用于达到反射效果之外,也可以达到形成奥姆接触(ohmic contact)的效用。In the chip-on-package structure of the present invention, the reflective layer may be composed of silver, or aluminum, or an alloy thereof. However, it should be understood that the material of the reflective layer is not limited thereto. For example, it may also be indium tin oxide (ITO), aluminum zinc oxide (AZO), zinc oxide (ZnO) ), graphene (graphene), nickel (Ni), cobalt (Co), palladium (Pd), platinum (Pt), gold (Au), zinc (Zn), tin (Sn), antimony (Sb), lead ( Pb), copper (Cu), copper silver (CuAg), nickel silver (NiAg), alloys thereof, or metal mixtures thereof. The above-mentioned copper silver (CuAg) and nickel silver (NiAg) refer to eutectic metals, which can not only achieve the reflective effect, but also achieve the effect of forming ohmic contact.

于本发明上述芯片板上封装结构中,该金属层可为钛、锆、钼、或钨,且该金属层的厚度为5纳米至500纳米。再者,该碳化物层则可为类金刚石、石墨烯、或其组合,且该碳化物层的厚度可为5纳米至1000纳米。据此,该金属层及该碳化物层可形成为相互堆叠的多层结构。于本发明的一态样中,该金属层及该碳化物层可各自独立以1至10层相互堆叠,从而形成为一2至20层相互堆叠的多层结构。In the chip-on-chip package structure of the present invention, the metal layer can be titanium, zirconium, molybdenum, or tungsten, and the thickness of the metal layer is 5 nm to 500 nm. Furthermore, the carbide layer can be diamond-like carbon, graphene, or a combination thereof, and the thickness of the carbide layer can be 5 nm to 1000 nm. Accordingly, the metal layer and the carbide layer can be formed into a multilayer structure stacked on each other. In an aspect of the present invention, the metal layer and the carbide layer can be independently stacked with 1 to 10 layers to form a multilayer structure with 2 to 20 layers stacked with each other.

于本发明上述芯片板上封装结构中,该金属层及该碳化物层形成方法并不特别限制,举例而言,可以电弧沉积法或溅镀法形成该金属层或该碳化物层。于本发明的一态样中,该碳化物层可以电弧沉积法形成于该金属层上。于本发明的另一态样中,该碳化物层则以溅镀法形成于该金属层上。In the chip-on-chip package structure of the present invention, the method for forming the metal layer and the carbide layer is not particularly limited. For example, the metal layer or the carbide layer can be formed by arc deposition or sputtering. In one aspect of the present invention, the carbide layer can be formed on the metal layer by arc deposition. In another aspect of the present invention, the carbide layer is formed on the metal layer by sputtering.

于本发明上述芯片板上封装结构中,由于该碳化物层系形成于电路载板及半导体外延层间,该碳化物层需具导电的功能,因此,当所选用的碳化物层为类金刚石时,该类金刚石需为一导电性的四面体结构,且该类金刚石的碳原子含量高于95%以上,及该类金刚石的25%以上碳原子具有一扭曲四面体键结结构。据此,使得介于半导体外延层及基板间的金属层及碳化物层可具有导电的性质。In the packaging structure on chip board of the present invention, because the carbide layer is formed between the circuit carrier board and the semiconductor epitaxial layer, the carbide layer needs to have the function of conducting electricity. Therefore, when the selected carbide layer is diamond-like carbon , the diamond-like carbon must have a conductive tetrahedral structure, and the carbon atom content of the diamond-like carbon is higher than 95%, and more than 25% of the carbon atoms of the diamond-like carbon have a twisted tetrahedral bonding structure. Accordingly, the metal layer and the carbide layer between the semiconductor epitaxial layer and the substrate can have the property of conduction.

于本发明上述芯片板上封装结构中,该第二半导体外延层是夹置于该反射层及该活性中间层之间,该活性中间层是夹置于该第一半导体外延层与该第二半导体外延层之间,且该第一半导体外延层部分未覆盖该活性中间层及该第二半导体外延层,从而显露部分该第一半导体外延层,以提供作为电性连接的用途。In the chip-on-board package structure of the present invention, the second semiconductor epitaxial layer is sandwiched between the reflective layer and the active intermediate layer, and the active intermediate layer is sandwiched between the first semiconductor epitaxial layer and the second semiconductor epitaxial layer. Between the semiconductor epitaxial layers, and the first semiconductor epitaxial layer partially does not cover the active intermediate layer and the second semiconductor epitaxial layer, thereby exposing a part of the first semiconductor epitaxial layer to provide an electrical connection.

于本发明上述芯片板上封装结构中,该金属层及该碳化物层所形成的多层结构可分别设置于该第二半导体外延层及该第一半导体外延层的表面,作为电极的用途以电性连接至该电路载板。具体而言,为使该半导体外延层可电性连接至该电路载板上,该第二半导体外延层及设置于其上的金属层与碳化物层可为P型电性;而该第一半导体外延层及设置于其上的金属层与碳化物层则可为N型电性。据此,可使该半导体外延层得以电性连接于该电路载板上。In the chip-on-board packaging structure of the present invention, the multi-layer structure formed by the metal layer and the carbide layer can be respectively arranged on the surface of the second semiconductor epitaxial layer and the first semiconductor epitaxial layer, as electrodes and electrically connected to the circuit carrier. Specifically, in order to allow the semiconductor epitaxial layer to be electrically connected to the circuit carrier, the second semiconductor epitaxial layer and the metal layer and carbide layer disposed thereon can be of P-type electrical property; and the first The semiconductor epitaxial layer and the metal layer and carbide layer disposed thereon can be N-type electrical. Accordingly, the semiconductor epitaxial layer can be electrically connected to the circuit carrier.

于本发明上述芯片板上封装结构中,还可包括一焊接层,其设置于该电路载板及该碳化物层之间,从而使得该半导体外延层可稳固地电性连接至该电路载板。In the chip-on-board package structure of the present invention, a soldering layer may also be included, which is arranged between the circuit carrier and the carbide layer, so that the semiconductor epitaxial layer can be firmly electrically connected to the circuit carrier .

于本发明上述芯片板上封装结构中,该半导体外延层可含有一掺杂物,该掺杂物可为铟。据此,该半导体外延层的活性中间层可形成为一多量子井层(multiple quantum well layer),以提升发光二极管中电能转换成光能的效率,但本发明并不以此为限。In the chip-on-board package structure of the present invention, the semiconductor epitaxial layer may contain a dopant, and the dopant may be indium. Accordingly, the active intermediate layer of the semiconductor epitaxial layer can be formed as a multiple quantum well layer to improve the efficiency of converting electrical energy into light energy in the LED, but the invention is not limited thereto.

于本发明上述芯片板上封装结构中,该电路载板可包含一绝缘层、以及一电路基板,其中,该绝缘层的材质可选自由类金刚石、氧化铝、陶瓷、以及含金刚石的环氧树脂所组群组的至少一种;该电路基板则可为一金属板、一陶瓷板或一硅基板。In the chip-on-board packaging structure of the present invention, the circuit carrier may include an insulating layer and a circuit substrate, wherein the material of the insulating layer may be selected from diamond-like carbon, aluminum oxide, ceramics, and diamond-containing epoxy At least one of resin group; the circuit substrate can be a metal plate, a ceramic plate or a silicon substrate.

一般而言,公知金刚石材料因其具有超硬材料的特性,能以15,000m/s的超声波速度传递热量,相当于5倍的银热传速度,若应用于发光二极管中,可降低其平均温度或能使其温度分布均匀,达到有效散热的目的。而本发明的重要技术特征即在于通过超声波散热方式,快速移除半导体外延层中的热点,以优化发光二极管的发光效率。于上述本发明的芯片板上封装结构中,通常热点产生位置为半导体外延层的活性中间层,因此,活性中间层与金刚石材料间的距离变得相当重要。举例而言,于上述本发明芯片板上封装结构中,可选用类金刚石作为该碳化物层并设置于半导体外延层及该电路载板间,使该类金刚石可提供该半导体外延层一超声波散热功能,达到消除热点的目的。此外,类金刚石亦可为基板的绝缘层,只要类金刚石与热点的距离够近,可使其具有超声波散热的功效即可,本发明并不特别限制其位置。Generally speaking, it is known that diamond material can transfer heat at an ultrasonic speed of 15,000m/s due to its superhard material properties, which is equivalent to five times the heat transfer speed of silver. If it is used in light-emitting diodes, its average temperature can be reduced Or it can make the temperature distribution even and achieve the purpose of effective heat dissipation. The important technical feature of the present invention is to quickly remove the hot spot in the semiconductor epitaxial layer by means of ultrasonic heat dissipation, so as to optimize the luminous efficiency of the light emitting diode. In the above chip-on-chip package structure of the present invention, the location where the hot spot is usually generated is the active intermediate layer of the semiconductor epitaxial layer. Therefore, the distance between the active intermediate layer and the diamond material becomes very important. For example, in the above-mentioned on-chip package structure of the present invention, diamond-like carbon can be selected as the carbide layer and arranged between the semiconductor epitaxial layer and the circuit carrier, so that the diamond-like carbon can provide the semiconductor epitaxial layer with ultrasonic heat dissipation. function to achieve the purpose of eliminating hot spots. In addition, the diamond-like carbon can also be the insulating layer of the substrate, as long as the distance between the diamond-like carbon and the hot spot is close enough to enable it to have the effect of ultrasonic heat dissipation, the present invention does not particularly limit its location.

再者,于上述本发明的芯片板上封装结构中,该芯片板上封装结构还可包括一基板,其设置于该第一半导体外延层上。具体而言,可先于该基板上制备一芯片倒装式发光二极管,并以芯片倒装技术将该发光二极管通过一焊接层电性连接并封装至该电路载板上,以形成该芯片板上封装结构。因此,若该基板为一透明基板,则可保留于该半导体外延层上,反的则需移除。于本发明的一具体态样中,该基板可为一蓝宝石基板而保留于该半导体外延层上,但本发明并不仅限于此。Furthermore, in the chip-on-chip package structure of the present invention, the chip-on-chip package structure may further include a substrate disposed on the first semiconductor epitaxial layer. Specifically, a flip-chip light-emitting diode can be prepared on the substrate first, and the light-emitting diode is electrically connected and packaged on the circuit carrier through a soldering layer by flip-chip technology to form the chip board upper packaging structure. Therefore, if the substrate is a transparent substrate, it can remain on the semiconductor epitaxial layer, otherwise it needs to be removed. In a specific aspect of the present invention, the substrate may be a sapphire substrate remaining on the semiconductor epitaxial layer, but the present invention is not limited thereto.

以下是由特定的具体实施例说明本发明的实施方式,本领域技术人员可由本说明书所揭示的内容轻易地了解本发明的其他优点与功效。本发明亦可由其他不同的具体实施例加以施行或应用,本说明书中的各项细节亦可基于不同观点与应用,在不悖离本发明的精神下进行各种修饰与变更。The implementation of the present invention is illustrated by specific specific examples below, and those skilled in the art can easily understand other advantages and effects of the present invention from the content disclosed in this specification. The present invention can also be implemented or applied by other different specific embodiments, and various modifications and changes can be made to the details in this specification based on different viewpoints and applications without departing from the spirit of the present invention.

本发明的实施例中该些附图均为简化的示意图。惟该些图标仅显示与本发明有关的组件,其所显示的组件非为实际实施时的态样,其实际实施时的组件数目、形状等比例为一选择性的设计,且其组件布局型态可能更复杂。These drawings in the embodiments of the present invention are simplified schematic diagrams. However, these icons only show the components related to the present invention, and the components shown are not the appearance of the actual implementation. The number, shape and other proportions of the components in the actual implementation are a selective design, and the layout of the components is state may be more complex.

实施例一Embodiment one

本发明的目的在于提供一种发光二极管,其通过调整发光二极管的结构设计,使其能利用超声波方式散热,快速移除活性中间层中的热点,从而达到优化发光二极管散热效率,并维持其发光效率。The object of the present invention is to provide a light-emitting diode, which, by adjusting the structural design of the light-emitting diode, enables it to dissipate heat by means of ultrasonic waves and quickly remove hot spots in the active intermediate layer, thereby optimizing the heat dissipation efficiency of the light-emitting diode and maintaining its light emission efficiency.

请参考图2A至2E,是本发明实施例一的发光二极管1制备流程结构示意图,其中,此实施例一所制备的发光二极管1为一直通式发光二极管。首先,如图2A所示,提供一基板10,其包含一绝缘层1070、以及一电路基板1071。接着,如图2B所示,于该基板10上方以溅镀法形成一由两层金属层151及两层碳化物层152相互堆叠形成的多层结构15,其中,该些金属层151为钛、该些碳化物层152为可导电的类金刚石,且该些金属层151及该些碳化物层152的厚度各自独立为100纳米。接着,请参考图2C,于该金属层151上形成一反射层11,其中,该反射层11为铝。此外,因所制备的发光二极管1为直通式发光二极管,是以上述金属层151、碳化物层152及反射层11需具有相同电性,于此实施例一中,该反射层11、该金属层151及该碳化物层152为P型电性。Please refer to FIGS. 2A to 2E , which are schematic structural diagrams of the manufacturing process of the light emitting diode 1 according to the first embodiment of the present invention, wherein the light emitting diode 1 prepared in the first embodiment is a straight-through light emitting diode. First, as shown in FIG. 2A , a substrate 10 is provided, which includes an insulating layer 1070 and a circuit substrate 1071 . Next, as shown in FIG. 2B , a multi-layer structure 15 formed by stacking two metal layers 151 and two carbide layers 152 is formed on the substrate 10 by sputtering, wherein the metal layers 151 are made of titanium. , the carbide layers 152 are conductive diamond-like carbon, and the thicknesses of the metal layers 151 and the carbide layers 152 are each independently 100 nanometers. Next, please refer to FIG. 2C , a reflective layer 11 is formed on the metal layer 151 , wherein the reflective layer 11 is aluminum. In addition, because the prepared light-emitting diode 1 is a straight-through light-emitting diode, the above-mentioned metal layer 151, carbide layer 152 and reflective layer 11 must have the same electrical properties. In this embodiment one, the reflective layer 11, the metal Layer 151 and the carbide layer 152 are P-type electrical.

请继续参阅图2D,于该反射层11上方形成一半导体外延层12,其中,该半导体外延层12包含一第一半导体外延层121、一活性中间层122、以及一第二半导体外延层123,其中,该第一半导体外延层121、该活性中间层122与该第二半导体外延层123系层迭设置,该第一半导体外延层121夹置于该反射层11及该活性中间层122之间,该活性中间层122夹置于该第一半导体外延层121与该第二半导体外延层123之间。于此实施例一中,该半导体外延层12的材质为氮化铟镓(InGaN),且该第一半导体外延层121为P型外延层,该第二半导体外延层123系N型外延层。在此,需注意的是,本发明的重要技术特征在于通过碳化物层的结构设计,使其能利用超声波方式进行散热。因此,在此实施例一中,该活性中间层122与上述至少一碳化物层152间的距离设计为2微米,从而使得作为碳化物层152的类金刚石得以提供半导体外延层12由超声波方式散热,以15,000m/s的超声波速度快速移除热量,并减少产生于活性中间层122的热点。此外,本发明半导体外延层12适用的材质不限于此,亦可以使用选用其他本领域中常用材质。再者,于此实施例一中,该活性中间层122为多量子井层,用以提升发光二极管1中电能转换成光能的效率。Please continue to refer to FIG. 2D, a semiconductor epitaxial layer 12 is formed above the reflective layer 11, wherein the semiconductor epitaxial layer 12 includes a first semiconductor epitaxial layer 121, an active intermediate layer 122, and a second semiconductor epitaxial layer 123, Wherein, the first semiconductor epitaxial layer 121, the active intermediate layer 122 and the second semiconductor epitaxial layer 123 are laminated, and the first semiconductor epitaxial layer 121 is interposed between the reflective layer 11 and the active intermediate layer 122. , the active intermediate layer 122 is sandwiched between the first semiconductor epitaxial layer 121 and the second semiconductor epitaxial layer 123 . In the first embodiment, the semiconductor epitaxial layer 12 is made of indium gallium nitride (InGaN), and the first semiconductor epitaxial layer 121 is a P-type epitaxial layer, and the second semiconductor epitaxial layer 123 is an N-type epitaxial layer. Here, it should be noted that the important technical feature of the present invention lies in the structural design of the carbide layer so that it can dissipate heat by means of ultrasonic waves. Therefore, in this embodiment one, the distance between the active intermediate layer 122 and the above-mentioned at least one carbide layer 152 is designed to be 2 microns, so that the diamond-like carbon as the carbide layer 152 can provide the semiconductor epitaxial layer 12 with ultrasonic heat dissipation. , quickly remove heat at an ultrasonic speed of 15,000 m/s, and reduce hot spots generated in the active intermediate layer 122 . In addition, the applicable material of the semiconductor epitaxial layer 12 of the present invention is not limited thereto, and other commonly used materials in the field can also be used. Furthermore, in the first embodiment, the active intermediate layer 122 is a multi-quantum well layer, which is used to improve the efficiency of converting electrical energy into light energy in the LED 1 .

最后,请参阅图2E,是于该第二半导体外延层123上形成一第二电极13,其中,该第二电极为N型电性。于此实施例一的发光二极管1中,该由金属层151及碳化物层152形成的多层结构15同时兼具作为电极的功能,且该反射层11、该金属层151及该碳化物层152的电性与第一半导体外延层121同为P型电性;该第二半导体外延层123及该第二电极13则同为N型电性,从而此实施例一所完成的发光二极管1为一直通式发光二极管。Finally, please refer to FIG. 2E , a second electrode 13 is formed on the second semiconductor epitaxial layer 123 , wherein the second electrode is N-type electrical. In the light-emitting diode 1 of the first embodiment, the multilayer structure 15 formed by the metal layer 151 and the carbide layer 152 also functions as an electrode, and the reflective layer 11, the metal layer 151 and the carbide layer 152 and the first semiconductor epitaxial layer 121 are both P-type electrical; the second semiconductor epitaxial layer 123 and the second electrode 13 are both N-type electrical. It is a straight-through light-emitting diode.

据此,如图2A至图2E所示,上述制得发光二极管1,其包括:一基板10,其包括一绝缘层1070、以及一电路基板1071;一半导体外延层12,其位于基板10上,该半导体外延层12包括一第一半导体外延层121、一活性中间层122、以及一第二半导体外延层123,其中,该第一半导体外延层121夹置于该基板10及该活性中间层122之间,该活性中间层122夹置于该第一半导体外延层121与该第二半导体外延层123之间;一反射层11,其夹置于该基板10及该半导体外延层12间;一由两层金属层151及两层碳化物层152相互堆叠形成的多层结构15,其中,金属层151为钛且位于多层结构15上方的金属层151夹置于该反射层11及该基板10之间,碳化物层152为一可导电的类金刚石且位于多层结构15下方的碳化物层152夹置于该金属层151及该基板10之间;其中,该活性中间层122及该碳化物层间的距离为2微米,该第一半导体外延层121、该反射层11、该金属层151及该碳化物层152为P型电性,且该第二半导体外延层123则与该第二电极13同为N型电性。据此,即可制备完成此实施例一的发光二极管1,其为一直通式发光二极管。Accordingly, as shown in FIG. 2A to FIG. 2E , the above-mentioned light-emitting diode 1 is manufactured, which includes: a substrate 10, which includes an insulating layer 1070, and a circuit substrate 1071; a semiconductor epitaxial layer 12, which is located on the substrate 10 , the semiconductor epitaxial layer 12 includes a first semiconductor epitaxial layer 121, an active intermediate layer 122, and a second semiconductor epitaxial layer 123, wherein the first semiconductor epitaxial layer 121 is sandwiched between the substrate 10 and the active intermediate layer 122, the active intermediate layer 122 is sandwiched between the first semiconductor epitaxial layer 121 and the second semiconductor epitaxial layer 123; a reflective layer 11, which is sandwiched between the substrate 10 and the semiconductor epitaxial layer 12; A multilayer structure 15 formed by stacking two metal layers 151 and two carbide layers 152, wherein the metal layer 151 is titanium and the metal layer 151 above the multilayer structure 15 is sandwiched between the reflective layer 11 and the Between the substrates 10, the carbide layer 152 is a conductive diamond-like substance and the carbide layer 152 under the multilayer structure 15 is sandwiched between the metal layer 151 and the substrate 10; wherein, the active intermediate layer 122 and The distance between the carbide layers is 2 microns, the first semiconductor epitaxial layer 121, the reflective layer 11, the metal layer 151 and the carbide layer 152 are P-type electrical, and the second semiconductor epitaxial layer 123 and The second electrode 13 is also N-type electrical. Accordingly, the light emitting diode 1 of the first embodiment, which is a straight-through light emitting diode, can be prepared.

实施例二Embodiment two

除上述实施例一的直通式发光二极管外,亦可将本发明的重要技术特征应用于芯片板上封装结构中,从而优化其发光效率。In addition to the straight-through light emitting diode of the first embodiment above, the important technical features of the present invention can also be applied to the on-chip packaging structure, thereby optimizing its luminous efficiency.

请参阅图3A至3F,是本发明实施例二的芯片板上封装结构300制备流程结构示意图,其中,此实施例二是先制备所需的发光二极管3,其为一芯片倒装式发光二极管。Please refer to FIGS. 3A to 3F , which are schematic diagrams of the manufacturing process of the chip-on-chip packaging structure 300 according to Embodiment 2 of the present invention. In Embodiment 2, the required light-emitting diode 3 is prepared first, which is a flip-chip light-emitting diode. .

首先,如图3A所示,提供一基板30。在此实施例三中,该基板30为一蓝宝石基板。接着,如图3B所示,于该基板30上方形成一半导体外延层32,其中,该半导体外延层32包含一第一半导体外延层321、一活性中间层322、以及一第二半导体外延层323,其中,该第一半导体外延层321、该活性中间层322与该第二半导体外延层323是层迭设置,该第一半导体外延层321夹置于该基板30及该活性中间层322之间,该活性中间层322夹置于该第一半导体外延层321与该第二半导体外延层323之间。于完成该半导体外延层32后,移除部分第二半导体外延层323及部分活性中间层322,以显露其下的第一半导体外延层321。于此实施例二中,该半导体外延层32的材质为氮化铟镓(InGaN),且该第一半导体外延层321为N型,该第二半导体外延层323为P型。此外,本发明半导体外延层32适用的材质不限于此,亦可以使用选用其他本领域中常用材质。再者,于此实施例二中,该活性中间层322为多量子井层,用以提升发光二极管3中电能转换成光能的效率。First, as shown in FIG. 3A , a substrate 30 is provided. In the third embodiment, the substrate 30 is a sapphire substrate. Next, as shown in FIG. 3B, a semiconductor epitaxial layer 32 is formed above the substrate 30, wherein the semiconductor epitaxial layer 32 includes a first semiconductor epitaxial layer 321, an active intermediate layer 322, and a second semiconductor epitaxial layer 323. , wherein the first semiconductor epitaxial layer 321, the active intermediate layer 322 and the second semiconductor epitaxial layer 323 are stacked, and the first semiconductor epitaxial layer 321 is sandwiched between the substrate 30 and the active intermediate layer 322 , the active intermediate layer 322 is sandwiched between the first semiconductor epitaxial layer 321 and the second semiconductor epitaxial layer 323 . After the semiconductor epitaxial layer 32 is completed, part of the second semiconductor epitaxial layer 323 and part of the active intermediate layer 322 are removed to expose the underlying first semiconductor epitaxial layer 321 . In the second embodiment, the semiconductor epitaxial layer 32 is made of indium gallium nitride (InGaN), the first semiconductor epitaxial layer 321 is N-type, and the second semiconductor epitaxial layer 323 is P-type. In addition, the applicable material of the semiconductor epitaxial layer 32 of the present invention is not limited thereto, and other commonly used materials in the field can also be used. Furthermore, in the second embodiment, the active intermediate layer 322 is a multi-quantum well layer, which is used to improve the efficiency of converting electrical energy into light energy in the LED 3 .

请继续参阅图3C,于该部分未移除的第二半导体外延层323上方形成一反射层31。于此实施例二中,该反射层31为银。然而,此形成反射层31的步骤,本发明所属技术领域的通常知识者可依需要选择性执行,换言之若不打算设置反射层,则可跳过形成反射层31的步骤而无需进行。Please continue to refer to FIG. 3C , a reflective layer 31 is formed on the portion of the unremoved second semiconductor epitaxial layer 323 . In the second embodiment, the reflective layer 31 is silver. However, the step of forming the reflective layer 31 can be selectively performed by those skilled in the art to which the present invention belongs. In other words, if the reflective layer is not intended to be provided, the step of forming the reflective layer 31 can be skipped.

再者,请参阅图3D,于该反射层31上以电弧沉积法形成由1层金属层351及1层碳化物层352相互堆叠的多层结构35,其中,该金属层351为钛且该碳化物层352为可导电的类金刚石。此外,于该显露的第一半导体外延层321上形成一第一电极34,该第一电极34的材质并不特别限制,只要能够与该第一半导体外延层321形成电性连接即可。于此实施例二中,该第一电极34亦为由金属层及碳化物层形成的多层结构(图未显示),并且通过调整其相互堆叠的层数使得该第一电极34及该碳化物层352形成一共平面。再者,考虑该发光二极管3需电性连接至电路载板上,该第一电极34与该第一半导体外延层321为N型电性;该金属层351、该碳化物层352与该第二半导体外延层323为P型电性。接着,如图3E所示,于该第一电极34表面与该碳化物层352表面上,分别形成一第一金属焊接层36以及第二金属焊接层37,其中,该第一金属焊接层36的表面与该第二金属焊接层37的表面形成一共平面。于本实施例中,该第一金属焊接层36与该第二金属焊接层37是由金层与金锡层构成,且该金锡层是一共晶导电材料层。Furthermore, referring to FIG. 3D, a multilayer structure 35 stacked with a metal layer 351 and a carbide layer 352 is formed on the reflective layer 31 by an arc deposition method, wherein the metal layer 351 is titanium and the The carbide layer 352 is an electrically conductive diamond-like carbon. In addition, a first electrode 34 is formed on the exposed first semiconductor epitaxial layer 321 . The material of the first electrode 34 is not particularly limited as long as it can form an electrical connection with the first semiconductor epitaxial layer 321 . In this second embodiment, the first electrode 34 is also a multi-layer structure (not shown) formed by a metal layer and a carbide layer, and by adjusting the number of layers stacked on each other, the first electrode 34 and the carbide Object layer 352 forms a coplanar surface. Furthermore, considering that the light emitting diode 3 needs to be electrically connected to the circuit board, the first electrode 34 and the first semiconductor epitaxial layer 321 are N-type electrical; the metal layer 351, the carbide layer 352 and the first The second semiconductor epitaxial layer 323 is P-type electrical. Next, as shown in FIG. 3E , on the surface of the first electrode 34 and the surface of the carbide layer 352, a first metal welding layer 36 and a second metal welding layer 37 are respectively formed, wherein the first metal welding layer 36 The surface of and the surface of the second metal soldering layer 37 form a coplanar surface. In this embodiment, the first metal soldering layer 36 and the second metal soldering layer 37 are composed of a gold layer and a gold-tin layer, and the gold-tin layer is a eutectic conductive material layer.

最后,请参阅图3F,将上述所制备的发光二极管3电性连接并封装至一电路载板7上并利用激光剥离技术(laser lift-off),移除该基板30,以制备此实施例二的芯片板上封装结构300。如图3F所示,芯片板上封装结构300包括:一电路载板7;以及上述所制得的发光二极管3,其经由该第一金属焊接层36以及该第二金属焊接层37电性连接该电路载板7,其中,该电路载板7包含一绝缘层70、一电路基板71、以及电性连接垫73。在此,需注意的是,本发明的重要技术特征在于通过碳化物层使芯片板上封装结构能通过超声波方式进行散热,该活性中间层322与该碳化物层352间的距离设计为2微米,从而使得作为碳化物层352的类金刚石得以由超声波散热的方式,以15,000m/s的超声波速度快速移除产生于活性中间层322的热点。Finally, please refer to FIG. 3F , the light-emitting diode 3 prepared above is electrically connected and packaged on a circuit carrier 7 and the substrate 30 is removed by using laser lift-off technology to prepare this embodiment. The chip-on-chip package structure 300 . As shown in FIG. 3F , the chip-on-chip package structure 300 includes: a circuit carrier 7 ; and the light-emitting diode 3 manufactured above, which is electrically connected through the first metal soldering layer 36 and the second metal soldering layer 37 The circuit carrier 7 , wherein the circuit carrier 7 includes an insulating layer 70 , a circuit substrate 71 , and electrical connection pads 73 . Here, it should be noted that the important technical feature of the present invention is that the on-chip packaging structure can dissipate heat through ultrasonic waves through the carbide layer, and the distance between the active intermediate layer 322 and the carbide layer 352 is designed to be 2 microns , so that the diamond-like carbide layer 352 can be dissipated by ultrasonic waves, and the hot spots generated in the active intermediate layer 322 can be quickly removed at an ultrasonic speed of 15,000 m/s.

此外,于该芯片板上封装结构300中,可利用形成于电性连接垫73表面的焊料72,通过芯片倒装方式,使该第一金属焊接层36以及该第二金属焊接层37与该电路载板7的电性连接垫73达到电性连接。In addition, in the chip-on-chip package structure 300, the solder 72 formed on the surface of the electrical connection pad 73 can be used to connect the first metal soldering layer 36 and the second metal soldering layer 37 to the The electrical connection pad 73 of the circuit carrier 7 is electrically connected.

据此,如图3A至图3F所示,上述制得的芯片板上封装结构300,其包括:一电路载板7;一半导体外延层32,其位于电路载板7上,该半导体外延层32包括一第一半导体外延层321、一活性中间层322、以及一第二半导体外延层323;一反射层31,其夹置于该电路载板7及该第二半导体外延层323间,;一金属层351,夹置于该反射层31及该电路载板7之间;一碳化物层352,夹置于该金属层351及该电路载板之间;以及一第一电极34,设置于该部份显露的第一半导体外延层321上;其中,该第二半导体外延层323夹置于该反射层31及该活性中间层322之间,该活性中间层322夹置于该第一半导体外延层321与该第二半导体外延层323之间,且该半导体外延层32是经由一第一金属焊接层36以及一第二金属焊接层37封装于该电路载板7,并且该活性中间层322及该碳化物层352间的距离为2微米。此外,该第一电极34与该第一半导体外延层321为N型电性;该金属层351、该碳化物层352与该第二半导体外延层323为P型电性。Accordingly, as shown in FIG. 3A to FIG. 3F , the chip-on-chip package structure 300 prepared above includes: a circuit carrier 7; a semiconductor epitaxial layer 32, which is located on the circuit carrier 7, and the semiconductor epitaxial layer 32 includes a first semiconductor epitaxial layer 321, an active intermediate layer 322, and a second semiconductor epitaxial layer 323; a reflective layer 31, which is sandwiched between the circuit carrier 7 and the second semiconductor epitaxial layer 323; A metal layer 351 is sandwiched between the reflective layer 31 and the circuit carrier 7; a carbide layer 352 is sandwiched between the metal layer 351 and the circuit carrier; and a first electrode 34 is provided On the partially exposed first semiconductor epitaxial layer 321; wherein, the second semiconductor epitaxial layer 323 is sandwiched between the reflective layer 31 and the active intermediate layer 322, and the active intermediate layer 322 is sandwiched between the first Between the semiconductor epitaxial layer 321 and the second semiconductor epitaxial layer 323, and the semiconductor epitaxial layer 32 is packaged on the circuit carrier 7 through a first metal soldering layer 36 and a second metal soldering layer 37, and the active middle The distance between layer 322 and the carbide layer 352 is 2 microns. In addition, the first electrode 34 and the first semiconductor epitaxial layer 321 are N-type electrical; the metal layer 351 , the carbide layer 352 and the second semiconductor epitaxial layer 323 are P-type electrical.

实施例三Embodiment Three

请参考图4,其此实施例三的芯片板上封装结构400的结构示意图。实施例三与上述实施例二的制备流程大致相似,所不同处在于,将所制备的发光二极管3电性连接并封装于该电路载板7上后,由于所使用的基板30为蓝宝石基板,因此,在不移除该基板30的情况下,同样可制备完成一芯片板上封装结构400。Please refer to FIG. 4 , which is a schematic structural diagram of a package-on-chip structure 400 according to the third embodiment. The preparation process of the third embodiment is roughly similar to that of the second embodiment above, except that after the prepared light-emitting diode 3 is electrically connected and packaged on the circuit carrier 7, since the substrate 30 used is a sapphire substrate, Therefore, without removing the substrate 30 , a package-on-chip structure 400 can also be prepared.

据此,如图4所示,此实施例三所制得的芯片板上封装结构400,其包括:一电路载板7;一半导体外延层32,其位于电路载板7上,该半导体外延层32包括一第一半导体外延层321、一活性中间层322、以及一第二半导体外延层323;一反射层31,其夹置于该电路载板7及该第二半导体外延层323间;一金属层351,夹置于该反射层31及该电路载板7之间;一碳化物层352,夹置于该金属层351及该电路载板7之间;一第一电极34,设置于该第一半导体外延层321上;以及一基板30,设置于该第一半导体外延层321上;其中,该第二半导体外延层323夹置于该反射层31及该活性中间层322之间,该活性中间层322夹置于该第一半导体外延层321与该第二半导体外延层323之间,且该半导体外延层32是经由一第一金属焊接层36以及一第二金属焊接层37封装于该电路载板7,并且该活性中间层322及该碳化物层352间的距离为2微米。此外,该第一电极34与该第一半导体外延层321为N型电性;该金属层351、该碳化物层352与该第二半导体外延层323为P型电性。Accordingly, as shown in FIG. 4, the chip-on-chip package structure 400 obtained in the third embodiment includes: a circuit carrier 7; a semiconductor epitaxial layer 32, which is located on the circuit carrier 7, and the semiconductor epitaxial Layer 32 includes a first semiconductor epitaxial layer 321, an active intermediate layer 322, and a second semiconductor epitaxial layer 323; a reflective layer 31, which is sandwiched between the circuit carrier 7 and the second semiconductor epitaxial layer 323; A metal layer 351 is sandwiched between the reflective layer 31 and the circuit carrier 7; a carbide layer 352 is sandwiched between the metal layer 351 and the circuit carrier 7; a first electrode 34 is provided on the first semiconductor epitaxial layer 321; and a substrate 30 disposed on the first semiconductor epitaxial layer 321; wherein the second semiconductor epitaxial layer 323 is sandwiched between the reflective layer 31 and the active intermediate layer 322 , the active intermediate layer 322 is sandwiched between the first semiconductor epitaxial layer 321 and the second semiconductor epitaxial layer 323, and the semiconductor epitaxial layer 32 is formed by a first metal soldering layer 36 and a second metal soldering layer 37 It is packaged on the circuit carrier 7 , and the distance between the active intermediate layer 322 and the carbide layer 352 is 2 microns. In addition, the first electrode 34 and the first semiconductor epitaxial layer 321 are N-type electrical; the metal layer 351 , the carbide layer 352 and the second semiconductor epitaxial layer 323 are P-type electrical.

实施例四Embodiment Four

实施例四与上述实施例二的制备流程大致相似,所不同处在于,所使用的电路载板的绝缘层为一类金刚石(与碳化物层的组成份相同)。据此,此实施例四所完成的芯片板上封装结构将可同时通过碳化物层及绝缘层进行超声波散热。The preparation process of Embodiment 4 is similar to that of Embodiment 2 above, except that the insulating layer of the circuit carrier used is a type of diamond (the composition of which is the same as that of the carbide layer). Accordingly, the chip-on-board packaging structure completed in the fourth embodiment can simultaneously conduct ultrasonic heat dissipation through the carbide layer and the insulating layer.

比较例一Comparative example one

此比较例一与实施例一大致相同,所不同处仅在于比较例一的直通式发光二极管中并不含有碳化物层。据此,比较例一所制得的直通式发光二极管将无法通过该碳化物层进行超声波散热。The first comparative example is substantially the same as the first embodiment, except that the through-type light-emitting diode of the first comparative example does not contain a carbide layer. Accordingly, the through-type light-emitting diode produced in Comparative Example 1 cannot conduct ultrasonic heat dissipation through the carbide layer.

比较例二Comparative example two

此比较例与实施例二大致相同,所不同处仅在于比较例的芯片板上封装结构中并不含有碳化物层。据此,比较例所制得的芯片板上封装结构将无法通过该碳化物层进行超声波散热。This comparative example is substantially the same as that of the second embodiment, except that the package structure on the chip of the comparative example does not contain a carbide layer. Accordingly, the package-on-chip structure prepared in the comparative example cannot conduct ultrasonic heat dissipation through the carbide layer.

试验例一Test example one

本试验例一是于相同的通电发光的条件下,利用一近场光学显微仪分析实施例一及比较例一所制备的直通式发光二极管的光场分布,以显示其热点产生缺陷的状况。请参考图5A及5B分别为实施例一及比较例一的光场分析结果图,其中,于图5A中并无观察到有因未发光而产生的黑点,显示实施例一的直通式发光二极管于通电发光(350毫安,7分钟)的情况下,并不会有因热点产生的缺陷;反的,于图5B中,则可发现于其中央处有因未发光而产生的黑点,显示于相同条件下,比较例一的直通式发光二极管有因热点产生的缺陷。In this test example 1, under the same electroluminescent conditions, a near-field optical microscope is used to analyze the light field distribution of the through-type light-emitting diodes prepared in Example 1 and Comparative Example 1 to show the defects caused by hot spots. . Please refer to Figures 5A and 5B, which are the light field analysis results of Example 1 and Comparative Example 1, respectively. In Figure 5A, no black spots due to non-luminescence were observed, showing the straight-through luminescence of Example 1 When the diode is energized and illuminated (350 mA, 7 minutes), there will be no defects caused by hot spots; on the contrary, in Figure 5B, it can be found that there is a black spot in the center due to no light , showing that under the same conditions, the through-type light-emitting diode of Comparative Example 1 has defects caused by hot spots.

试验例二Test example two

本试验例二是于相同的通电发光的条件下,分析实施例二及比较例二的芯片板上封装结构在持续通电发光(350毫安)达16分钟后的温度,其中,实施例二的芯片板上封装结构的温度达61.12℃至68.21℃;而比较例二的温度则为72.44℃至84.11℃,远高于实施例二的温度。因此,由此上述结果可知,根据本发明所制造具有超声波散热功能的芯片板上封装结构,可由类金刚石以提供超声波方式散热,快速移除热量,并减少产生于半导体外延层中的热点。This test example two is under the same electroluminescent condition, analyze the temperature of the package structure on the chip board of embodiment two and comparative example two after continuous electroluminescence (350 milliampere) reaches 16 minutes, wherein, embodiment two The temperature of the packaging structure on the chip board reaches 61.12°C to 68.21°C; while the temperature of Comparative Example 2 is 72.44°C to 84.11°C, much higher than that of Example 2. Therefore, it can be seen from the above results that the chip-on-chip packaging structure with ultrasonic heat dissipation function manufactured according to the present invention can dissipate heat by means of ultrasonic waves provided by diamond-like carbon, quickly remove heat, and reduce hot spots generated in the semiconductor epitaxial layer.

试验例三Test example three

本试验例三是于25℃下,利用T3Ster热阻仪分析实施例二及比较例二所制备的芯片板上封装结构,以显示其导热的状况。请参考图6A及6B,各自独立为实施例二及比较例二的热阻分析结果图,其中,横轴为热阻,单位为K/W;纵轴为热容,单位为Ks/W。请参考图6A,是本发明实施例二的热阻分析结果,其中,该电路载板及发光二极管间的热阻为0.98K/W。请参考图6B,是本发明比较例二的热阻分析结果,显示其电路载板及发光二极管间的热阻为1.51K/W。当芯片板上封装结构含有一由类金刚石形成的碳化物层,且该碳化物层与活性中间层间的距离为2微米时,将可有效降低两者间的热阻。In the third test example, at 25° C., a T3Ster thermal resistance meter was used to analyze the on-chip packaging structures prepared in the second embodiment and the second comparative example, so as to show the thermal conductivity. Please refer to FIGS. 6A and 6B , which are independent diagrams of thermal resistance analysis results of Example 2 and Comparative Example 2, wherein the horizontal axis represents thermal resistance in K/W; the vertical axis represents heat capacity in Ks/W. Please refer to FIG. 6A , which is the thermal resistance analysis result of the second embodiment of the present invention, wherein the thermal resistance between the circuit board and the LED is 0.98K/W. Please refer to FIG. 6B , which is the thermal resistance analysis result of Comparative Example 2 of the present invention, showing that the thermal resistance between the circuit board and the LED is 1.51K/W. When the packaging structure on the chip board contains a carbide layer formed by diamond-like carbon, and the distance between the carbide layer and the active intermediate layer is 2 microns, the thermal resistance between the two can be effectively reduced.

试验例四Test example four

本试验例四是于相同的通电发光条件下,利用一热像分析仪分析实施例一及比较例一所制备的直通式发光二极管芯片的温度分布。请参考图7A及7B,分别为实施例一及比较例一的温度分布结果图。如图7A及7B所示,于相同通电发光条件下(350毫安),实施例一的直通式发光二极管的温度约为58℃至60℃;反之,比较例一的直通式发光二极管的温度则约为73℃至76℃。因此,由此上述结果可知,根据本发明所制造具有超声波散热功能的直通式发光二极管,可由类金刚石以提供超声波方式散热,快速移除热量,并减少产生于半导体外延层中的热点。In the fourth test example, a thermal image analyzer is used to analyze the temperature distribution of the through-type light-emitting diode chips prepared in the first embodiment and the first comparative example under the same electroluminescence condition. Please refer to FIGS. 7A and 7B , which are graphs showing the temperature distribution results of Embodiment 1 and Comparative Example 1, respectively. As shown in Figures 7A and 7B, under the same electroluminescence condition (350 mA), the temperature of the through-type light-emitting diode in Example 1 is about 58°C to 60°C; on the contrary, the temperature of the through-type light-emitting diode in Comparative Example 1 Then it is about 73°C to 76°C. Therefore, it can be seen from the above results that the through-type light-emitting diode with ultrasonic heat dissipation function manufactured according to the present invention can dissipate heat by means of ultrasonic waves provided by diamond-like carbon, quickly remove heat, and reduce hot spots generated in the semiconductor epitaxial layer.

试验例五Test example five

本试验例五是于相同的通电发光条件下,利用一热像分析仪分析实施例四及比较例二所制备的芯片板上封装结构的温度分布。请参考图8A及8B,分别为实施例四及比较例二的温度分布结果图。如图8A及8B所示,于相同通电发光条件下(700毫安),实施例四的芯片板上封装结构的温度约为55℃至59℃;反之,比较例二的芯片板上封装结构的温度则约为65℃至77℃。因此,由此上述结果可知,当碳化物层及绝缘层同时含有类金刚石时,两者产生的协同效应将使得本发明所制备的芯片板上封装结构具有更佳的散热效果。据此,根据本发明所制造具有超声波散热功能的芯片板上封装结构,确实可由类金刚石以提供超声波方式散热,快速移除热量,并减少产生于半导体外延层中的热点。In the fifth test example, under the same electroluminescent condition, a thermal image analyzer is used to analyze the temperature distribution of the package structure on the chip prepared in the fourth example and the second comparative example. Please refer to FIGS. 8A and 8B , which are graphs showing the temperature distribution results of Embodiment 4 and Comparative Example 2, respectively. As shown in Figures 8A and 8B, under the same electroluminescence condition (700 mA), the temperature of the chip-on-chip package structure of Example 4 is about 55°C to 59°C; on the contrary, the temperature of the chip-on-chip package structure of Comparative Example 2 The temperature is about 65°C to 77°C. Therefore, it can be seen from the above results that when the carbide layer and the insulating layer contain diamond-like carbon at the same time, the synergistic effect produced by the two will make the chip-on-chip packaging structure prepared by the present invention have a better heat dissipation effect. Accordingly, the on-chip packaging structure with ultrasonic heat dissipation function manufactured according to the present invention can indeed dissipate heat by means of ultrasonic waves provided by diamond-like carbon, quickly remove heat, and reduce hot spots generated in the semiconductor epitaxial layer.

据此,上述试验例一至五的结果显示本发明的直通式发光二极管及芯片板上封装结构中,因其含有类金刚石并且调整活性中间层与类金刚石间的距离为1至10微米以内,可使得该类金刚石能通过超声波散热的方式,快速移除产生于活性中间层的热点,进而提升芯片板上封装结构的整体热稳定性,达到提高其发光效率并延长其产品寿命。Accordingly, the results of the above-mentioned test examples 1 to 5 show that in the through-type light-emitting diode and chip-on-chip packaging structure of the present invention, because it contains diamond-like carbon and adjusts the distance between the active intermediate layer and the diamond-like carbon to be within 1 to 10 microns, it can The diamond-like carbon can quickly remove hot spots generated in the active intermediate layer through ultrasonic heat dissipation, thereby improving the overall thermal stability of the package structure on the chip board, improving its luminous efficiency and prolonging its product life.

综上所述,本发明之发光二极管及使用其之芯片板上封装结构,因其具有超声波散热之结构设计,可在发光二极管运作产生热量的过程中快速移除所产生之热点,以稳定其晶格结构,从而达到优化其散热效率,以维持其发光效率。To sum up, the light-emitting diode of the present invention and the chip-on-chip package structure using it, because of its structural design of ultrasonic heat dissipation, can quickly remove the hot spots generated during the operation of the light-emitting diode to stabilize its heat. The lattice structure optimizes its heat dissipation efficiency to maintain its luminous efficiency.

上述实施例仅是为了方便说明而举例而已,本发明所主张的权利范围自应以申请的权利要求范围所述为准,而非仅限于上述实施例。The above-mentioned embodiments are only examples for convenience of description, and the scope of rights claimed by the present invention should be based on the scope of claims in the application, rather than limited to the above-mentioned embodiments.

Claims (28)

1. a light-emitting diode, comprising:
One substrate;
Semiconductor epitaxial loayer, it is positioned at this substrate surface, and this semiconductor epitaxial layers comprises one first semiconductor epitaxial layers, an active intermediate and one second semiconductor epitaxial layers;
One reflector, it is folded between this semiconductor epitaxial layers and this substrate;
One metal level, it is folded between this reflector and this substrate; And
Monocarbide layer, it is folded between this metal level and this substrate;
Wherein, the distance between this active intermediate and this carbide lamella is 1 to 10 micron.
2. light-emitting diode as claimed in claim 1, wherein, the distance between this active intermediate and this carbide lamella is 2 microns.
3. light-emitting diode as claimed in claim 1, wherein, this metal level is titanium, zirconium, molybdenum or tungsten.
4. light-emitting diode as claimed in claim 1, wherein, this carbide lamella is diamond like carbon, Graphene or its combination.
5. light-emitting diode as claimed in claim 4, wherein, this diamond like carbon is the tetrahedral structure of a conductivity, and such adamantine carbon content is higher than more than 95%, and such adamantine 25% above carbon atom has a distorted tetrahedral bond structure.
6. light-emitting diode as claimed in claim 1, wherein, this metal level and this carbide lamella are mutual stacking sandwich construction.
7. light-emitting diode as claimed in claim 1, wherein, this first semiconductor epitaxial layers is folded between this reflector and this active intermediate, and this active intermediate is folded between this first semiconductor epitaxial layers and this second semiconductor epitaxial layers.
8. light-emitting diode as claimed in claim 1, wherein, this semiconductor epitaxial layers contains an alloy, and this alloy is indium.
9. light-emitting diode as claimed in claim 1, wherein, this substrate comprises an insulating barrier and a circuit substrate, and the material of this insulating barrier is selected at least one of free diamond like carbon, aluminium oxide, pottery and diamantiferous epoxy resin institute cohort group.
10. light-emitting diode as claimed in claim 9, wherein, this circuit substrate is a metallic plate, a ceramic wafer or a silicon substrate.
11. light-emitting diodes as claimed in claim 1, wherein, comprise one second electrode, and this second electrode is arranged at this second semiconductor epitaxial layers surface.
12. light-emitting diodes as claimed in claim 1, wherein, this first semiconductor epitaxial layers, this reflector, this metal level and carbide lamella are that P type is electrical, and this second semiconductor epitaxial layers and this second electrode are that N-type is electrical.
13. light-emitting diodes as claimed in claim 1, wherein, this carbide lamella is to provide the ultrasonic wave mode of this semiconductor epitaxial layers to dispel the heat.
Encapsulating structure on 14. 1 kinds of chip boards, comprising:
One circuit board, it comprises at least one electric connection pad;
Semiconductor epitaxial loayer, it is positioned at this circuit board surface, and this semiconductor epitaxial layers comprises one first semiconductor epitaxial layers, an active intermediate and one second semiconductor epitaxial layers;
One reflector, it is folded between this semiconductor epitaxial layers and this circuit board;
One metal level, it is folded between this reflector and this circuit board; And
Monocarbide layer, it is folded between this metal level and this circuit board;
Wherein, the distance between this active intermediate and this carbide lamella is 1 to 10 micron.
Encapsulating structure on 15. chip boards as claimed in claim 14, wherein, the distance between this active intermediate and this carbide lamella is 2 microns.
Encapsulating structure on 16. chip boards as claimed in claim 14, wherein, this metal level is titanium, zirconium, molybdenum or tungsten.
Encapsulating structure on 17. chip boards as claimed in claim 14, wherein, this carbide lamella is diamond like carbon, Graphene or its combination.
Encapsulating structure on 18. chip boards as claimed in claim 14, wherein, this diamond like carbon is the tetrahedral structure of a conductivity, and such adamantine carbon content is higher than more than 95%, and such adamantine 25% above carbon atom has a distorted tetrahedral bond structure.
Encapsulating structure on chip board described in 19. claims 14, wherein, this metal level and this carbide lamella are mutual stacking sandwich construction.
Encapsulating structure on 20. chip boards as claimed in claim 14, wherein, this second semiconductor epitaxial layers is folded between this reflector and this active intermediate, this active intermediate is folded between this first semiconductor epitaxial layers and this second semiconductor epitaxial layers, and this first semiconductor epitaxial layer segment does not cover this active intermediate and this second semiconductor epitaxial layers.
Encapsulating structure on 21. chip boards as claimed in claim 14, wherein, this semiconductor epitaxial layers contains an alloy, and this alloy is indium.
Encapsulating structure on 22. chip boards as claimed in claim 14, wherein, this circuit board comprises an insulating barrier and a circuit substrate, and the material of this insulating barrier is to select at least one of free diamond like carbon, aluminium oxide, pottery and diamantiferous epoxy resin institute cohort group.
Encapsulating structure on 23. chip boards as claimed in claim 22, wherein, this circuit substrate is a metallic plate, a ceramic wafer or a silicon substrate.
Encapsulating structure on 24. chip boards as claimed in claim 14, wherein, this second semiconductor epitaxial layers is that P type is electrical, and this first semiconductor epitaxial layers is that N-type is electrical.
Encapsulating structure on 25. chip boards as claimed in claim 14, wherein, this carbide lamella is to provide the ultrasonic wave mode of this semiconductor epitaxial layers to dispel the heat.
Encapsulating structure on 26. chip boards as claimed in claim 14, wherein, comprises a substrate, and this substrate is arranged on this first semiconductor epitaxial layers.
Encapsulating structure on 27. chip boards as claimed in claim 26, wherein, this substrate is a sapphire substrate.
Encapsulating structure on 28. chip boards as claimed in claim 14, wherein, comprises a weld layer, and this weld layer is arranged between this circuit board and this carbide lamella.
CN201310079405.4A 2013-02-04 2013-03-13 Light emitting diode and on-chip packaging structure thereof Pending CN103972359A (en)

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