CN100461474C - Crystal-coated light-emitting diodes packing structure and method - Google Patents
Crystal-coated light-emitting diodes packing structure and method Download PDFInfo
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- CN100461474C CN100461474C CNB2006100583956A CN200610058395A CN100461474C CN 100461474 C CN100461474 C CN 100461474C CN B2006100583956 A CNB2006100583956 A CN B2006100583956A CN 200610058395 A CN200610058395 A CN 200610058395A CN 100461474 C CN100461474 C CN 100461474C
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- 238000000034 method Methods 0.000 title claims abstract description 14
- 239000013078 crystal Substances 0.000 title claims abstract description 11
- 238000012856 packing Methods 0.000 title description 6
- 239000000758 substrate Substances 0.000 claims description 37
- 230000005496 eutectics Effects 0.000 claims description 30
- 239000004411 aluminium Substances 0.000 claims description 11
- 229910052782 aluminium Inorganic materials 0.000 claims description 11
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 claims description 11
- 239000010931 gold Substances 0.000 claims description 11
- PCHJSUWPFVWCPO-UHFFFAOYSA-N gold Chemical compound [Au] PCHJSUWPFVWCPO-UHFFFAOYSA-N 0.000 claims description 10
- 229910052737 gold Inorganic materials 0.000 claims description 10
- 230000004888 barrier function Effects 0.000 claims description 9
- 239000010949 copper Substances 0.000 claims description 9
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 claims description 8
- 229910052802 copper Inorganic materials 0.000 claims description 8
- 238000005538 encapsulation Methods 0.000 claims description 5
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical group O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 claims description 4
- 235000012239 silicon dioxide Nutrition 0.000 claims description 2
- 239000000377 silicon dioxide Substances 0.000 claims description 2
- 238000007789 sealing Methods 0.000 abstract 2
- 238000003466 welding Methods 0.000 abstract 2
- 229910052751 metal Inorganic materials 0.000 description 10
- 239000002184 metal Substances 0.000 description 10
- 238000010586 diagram Methods 0.000 description 6
- JMASRVWKEDWRBT-UHFFFAOYSA-N Gallium nitride Chemical compound [Ga]#N JMASRVWKEDWRBT-UHFFFAOYSA-N 0.000 description 4
- 238000005229 chemical vapour deposition Methods 0.000 description 4
- 239000000463 material Substances 0.000 description 4
- 229910002601 GaN Inorganic materials 0.000 description 3
- 230000008878 coupling Effects 0.000 description 3
- 238000010168 coupling process Methods 0.000 description 3
- 238000005859 coupling reaction Methods 0.000 description 3
- 238000005240 physical vapour deposition Methods 0.000 description 3
- 229910052594 sapphire Inorganic materials 0.000 description 3
- 239000010980 sapphire Substances 0.000 description 3
- PIGFYZPCRLYGLF-UHFFFAOYSA-N Aluminum nitride Chemical compound [Al]#N PIGFYZPCRLYGLF-UHFFFAOYSA-N 0.000 description 2
- 230000007812 deficiency Effects 0.000 description 2
- 238000005516 engineering process Methods 0.000 description 2
- 230000005855 radiation Effects 0.000 description 2
- 239000010936 titanium Substances 0.000 description 2
- 229910017083 AlN Inorganic materials 0.000 description 1
- 229910000906 Bronze Inorganic materials 0.000 description 1
- 229910052581 Si3N4 Inorganic materials 0.000 description 1
- 229910004298 SiO 2 Inorganic materials 0.000 description 1
- RTAQQCXQSZGOHL-UHFFFAOYSA-N Titanium Chemical compound [Ti] RTAQQCXQSZGOHL-UHFFFAOYSA-N 0.000 description 1
- 230000005540 biological transmission Effects 0.000 description 1
- 230000015572 biosynthetic process Effects 0.000 description 1
- 239000010974 bronze Substances 0.000 description 1
- 230000015556 catabolic process Effects 0.000 description 1
- 238000001816 cooling Methods 0.000 description 1
- KUNSUQLRTQLHQQ-UHFFFAOYSA-N copper tin Chemical compound [Cu].[Sn] KUNSUQLRTQLHQQ-UHFFFAOYSA-N 0.000 description 1
- 238000006731 degradation reaction Methods 0.000 description 1
- 238000000151 deposition Methods 0.000 description 1
- 230000008021 deposition Effects 0.000 description 1
- 238000009795 derivation Methods 0.000 description 1
- 230000006866 deterioration Effects 0.000 description 1
- 230000008034 disappearance Effects 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 230000005611 electricity Effects 0.000 description 1
- 230000008020 evaporation Effects 0.000 description 1
- 238000001704 evaporation Methods 0.000 description 1
- 230000017525 heat dissipation Effects 0.000 description 1
- 238000004519 manufacturing process Methods 0.000 description 1
- 239000007769 metal material Substances 0.000 description 1
- HQVNEWCFYHHQES-UHFFFAOYSA-N silicon nitride Chemical compound N12[Si]34N5[Si]62N3[Si]51N64 HQVNEWCFYHHQES-UHFFFAOYSA-N 0.000 description 1
- 239000000126 substance Substances 0.000 description 1
- 229910052719 titanium Inorganic materials 0.000 description 1
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- H—ELECTRICITY
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- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/10—Bump connectors ; Manufacturing methods related thereto
- H01L24/12—Structure, shape, material or disposition of the bump connectors prior to the connecting process
- H01L24/14—Structure, shape, material or disposition of the bump connectors prior to the connecting process of a plurality of bump connectors
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/12—Structure, shape, material or disposition of the bump connectors prior to the connecting process
- H01L2224/14—Structure, shape, material or disposition of the bump connectors prior to the connecting process of a plurality of bump connectors
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- H—ELECTRICITY
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- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
- H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
- H01L2224/161—Disposition
- H01L2224/16151—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/16221—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/16225—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
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- H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
- H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
- H01L2224/321—Disposition
- H01L2224/32151—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/32221—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/32225—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
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- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/4805—Shape
- H01L2224/4809—Loop shape
- H01L2224/48091—Arched
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- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48225—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
- H01L2224/48227—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item
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- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/49—Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
- H01L2224/491—Disposition
- H01L2224/49105—Connecting at different heights
- H01L2224/49107—Connecting at different heights on the semiconductor or solid-state body
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- H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
- H01L2224/732—Location after the connecting process
- H01L2224/73251—Location after the connecting process on different surfaces
- H01L2224/73265—Layer and wire connectors
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- H01L2924/013—Alloys
- H01L2924/0132—Binary Alloys
- H01L2924/01322—Eutectic Alloys, i.e. obtained by a liquid transforming into two solid phases
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- H—ELECTRICITY
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- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/10—Details of semiconductor or other solid state devices to be connected
- H01L2924/11—Device type
- H01L2924/12—Passive devices, e.g. 2 terminal devices
- H01L2924/1204—Optical Diode
- H01L2924/12041—LED
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- Engineering & Computer Science (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Led Device Packages (AREA)
Abstract
The invention is concerned with the covering crystal LED sealing structure and the sealing method that is with high radiating efficiency. The structure is: seals the LED on the radiating plaque by the covering crystal technique assorting sharing crystal linking mode. The structure consists of: the radiating plaque that forms the insolating layer in the prearrange area and the surface of the insolating layer forms the welding underlay; the LED that links on the radiating plaque by the covering mode, the LED consists of the first electrode and the second electrode, the first electrode and the radiating plaque sharing crystal link with the sharing layer in order to electric connect, the second electrode electric connects with the welding underlay.
Description
Technical field
(Light Emitting Diode, encapsulating structure LED) is especially about a kind of chip upside-down mounting type LED encapsulating structure and method for packing thereof with high cooling efficiency to the invention relates to a kind of light-emitting diode.
Background technology
Led light source is owing to have characteristics such as volume is little, power consumption is low, long service life, in a foreseeable future, can replace the light emitting source of lighting apparatus such as present bulb or fluorescent lamp source or other display unit, and become most important light-emitting component.Yet, for improving the overall brightness of light emitting source, certainly will to improve luminous power or increase number or the density that LED installs, the quantity of heat production of led light source will significantly be increased but so be provided with, if those heats can't be derived as early as possible, to have a strong impact on the luminosity of LED, quicken the degradation of LED simultaneously and reduction of service life.
For improving the radiating efficiency of LED, existing LED encapsulating structure as shown in Figure 1.In the prior art, LED 10 is by eutectic (eutectic) combination formation crystal layer 30 altogether and aluminium base 20 engages.Form an insulating barrier 21 respectively in the aluminium base 20 surperficial presumptive areas, these insulating barrier 21 surfaces form a weld pad 22 again, and each weld pad 22 electrically connects to connect line 23 with first electrode 11 and second electrode 12 respectively.Though aforementioned manner can be passed through conduction pattern with the heat that LED 10 is produced by eutectic layer 30, thereby see through aluminium base 20 and spread out of to increase radiating efficiency, but obstruction because of sapphire layer 13, cause radiating effect undesirable, and in this kind packaged type, first electrode 11 and second electrode 12 all are positioned at the top of LED 10 luminescent layers, with the emergent light of shaded portions, for the light-emitting area of LED 10 reduction of certain degree is arranged, and influence its luminous efficiency.
Therefore, for avoiding aforementioned disappearance, promptly produce as shown in Figure 2 to cover the technology that crystalline substance (flip chip) juncture encapsulates.Wherein, LED 10 engages with printed circuit board (PCB) 40 after inversion.Printed circuit board (PCB) 40 is respectively equipped with a weld pad 41 in surperficial precalculated position, the line 42 that connects in weld pad 41 and the printed circuit board (PCB) 40 electrically connects.When LED 10 engages, respectively first electrode 11 is connected with weld pad 41 with second electrode 12 by metal coupling 43.Produce the shortcoming that luminous efficiency reduces though can improve the aforementioned lights shelter with this packaged type, but the heat that LED 10 is produced only can see through metal coupling 43 and conduct to printed circuit board (PCB) 40, the contact area of conduction is little on the one hand, the thermal conductivity of printed circuit board (PCB) 40 is limited on the other hand, and LED 10 integral heat sink efficient can be improved effectively, thereby still there are aforementioned LED deterioration and shortcoming because of being subjected to high temperature that luminosity is reduced.
Summary of the invention
The deficiency of luminous efficiency when encapsulating in order to improve existing LED, promote the radiating efficiency of LED simultaneously, the present invention will provide a kind of encapsulating structure and method for packing that LED is combined with heat-conducting substrate in the eutectic mode with Flip Chip, the LED luminous component is not limited to, and can keep best luminous efficiency, and simultaneously can be with the heat that produced with bigger contact area and heat conduction efficiency, conduct on the heat-conducting substrate of high thermal conductivity coefficient, can not only significantly improve the heat dissipation of LED, make LED avoid being under the high temperature, thereby increase the useful life of LED, and can further improve the luminosity of LED.
Chip upside-down mounting type package structure for LED of the present invention comprises: a heat-conducting substrate, this heat-conducting substrate surface form an insulating barrier in a presumptive area, this surface of insulating layer forms a weld pad; An and LED, this LED is bonded on this heat-conducting substrate with flip chip, this LED includes one first electrode and one second electrode, thereby eutectic bond has crystal layer electric connection altogether between this first electrode and this heat-conducting substrate, and this second electrode and this weld pad electrically connect.The eutectic layer can form with this first heated by electrodes eutectic earlier after this first electrode corresponding section plates a Gold plated Layer on this heat-conducting substrate again; It also can press from both sides between this first electrode corresponding section on this heat-conducting substrate and this first electrode establishes a gold plaque, heats eutectic again and forms.Wherein, this heat-conducting substrate can be the metal or the dielectric layer of an aluminium (Al) plate, copper (Cu) plate, aluminium nitride (AlN) or other high thermal conductivity coefficients, but is not limited in this.
Encapsulating structure of the present invention, the light that the LED luminescent layer is dispersed can not be subjected to covering of electrode, so preferable luminous efficiency is arranged.And the heat energy that it produced can directly be derived by the eutectic layer long-pending than large contact surface, and do not need to see through the relatively poor sapphire layer transmission of conductive coefficient like that with prior art, so can be rapidly with thermal energy conduction to the heat-conducting substrate of high thermal conductivity coefficient, the LED temperature can be reduced as early as possible, thereby make LED not only can keep preferable luminous efficiency, and best heat conduction and heat radiation efficient is arranged.
Below will cooperate the graphic embodiments of the present invention that further specify; following cited embodiment is used for illustrating the present invention; rather than be used for limiting scope of the present invention; anyly be familiar with those skilled in the art; without departing from the spirit and scope of the present invention; can make some variations or retouching, so protection scope of the present invention should be as the criterion with the protection range of claim.
Description of drawings
Fig. 1 is the schematic diagram of existing LED encapsulating structure.
Fig. 2 is the schematic diagram of existing chip upside-down mounting type LED encapsulating structure.
Fig. 3 is the schematic diagram of the embodiment of the invention.
Fig. 4 is the schematic diagram of method for packing embodiment of the present invention.
Fig. 5 is the schematic diagram of another method for packing of the present invention embodiment.
Embodiment
Referring to Fig. 3, this figure is the schematic diagram of the embodiment of the invention.Chip upside-down mounting type package structure for LED of the present invention comprises a LED 50 and a heat-conducting substrate 60, and this LED 50 is packaged on the heat-conducting substrate 60 with flip chip.
Heat-conducting substrate 60 is that (((plate of 320W/m * K), but be not limited in this, its conductive coefficient at room temperature can reach the above person of 100W/m * K for preferable for 385W/m * K) or aluminium nitride for 231W/m * K), copper coin for the aluminium sheet of a high thermal conductivity coefficient.Cover in the brilliant combination in the present invention, heat-conducting substrate 60 also must be able to conduct electricity except that tool heat conduction and heat radiation function, so this heat-conducting substrate 60 also needs the material of good conductivity, is preferable with aluminium sheet, copper coin in the aforementioned several materials.Heat-conducting substrate 60 forms an insulating barrier 61 earlier with before LED50 engages on heat-conducting substrate 60 surfaces with in second electrode, the 52 corresponding predetermined defined ranges.Insulating barrier 61 can utilize silicon dioxide (SiO
2) or silicon nitride (Si
3N
4) (Chemical Vapor Deposition CVD) is deposited on heat-conducting substrate 60 surfaces, and material that deposition is utilized and mode are not limited in front affiliated material and mode with chemical vapour deposition (CVD).Subsequently, form the weld pads 62 of metal materials again on insulating barrier 61 surface, as the dielectric layer that electrically connects with second electrode 52.Because first electrode 51 electrically connects with the heat-conducting substrate 60 with conductivity, thus do not need to carry out routing, second electrode 52 then can by with the electric connection of weld pad 62, routing and forms the state of current lead-through on weld pad 62.
When LED 50 was bonded on heat-conducting substrate 60 with flip chip, second electrode 52 can electrically connect with weld pad 62, first electrode 51 then with heat-conducting substrate 60 corresponding surfaces between simultaneously eutectic engage and have crystal layer 63 altogether.Therefore, the high heat that LED 50 is produced can and see through eutectic layer 63 by first electrode 51 and be directly transferred on the heat-conducting substrate 60 with high thermal conductivity coefficient, rapidly with in addition dissipation of heat, and can make LED 50 keep suitable temperature.Compare with prior art, utilize the flip chip encapsulation except LED 50 is had the big light-emitting area, the heat that the most important thing is LED 50 luminescent layers to be produced is directly by 63 derivation of more approaching eutectic layer, and need not to see through the relatively poor sapphire layer 53 of conductive coefficient like that with prior art, so can obviously promote its thermal conductivity.On the other hand, see through the contact conduction of large tracts of land eutectic layer, also can increase heat conduction speed, and significantly improve the shortcoming of utilizing metal coupling heat conduction speed deficiency in the prior art.
The mode that eutectic layer 30 forms sees also Fig. 4 and Fig. 5.Can be earlier before eutectic engages on heat-conducting substrate 60 these first electrode, 51 corresponding sections plated a Gold plated Layer 631, under the proper temperature processing, carry out eutectic with this first electrode 51 again and engage.In addition, its also can on the heat-conducting substrate 60 between these first electrode, 51 corresponding sections and this first electrode 51 folder establish a gold plaque 632 (seeing also Fig. 5), under proper temperature is handled, carry out eutectic again and engage.When first electrode, 51 tool copper metal layers, then can form the eutectic layer 63 of one bronze medal/gold or copper/gold/aluminium.Eutectic engages employed metal and method, is not limited to aforesaid metal and method, but is good with the higher metal of conductive coefficient.
Claims (10)
1. chip upside-down mounting type package structure for LED is characterized in that comprising:
One heat-conducting substrate, this heat-conducting substrate surface form an insulating barrier in a presumptive area, this surface of insulating layer forms a weld pad; And
One LED, this LED is bonded on this heat-conducting substrate with flip chip, this LED includes one first electrode and one second electrode, thereby eutectic bond has crystal layer electric connection altogether between this first electrode and this heat-conducting substrate, and this second electrode then electrically connects with this weld pad.
2. chip upside-down mounting type package structure for LED as claimed in claim 1 is characterized in that, described heat-conducting substrate is an aluminium sheet.
3. chip upside-down mounting type package structure for LED as claimed in claim 1 is characterized in that, described heat-conducting substrate is a copper coin.
4. as claim 1,2 or 3 described chip upside-down mounting type package structure for LED, it is characterized in that described insulating barrier is a silicon dioxide layer.
5. chip upside-down mounting type package structure for LED as claimed in claim 1 is characterized in that, described eutectic layer is copper/golden eutectic.
6. chip upside-down mounting type package structure for LED as claimed in claim 1 is characterized in that, described eutectic layer is copper/gold/aluminium eutectic.
7. a chip upside-down mounting type LED encapsulation method is characterized in that comprising the following steps:
The first step provides a heat-conducting substrate;
In second step, in this heat-conducting substrate surface one presumptive area, form an insulating barrier, and form a weld pad at this surface of insulating layer;
The 3rd step provided a LED, and this LED comprises one first electrode and one second electrode; And
The 4th step engaged this LED with flip chip, thus in conjunction with the time engages crystal layer electric connection altogether at eutectic between this first electrode and this heat-conducting substrate, and make this second electrode and the electric connection of this weld pad simultaneously.
8. chip upside-down mounting type LED encapsulation method as claimed in claim 7 is characterized in that, described this heat-conducting substrate is an aluminium sheet.
9. as claim 7 or 8 described chip upside-down mounting type LED encapsulation methods, it is characterized in that described eutectic layer is that elder generation this first electrode corresponding section on this heat-conducting substrate plates a Gold plated Layer, forms with this first heated by electrodes eutectic again.
10. as claim 7 or 8 described chip upside-down mounting type LED encapsulation methods, it is characterized in that described eutectic layer is that folder is established a gold plaque between this first electrode corresponding section on this heat-conducting substrate and this first electrode, heats eutectic again and forms.
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| Application Number | Priority Date | Filing Date | Title |
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| CNB2006100583956A CN100461474C (en) | 2006-03-03 | 2006-03-03 | Crystal-coated light-emitting diodes packing structure and method |
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|---|---|---|---|
| CNB2006100583956A CN100461474C (en) | 2006-03-03 | 2006-03-03 | Crystal-coated light-emitting diodes packing structure and method |
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| CN100461474C true CN100461474C (en) | 2009-02-11 |
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| CN101950782B (en) * | 2009-07-10 | 2013-01-09 | 财团法人工业技术研究院 | Method for Forming Reflective Light Emitting Diode Die Bonding Structure at Low Temperature |
| CN102074636B (en) * | 2009-11-19 | 2013-04-10 | 亿光电子工业股份有限公司 | Light-emitting diode device with flip chip structure |
| CN102097420B (en) * | 2009-12-10 | 2014-08-20 | 鸿富锦精密工业（深圳）有限公司 | Light-emitting diode (LED) and manufacturing method thereof |
| CN102332526B (en) * | 2010-07-14 | 2015-01-07 | 展晶科技(深圳)有限公司 | Flip-chip light-emitting diode (LED) packaging structure |
| CN106025039A (en) * | 2016-06-28 | 2016-10-12 | 储世昌 | LED package structure |
| CN108630798A (en) * | 2017-03-24 | 2018-10-09 | 叶玱郎 | Flip-chip L ED heat conduction structure |
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