CN103576079A - Chip testing system and chip testing method - Google Patents
Chip testing system and chip testing method Download PDFInfo
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- CN103576079A CN103576079A CN201310574106.8A CN201310574106A CN103576079A CN 103576079 A CN103576079 A CN 103576079A CN 201310574106 A CN201310574106 A CN 201310574106A CN 103576079 A CN103576079 A CN 103576079A
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Abstract
The invention provides a chip testing system and a chip testing method. The chip testing system comprises a testing machine, a crystal oscillator and a signal analysis system, wherein the testing machine and the crystal oscillator are both connected with the signal analysis system, the testing machine is used for providing a testing signal, the crystal oscillator is used for providing a clock signal, the signal analysis system is used for obtaining signal output time, outputting the testing signal, of the testing machine, the testing machine outputs the testing signal according to the signal output time, therefore, the signal analysis system obtains the signal output time, outputting the testing signal, of the testing machine, the testing machine outputs the testing signal according to the time, the testing machine can select the time for outputting the testing signal, further, synchronization of the testing signal and the clock signal can be achieved, and the reliable/accurate chip testing result can be obtained.
Description
Technical field
The present invention relates to ic manufacturing technology field, particularly a kind of chip test system and chip detecting method.
Background technology
Due to the rapid introducing of day by day complicated integrated circuit, material and technique, hardly may the requirement up to specification of each chip in the silicon chip of today is manufactured.For correcting the problem in manufacturing process, and guarantee that defective chip can not be sent in client's hand, in ic manufacturing process, introduced chip testing (CP, Circuit Probing).Chip testing is that the electrical parameter carrying out on silicon chip level integrated circuit in order to check the consistance of specification is measured and functional test.Test can check out each chip whether to have acceptable electric property and complete function, and the electricity specification of using in its test process is different with the difference of test purpose.If chip testing imperfection, just may cause more product to lose efficacy, finally to chip maker, bring serious consequence in client's use procedure.In the manufacture process of integrated circuit, introduce and can find early technological problems and the select chip testing of bad chip is absolutely necessary for this reason.
Chip test system generally includes test machine (Automatic Test Equipment, ATE), and test machine is the aut.eq. that can fast, accurately, repeatedly measure submicron level electric current and millivolt step voltage on device under test.Concrete, test machine is input to device under test (DUT by test signal (signal in order to test at present specification middle finger except clock signal), Device Under Test) in, and then receive this device under test for the accordingly result of input signal.When carrying out chip testing, toward contact, need to use crystal oscillator to produce the required clock signal of test.For example, the requirement for clock signal in the test of some chip is more special, as the clock of 19.44MHz, is to have no idea to give by test machine, therefore need to device under test, provide clock signal with external crystal oscillator.Because clock signal and test signal are produced/provided by different devices, (wherein clock signal is provided by crystal oscillator, test signal is provided by test machine), therefore between the two, tend to asynchronously, and then make resulting chip testing result inaccurate/unreliable.
Therefore, provide a kind of chip test system, its clock signal and test signal that can realize output is synchronous, thereby obtains accurately/reliable chip testing result, has become those skilled in the art's difficult problem urgently to be resolved hurrily.
Summary of the invention
The object of the present invention is to provide a kind of chip test system and chip detecting method, to solve in existing chip test system, often asynchronous between clock signal and test signal, and then make inaccurate/insecure problem of resulting chip testing result.
For solving the problems of the technologies described above, the invention provides a kind of chip test system, described chip test system comprises: test machine, crystal oscillator and Signal Analysis System, described test machine and crystal oscillator are all connected with described Signal Analysis System; Described test machine is in order to provide test signal; Described crystal oscillator is in order to provide clock signal; Described Signal Analysis System is in order to obtain the signal output time of test machine output test signal; Wherein, described test machine is according to signal output time output test signal.
Optionally, in described chip test system, described signal output time was determined according to the output used time of the Induction Peried of clock signal and test signal.
Optionally, in described chip test system, described signal output time was determined according to the redirect moment of the Induction Peried of clock signal, low and high level and the output used time of test signal.
Optionally, in described chip test system, when a clock signal of the every output of described crystal oscillator, described Signal Analysis System just obtains the signal output time of the test machine output test signal corresponding with this clock signal.
Optionally, in described chip test system, the test signal that described test machine provides comprises voltage signal and/or current signal.
Optionally, in described chip test system, the clock signal that described crystal oscillator provides comprises square-wave signal.
Optionally, in described chip test system, also comprise: the probe being connected with described test machine, and the probe station being connected with described probe.
The present invention also provides a kind of chip detecting method, and described chip detecting method comprises:
Crystal oscillator clock signal, test machine output test signal;
Signal Analysis System receives described clock signal and test signal, and obtains the signal output time of test machine output test signal;
Test machine is exported test signal again according to signal output time.
Optionally, in described chip detecting method, described signal output time was determined according to the output used time of the Induction Peried of clock signal and test signal.
Optionally, in described chip detecting method, described signal output time was determined according to the redirect moment of the Induction Peried of clock signal, low and high level and the output used time of test signal.
Optionally, in described chip detecting method, when a clock signal of the every output of described crystal oscillator, described Signal Analysis System just obtains the signal output time of the test machine output test signal corresponding with this clock signal.
Optionally, in described chip detecting method, the test signal that described test machine provides comprises voltage signal and/or current signal.
Optionally, in described chip detecting method, the clock signal that described crystal oscillator provides comprises square-wave signal.
In chip test system provided by the invention and chip detecting method, by Signal Analysis System, obtain the signal output time of test machine output test signal, test machine is exported test signal accordingly, test machine just can be selected to export the moment of test signal thus, and then realization and clock signal synchronization, thereby obtain reliable/chip testing result accurately.
Accompanying drawing explanation
Fig. 1 is the mount structure schematic diagram of the chip test system of the embodiment of the present invention;
Fig. 2 is the schematic diagram of the clock signal of the embodiment of the present invention;
Fig. 3 is the schematic flow sheet of the chip detecting method of the embodiment of the present invention.
Embodiment
The chip test system and the chip detecting method that the present invention are proposed below in conjunction with the drawings and specific embodiments are described in further detail.According to the following describes and claims, advantages and features of the invention will be clearer.It should be noted that, accompanying drawing all adopts very the form of simplifying and all uses non-ratio accurately, only in order to convenient, the object of the aid illustration embodiment of the present invention lucidly.
Please refer to Fig. 1, the mount structure schematic diagram of its chip test system that is the embodiment of the present invention.As shown in Figure 1, described chip test system comprises: test machine 10, crystal oscillator 20 and Signal Analysis System 30, and described test machine 10 and crystal oscillator 20 are all connected with described Signal Analysis System 30; Described test machine 10 is in order to provide test signal; Described crystal oscillator 20 is in order to provide clock signal; Described Signal Analysis System 30 is in order to obtain the signal output time of test machine output test signal; Wherein, described test machine 10 is according to signal output time output test signal.
Please refer to Fig. 2, the schematic diagram of its clock signal that is the embodiment of the present invention.As shown in Figure 2, described clock signal comprises T1 and two periods of T2, and wherein, in time period T1, described clock signal plays pendulum, and is also starting of oscillation state, is commonly referred to Induction Peried; In time period T2, described clock signal, in steady state (SS), is commonly referred to stabilization time.
In the present embodiment, the signal output time that described Signal Analysis System 30 obtains was determined according to the output used time of the Induction Peried of clock signal and test signal.Concrete, according to the length of time period T1 and 10 output test signal times used of described test machine, determine, obtain two differences between the time.Thus, when described test machine 10 is exported test signal again, just can avoid the difference between these two times, thereby realize and clock signal synchronization.
Further, the signal output time that described Signal Analysis System 30 obtains was determined according to the redirect moment of the Induction Peried of clock signal, low and high level and the output used time of test signal.Concrete, according to the redirect of low and high level in the length of time period T1, time period T2 constantly and the 10 output test signal times used of described test machine determine.Not only can obtain thus two differences between the time, and can access the redirect time point of the low and high level in clock signal, thereby when described test machine 10 is exported test signal again, can select the high level moment or the low level moment or the low and high level redirect moment in time period T2, and then the clock signal that the test signal that makes 10 outputs of described test machine is exported with described crystal oscillator 20 well coordinates, precision and the reliability of raising chip testing.
In the present embodiment, described Signal Analysis System 30 can comprise the counter of the signal analyzer of signal acquisition and calculating, analytic signal, first by signal analyzer, catches the signal of test machine 10 and crystal oscillator 20 outputs; Then by counter, calculate difference between clock signal and test signal etc., thereby finally obtain the information such as signal output time.
Common, during crystal oscillator 20 each clock signal, Induction Peried T1 and low and high level redirect are not identical constantly.Therefore, preferred, when using described chip test system, when a clock signal of the every output of described crystal oscillator 20, described Signal Analysis System 30 just obtains the signal output time of the test machine output test signal corresponding with this clock signal.Thus, make signal output time that described test machine 10 is each obtained be correct/reliably, and then the clock signal synchronization that test signal that described test machine 10 exports and described crystal oscillator 20 are exported, raising chip testing result.
In the present embodiment, the test signal that described test machine 10 provides comprises voltage signal and/or current signal; The clock signal that described crystal oscillator 20 provides comprises square-wave signal.Common, described test machine 10 is according to signal output time output test signal, and the test signal that described test machine 10 is exported is synchronizeed with rising edge or the negative edge of described square-wave signal.In the present embodiment, the test signal that described test machine 10 is exported can be synchronizeed with any one rising edge or negative edge in time period T2.
Further, described chip test system also can comprise: the probe (not shown in figure 1) being connected with described test machine, and the probe station (not shown in figure 1) being connected with described probe.Wherein, described probe is in order to connecting test machine and device under test; Described probe station is also referred to as chip positioning device, in order to the position at X, Y and Z direction adjustment device under test.
Accordingly, the present embodiment also provides a kind of chip detecting method, please refer to Fig. 3, the schematic flow sheet of its chip detecting method that is the embodiment of the present invention.As shown in Figure 3, described chip detecting method comprises:
Step S10: crystal oscillator 20 clock signals, test machine 10 output test signals;
Step S20: Signal Analysis System 30 receives described clock signal and test signal, and obtain the signal output time of test machine output test signal;
Step S30: test machine 10 is exported test signal again according to signal output time.
At this, by Signal Analysis System 30, obtain the signal output time of test machine output test signal and offer test machine 10, test machine 10 is according to the signal output time output test signal receiving, thus the test signal of test machine 10 output just can with clock signal synchronization, thereby obtain reliable/chip testing result accurately.
As fully visible, by Signal Analysis System, obtain the signal output time of test machine output test signal, test machine is exported test signal accordingly, test machine just can be selected to export the moment of test signal thus, and then realization and clock signal synchronization, thereby obtain reliable/chip testing result accurately.
Foregoing description is only the description to preferred embodiment of the present invention, the not any restriction to the scope of the invention, and any change, modification that the those of ordinary skill in field of the present invention is done according to above-mentioned disclosure, all belong to the protection domain of claims.
Claims (13)
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Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN115632755A (en) * | 2022-12-19 | 2023-01-20 | 杭州加速科技有限公司 | Method and device for detecting signal synchronism among business boards in ATE (automatic test equipment) |
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2013
- 2013-11-15 CN CN201310574106.8A patent/CN103576079B/en not_active Expired - Fee Related
Patent Citations (9)
| Publication number | Priority date | Publication date | Assignee | Title |
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| JPS60247942A (en) * | 1984-05-23 | 1985-12-07 | Advantest Corp | Testing device for semiconductor memory |
| JP3057877B2 (en) * | 1992-01-24 | 2000-07-04 | 安藤電気株式会社 | IC tester synchronization circuit |
| US6009530A (en) * | 1994-11-29 | 1999-12-28 | Gpt Limited | Real time clock synchronization in a telecommunications network |
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| Publication number | Priority date | Publication date | Assignee | Title |
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| CN115632755A (en) * | 2022-12-19 | 2023-01-20 | 杭州加速科技有限公司 | Method and device for detecting signal synchronism among business boards in ATE (automatic test equipment) |
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