CN103576079B - Chip testing system and chip testing method - Google Patents

Abstract

The invention provides a kind of chip test system and chip detecting method, wherein, described chip test system includes: test machine, crystal oscillator and Signal Analysis System, and described test machine and crystal oscillator are all connected with described Signal Analysis System；Described test machine is in order to provide test signal；Described crystal oscillator is in order to provide clock signal；Described Signal Analysis System is in order to obtain the signal output time of test machine output test signal；Wherein, described test machine is according to signal output time output test signal.At this, obtained the signal output time of test machine output test signal by Signal Analysis System, test machine exports test signal accordingly, and thus test machine just can select the moment of output test signal, and then realize and clock signal synchronization, thus obtain reliable/chip testing result accurately.

Description

Chip testing system and chip testing method

technical field

The invention relates to the technical field of integrated circuit manufacturing, in particular to a chip testing system and a chip testing method.

Background technique

Due to the rapid introduction of increasingly complex integrated circuits, materials and processes, it is nearly impossible to meet every chip to specification in today's silicon wafer manufacturing. In order to correct problems in the production process and ensure that defective chips will not be sent to customers, chip testing (CP, Circuit Probing) is introduced in the integrated circuit manufacturing process. Chip testing is electrical parameter measurement and functional testing performed on silicon wafer-level integrated circuits in order to verify the consistency of specifications. The test can verify whether each chip has acceptable electrical performance and complete functions, and the electrical specifications used in the test process vary with the purpose of the test. If chip testing is not perfect, it may cause more products to fail during customer use, and ultimately bring serious consequences to chip manufacturers. For this reason, it is essential to introduce chip testing that can detect process problems early and pick out bad chips in the manufacturing process of integrated circuits.

A chip test system usually includes a tester (Automatic Test Equipment, ATE), which is an automatic device that can quickly, accurately and repeatedly measure sub-microampere current and millivolt-level voltage on the device under test. Specifically, the testing machine inputs the test signal (in this application document, the signal used for testing except the clock signal) into the device under test (DUT, Device Under Test), and then receives the test signal of the device under test. corresponding result. When performing chip testing, it is often necessary to use a crystal oscillator to generate the clock signal required for testing. For example, in the test of some chips, the requirements for the clock signal are quite special, such as 19.44MHz clock, which cannot be provided by the tester, so an external crystal oscillator is required to provide the clock signal for the device under test. Since the clock signal and the test signal are generated/provided by different devices (the clock signal is provided by the crystal oscillator, and the test signal is provided by the tester), the two are often out of sync, which makes the obtained chip test results inaccurate /Unreliable.

Therefore, providing a chip testing system that can realize the synchronization of the output clock signal and the test signal, so as to obtain accurate/reliable chip test results, has become a difficult problem to be solved urgently by those skilled in the art.

Contents of the invention

The purpose of the present invention is to provide a chip testing system and a chip testing method, to solve the problem that in the existing chip testing system, the clock signal and the test signal are often not synchronized, which makes the obtained chip test results inaccurate/unreliable The problem.

In order to solve the above-mentioned technical problem, the present invention provides a kind of chip testing system, described chip testing system comprises: testing machine, crystal oscillator and signal analysis system, described testing machine and crystal oscillator are all connected with described signal analysis system; Said testing machine used to provide a test signal; the crystal oscillator is used to provide a clock signal; the signal analysis system is used to obtain the signal output time of the test signal output by the test machine; wherein, the test machine outputs the test signal according to the signal output time.

Optionally, in the chip testing system, the signal output time is determined according to the start-up time of the clock signal and the output time of the test signal.

Optionally, in the chip testing system, the signal output time is determined according to the start-up time of the clock signal, the transition time between high and low levels, and the output time of the test signal.

Optionally, in the chip testing system, when the crystal oscillator outputs a clock signal each time, the signal analysis system obtains the signal output time of the test signal output by the testing machine corresponding to the clock signal.

Optionally, in the chip testing system, the testing signals provided by the testing machine include voltage signals and/or current signals.

Optionally, in the chip testing system, the clock signal provided by the crystal oscillator includes a square wave signal.

Optionally, the chip testing system further includes: a probe card connected to the testing machine, and a probe station connected to the probe card.

The present invention also provides a chip testing method, the chip testing method comprising:

The crystal oscillator outputs a clock signal, and the testing machine outputs a test signal;

The signal analysis system receives the clock signal and the test signal, and obtains the signal output time of the test machine output test signal;

The testing machine outputs the test signal again according to the signal output time.

Optionally, in the chip testing method, the signal output time is determined according to the start-up time of the clock signal and the output time of the test signal.

Optionally, in the chip testing method, the signal output time is determined according to the start-up time of the clock signal, the transition time between high and low levels, and the output time of the test signal.

Optionally, in the chip testing method, when the crystal oscillator outputs a clock signal each time, the signal analysis system obtains the signal output time of the test machine outputting the test signal corresponding to the clock signal.

Optionally, in the chip testing method, the testing signal provided by the testing machine includes a voltage signal and/or a current signal.

Optionally, in the chip testing method, the clock signal provided by the crystal oscillator includes a square wave signal.

In the chip testing system and the chip testing method provided by the present invention, the signal output time of the test machine output test signal is obtained by the signal analysis system, and the test machine outputs the test signal accordingly, so that the test machine can select the moment of output test signal, Further, synchronization with the clock signal is realized, thereby obtaining reliable/accurate chip test results.

Description of drawings

Fig. 1 is the frame structure schematic diagram of the chip testing system of the embodiment of the present invention;

Fig. 2 is the schematic diagram of the clock signal of the embodiment of the present invention;

FIG. 3 is a schematic flowchart of a chip testing method according to an embodiment of the present invention.

detailed description

The chip testing system and chip testing method proposed by the present invention will be further described in detail below in conjunction with the accompanying drawings and specific embodiments. Advantages and features of the present invention will be apparent from the following description and claims. It should be noted that all the drawings are in a very simplified form and use imprecise scales, and are only used to facilitate and clearly assist the purpose of illustrating the embodiments of the present invention.

Please refer to FIG. 1 , which is a block diagram of a chip testing system according to an embodiment of the present invention. As shown in Figure 1, described chip testing system comprises: testing machine 10, crystal oscillator 20 and signal analysis system 30, described testing machine 10 and crystal oscillator 20 are all connected with described signal analysis system 30; Described testing machine 10 is used for The test signal is provided; the crystal oscillator 20 is used to provide a clock signal; the signal analysis system 30 is used to obtain the signal output time of the test signal output by the test machine; wherein, the test machine 10 outputs the test signal according to the signal output time.

Please refer to FIG. 2 , which is a schematic diagram of a clock signal according to an embodiment of the present invention. As shown in Figure 2, the clock signal includes two periods of time T1 and T2, wherein, in the time period T1, the clock signal is in an unstable state, that is, the start-up state, which is usually called the start-up time; the time period T2 Within, the clock signal is in a stable state, usually referred to as the stabilization time.

In this embodiment, the signal output time obtained by the signal analysis system 30 is determined according to the start-up time of the clock signal and the output time of the test signal. Specifically, it is determined according to the length of the time period T1 and the time it takes for the testing machine 10 to output the test signal, that is, the difference between the two times is obtained. Therefore, when the testing machine 10 outputs the test signal again, the difference between the two times can be avoided, thereby achieving synchronization with the clock signal.

Further, the signal output time acquired by the signal analysis system 30 is determined according to the start-up time of the clock signal, the transition time between high and low levels, and the output time of the test signal. Specifically, it is determined according to the length of the time period T1, the jumping moment of the high and low levels in the time period T2, and the time taken for the testing machine 10 to output the test signal. In this way, not only the difference between the two times can be obtained, but also the high and low level jump time points in the clock signal can be obtained, so that when the test machine 10 outputs the test signal again, it can be selected to be within the time period T2 The high-level moment or the low-level moment or the high-low level jump time, so that the test signal output by the tester 10 is well matched with the clock signal output by the crystal oscillator 20, and the accuracy and accuracy of the chip test are improved. reliability.

In this embodiment, the signal analysis system 30 may include a signal analyzer for capturing signals and a calculator for calculating and analyzing signals, that is, first capture the signals output by the testing machine 10 and the crystal oscillator 20 through the signal analyzer; then through the calculator Calculate the difference between the clock signal and the test signal, etc., so as to finally obtain information such as the signal output time.

Generally, when the crystal oscillator 20 outputs a clock signal each time, the start-up time T1 and the transition time between high and low levels are different. Therefore, preferably, when using the chip testing system, when the crystal oscillator 20 outputs a clock signal every time, the signal analysis system 30 obtains the signal output of the test machine output test signal corresponding to the clock signal time. Thus, the signal output time obtained by the tester 10 is correct/reliable each time, so that the test signal output by the tester 10 is synchronized with the clock signal output by the crystal oscillator 20, and the chip test is improved. result.

In this embodiment, the test signal provided by the testing machine 10 includes a voltage signal and/or a current signal; the clock signal provided by the crystal oscillator 20 includes a square wave signal. Generally, the testing machine 10 outputs the test signal according to the signal output time, and the testing signal output by the testing machine 10 is synchronized with the rising edge or the falling edge of the square wave signal. In this embodiment, the test signal output by the testing machine 10 may be synchronized with any rising edge or falling edge in the time period T2.

Further, the chip testing system may further include: a probe card (not shown in FIG. 1 ) connected to the testing machine, and a probe station (not shown in FIG. 1 ) connected to the probe card. ). Wherein, the probe card is used to connect the testing machine and the device under test; the probe station is also called a chip positioning device, which is used to adjust the position of the device under test in X, Y and Z directions.

Correspondingly, this embodiment also provides a chip testing method, please refer to FIG. 3 , which is a schematic flowchart of the chip testing method according to an embodiment of the present invention. As shown in Figure 3, the chip testing method includes:

Step S10: the crystal oscillator 20 outputs a clock signal, and the testing machine 10 outputs a test signal;

Step S20: the signal analysis system 30 receives the clock signal and the test signal, and obtains the signal output time of the test machine outputting the test signal;

Step S30: The testing machine 10 outputs the test signal again according to the signal output time.

Here, the signal output time of the test signal output by the test machine is obtained by the signal analysis system 30 and provided to the test machine 10, and the test machine 10 outputs the test signal according to the received signal output time, so that the test signal output by the test machine 10 can be compared with Clock signals are synchronized for reliable/accurate chip test results.

To sum up, it can be seen that the signal output time of the test signal output by the test machine is obtained through the signal analysis system, and the test machine outputs the test signal accordingly, so that the test machine can select the time to output the test signal, and then realize synchronization with the clock signal, thereby obtaining reliable / Accurate chip test results.

The above description is only a description of the preferred embodiments of the present invention, and does not limit the scope of the present invention. Any changes and modifications made by those of ordinary skill in the field of the present invention based on the above disclosures shall fall within the protection scope of the claims.

Claims (13)

1. A chip testing system, characterized in that, comprises: a testing machine, a crystal oscillator and a signal analysis system, and the testing machine and the crystal oscillator are all connected with the signal analysis system; the testing machine is used to provide a test signal; the The crystal oscillator is used to provide a clock signal; the signal analysis system is used to obtain the signal output time of the test signal output by the tester; wherein, the tester outputs the test signal again according to the signal output time. 2. The chip testing system according to claim 1, wherein the signal output time is determined according to the start-up time of the clock signal and the output time of the test signal. 3 . The chip testing system according to claim 1 , wherein the signal output time is determined according to the start-up time of the clock signal, the transition time between high and low levels, and the output time of the test signal. 4 . 4. The chip testing system according to claim 1, wherein when the crystal oscillator outputs a clock signal every time, the signal analysis system obtains the signal of the test machine output test signal corresponding to the clock signal output time. 5 . The chip testing system according to claim 1 , wherein the test signal provided by the testing machine includes a voltage signal and/or a current signal. 6 . The chip testing system according to claim 1 , wherein the clock signal provided by the crystal oscillator includes a square wave signal. 7. The chip testing system according to any one of claims 1-4, further comprising: a probe card connected to the testing machine, and a probe station connected to the probe card. 8. A chip testing method, characterized in that, comprising: The crystal oscillator outputs a clock signal, and the testing machine outputs a test signal; The signal analysis system receives the clock signal and the test signal, and obtains the signal output time of the test machine output test signal; The testing machine outputs the test signal again according to the signal output time. 9. The chip testing method according to claim 8, wherein the signal output time is determined according to the start-up time of the clock signal and the output time of the test signal. 10 . The chip testing method according to claim 8 , wherein the signal output time is determined according to the start-up time of the clock signal, the transition time between high and low levels, and the output time of the test signal. 11 . 11. The chip testing method according to claim 8, wherein when the crystal oscillator outputs a clock signal every time, the signal analysis system obtains the signal of the test machine outputting the test signal corresponding to the clock signal output time. 12. The chip testing method according to any one of claims 8-11, wherein the test signal provided by the testing machine includes a voltage signal and/or a current signal. 13. The chip testing method according to any one of claims 8-11, wherein the clock signal provided by the crystal oscillator includes a square wave signal.