[go: up one dir, main page]

CN103503132A - 半导体装置 - Google Patents

半导体装置 Download PDF

Info

Publication number
CN103503132A
CN103503132A CN201180070578.9A CN201180070578A CN103503132A CN 103503132 A CN103503132 A CN 103503132A CN 201180070578 A CN201180070578 A CN 201180070578A CN 103503132 A CN103503132 A CN 103503132A
Authority
CN
China
Prior art keywords
lead
wire
mos
fet
semiconductor device
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
CN201180070578.9A
Other languages
English (en)
Other versions
CN103503132B (zh
Inventor
大贺琢也
坂元一泰
杉原刚
加藤政纪
中岛大辅
治田刚
多田玄
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Mitsubishi Electric Corp
Original Assignee
Mitsubishi Electric Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Mitsubishi Electric Corp filed Critical Mitsubishi Electric Corp
Publication of CN103503132A publication Critical patent/CN103503132A/zh
Application granted granted Critical
Publication of CN103503132B publication Critical patent/CN103503132B/zh
Active legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Images

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/495—Lead-frames or other flat leads
    • H01L23/49517—Additional leads
    • H01L23/4952—Additional leads the additional leads being a bump or a wire
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/28—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
    • H01L23/31—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape
    • H01L23/3107—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/495—Lead-frames or other flat leads
    • H01L23/49517—Additional leads
    • H01L23/49524—Additional leads the additional leads being a tape carrier or flat leads
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/495—Lead-frames or other flat leads
    • H01L23/49541—Geometry of the lead-frame
    • H01L23/49548—Cross section geometry
    • H01L23/49551—Cross section geometry characterised by bent parts
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/495—Lead-frames or other flat leads
    • H01L23/49541—Geometry of the lead-frame
    • H01L23/49562—Geometry of the lead-frame for individual devices of subclass H10D
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/495—Lead-frames or other flat leads
    • H01L23/49575—Assemblies of semiconductor devices on lead frames
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L24/28—Structure, shape, material or disposition of the layer connectors prior to the connecting process
    • H01L24/29—Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/34—Strap connectors, e.g. copper straps for grounding power devices; Manufacturing methods related thereto
    • H01L24/36—Structure, shape, material or disposition of the strap connectors prior to the connecting process
    • H01L24/37—Structure, shape, material or disposition of the strap connectors prior to the connecting process of an individual strap connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/34—Strap connectors, e.g. copper straps for grounding power devices; Manufacturing methods related thereto
    • H01L24/39—Structure, shape, material or disposition of the strap connectors after the connecting process
    • H01L24/40—Structure, shape, material or disposition of the strap connectors after the connecting process of an individual strap connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/73—Means for bonding being of different types provided for in two or more of groups H01L24/10, H01L24/18, H01L24/26, H01L24/34, H01L24/42, H01L24/50, H01L24/63, H01L24/71
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/93—Batch processes
    • H01L24/95—Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips
    • H01L24/97—Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips the devices being connected to a common substrate, e.g. interposer, said common substrate being separable into individual assemblies after connecting
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02—Bonding areas; Manufacturing methods related thereto
    • H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L2224/04026—Bonding areas specifically adapted for layer connectors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02—Bonding areas; Manufacturing methods related thereto
    • H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L2224/04034—Bonding areas specifically adapted for strap connectors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02—Bonding areas; Manufacturing methods related thereto
    • H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L2224/04042—Bonding areas specifically adapted for wire connectors, e.g. wirebond pads
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02—Bonding areas; Manufacturing methods related thereto
    • H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L2224/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
    • H01L2224/0554—External layer
    • H01L2224/0555—Shape
    • H01L2224/05552—Shape in top view
    • H01L2224/05553—Shape in top view being rectangular
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02—Bonding areas; Manufacturing methods related thereto
    • H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L2224/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
    • H01L2224/0554—External layer
    • H01L2224/0556—Disposition
    • H01L2224/05567—Disposition the external layer being at least partially embedded in the surface
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02—Bonding areas; Manufacturing methods related thereto
    • H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L2224/06—Structure, shape, material or disposition of the bonding areas prior to the connecting process of a plurality of bonding areas
    • H01L2224/0601—Structure
    • H01L2224/0603—Bonding areas having different sizes, e.g. different heights or widths
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02—Bonding areas; Manufacturing methods related thereto
    • H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L2224/06—Structure, shape, material or disposition of the bonding areas prior to the connecting process of a plurality of bonding areas
    • H01L2224/061—Disposition
    • H01L2224/0618—Disposition being disposed on at least two different sides of the body, e.g. dual array
    • H01L2224/06181—On opposite sides of the body
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/28—Structure, shape, material or disposition of the layer connectors prior to the connecting process
    • H01L2224/29—Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
    • H01L2224/29001—Core members of the layer connector
    • H01L2224/29099—Material
    • H01L2224/29198—Material with a principal constituent of the material being a combination of two or more materials in the form of a matrix with a filler, i.e. being a hybrid material, e.g. segmented structures, foams
    • H01L2224/29199—Material of the matrix
    • H01L2224/292—Material of the matrix with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
    • H01L2224/29201—Material of the matrix with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of less than 400°C
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/28—Structure, shape, material or disposition of the layer connectors prior to the connecting process
    • H01L2224/29—Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
    • H01L2224/29001—Core members of the layer connector
    • H01L2224/29099—Material
    • H01L2224/29198—Material with a principal constituent of the material being a combination of two or more materials in the form of a matrix with a filler, i.e. being a hybrid material, e.g. segmented structures, foams
    • H01L2224/29298—Fillers
    • H01L2224/29299—Base material
    • H01L2224/293—Base material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
    • H01L2224/29338—Base material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
    • H01L2224/29347—Copper [Cu] as principal constituent
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/28—Structure, shape, material or disposition of the layer connectors prior to the connecting process
    • H01L2224/29—Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
    • H01L2224/29001—Core members of the layer connector
    • H01L2224/29099—Material
    • H01L2224/29198—Material with a principal constituent of the material being a combination of two or more materials in the form of a matrix with a filler, i.e. being a hybrid material, e.g. segmented structures, foams
    • H01L2224/29298—Fillers
    • H01L2224/29299—Base material
    • H01L2224/293—Base material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
    • H01L2224/29338—Base material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
    • H01L2224/29355—Nickel [Ni] as principal constituent
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/28—Structure, shape, material or disposition of the layer connectors prior to the connecting process
    • H01L2224/30—Structure, shape, material or disposition of the layer connectors prior to the connecting process of a plurality of layer connectors
    • H01L2224/301—Disposition
    • H01L2224/3018—Disposition being disposed on at least two different sides of the body, e.g. dual array
    • H01L2224/30181—On opposite sides of the body
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • H01L2224/321—Disposition
    • H01L2224/32151—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/32221—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/32245—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/34—Strap connectors, e.g. copper straps for grounding power devices; Manufacturing methods related thereto
    • H01L2224/36—Structure, shape, material or disposition of the strap connectors prior to the connecting process
    • H01L2224/37—Structure, shape, material or disposition of the strap connectors prior to the connecting process of an individual strap connector
    • H01L2224/37001—Core members of the connector
    • H01L2224/3701—Shape
    • H01L2224/37011—Shape comprising apertures or cavities
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/34—Strap connectors, e.g. copper straps for grounding power devices; Manufacturing methods related thereto
    • H01L2224/39—Structure, shape, material or disposition of the strap connectors after the connecting process
    • H01L2224/40—Structure, shape, material or disposition of the strap connectors after the connecting process of an individual strap connector
    • H01L2224/4005—Shape
    • H01L2224/4007—Shape of bonding interfaces, e.g. interlocking features
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/34—Strap connectors, e.g. copper straps for grounding power devices; Manufacturing methods related thereto
    • H01L2224/39—Structure, shape, material or disposition of the strap connectors after the connecting process
    • H01L2224/40—Structure, shape, material or disposition of the strap connectors after the connecting process of an individual strap connector
    • H01L2224/4005—Shape
    • H01L2224/4009—Loop shape
    • H01L2224/40095—Kinked
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/34—Strap connectors, e.g. copper straps for grounding power devices; Manufacturing methods related thereto
    • H01L2224/39—Structure, shape, material or disposition of the strap connectors after the connecting process
    • H01L2224/40—Structure, shape, material or disposition of the strap connectors after the connecting process of an individual strap connector
    • H01L2224/401—Disposition
    • H01L2224/40151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/40153—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being arranged next to each other, e.g. on a common substrate
    • H01L2224/40175—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being arranged next to each other, e.g. on a common substrate the item being metallic
    • H01L2224/40177—Connecting the strap to a bond pad of the item
    • H01L2224/40179—Connecting the strap to a bond pad of the item the bond pad protruding from the surface of the item
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/34—Strap connectors, e.g. copper straps for grounding power devices; Manufacturing methods related thereto
    • H01L2224/39—Structure, shape, material or disposition of the strap connectors after the connecting process
    • H01L2224/40—Structure, shape, material or disposition of the strap connectors after the connecting process of an individual strap connector
    • H01L2224/401—Disposition
    • H01L2224/40151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/40221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/40245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/34—Strap connectors, e.g. copper straps for grounding power devices; Manufacturing methods related thereto
    • H01L2224/39—Structure, shape, material or disposition of the strap connectors after the connecting process
    • H01L2224/40—Structure, shape, material or disposition of the strap connectors after the connecting process of an individual strap connector
    • H01L2224/401—Disposition
    • H01L2224/40151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/40221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/40245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • H01L2224/40247—Connecting the strap to a bond pad of the item
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/34—Strap connectors, e.g. copper straps for grounding power devices; Manufacturing methods related thereto
    • H01L2224/39—Structure, shape, material or disposition of the strap connectors after the connecting process
    • H01L2224/40—Structure, shape, material or disposition of the strap connectors after the connecting process of an individual strap connector
    • H01L2224/401—Disposition
    • H01L2224/40151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/40221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/40245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • H01L2224/40247—Connecting the strap to a bond pad of the item
    • H01L2224/40249—Connecting the strap to a bond pad of the item the bond pad protruding from the surface of the item
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/44—Structure, shape, material or disposition of the wire connectors prior to the connecting process
    • H01L2224/45—Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
    • H01L2224/45001—Core members of the connector
    • H01L2224/45099—Material
    • H01L2224/451—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof
    • H01L2224/45117—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof the principal constituent melting at a temperature of greater than or equal to 400°C and less than 950°C
    • H01L2224/45124—Aluminium (Al) as principal constituent
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805—Shape
    • H01L2224/4809—Loop shape
    • H01L2224/48091—Arched
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481—Disposition
    • H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • H01L2224/48247—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/484—Connecting portions
    • H01L2224/48463—Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a ball bond
    • H01L2224/48465—Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a ball bond the other connecting portion not on the bonding area being a wedge bond, i.e. ball-to-wedge, regular stitch
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/485—Material
    • H01L2224/48505—Material at the bonding interface
    • H01L2224/48699—Principal constituent of the connecting portion of the wire connector being Aluminium (Al)
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732—Location after the connecting process
    • H01L2224/73201—Location after the connecting process on the same surface
    • H01L2224/73215—Layer and wire connectors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732—Location after the connecting process
    • H01L2224/73201—Location after the connecting process on the same surface
    • H01L2224/73221—Strap and wire connectors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732—Location after the connecting process
    • H01L2224/73251—Location after the connecting process on different surfaces
    • H01L2224/73263—Layer and strap connectors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732—Location after the connecting process
    • H01L2224/73251—Location after the connecting process on different surfaces
    • H01L2224/73265—Layer and wire connectors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • H01L2224/8312—Aligning
    • H01L2224/83136—Aligning involving guiding structures, e.g. spacers or supporting members
    • H01L2224/83138—Aligning involving guiding structures, e.g. spacers or supporting members the guiding structures being at least partially left in the finished device
    • H01L2224/83139—Guiding structures on the body
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • H01L2224/8312—Aligning
    • H01L2224/83136—Aligning involving guiding structures, e.g. spacers or supporting members
    • H01L2224/83138—Aligning involving guiding structures, e.g. spacers or supporting members the guiding structures being at least partially left in the finished device
    • H01L2224/8314—Guiding structures outside the body
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • H01L2224/8312—Aligning
    • H01L2224/83143—Passive alignment, i.e. self alignment, e.g. using surface energy, chemical reactions, thermal equilibrium
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • H01L2224/838—Bonding techniques
    • H01L2224/83801—Soldering or alloying
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • H01L2224/838—Bonding techniques
    • H01L2224/83801—Soldering or alloying
    • H01L2224/83815—Reflow soldering
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/84—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a strap connector
    • H01L2224/8412—Aligning
    • H01L2224/84136—Aligning involving guiding structures, e.g. spacers or supporting members
    • H01L2224/84138—Aligning involving guiding structures, e.g. spacers or supporting members the guiding structures being at least partially left in the finished device
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/84—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a strap connector
    • H01L2224/8412—Aligning
    • H01L2224/84143—Passive alignment, i.e. self alignment, e.g. using surface energy, chemical reactions, thermal equilibrium
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/84—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a strap connector
    • H01L2224/842—Applying energy for connecting
    • H01L2224/84201—Compression bonding
    • H01L2224/84205—Ultrasonic bonding
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/84—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a strap connector
    • H01L2224/848—Bonding techniques
    • H01L2224/84801—Soldering or alloying
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/85—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a wire connector
    • H01L2224/852—Applying energy for connecting
    • H01L2224/85201—Compression bonding
    • H01L2224/85205—Ultrasonic bonding
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/91—Methods for connecting semiconductor or solid state bodies including different methods provided for in two or more of groups H01L2224/80 - H01L2224/90
    • H01L2224/92—Specific sequence of method steps
    • H01L2224/921—Connecting a surface with connectors of different types
    • H01L2224/9212—Sequential connecting processes
    • H01L2224/92152—Sequential connecting processes the first connecting process involving a strap connector
    • H01L2224/92157—Sequential connecting processes the first connecting process involving a strap connector the second connecting process involving a wire connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/91—Methods for connecting semiconductor or solid state bodies including different methods provided for in two or more of groups H01L2224/80 - H01L2224/90
    • H01L2224/92—Specific sequence of method steps
    • H01L2224/922—Connecting different surfaces of the semiconductor or solid-state body with connectors of different types
    • H01L2224/9222—Sequential connecting processes
    • H01L2224/92242—Sequential connecting processes the first connecting process involving a layer connector
    • H01L2224/92246—Sequential connecting processes the first connecting process involving a layer connector the second connecting process involving a strap connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/93—Batch processes
    • H01L2224/95—Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips
    • H01L2224/97—Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips the devices being connected to a common substrate, e.g. interposer, said common substrate being separable into individual assemblies after connecting
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/02—Bonding areas ; Manufacturing methods related thereto
    • H01L24/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L24/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/02—Bonding areas ; Manufacturing methods related thereto
    • H01L24/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L24/06—Structure, shape, material or disposition of the bonding areas prior to the connecting process of a plurality of bonding areas
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L24/28—Structure, shape, material or disposition of the layer connectors prior to the connecting process
    • H01L24/30—Structure, shape, material or disposition of the layer connectors prior to the connecting process of a plurality of layer connectors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L24/31—Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L24/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/42—Wire connectors; Manufacturing methods related thereto
    • H01L24/44—Structure, shape, material or disposition of the wire connectors prior to the connecting process
    • H01L24/45—Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/42—Wire connectors; Manufacturing methods related thereto
    • H01L24/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L24/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L24/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L24/84—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a strap connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L24/85—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a wire connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/91—Methods for connecting semiconductor or solid state bodies including different methods provided for in two or more of groups H01L24/80 - H01L24/90
    • H01L24/92—Specific sequence of method steps
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L25/00—Assemblies consisting of a plurality of semiconductor or other solid state devices
    • H01L25/03—Assemblies consisting of a plurality of semiconductor or other solid state devices all the devices being of a type provided for in a single subclass of subclasses H10B, H10F, H10H, H10K or H10N, e.g. assemblies of rectifier diodes
    • H01L25/10—Assemblies consisting of a plurality of semiconductor or other solid state devices all the devices being of a type provided for in a single subclass of subclasses H10B, H10F, H10H, H10K or H10N, e.g. assemblies of rectifier diodes the devices having separate containers
    • H01L25/11—Assemblies consisting of a plurality of semiconductor or other solid state devices all the devices being of a type provided for in a single subclass of subclasses H10B, H10F, H10H, H10K or H10N, e.g. assemblies of rectifier diodes the devices having separate containers the devices being of a type provided for in subclass H10D
    • H01L25/115—Assemblies consisting of a plurality of semiconductor or other solid state devices all the devices being of a type provided for in a single subclass of subclasses H10B, H10F, H10H, H10K or H10N, e.g. assemblies of rectifier diodes the devices having separate containers the devices being of a type provided for in subclass H10D the devices being arranged next to each other
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001—Technical content checked by a classifier
    • H01L2924/00011—Not relevant to the scope of the group, the symbol of which is combined with the symbol of this group
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001—Technical content checked by a classifier
    • H01L2924/00014—Technical content checked by a classifier the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01029—Copper [Cu]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01082—Lead [Pb]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/013—Alloys
    • H01L2924/014—Solder alloys
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10—Details of semiconductor or other solid state devices to be connected
    • H01L2924/11—Device type
    • H01L2924/13—Discrete devices, e.g. 3 terminal devices
    • H01L2924/1304—Transistor
    • H01L2924/1306—Field-effect transistor [FET]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10—Details of semiconductor or other solid state devices to be connected
    • H01L2924/11—Device type
    • H01L2924/13—Discrete devices, e.g. 3 terminal devices
    • H01L2924/1304—Transistor
    • H01L2924/1306—Field-effect transistor [FET]
    • H01L2924/13091—Metal-Oxide-Semiconductor Field-Effect Transistor [MOSFET]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/181—Encapsulation
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/181—Encapsulation
    • H01L2924/1815—Shape
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/30—Technical effects
    • H01L2924/35—Mechanical effects
    • H01L2924/351—Thermal stress
    • H01L2924/3511—Warping

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Geometry (AREA)
  • Lead Frames For Integrated Circuits (AREA)

Abstract

本发明的目的在于提供一种半导体装置。该半导体装置中，利用第1焊料（51）将第1引线（11）与MOS-FET（21）的下表面电极（23）进行接合，利用第2焊料（52）将MOS-FET的上表面电极（22）与内部引线（31）进行接合，利用第3焊料（53）将内部引线与第2引线的突起部（61）进行接合，并且第1引线、第2引线、MOS-FET以及内部引线通过密封树脂（41）来一体形成，在第1焊料的内部与第2焊料的内部设置支承构件（54）、（55），并通过自对准使内部引线与MOS-FET的位置稳定。

Description

半导体装置
技术领域
本发明涉及一种树脂密封型半导体装置，用于构成使用了MOS-FET元件的电源用逆变器电路。
背景技术
随着控制装置与车辆用旋转电机的一体化，以及车载设备的小型化，所使用的半导体装置也追求小型化、轻便化、高可靠性。
另外，在车载用的电源半导体装置中，一方面需要小型化，另一方面还需要能应对大电流控制。
因此，开发有具有如下形态的使用了MOS-FET元件的电源用半导体装置：在绝缘基板布线上对MOS-FET元件的下表面电极进行焊接，并通过引线接合将上表面电极与基板布线相接合，随后，将该电源用半导体装置收纳于树脂壳体中；以及将MOS-FET元件的下表面电极焊接至金属引线框，并利用内部引线将上表面电极与引线框进行焊接，再通过传递模塑法进行树脂密封。
MOS-FET元件的上表面电极与引线框的接合通过内部引线来实现，例如专利文献1、专利文献2等中提出有现有的半导体装置。
（参照专利文献1、专利文献2）。
现有技术文献
专利文献
专利文献1：日本专利特开2006－216736号公报
专利文献2：日本专利特开2001－298142号公报
发明内容
发明所要解决的技术问题
若要使现有例那样利用内部引线将半导体芯片的上表面电极与引线框进行接合的结构进一步小型化，则稳定地对焊接工序中的半导体芯片、内部引线的位置以及姿势进行安装将成为问题。
例如，在专利文献1（图1）中，内部引线（框架）的接合面形成得较小，以收纳于较半导体芯片的电极部表面更靠近内侧的位置，因此，电极部与内部引线的位置通过自对准来确定并保持。
然而，在该示例中，不使用任何位置对准方法来对准引线框（第2引线端子）与内部引线的位置，因此内部引线搭载位置可能产生偏离，或者在焊料熔融而使得内部引线发生移动时，引线框与内部引线的位置可能发生偏离。
为了使半导体装置小型化，需要缩小引线框的宽度，然而，又需要使引线框的接合面较宽，使得内部引线的位置发生偏离时允许该偏离以确保接合，这将使得半导体装置的小型化变得困难。
另外，在本示例中，不使用任何对熔融的焊料的厚度进行限制的方法，因此，若在自对准时半导体芯片或内部引线发生移动，则焊料的厚度可能发生变化，或者焊料可能发生偏离，使得半导体芯片或内部引线发生倾斜。
在半导体芯片或内部引线发生倾斜的情况下，被压出的焊料流出，使得上表面电极与下表面电极发生短路，或者焊料厚度变得不均匀，因此，温度循环环境下的焊料接合部的可靠性将降低，从而产生问题。
另外，在本示例的结构中，在半导体芯片中使用MOS-FET元件时，在焊接后的MOS-FET元件发生倾斜的情况下，与栅极电极的引线接合将变得不稳定，从而也会产生问题。
另外，在专利文献2（图1）中，在引线框与内部引线的连接部的其中一方设置凸部，而在另一方设置凹部，使其相嵌合从而实现定位，然而，未使用任何方法来对半导体芯片与内部引线进行定位，将可能导致半导体芯片与内部引线的搭载位置发生偏离，或者因熔融时的焊料发生流动而导致接合位置发生偏离。
在本示例中也没有使用任何方法来对熔融后的焊料的厚度进行限制，因此在半导体芯片与内部引线的位置发生偏离的情况下，负载将失去平衡，在焊料熔融时内部引线与半导体芯片可能发生倾斜。
在内部引线或半导体芯片发生倾斜的情况下，被压出的焊料流出，使得上表面电极与下表面电极发生短路，或者焊料厚度变得不均匀，因此，温度循环环境下的焊料接合部的可靠性将降低，从而产生问题。
另外，在本示例中，设置于引线框与内部引线的连接部处的凸部、凹部相嵌合，而在内部引线的搭载位置发生偏离的情况下，两者无法正确地相嵌合，而可能会在产生位置偏离、倾斜的状态下相接合。
另外，在以本示例的结构、在半导体芯片中使用MOS-FET元件时，在经过焊接后的MOS-FET元件发生倾斜的情况下，与栅极电极的引线接合将变得不稳定。
本发明为了解决上述问题而得以完成，其目的在于，提出一种结构，能够在利用内部引线将MOS-FET元件与引线框进行电接合的半导体装置中，即使在对引线框、内部引线进行小型化的情况下，也能稳定地对引线框与内部引线、以及内部引线与MOS-FET元件的位置进行接合，从而实现一种小型、薄型的半导体装置。
另外，本发明的目的还在于，利用上述经小型化后的半导体装置使逆变器电路内置旋转机械小型化。
解决技术问题所采用的技术方案
本发明所涉及的半导体装置由如下元器件构成：第1引线；第2引线，该第2引线的一部分发生变形以设置突起部；MOS-FET元件，该MOS-FET元件的下表面电极与第1引线电接合；内部引线，该内部引线使电流流过MOS-FET元件的上表面电极与第2引线之间；焊料材料，该焊料材料将这些元器件电接合；以及密封树脂，该密封树脂固定这些元器件的相对位置，第1引线与第2引线的下表面位于同一平面上，并且内部引线的、与MOS-FET元件的接合面，和内部引线的、与第2引线的接合面位于同一平面上，第1引线与MOS-FET元件的下表面电极通过第1焊料相接合，MOS-FET元件的上表面电极与内部引线通过第2焊料相接合，内部引线与第2引线的突起部通过第3焊料相接合，第1引线、第2引线、MOS-FET元件以及内部引线通过密封树脂一体形成，该半导体装置至少在第1焊料的内部以及第2焊料的内部设置支承构件。
发明效果
根据本发明的半导体装置，在内部引线及MOS-FET元件因自对准而发生移动时，MOS-FET元件及内部引线保持于水平，能可靠地实现自对准，因此，能够将第1引线、第2引线、以及内部引线设计成所需最小的尺寸，从而能使半导体装置小型化。
另外，由于能实现自对准，因此无需高精度的安装装置，并且也无需在焊料熔融时对内部引线、MOS-FET元件的位置进行保持的方法，由此，能简化制造工序。
另外，由于焊料厚度得到了稳定，因此能防止因焊料流动而导致MOS-FET元件的上表面电极与下表面电极发生短路，或上表面电极与栅极电极发生短路。
本发明的如上所述的、或其他的目的、特征、效果通过以下实施方式中的详细说明以及附图的记载来阐明。
附图说明
图1是表示本发明的实施方式1的半导体装置的剖视图。
图2是表示本发明的实施方式1的半导体装置的俯视图。
图3是表示本发明的实施方式1中的内部引线与MOS-FET元件的图。
图4是对本发明的实施方式1中的半导体装置的焊接工序进行说明的图。
图5是对经过薄型化后的半导体装置因温度变化而发生的变形进行说明的图。
图6是表示本发明的实施方式2的半导体装置的剖视图。
图7是表示本发明的实施方式2的半导体装置的俯视图。
图8是表示本发明的实施方式2中的MOS-FET元件的图。
图9是表示本发明的实施方式3的半导体装置的俯视图。
图10是表示本发明的实施方式3的半导体装置的电路图。
图11是表示使用本发明的半导体装置的实施方式4的逆变器装置的图。
图12是使用了图11的逆变器装置的旋转电机的电路图。
具体实施方式
下面，参照附图对本发明的实施方式进行说明。此外，在各图中，同一标号表示相同或相当部分。
实施方式1
下面，基于附图对本发明的实施方式1进行说明。
图1是表示本发明的实施方式1的半导体装置的剖面结构的图；图2是表示本发明的实施方式1的半导体装置的俯视结构的图；图3是表示实施方式1中的内部引线与MOS-FET元件的图。
在图1～图3中，实施方式1中的半导体装置1在第1引线11上配置MOS-FET元件21，通过第1焊料51将MOS-FET元件21的下表面电极23与第1引线11相接合。
在MOS-FET元件21的上表面电极22上通过第2焊料52与内部引线31的一个端部相接合，而内部引线31的另一个端部通过第3焊料53与第2引线12的突起部61相接合。通过榫头加工使第2引线12的一部分发生形变，从而形成第2引线12的突起部61。
这里，第1引线11的下表面与第2引线12的下表面位于同一平面内，在该平面上，利用未图示的散热润滑剂或散热粘接剂来安装有未图示的热沉。
另外，在第1焊料51的内部配置有第1支承构件54，在第2焊料52的内部配置有第2支承构件55，在第3焊料53的内部配置有第3支承构件56。
支承构件54～56是与焊料的浸润性较好、且在焊料熔融温度下不发生熔融的金属为材料的球状构件，例如是球状的Ni粒子或Cu粒子等。
栅极电极24利用铝线71与栅极用引线13进行电连接。
这些第1引线11、第2引线12、焊料51～53、MOS-FET元件21、内部引线31、铝线71、栅极用引线13通过密封树脂41成型、固定。其中，第1引线11的一部分、第2引线12的一部分、栅极用引线13的一部分位于密封树脂41的外部，可与外部进行电连接。
此外，图1中，作为散热面的、第1引线11与MOS-FET元件21的接合部的背面、以及第2引线12与内部引线31的接合部的背面采用从密封树脂41露出的结构，但并不局限于此，例如也可以被密封树脂41覆盖，或者由未图示的导热性绝缘构件覆盖。
下面，对内部引线31与第2引线12的突起61以及MOS-FET元件21进行说明。
图3（a）是内部引线31的侧视图，图3（b）是从接合面观察到的俯视图。内部引线31通过弯曲加工而设置有第1接合用平面32及第2接合用平面33，第1接合用平面32与第2接合用平面33位于同一平面内。
另外，在第2接合用平面33的面内设有贯通孔34，在非接合面上设有贯通孔35。
另外，如图3（c）所示，在设置于第2引线12的一部分上的突起部61的上表面上，形成有接合面62，如图1、图2所示，内部引线31的第1接合用平面32的形状大致与接合面62相同。
另外，如图3（d）所示，MOS-FET元件21的表面上设有上表面电极22以及栅极电极24，并在表面上具备保护膜25。
保护膜25的开口形状呈圆形，如图1、图2所示，内部引线31的第2接合用平面33呈现为与MOS-FET元件21的上表面电极22的开口电极形状相内接的形状。
此外，图3（b）的内部引线31的第2接合用平面33大致呈圆形，但并不局限于此，也可以是像图3（e）那样的四边形、或除此以外未图示的多边形、椭圆形、长圆形等，只要其外形是与MOS-FET元件21的上表面电极22的形状有三处以上内接的形状，就能得到由自对准产生的位置修正的效果。
图4是对实施方式1中的半导体装置的焊接工序进行说明的图。
图4（a）示出了将MOS-FET元件21焊接于第1引线11上的状态。此时，MOS-FET元件21可能会因安装装置的搭载位置的偏离而从目标位置偏离。
图4（b）示出了将焊料糊料涂覆于MOS-FET元件21的上表面电极22、以及第2引线12的突起部61、并搭载内部引线31后的状态。
焊料糊料是混合有支承构件的糊料，利用相同的焊料糊料作为第2糊料52、第3糊料53，并在同一工序中进行供给。
此时，内部引线31可能会因安装装置的搭载位置的偏离而从目标位置偏离。另外，焊料糊料的供给量也可能有偏差。
接下来，在回流工序中焊料发生熔融的情况下，如图4（c）所示，首先利用第3焊料53的表面张力所产生的自对准来使内部引线31移动，使得第2引线的突起部61的上表面接合面62与内部引线31的第1接合用平面32对准。
此时，若第3焊料53中留有剩余焊料，则将流落到突起部61的侧面，而突起部的接合面62上的焊料的外形不发生变化，因此自对准的位置得以保持。
另外，位于MOS-FET元件21的下表面的第1焊料51也再次熔融，利用第2焊料52的表面张力所产生的自对准来使MOS-FET元件21移动，使得内部引线31的第2接合用平面33位于与MOS-FET元件21的上表面电极22的外形相内接的位置上。此时，若第2焊料52中留有剩余的焊料，则通过贯通孔34移动至内部引线31的上表面，使得接合部的焊料量得到调整。
在进行上述自对准时，第1焊料51的内部存在支承构件54，第2焊料52的内部存在支承构件55，以及第3焊料53的内部存在支承构件56，因此内部引线31及MOS-FET元件21能平滑地移动，并且即使发生移动也保持水平。
此后，通过未图示的工序利用铝线71将栅极电极24与栅极用引线13进行接合，但由于在MOS-FET元件21不发生倾斜的情况下进行接合，因此能实现稳定的铝线接合。然后，通过利用密封树脂41来成形，从而得到半导体装置。
此外，在本示例中，提供混合有金属粒子的焊料糊料，而支承构件、以及焊料的提供方法并不局限于此，例如也可以将含有支承构件的板状焊料切割成所需的形状，再将其搭载。
若经过薄型化的半导体装置的温度发生变化，则由于密封树脂与引线框间的线膨胀系数的差而产生如图5所示的变形。即使在这样的状态下，由于在实施方式1的半导体装置中，在内部引线31的非接合部设有贯通孔35，该贯通孔35中也填充有密封树脂41，因此，也能够抑制因密封树脂41相对于内部引线31产生偏离或剥离而产生的焊料的裂缝、MOS-FET元件的裂缝。
如上所述，根据本发明的实施方式1的半导体装置1，通过在第1焊料与第2焊料的内部配置支承构件，从而在接合内部引线时，第1焊料与第2焊料一起发生熔融，在利用自对准来使内部引线与MOS-FET元件发生移动时，能利用支承构件来将MOS-FET元件及内部引线保持水平，能可靠地实现自对准，因此，能够将第1引线、第2引线以及内部引线设计成所需最小的尺寸，由此能使半导体装置小型化。
另外，由于能实现自对准，因此无需高精度的安装装置，并且也无需在焊料熔融时对内部引线、MOS-FET元件的位置进行保持的方法，由此，能简化制造工序。
另外，由于焊料厚度得到了稳定，因此能防止因焊料流动而导致MOS-FET元件上表面电极与下表面电极或上表面电极与栅极电极发生短路。
另外，通过使内部引线的第1接合用平面形状与第2引线的突起上表面形状为大致相同的形状，从而能利用焊料的表面张力并以第2引线为基准通过自对准效果对内部引线的位置进行修正。
另外，通过使内部引线的第2接合用平面形状为大致与MOS-FET元件的上表面电极的开口形状的外形内接的形状，从而能利用第2焊料的表面张力通过自对准来对内部引线及MOS-FET元件的位置进行修正。
此时，由于已经以第2引线为基准对内部引线进行了定位，因此MOS-FET元件发生移动，以对准内部引线的位置，因而第2引线、内部引线、MOS-FET元件的位置得到修正。
另外，通过使MOS-FET元件上表面电极的开口形状为圆形，从而即时在水平面内、MOS-FET元件与内部引线发生角度偏差，也能平滑地进行自对准。另外，即使设计成MOS-FET元件与内部引线夹有角度，也能利用在长轴方向上左右对成的内部引线，从而能保持内部引线的平衡。
另外，通过使支承构件为球状金属，使得支承构件易于旋转，从而能使内部引线及MOS-FET元件在焊料熔融时通过自对准进行的移动变得平滑。
此外，由于与MOS-FET元件的接触面为球面，因此能防止MOS-FET元件在热变形时以支承构件为起点发生裂痕。
另外，通过在第3糊料内部也配置支承构件，从而能使第2焊料与第3焊料成为混有球状金属的相同焊料糊料，从而能在同一工序内供给焊料，由此制造工序得到了简化。
另外，通过在与MOS-FET元件上表面电极接合部分相对应的内部引线的第2接合用平面部设置贯通孔，从而能使在因自对准而使内部引线与MOS-FET元件的位置发生变化时剩余的焊料、或因供给量产生偏差而剩余的焊料通过贯通孔，而移动至内部引线的第2接合用平面的上表面，从而能防止因焊料流至MOS-FET元件的表面而导致MOS-FET元件上表面电极与下表面电极发生短路，或上表面电极与栅极电极发生短路。
另外，通过在内部引线的非接合部分设置贯通孔，从而能提高内部引线与密封树脂的密接性，因此，即使使密封树脂的厚度较薄，或因温度发生变化而使半导体装置发生形变，也能防止内部引线与密封树脂剥离，降低对热变形时的焊料、MOS-FET元件的应力负荷。
实施方式2
下面，基于附图对本发明的实施方式2进行说明。
图6是表示本发明的实施方式2的半导体装置的剖面结构的图；图7是表示实施方式2的俯视结构的图；图8是表示实施方式2中的MOS-FET元件的图。
如图6、图7所示，该实施方式2的半导体装置2采用通过金属引线的超声波接合而形成的支承构件57作为第2焊料52的内部的支承构件，另外，未在第3焊料53的内部设置支承构件，除此以外，采用与实施方式1相同的结构。
如图8所示，MOS-FET元件21的上表面电极22上，通过在多处对金属引线57进行超声波接合来形成支承构件。
另外，对第2引线的突起部61的接合面的高度设定如下：即，即使不设置支承构件56，所接合的内部引线31也处于水平。
在焊接工序中，与实施方式1相同，以通过自对准而设置在第2引线12上的突起部61为基准，来对内部引线31的位置、MOS-FET元件21的位置进行修正。此时，即使内部引线31与MOS-FET元件21发生移动，但由于支承构件54及支承构件57的存在，因而内部引线31及MOS-FET元件21也保持在水平。另外，由于支承构件57是通过超声波接合在MOS-FET元件21的上表面电极22上的金属引线，因此即使内部引线31发生移动，其位置也不会发生偏离，从而将内部引线31稳定地保持于水平。
作为支承构件57的金属引线的材料例如是铝线。在将铝用作为金属引线的材料的情况下，由于比Ni、Cu软，因此即使由于热应力使得MOS-FET元件21受到铝线的按压，也能防止MOS-FET元件以与铝线的接触部为起点产生裂痕。
如上所述，根据本发明的实施方式2的半导体装置2，通过采用利用将金属引线接合在MOS-FET元件上表面电极而构成的支承构件作为位于第2焊料内部的支承构件，从而即使MOS-FET元件因自对准而相对于内部引线发生移动，也能固定支承构件的位置，从而稳定地将内部引线保持于水平。
实施方式3
下面，基于附图对本发明的实施方式3进行说明。
图9是表示本发明的实施方式3的半导体装置3的俯视结构的图；图10是实施方式3的半导体装置的电路图。
在图9中，在第1引线11上配置第1MOS-FET元件21，通过第1焊料51将第1MOS-FET元件21的下表面电极23与第1引线11相接合。
在第1MOS-FET元件21的上表面电极22上通过第2焊料52与内部引线31的一个端部相接合，而内部引线31的另一个端部通过第3焊料53与设置于第2引线12的突起部61相接合。
这里，通过榫头加工使突起部61形成在第2引线12的一部分上，其上表面的形状与内部引线31的第1接合用平面32大致相同。
另外，第1MOS-FET元件21的上表面电极22的开口部通过保护膜25形成为圆形的形状，内部引线31的第2接合用平面33的外形呈现为与开口部相内接的形状。栅极电极24与栅极用引线13利用铝线71进行电连接。
此外，在第2引线12上配置第2MOS-FET元件26，通过第1焊料51将第2MOS-FET元件26的下表面电极与第2引线12相接合。在第2MOS-FET元件26的上表面电极上通过第2焊料52与第2内部引线36的一个端部相接合，而第2内部引线36的另一个端部通过第3焊料53与设置在第3引线15上的突起部63相接合。
这里，通过榫头加工使突起部63形成在第3引线15的一部分上，其上表面的形状与内部引线36的第1接合用平面32大致相同。
另外，第2MOS-FET元件26的上表面电极的开口部通过保护膜30形成为圆形的形状，内部引线36的第2接合用平面的外形呈现为与开口部相内接的形状。
栅极电极29与栅极用引线14利用铝线72进行电连接。
这些第1～第3引线11、12、15、第1～第3焊料51～53、MOS-FET元件21、26、内部引线31、36、铝线71、72、栅极用引线13、14通过密封树脂41一体成型并固定。
其中，第1～第3引线11、12、15、栅极用引线13、14的一部分位于密封树脂41的外部，可与外部进行电连接。由此，将逆变器的上下臂形成为一体的半导体装置得以构成。上下臂一体的半导体装置的电路图如图10所示。
在图9中，也与实施方式1及实施方式2中所说明的相同，在第1焊料51、第2焊料52、以及第3焊料53的内部分别设有第1支承构件、第2支承构件、第3支承构件。
在图9所示的实施方式3的半导体装置3的焊接工序中，在安装了两个MOS-FET元件以后，在同一工序中分别实施如下步骤：对这两个MOS-FET元件的上表面电极提供焊料，对两个突起面提供焊料，搭载两条内部引线，然后，通过回流工序使焊料熔融。
由此，即使是含有两组内部引线、MOS-FET元件的半导体装置也能如实施方式1种说明的那样通过自对准来对各自的内部引线、MOS-FET元件的位置进行修正。
图9、图10中，相对配置构成上臂111的第1MOS-FET元件21与第1内部引线31的连接体、和构成下臂112的第2MOS-FET元件26与第2内部引线36的连接体。
由此，能缩小上臂111与下臂112的距离，从而能使内置有一对上下臂的半导体装置小型化。
如上所述，根据本发明的实施方式3，能在使用多个半导体元件的电机设备中，省略半导体装置的外部布线，因此能使电机设备小型化。
实施方式4
图11是表示本发明的实施方式4的逆变器装置102的俯视图；图12是使用了图11的逆变器装置的旋转电机100的电路图。
图11中，半导体装置1的正极端子与负极端子被配置成从由密封树脂形成的大致呈长方形的相对面突出。另外，一半的半导体装置采用镜像对称的结构。
在图11的半导体装置中，也与实施方式1及实施方式2中所说明的相同，在未图示的第1焊料51、第2焊料52、以及第3焊料53的内部分别设有第1支承构件、第2支承构件、第3支承构件，并且该半导体装置被设计得较为小型。
半导体装置1构成配置在同心圆上的逆变器装置102。
这里，半导体装置1的正极端子与配置在内周的正电压供给元器件81电接合。正电压供给元器件81利用未图示的布线与蓄电单元的正极相连接。
半导体装置1的负极端子与配置在外周上的负电压供给元器件82电接合。负电压供给元器件82利用未图示的布线与蓄电单元的负极相连接。
电接合例如可以通过熔接、焊接等来实现。另外，各相的电力输出端子83利用未图示的布线与旋转电机的线圈相连接。
通过由此构成，能在大致同一平面上配置半导体装置1、正电压供给元器件81以及负电压供给元器件82，因此能使逆变器装置102变薄。
另外，通过构成内置有实施方式4的逆变器装置的旋转电机，从而能使逆变器一体型的旋转电机变薄。
此外，图11中，将半导体装置的个数设为6个（6相），但并不局限于此。
另外，正电压供给元器件81也并不局限于六边形，也可以是多边形或圆形。
另外，在图11中将正电压供给元器件81配置于内周侧，但也可以将负电压供给元器件82配置于内周侧。在该情况下，将半导体装置配置成半导体装置1的负电极朝向内侧即可。
图12示出了内置有图11所示的逆变器装置102的旋转电机100的电路图。图12中，旋转电机100由控制单元101、逆变器装置102、固定线圈103、104、以及可动线圈105构成。
固定线圈103以及固定线圈104的各相通过由MOS-FET元件构成的上臂部111及下臂部112来与蓄电单元120相连，通过从控制单元101对这些MOS-FET元件发送栅极信号，从而对各MOS-FET元件进行导通/截止控制，对流过固定线圈103、104各相的电流进行切换。该旋转电机100可以通过来自控制单元101的信号对可动线圈105进行旋转驱动，也可以通过可动线圈105的旋转来发电。
如上所述，根据本发明的实施方式4，通过将正电压连接端子、负电压连接端子以及电压输出端子配置于与半导体装置相对的面上，从而即使将半导体装置配置成同心圆状来构成逆变器装置，也能将正电压连接端子、与负电压连接端子大致配置在同一平面内，因此，能使内置逆变器装置的旋转机械变薄。
此外，在构成上述逆变器装置时，通过将一半的半导体装置构成为镜像对称，从而能缩短外周侧连接长度，并能简化布线，减小电阻抗。
工业上的实用性
本发明适用于利用使用了MOS-FET元件的树脂密封型半导体装置来构成电源用逆变器电路。
标号说明
1～3半导体装置、11第1引线、12第2引线、
13、14栅极用引线、15第3引线、
21、26MOS－FET元器件、22上表面电极、23下表面电极、
24、29栅极电极、25、30保护膜、31、36内部引线、
32第1接合用平面、33第2接合用平面、34贯通孔、
35贯通孔、41密封树脂、51～53焊料、54～57支承构件、
61、63突起部、62突起接合面、71、72铝线、
81正电压供给元器件、82负电压供给元器件、83电力输出端子、
100旋转电机、101控制单元、102逆变器装置、
103、104固定线圈、105可动线圈、
111上臂、112下臂、120蓄电单元。

Claims (13)

1.一种半导体装置，
由如下元器件构成：第1引线；第2引线，该第2引线的一部分发生变形以设置突起部；MOS-FET，该MOS-FET的下表面电极与所述第1引线电接合；内部引线，该内部引线使电流流过所述MOS-FET的上表面电极与所述第2引线之间；焊料材料，该焊料材料将这些元器件电接合；以及密封树脂，该密封树脂固定这些元器件的相对位置，
所述第1引线的下表面与所述第2引线的下表面位于同一平面上，并且所述内部引线的、与所述MOS-FET的接合面，和所述内部引线的、与所述第2引线的接合面位于同一平面上，
所述第1引线与所述MOS-FET的下表面电极通过第1焊料相接合，
所述MOS-FET的上表面电极与所述内部引线通过第2焊料相接合，
所述内部引线与所述第2引线的突起部通过第3焊料相接合，
所述第1引线、第2引线、MOS-FET以及内部引线通过所述密封树脂一体形成，其特征在于，
至少在所述第1焊料的内部以及所述第2焊料的内部设置支承构件。
2.如权利要求1所述的半导体装置，其特征在于，
所述内部引线的第1端部设有通过弯曲处理而划分出的第1接合用平面，设置于所述第2引线的突起部是通过榫头加工而形成的突起部，并且，所述第1接合用平面的形状与所述突起部的上表面的形状实质上相同。
3.如权利要求1所述的半导体装置，其特征在于，
所述内部引线的第2端部设有通过弯曲处理而划分出的第2接合用平面，该第2接合用平面的形状实质上与形成在所述MOS-FET的上表面电极接合部分的开口电极形状的外形相内接。
4.如权利要求3所述的半导体装置，其特征在于，
所述MOS-FET的上表面电极接合部分的开口电极的形状是圆形。
5.如权利要求1至4中任一项所述的半导体装置，其特征在于，
所述支承构件是球状金属。
6.如权利要求1至4中任一项所述的半导体装置，其特征在于，
在所述第3焊料的内部设有支承构件。
7.如权利要求1至4中任一项所述的半导体装置，其特征在于，
位于所述第2焊料内部的支承构件通过对金属引线与所述MOS-FET上表面电极进行超声波接合而得以形成。
8.如权利要求3所述的半导体装置，其特征在于，
在所述内部引线的第2接合用平面部设有贯通孔。
9.如权利要求1至4中任一项所述的半导体装置，其特征在于，
在所述内部引线的非接合部分设有贯通孔。
10.如权利要求1所述的半导体装置，其特征在于，
至少使用两组MOS-FET及内部引线，
在第1引线上配置第1MOS-FET，将第1MOS-FET的下表面电极与第1引线进行电连接，通过第1内部引线将第1MOS-FET的上表面电极与第2引线进行电连接，在第2引线上配置第2MOS-FET，将第2MOS-FET的下表面电极与第2引线进行电连接，通过第2内部引线将第2MOS-FET的上表面电极与第3引线进行电连接，然后，利用一体的密封树脂对这些元器件进行成形。
11.如权利要求10所述的半导体装置，其特征在于，
所述第1引线与所述第3引线从所述密封树脂的相对面突出至树脂外。
12.一种逆变器装置，其特征在于，
在同一平面上且同心圆上配置多个如权利要求11所述的半导体装置，利用配置在内周侧的同一平面上的供电元器件将所有半导体装置的正极、或所有半导体装置的负极连接。
13.如权利要求12所述的逆变器装置，其特征在于，
对一半的半导体装置采用镜像对称结构，利用配置在同一平面上的供电元器件将至少一组相邻的半导体装置的外周侧的电极相连接。
CN201180070578.9A 2011-06-09 2011-06-09 半导体装置 Active CN103503132B (zh)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
PCT/JP2011/063246 WO2012169044A1 (ja) 2011-06-09 2011-06-09 半導体装置

Publications (2)

Publication Number Publication Date
CN103503132A true CN103503132A (zh) 2014-01-08
CN103503132B CN103503132B (zh) 2016-06-01

Family

ID=47295646

Family Applications (1)

Application Number Title Priority Date Filing Date
CN201180070578.9A Active CN103503132B (zh) 2011-06-09 2011-06-09 半导体装置

Country Status (4)

Country Link
US (1) US9401319B2 (zh)
EP (1) EP2720263A4 (zh)
CN (1) CN103503132B (zh)
WO (1) WO2012169044A1 (zh)

Cited By (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN105244331A (zh) * 2015-10-10 2016-01-13 杰群电子科技（东莞）有限公司 一种芯片封装结构
CN105914197A (zh) * 2016-06-14 2016-08-31 山东晶导微电子有限公司 一种采用植球工艺的小功率整流元器件及其制造方法
CN110534495A (zh) * 2019-08-16 2019-12-03 天津大学 一种带有铜质台阶和开孔设计的铜夹键合封装结构
CN111293095A (zh) * 2018-12-07 2020-06-16 株式会社电装 半导体装置及其制造方法
CN114944375A (zh) * 2022-05-23 2022-08-26 山东中清智能科技股份有限公司 一种功率器件封装结构及其制备方法
US12027579B2 (en) 2017-01-25 2024-07-02 Rohm Co., Ltd. Semiconductor device having a carrier trapping region including crystal defects

Families Citing this family (17)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP5752218B2 (ja) 2013-12-09 2015-07-22 三菱電機株式会社 電力変換装置付き回転電機
KR102004785B1 (ko) * 2014-03-18 2019-07-29 삼성전기주식회사 반도체모듈 패키지 및 그 제조 방법
EP3024025A1 (en) * 2014-11-19 2016-05-25 Nxp B.V. Die arrangement
JP6276721B2 (ja) 2015-02-06 2018-02-07 日立オートモティブシステムズ株式会社 パワーモジュール
JP6061967B2 (ja) * 2015-03-05 2017-01-18 三菱電機株式会社 パワー半導体装置
JP6721329B2 (ja) * 2015-12-21 2020-07-15 三菱電機株式会社 パワー半導体装置およびその製造方法
KR20170086828A (ko) * 2016-01-19 2017-07-27 제엠제코(주) 메탈범프를 이용한 클립 본딩 반도체 칩 패키지
US10950558B2 (en) * 2017-03-27 2021-03-16 Mitsubishi Electric Corporation Semiconductor device, power converter, and method for manufacturing semiconductor device
US20190206821A1 (en) * 2017-12-29 2019-07-04 Intel Corporation Substrate assembly with spacer element
JP7069848B2 (ja) * 2018-03-06 2022-05-18 株式会社デンソー 半導体装置
WO2021065736A1 (ja) * 2019-10-04 2021-04-08 株式会社デンソー 半導体装置
KR20210149265A (ko) * 2020-06-01 2021-12-09 삼성디스플레이 주식회사 표시장치 및 이의 제조 방법
JP2022021719A (ja) * 2020-07-22 2022-02-03 株式会社デンソー 半導体装置
JP7489933B2 (ja) * 2021-02-24 2024-05-24 三菱電機株式会社 半導体装置及びその製造方法
US11652078B2 (en) * 2021-04-20 2023-05-16 Infineon Technologies Ag High voltage semiconductor package with pin fit leads
WO2022239696A1 (ja) * 2021-05-14 2022-11-17 ローム株式会社 半導体装置
JP7638193B2 (ja) 2021-10-26 2025-03-03 三菱電機株式会社 半導体装置および電力変換装置

Citations (14)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN1041065A (zh) * 1988-09-09 1990-04-04 莫托罗拉公司 功率器件的自对准电报
JP2001298142A (ja) * 2000-04-14 2001-10-26 Nippon Inter Electronics Corp 樹脂封止型半導体装置
JP2002110750A (ja) * 2000-09-29 2002-04-12 Mitsubishi Electric Corp 電子部品の製造方法並びに接続構造
CN2532582Y (zh) * 2002-02-10 2003-01-22 界龙工业股份有限公司 改进的半导体二极管导线架
US6630726B1 (en) * 2001-11-07 2003-10-07 Amkor Technology, Inc. Power semiconductor package with strap
CN1649146A (zh) * 2004-01-28 2005-08-03 株式会社瑞萨科技 半导体器件
CN1649098A (zh) * 2004-01-30 2005-08-03 株式会社电装 半导体器件
JP2006216736A (ja) * 2005-02-03 2006-08-17 Matsushita Electric Ind Co Ltd 半導体装置およびその製造方法
US20060255476A1 (en) * 2005-05-16 2006-11-16 Kuhlman Frederick F Electronic assembly with controlled solder joint thickness
JP2009050900A (ja) * 2007-08-28 2009-03-12 Toyota Motor Corp 粒子入りはんだ及びその製造方法
US20090224383A1 (en) * 2008-03-07 2009-09-10 Erwin Victor Cruz Semiconductor die package including exposed connections
CN101720504A (zh) * 2007-04-30 2010-06-02 万国半导体股份有限公司 具有凹洞板互联的半导体封装
CN101794758A (zh) * 2009-01-22 2010-08-04 株式会社瑞萨科技 半导体器件
CN201838572U (zh) * 2010-10-09 2011-05-18 上海旭福电子有限公司 新型半导体导线跳线结构

Family Cites Families (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS63170961U (en) * 1986-12-04 1988-11-07 Fuji Electric Co Let Semiconductor element
JP2003133497A (ja) 2001-10-29 2003-05-09 Toshiba Components Co Ltd 薄型半導体素子
JP2006287064A (ja) 2005-04-01 2006-10-19 Fuji Electric Holdings Co Ltd 半導体装置およびその製造方法
US7622796B2 (en) 2005-09-13 2009-11-24 Alpha And Omega Semiconductor Limited Semiconductor package having a bridged plate interconnection
US20070057368A1 (en) 2005-09-13 2007-03-15 Yueh-Se Ho Semiconductor package having plate interconnections

Patent Citations (14)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN1041065A (zh) * 1988-09-09 1990-04-04 莫托罗拉公司 功率器件的自对准电报
JP2001298142A (ja) * 2000-04-14 2001-10-26 Nippon Inter Electronics Corp 樹脂封止型半導体装置
JP2002110750A (ja) * 2000-09-29 2002-04-12 Mitsubishi Electric Corp 電子部品の製造方法並びに接続構造
US6630726B1 (en) * 2001-11-07 2003-10-07 Amkor Technology, Inc. Power semiconductor package with strap
CN2532582Y (zh) * 2002-02-10 2003-01-22 界龙工业股份有限公司 改进的半导体二极管导线架
CN1649146A (zh) * 2004-01-28 2005-08-03 株式会社瑞萨科技 半导体器件
CN1649098A (zh) * 2004-01-30 2005-08-03 株式会社电装 半导体器件
JP2006216736A (ja) * 2005-02-03 2006-08-17 Matsushita Electric Ind Co Ltd 半導体装置およびその製造方法
US20060255476A1 (en) * 2005-05-16 2006-11-16 Kuhlman Frederick F Electronic assembly with controlled solder joint thickness
CN101720504A (zh) * 2007-04-30 2010-06-02 万国半导体股份有限公司 具有凹洞板互联的半导体封装
JP2009050900A (ja) * 2007-08-28 2009-03-12 Toyota Motor Corp 粒子入りはんだ及びその製造方法
US20090224383A1 (en) * 2008-03-07 2009-09-10 Erwin Victor Cruz Semiconductor die package including exposed connections
CN101794758A (zh) * 2009-01-22 2010-08-04 株式会社瑞萨科技 半导体器件
CN201838572U (zh) * 2010-10-09 2011-05-18 上海旭福电子有限公司 新型半导体导线跳线结构

Cited By (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN105244331A (zh) * 2015-10-10 2016-01-13 杰群电子科技（东莞）有限公司 一种芯片封装结构
CN105914197A (zh) * 2016-06-14 2016-08-31 山东晶导微电子有限公司 一种采用植球工艺的小功率整流元器件及其制造方法
US12027579B2 (en) 2017-01-25 2024-07-02 Rohm Co., Ltd. Semiconductor device having a carrier trapping region including crystal defects
CN111293095A (zh) * 2018-12-07 2020-06-16 株式会社电装 半导体装置及其制造方法
CN110534495A (zh) * 2019-08-16 2019-12-03 天津大学 一种带有铜质台阶和开孔设计的铜夹键合封装结构
CN114944375A (zh) * 2022-05-23 2022-08-26 山东中清智能科技股份有限公司 一种功率器件封装结构及其制备方法
CN114944375B (zh) * 2022-05-23 2022-10-28 山东中清智能科技股份有限公司 一种功率器件封装结构及其制备方法

Also Published As

Publication number Publication date
US9401319B2 (en) 2016-07-26
EP2720263A4 (en) 2015-04-22
EP2720263A1 (en) 2014-04-16
CN103503132B (zh) 2016-06-01
WO2012169044A1 (ja) 2012-12-13
US20130307130A1 (en) 2013-11-21

Similar Documents

Publication Publication Date Title
CN103503132B (zh) 半导体装置
US10103090B2 (en) Semiconductor device
JP5176507B2 (ja) 半導体装置
US7705443B2 (en) Semiconductor device with lead frame including conductor plates arranged three-dimensionally
CN102136472B (zh) 半导体装置模块
US10566316B2 (en) Semiconductor device and power conversion apparatus
JP7100569B2 (ja) 半導体モジュール、電力変換装置および半導体モジュールの製造方法
JP7046742B2 (ja) パワーモジュール
US11233011B2 (en) Power semiconductor device
JPWO2019176199A1 (ja) 半導体パワーモジュールおよび電力変換装置
CN103493200A (zh) 半导体装置、具备该半导体装置的逆变器装置、以及具备该半导体装置及逆变器装置的车用旋转电机
JP5213919B2 (ja) 半導体装置
CN107818963B (zh) 半导体装置及半导体装置的制造方法
JP6667737B1 (ja) 半導体モジュールおよび電力変換装置
CN104795388A (zh) 智能功率模块及其制造方法
US20240055781A1 (en) Power electronic devices with busbars and method for their fabrication
US8946876B2 (en) Semiconductor device
JP5533983B2 (ja) 半導体装置
JP2012089563A (ja) 半導体モジュール
JP2018073923A (ja) 電力用半導体装置、電力用半導体装置の製造方法および電力変換装置
JP5622934B2 (ja) 半導体装置
JPWO2018131473A1 (ja) 半導体装置、および半導体装置の製造方法
JP2019029494A (ja) モジュール、電力変換装置及びモジュールの製造方法
JP2007037232A (ja) モータ内蔵パワーモジュール

Legal Events

Date Code Title Description
C06 Publication
PB01 Publication
C10 Entry into substantive examination
SE01 Entry into force of request for substantive examination
C14 Grant of patent or utility model
GR01 Patent grant