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CN103259532A - Resistor-capacitor filter calibrating circuit - Google Patents

Resistor-capacitor filter calibrating circuit Download PDF

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CN103259532A
CN103259532A CN2013102190608A CN201310219060A CN103259532A CN 103259532 A CN103259532 A CN 103259532A CN 2013102190608 A CN2013102190608 A CN 2013102190608A CN 201310219060 A CN201310219060 A CN 201310219060A CN 103259532 A CN103259532 A CN 103259532A
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tuning
resistor
capacitor
digital controller
filter
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韦晨君
阴亚东
牟荣增
阎跃鹏
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Institute of Microelectronics of CAS
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Abstract

本发明公开了一种电阻电容滤波器校准电路,包括调谐单元、比较器和数字控制器;调谐单元包括所述调谐电阻、调谐电容、第一开关管和第二开关管,调谐电阻和调谐电容串联,调谐电阻通过第一开关管与电源连接,调谐电容与第二开关管并联,并共同接地;比较器的正向端与调谐电阻和调谐电容的公共端连接;比较器的反向端接入预设的基准电压;比较器的输出端与数字控制器的输入端连接;数字控制器的滤波器控制端与电阻电容滤波器连接,充电控制端与第一开关管连接,放电控制端与第二开关管连接,调谐控制端与调谐电容连接。本发明实现了对滤波器的校准,且结构简单,功耗小,解决了现有技术的问题。本发明公开了一种电阻电容滤波器校准方法。

Figure 201310219060

The invention discloses a resistor-capacitor filter calibration circuit, which includes a tuning unit, a comparator and a digital controller; the tuning unit includes the tuning resistor, the tuning capacitor, the first switching tube and the second switching tube, the tuning resistor and the tuning capacitor In series, the tuning resistor is connected to the power supply through the first switch tube, the tuning capacitor is connected in parallel with the second switch tube, and are connected to the common ground; the forward terminal of the comparator is connected to the common terminal of the tuning resistor and the tuning capacitor; the reverse terminal of the comparator is connected to Input the preset reference voltage; the output terminal of the comparator is connected with the input terminal of the digital controller; the filter control terminal of the digital controller is connected with the resistor capacitor filter, the charging control terminal is connected with the first switch tube, and the discharge control terminal is connected with the first switching tube. The second switching tube is connected, and the tuning control terminal is connected to the tuning capacitor. The invention realizes the calibration of the filter, has simple structure and low power consumption, and solves the problems of the prior art. The invention discloses a method for calibrating a resistance-capacitance filter.

Figure 201310219060

Description

一种电阻电容滤波器校准电路A resistor capacitor filter calibration circuit

技术领域technical field

本申请涉及集成电路技术领域,尤其涉及一种电阻电容滤波器校准电路。The present application relates to the technical field of integrated circuits, in particular to a calibration circuit for a resistor-capacitor filter.

背景技术Background technique

电阻电容(RC)滤波器因其线性度练好、实现简单,而被广泛应用于模拟集成电路。但由于受制造工艺限制,电阻和电容的实际值均与理想值存在偏差,导致滤波器不能正常工作。因此,需要对RC滤波器的时间常数(即滤波器的电容值与电阻值的乘积)进行校准,实现对滤波器的频率修正。Resistor-capacitor (RC) filters are widely used in analog integrated circuits because of their good linearity and simple implementation. However, due to the limitations of the manufacturing process, the actual values of the resistors and capacitors deviate from the ideal values, resulting in the filter not working properly. Therefore, it is necessary to calibrate the time constant of the RC filter (that is, the product of the capacitance value of the filter and the resistance value) to realize the frequency correction of the filter.

现有RC滤波器校准方式包括片外校准和片内校准,为减小电路的占用面积、满足电路的高集成化要求,通常采用片内校准方式。常用的片内校准电路主要包括基于压控振荡器(VCO)的锁相环(PLL)结构和基于恒跨导结构的校准电路。由于两种片内校准电路分别使用了锁相环和恒跨导结构,导致校准电路结构复杂、功耗较大,增加了使用过程中的成本。The existing RC filter calibration methods include off-chip calibration and on-chip calibration. In order to reduce the occupied area of the circuit and meet the high integration requirements of the circuit, the on-chip calibration method is usually used. Commonly used on-chip calibration circuits mainly include a phase-locked loop (PLL) structure based on a voltage-controlled oscillator (VCO) and a calibration circuit based on a constant transconductance structure. Since the two types of on-chip calibration circuits respectively use a phase-locked loop and a constant transconductance structure, the structure of the calibration circuit is complicated and the power consumption is large, which increases the cost during use.

发明内容Contents of the invention

有鉴于此,本申请目的在于提供一种电阻电容滤波器校准电路,以解决现有校准电路结构复杂、功耗大的问题。In view of this, the purpose of the present application is to provide a resistor-capacitor filter calibration circuit to solve the problems of complex structure and high power consumption of existing calibration circuits.

为实现上述目的,本申请提供如下技术方案:In order to achieve the above object, the application provides the following technical solutions:

一种电阻电容滤波器校准电路,包括调谐单元、比较器和数字控制器;A resistor-capacitor filter calibration circuit, including a tuning unit, a comparator and a digital controller;

所述调谐单元包括所述调谐电阻、调谐电容、第一开关管和第二开关管,所述调谐电阻和调谐电容串联,所述调谐电阻通过所述第一开关管与电源连接,所述调谐电容与所述第二开关管并联,并共同接地;其中,所述调谐电阻的阻值与电阻电容滤波器的阻值相同;The tuning unit includes the tuning resistor, the tuning capacitor, the first switching tube and the second switching tube, the tuning resistor and the tuning capacitor are connected in series, the tuning resistor is connected to the power supply through the first switching tube, and the tuning The capacitor is connected in parallel with the second switch tube, and is grounded together; wherein, the resistance value of the tuning resistor is the same as that of the resistor-capacitor filter;

所述比较器的正向端与所述调谐电阻和调谐电容的公共端连接;所述比较器的反向端接入预设的基准电压;所述比较器的输出端与所述数字控制器的输入端连接;The positive terminal of the comparator is connected to the common terminal of the tuning resistor and the tuning capacitor; the negative terminal of the comparator is connected to a preset reference voltage; the output terminal of the comparator is connected to the digital controller The input terminal connection;

所述数字控制器的滤波器控制端与所述电阻电容滤波器连接;所述数字控制器的充电控制端与所述第一开关管连接;所述数字控制器的放电控制端与所述第二开关管连接;所述数字控制器的调谐控制端与所述调谐电容连接;The filter control terminal of the digital controller is connected to the resistor-capacitor filter; the charging control terminal of the digital controller is connected to the first switch tube; the discharge control terminal of the digital controller is connected to the first switching tube. The two switch tubes are connected; the tuning control terminal of the digital controller is connected to the tuning capacitor;

所述数字控制器用于控制所述调谐电容的充电过程,记录所述调谐电容两端的电压由零上升至所述基准电压所占用的时钟周期的实际个数值;比较所述实际个数值与预设个数值,并根据比较结果生成调谐控制信号;通过所述调谐控制端输出调谐控制信号,以调节所述调谐电容的电容值;根据所述调谐控制信号生成并通过所述滤波器控制端输出滤波器控制信号,以调节所述电阻电容滤波器的电容值。The digital controller is used to control the charging process of the tuning capacitor, record the actual number of clock cycles taken for the voltage across the tuning capacitor to rise from zero to the reference voltage; compare the actual number with the preset value, and generate a tuning control signal according to the comparison result; output the tuning control signal through the tuning control terminal to adjust the capacitance value of the tuning capacitor; generate according to the tuning control signal and output the filter through the filter control terminal The controller control signal to adjust the capacitance value of the resistor capacitor filter.

优选的,所述电路还包括第一分压电阻和第二分压电阻:所述第一分压电阻和第二分压电阻串联接于所述电源和地电位之间,所述第一分压电阻和第二分压电阻的公共端与所述比较器的反向端连接;所述第一分压电阻和第二分压电阻的公共端的电压作为所述基准电压。Preferably, the circuit further includes a first voltage dividing resistor and a second voltage dividing resistor: the first voltage dividing resistor and the second voltage dividing resistor are connected in series between the power supply and the ground potential, and the first voltage dividing resistor The common terminal of the piezoresistor and the second voltage dividing resistor is connected to the reverse terminal of the comparator; the voltage of the common terminal of the first voltage dividing resistor and the second voltage dividing resistor is used as the reference voltage.

优选的,所述调谐电容包括至少两个分流电容,每个分流电容相互并联,至少一个并联支路中串联有电容开关;Preferably, the tuning capacitor includes at least two shunt capacitors, each shunt capacitor is connected in parallel, and a capacitor switch is connected in series in at least one parallel branch;

所述数字控制器通过所述调谐控制信号控制所述电容开关的闭合/断开,以调节所述调谐电容的电容值。The digital controller controls the on/off of the capacitor switch through the tuning control signal, so as to adjust the capacitance value of the tuning capacitor.

一种电阻电容滤波器校准方法,基于一种一种电阻电容滤波器校准电路;A resistor-capacitor filter calibration method, based on a resistor-capacitor filter calibration circuit;

所述电路包括调谐单元、比较器和数字控制器;所述调谐单元包括调谐电阻、调谐电容、第一开关管和第二开关管,所述调谐电阻和调谐电容串联,所述调谐电阻通过所述第一开关管与电源连接,所述调谐电容与所述第二开关管并联,并共同接地;所述比较器的正向端与所述调谐电阻和调谐电容的公共端连接;所述比较器的反向端接入预设的基准电压;所述比较器的输出端与所述数字控制器的输入端连接;所述数字控制器的滤波器控制端与所述电阻电容滤波器连接;所述数字控制器的充电控制端与所述第一开关管连接;所述数字控制器的放电控制端与所述第二开关管连接;所述数字控制器的调谐控制端与所述调谐电容连接;The circuit includes a tuning unit, a comparator and a digital controller; the tuning unit includes a tuning resistor, a tuning capacitor, a first switch tube and a second switch tube, the tuning resistor and the tuning capacitor are connected in series, and the tuning resistor passes through the The first switching tube is connected to the power supply, the tuning capacitor is connected in parallel with the second switching tube, and are commonly grounded; the forward terminal of the comparator is connected to the common terminal of the tuning resistor and the tuning capacitor; the comparison The inverting end of the comparator is connected to a preset reference voltage; the output end of the comparator is connected to the input end of the digital controller; the filter control end of the digital controller is connected to the resistor-capacitor filter; The charge control terminal of the digital controller is connected to the first switch tube; the discharge control terminal of the digital controller is connected to the second switch tube; the tuning control terminal of the digital controller is connected to the tuning capacitor connect;

所述方法包括:The methods include:

所述数字控制器生成并输出充电控制信号,使所述第一开关管导通,开始对所述调谐电容充电;The digital controller generates and outputs a charging control signal to turn on the first switch tube and start charging the tuning capacitor;

在对所述调谐电容充电的过程中,所述数字控制器对时钟周期进行计数,得到时钟周期的实际个数值;In the process of charging the tuning capacitor, the digital controller counts clock cycles to obtain the actual number of clock cycles;

当所述数字控制器的输入端接收到的信号由低电平变为高电平时,比较所述实际个数值与预设个数值,并根据比较结果生成调谐控制信号;When the signal received by the input terminal of the digital controller changes from low level to high level, compare the actual number with the preset number, and generate a tuning control signal according to the comparison result;

通过所述调谐控制端输出所述调谐控制信号,以调节所述调谐电容的电容值,使所述调谐单元的时间常数等于所述电阻电容滤波器的理想时间常数;Outputting the tuning control signal through the tuning control terminal to adjust the capacitance value of the tuning capacitor so that the time constant of the tuning unit is equal to the ideal time constant of the resistor-capacitor filter;

根据所述实际个数值等于所述预设个数值时的调谐控制信号,生成并输出滤波器控制信号,以调节所述电阻电容滤波器的电容值,使所述电阻电容滤波器的实际时间常数等于所述理想时间常数。According to the tuning control signal when the actual number is equal to the preset number, a filter control signal is generated and output to adjust the capacitance value of the resistor-capacitor filter so that the actual time constant of the resistor-capacitor filter equal to the ideal time constant.

优选的,所述电路还包括第一分压电阻和第二分压电阻:所述第一分压电阻和第二分压电阻串联接于所述电源和地电位之间,所述第一分压电阻和第二分压电阻的公共端与所述比较器的反向端连接;所述第一分压电阻和第二分压电阻的公共端的电压作为所述基准电压;Preferably, the circuit further includes a first voltage dividing resistor and a second voltage dividing resistor: the first voltage dividing resistor and the second voltage dividing resistor are connected in series between the power supply and the ground potential, and the first voltage dividing resistor The common terminal of the piezoresistor and the second voltage dividing resistor is connected to the reverse terminal of the comparator; the voltage of the common terminal of the first voltage dividing resistor and the second voltage dividing resistor is used as the reference voltage;

所述方法还包括通过调节所述第一分压电阻和第二分压电阻的阻值比改变所述基准电压。The method further includes changing the reference voltage by adjusting a resistance ratio of the first voltage dividing resistor and the second voltage dividing resistor.

优选的,所述预设个数值根据所述时钟周期、理想时间常数和基准电压确定。Preferably, the preset number of values is determined according to the clock period, ideal time constant and reference voltage.

从上述的技术方案可以看出,本申请通过调谐单元对电容电阻滤波器进行模拟,结合比较器、数字控制器等对调谐电容的电容值进行调节,根据使调谐单元的实际时间常数达到其理想时间常数的调谐控制信号生成相应的滤波器控制信号,并通过该滤波器控制信号对电容电阻滤波器的电容值进行调节,使电容电阻滤波器的实际时间常数也达到其理想时间常数,实现对该滤波器的校准。因此,本申请既实现了对滤波器的校准,又结构简单,不需要恒跨导等大功耗结构,解决了现有技术的问题。As can be seen from the above-mentioned technical scheme, the application simulates the capacitor-resistance filter through the tuning unit, and adjusts the capacitance value of the tuning capacitor in conjunction with a comparator, a digital controller, etc., according to making the actual time constant of the tuning unit reach its ideal The tuning control signal of the time constant generates a corresponding filter control signal, and adjusts the capacitance value of the capacitor-resistance filter through the filter control signal, so that the actual time constant of the capacitor-resistance filter also reaches its ideal time constant. Calibration of the filter. Therefore, the present application not only realizes the calibration of the filter, but also has a simple structure, does not require large power consumption structures such as constant transconductance, and solves the problems of the prior art.

附图说明Description of drawings

为了更清楚地说明本申请实施例或现有技术中的技术方案,下面将对实施例或现有技术描述中所需要使用的附图作简单地介绍,显而易见地,下面描述中的附图仅仅是本申请的一些实施例,对于本领域普通技术人员来讲,在不付出创造性劳动的前提下,还可以根据这些附图获得其他的附图。In order to more clearly illustrate the technical solutions in the embodiments of the present application or the prior art, the following will briefly introduce the drawings that need to be used in the description of the embodiments or the prior art. Obviously, the accompanying drawings in the following description are only These are some embodiments of the present application. Those skilled in the art can also obtain other drawings based on these drawings without creative work.

图1为本申请实施例一提供的电阻电容滤波器校准电路的结构图;FIG. 1 is a structural diagram of a resistor-capacitor filter calibration circuit provided in Embodiment 1 of the present application;

图2为本申请实施例提供的电阻电容滤波器校准电路工作过程中各信号的时序图;FIG. 2 is a timing diagram of each signal during the working process of the resistor-capacitor filter calibration circuit provided by the embodiment of the present application;

图3为本申请实施例二提供的电阻电容滤波器校准电路的结构图;FIG. 3 is a structural diagram of a calibration circuit for a resistor-capacitor filter provided in Embodiment 2 of the present application;

图4为本申请实施例提供的电阻电容滤波器校准方法的流程图。FIG. 4 is a flowchart of a method for calibrating a resistor-capacitor filter provided in an embodiment of the present application.

具体实施方式Detailed ways

下面将结合本申请实施例中的附图,对本申请实施例中的技术方案进行清楚、完整地描述,显然,所描述的实施例仅仅是本申请一部分实施例,而不是全部的实施例。基于本申请中的实施例,本领域普通技术人员在没有作出创造性劳动前提下所获得的所有其他实施例,都属于本申请保护的范围。The following will clearly and completely describe the technical solutions in the embodiments of the application with reference to the drawings in the embodiments of the application. Apparently, the described embodiments are only some of the embodiments of the application, not all of them. Based on the embodiments in this application, all other embodiments obtained by persons of ordinary skill in the art without creative efforts fall within the protection scope of this application.

本申请实施例公开了电阻电容滤波器校准电路,以解决现有校准电路结构复杂、功耗大的问题。The embodiment of the present application discloses a resistor-capacitor filter calibration circuit to solve the problems of complex structure and high power consumption of the existing calibration circuit.

参照图1,本申请实施例一提供的电阻电容滤波器校准电路,包括调谐单元101、比较器102和数字控制器103。Referring to FIG. 1 , the resistor-capacitor filter calibration circuit provided by Embodiment 1 of the present application includes a tuning unit 101 , a comparator 102 and a digital controller 103 .

调谐单元101包括调谐电阻R0、调谐电容C0、第一开关管M1和第二开关管M2,调谐电阻R0和调谐电容C0串联,调谐电阻R0通过第一开关管M1与电源Vdd连接,调谐电容C0与第二开关管M2并联,并共同接地。调谐单元101用于模拟电容电阻滤波器。The tuning unit 101 includes a tuning resistor R 0 , a tuning capacitor C 0 , a first switch M1 and a second switch M2, the tuning resistor R 0 and the tuning capacitor C 0 are connected in series, and the tuning resistor R 0 is connected to the power supply Vdd through the first switch M1 The tuning capacitor C 0 is connected in parallel with the second switching tube M2, and they are also grounded together. The tuning unit 101 is used to simulate a capacitor-resistor filter.

比较器102的正向端与调谐电阻R0和调谐电容C0的公共端连接;比较器102的反向端接入预设的基准电压Vref;比较器102的输出端与数字控制器103的第一输入端连接。数字控制器103的第二输入端接入时钟信号;数字控制器103的第三输入端接入预设计数值NS;数字控制器103的滤波器控制端Out1与电阻电容滤波器100连接;数字控制器103的充电控制端Out2与第一开关管M1连接;数字控制器的放电控制端Out3与第二开关管M2连接;数字控制器103的调谐控制端Out4与调谐电容C0连接。The positive terminal of the comparator 102 is connected to the common terminal of the tuning resistor R 0 and the tuning capacitor C 0 ; the negative terminal of the comparator 102 is connected to the preset reference voltage V ref ; the output terminal of the comparator 102 is connected to the digital controller 103 The first input terminal connection. The second input end of digital controller 103 accesses clock signal; The third input end of digital controller 103 accesses preset numerical value NS ; The filter control terminal Out1 of digital controller 103 is connected with resistor-capacitor filter 100; The charging control terminal Out2 of the controller 103 is connected to the first switch tube M1; the discharge control terminal Out3 of the digital controller is connected to the second switch tube M2; the tuning control terminal Out4 of the digital controller 103 is connected to the tuning capacitor C0 .

现对上述校准电路的工作过程及原理进行如下介绍。The working process and principle of the above-mentioned calibration circuit are introduced as follows.

参照图2所示的时序图,校准开始时,数字控制器103生成充电控制信号CTc,并通过充电控制端Out2输出充电控制信号CTc,使第一开关管M1导通,电源Vdd通过调谐电阻R0对调谐电容C0进行充电;输出CTc的同时,数字控制器103开始对自身时钟信号进行计数,即记录充电过程占用的时钟周期tCK的个数N。Referring to the timing diagram shown in FIG. 2 , when the calibration starts, the digital controller 103 generates a charging control signal CT c , and outputs the charging control signal CT c through the charging control terminal Out2, so that the first switch tube M1 is turned on, and the power supply Vdd is tuned The resistor R 0 charges the tuning capacitor C 0 ; while outputting CT c , the digital controller 103 starts counting its own clock signal, that is, records the number N of clock cycles t CK occupied by the charging process.

调谐电容C0两端的电压Vcap(即调谐电阻R0和调谐电容C0的公共端电压)输入比较器102的正向端;比较器102对Vcap和Vref进行比较,并将比较结果输出值数字控制器。充电初始阶段,由于Vcap<Vref,故比较器102的输出信号Vout为低电平。当Vcap=Vref时,比较器102输出电平翻转,Vout变为高电平,数字控制器103将此时的时钟周期个数记为实际个数值N0。由于充电时间T=N0*tCK,且充电完成时调谐电容C0两端的电压 V cap = V ref = Vdd &CenterDot; ( 1 - e - T R 0 C 0 ) , 即:The voltage V cap across the tuning capacitor C0 (that is, the common terminal voltage of the tuning resistor R0 and the tuning capacitor C0) is input to the positive terminal of the comparator 102; the comparator 102 compares V cap and V ref , and outputs a digital value of the comparison result controller. In the initial stage of charging, since V cap < V ref , the output signal Vout of the comparator 102 is at a low level. When V cap =V ref , the output level of the comparator 102 is reversed, Vout becomes high level, and the digital controller 103 records the number of clock cycles at this time as the actual value N 0 . Since the charging time T=N 0 *t CK , and the voltage across the tuning capacitor C 0 when charging is completed V cap = V ref = Vdd &Center Dot; ( 1 - e - T R 0 C 0 ) , Right now:

T=R0C0·ln(Vdd/(Vdd-Vref))=N0·tCK (公式一)。T=R 0 C 0 ·ln(Vdd/(Vdd-V ref ))=N 0 ·t CK (Formula 1).

由公式一可知,N0与调谐单元101的实际时间常数R0C0成正比关系。基于公式一,针对确定的基准电压Vref,可计算得到调谐单元101的理想时间常数对应的实际个数值,并将其作为预设个数值NS;进而数字控制器103判断N0是否等于NS,如果否,说明调谐单元101的实际时间常数不等于其理想时间常数,则生成相应的调谐控制信号MT,以调节调谐电容C0的电容值。调节原则为:若N0<NS,则增大C0,若N0>NS,则减小C0,以使调谐单元101的实际时间常数更接近其理想时间常数。为验证调节效果,生成MT的同时,数字控制器103生成放电控制信号CTd,使第二开关管M2导通,使调谐电容C0迅速放电。放电完成(Vcap迅速降为零)后,CTd消失,在CTc的作用下,调谐电容C0重新开始充电,同时数字控制器103重新对时钟周期计数,通过判断本次充电过程得到的实际个数值N0是否等于NS,如果不相等,则再次生成相应的,再次调节调谐电容C0的电容值,如此循环,直至N0=NS(此时调谐单元101的实际时间常数等于其理想时间常数)。It can be known from Formula 1 that N 0 is proportional to the actual time constant R 0 C 0 of the tuning unit 101 . Based on formula 1, for the determined reference voltage V ref , the actual number corresponding to the ideal time constant of the tuning unit 101 can be calculated and used as the preset number N S ; and then the digital controller 103 judges whether N 0 is equal to N S , if no, it means that the actual time constant of the tuning unit 101 is not equal to its ideal time constant, then generate a corresponding tuning control signal MT to adjust the capacitance of the tuning capacitor C 0 . The adjustment principle is: if N 0 < NS , then increase C 0 , and if N 0 > NS , then decrease C 0 , so that the actual time constant of the tuning unit 101 is closer to its ideal time constant. In order to verify the adjustment effect, while generating MT , the digital controller 103 generates a discharge control signal CT d to turn on the second switching tube M2 to rapidly discharge the tuning capacitor C 0 . After the discharge is completed (V cap quickly drops to zero), CT d disappears, and under the action of CT c , the tuning capacitor C 0 starts charging again, and at the same time, the digital controller 103 counts the clock cycle again, and obtains by judging the current charging process Whether the actual value N 0 is equal to N S , if it is not equal, then generate the corresponding again, adjust the capacitance value of the tuning capacitor C 0 again, and so on, until N 0 = NS (the actual time constant of the tuning unit 101 is equal to its ideal time constant).

进而数字控制器根据最后一次的调谐控制信号MT生成滤波器控制信号MF,通过MF对电容电阻滤波器100的电容值进行调节,使电容电阻滤波器100的实际时间常数达到其理想时间常数。Further, the digital controller generates a filter control signal MF according to the last tuning control signal MT , and adjusts the capacitance value of the capacitor-resistor filter 100 through MF , so that the actual time constant of the capacitor-resistor filter 100 reaches its ideal time constant.

由上述结构及工作原理可知,本申请实施例通过调谐单元对电容电阻滤波器进行模拟,结合比较器、数字控制器等对调谐电容的电容值进行调节,根据使调谐单元的实际时间常数达到其理想时间常数的调谐控制信号生成相应的滤波器控制信号,并通过该滤波器控制信号对电容电阻滤波器的电容值进行调节,使电容电阻滤波器的实际时间常数也达到其理想时间常数,实现对该滤波器的校准。因此,本申请实施例既实现了对滤波器的校准,又结构简单,不需要恒跨导等大功耗结构,解决了现有技术的问题。It can be seen from the above structure and working principle that the embodiment of the present application simulates the capacitor-resistor filter through the tuning unit, and adjusts the capacitance value of the tuning capacitor in combination with a comparator, a digital controller, etc., according to making the actual time constant of the tuning unit reach its The tuning control signal of the ideal time constant generates a corresponding filter control signal, and adjusts the capacitance value of the capacitor resistance filter through the filter control signal, so that the actual time constant of the capacitor resistance filter also reaches its ideal time constant, realizing Calibration of the filter. Therefore, the embodiment of the present application not only realizes the calibration of the filter, but also has a simple structure, does not require a large power consumption structure such as a constant transconductance, and solves the problems of the prior art.

另外,根据公式一可知,在时钟周期tCK固定的前提下,本申请实施例通过增大基准电压的大小,可相应延长充电时间T,从而减小校准误差。In addition, according to Formula 1, under the premise of a fixed clock period t CK , the embodiment of the present application can prolong the charging time T by increasing the magnitude of the reference voltage, thereby reducing the calibration error.

需要说明的是,为保证校准精确度,上述实施例中调谐单元101与电阻电容滤波器100完全匹配,即二者具有相同的版图形式、电路结构及阻容值。相应的,数字控制器可直接将最后一次的调谐控制信号MT作为MF对电容电阻滤波器100进行调节。进一步的,为不影响电阻电容滤波器的正常工作,只有当调谐控制信号MT的变化超过了预设范围后,才将滤波器控制信号MF更新为调谐控制信号MTIt should be noted that, in order to ensure calibration accuracy, the tuning unit 101 and the resistor-capacitor filter 100 in the above embodiment are completely matched, that is, both have the same layout form, circuit structure and resistor-capacitor value. Correspondingly, the digital controller can directly use the last tuning control signal MT as MF to adjust the capacitor-resistor filter 100 . Further, in order not to affect the normal operation of the resistor-capacitor filter , the filter control signal MF is updated to the tuning control signal MT only when the change of the tuning control signal MT exceeds a preset range.

参照图3,本申请实施例二提供的电阻电容滤波器校准电路,包括调谐单元301、比较器302、数字控制器303、第一分压电阻R1和第二分压电阻R2。Referring to FIG. 3 , the resistor-capacitor filter calibration circuit provided by Embodiment 2 of the present application includes a tuning unit 301 , a comparator 302 , a digital controller 303 , a first voltage-dividing resistor R1 and a second voltage-dividing resistor R2 .

调谐单元301包括调谐电阻R0、调谐电容C0、第一开关管M1和第二开关管M2,调谐电阻R0和调谐电容C0串联,调谐电阻R0通过第一开关管M1与电源Vdd连接,调谐电容C0与第二开关管M2并联,并共同接地。调谐单元301用于模拟电容电阻滤波器。其中,调谐电容C0包括至少两个分流电容,如图3所示的电容Cb、C1、C2……Cn,每个分流电容相互并联,至少一个并联支路中串联有电容开关,如图3所示的电容开关S1、S2……SnThe tuning unit 301 includes a tuning resistor R 0 , a tuning capacitor C 0 , a first switching tube M1 and a second switching tube M2, the tuning resistor R 0 and the tuning capacitor C 0 are connected in series, and the tuning resistor R 0 is connected to the power supply Vdd through the first switching tube M1 The tuning capacitor C 0 is connected in parallel with the second switching tube M2, and they are also grounded together. The tuning unit 301 is used to simulate a capacitor-resistor filter. Wherein, the tuning capacitor C 0 includes at least two shunt capacitors, such as capacitors C b , C 1 , C 2 . , capacitive switches S 1 , S 2 . . . S n shown in FIG. 3 .

第一分压电阻R1和第二分压电阻R2串联接于电源Vdd和地电位之间,第一分压电阻R1和第二分压电阻R2的公共端与比较器302的反向端连接,即将第一分压电阻R1和第二分压电阻R2的公共端的电压作为基准电压Vref输入比较器302的反向端。比较器302的正向端与调谐电阻R0和调谐电容C0的公共端连接,即将调谐电容C0两端的电压输入比较器302的正向端。比较器302的输出端与数字控制器303的第一输入端连接。数字控制器303的第二输入端接入时钟信号;数字控制器303的第三输入端接入预设计数值NS;数字控制器303的滤波器控制端Out1与电阻电容滤波器300连接;数字控制器303的充电控制端Out2与第一开关管M1连接;数字控制器303的放电控制端Out3与第二开关管M2连接;数字控制器303的调谐控制端Out4与调谐电容C0连接。The first voltage dividing resistor R1 and the second voltage dividing resistor R2 are connected in series between the power supply Vdd and the ground potential, the common end of the first voltage dividing resistor R1 and the second voltage dividing resistor R2 is connected to the reverse end of the comparator 302, That is, the voltage at the common terminal of the first voltage dividing resistor R1 and the second voltage dividing resistor R2 is input to the inverting terminal of the comparator 302 as the reference voltage V ref . The positive terminal of the comparator 302 is connected to the common terminal of the tuning resistor R 0 and the tuning capacitor C 0 , that is, the voltage across the tuning capacitor C 0 is input to the positive terminal of the comparator 302 . The output terminal of the comparator 302 is connected to the first input terminal of the digital controller 303 . The second input end of digital controller 303 accesses clock signal; The third input end of digital controller 303 accesses preset numerical value NS ; The filter control terminal Out1 of digital controller 303 is connected with resistor-capacitor filter 300; Digital The charging control terminal Out2 of the controller 303 is connected to the first switch tube M1; the discharge control terminal Out3 of the digital controller 303 is connected to the second switch tube M2; the tuning control terminal Out4 of the digital controller 303 is connected to the tuning capacitor C0 .

本申请实施例二所述的校准电路的工作过程及原理可参照上文实施例一。其中,调谐控制信号MT通过调节电容开关S1、S2……Sn的闭合/断开,改变构成调谐电容C0的并联支路的个数,从而达到调节其电容值的目的。For the working process and principle of the calibration circuit described in Embodiment 2 of the present application, reference may be made to Embodiment 1 above. The tuning control signal M T changes the number of parallel branches forming the tuning capacitor C 0 by adjusting the on/off of the capacitor switches S 1 , S 2 . . . S n , thereby achieving the purpose of adjusting its capacitance value.

另外,通过改变第一分压电阻R1和第二分压电阻R2的阻值比,即可改变基准电压的大小,从而改变充电时间T。具体的,根据公式一的变换式T=R0C0·ln(1+R2/R1)=N0·tCK(公式二)可知:只要增大比值R2/R1,即可增大充电时间T,从而减小校准误差。In addition, by changing the resistance ratio of the first voltage dividing resistor R1 and the second voltage dividing resistor R2, the magnitude of the reference voltage can be changed, thereby changing the charging time T. Specifically, according to the conversion formula T=R 0 C 0 ·ln(1+R2/R1)=N 0 ·t CK (Formula 2) of formula 1, it can be known that as long as the ratio R2/R1 is increased, the charging time can be increased T, thereby reducing the calibration error.

基于上述实施例一所述的电路,本申请实施例三还提供了一种电阻电容滤波器校准方法。参照图4,该方法包括如下步骤:Based on the circuit described in Embodiment 1 above, Embodiment 3 of the present application further provides a method for calibrating a resistor-capacitor filter. With reference to Fig. 4, this method comprises the steps:

S401:通过数字控制器生成并输出充电控制信号,使所述第一开关管导通,开始对所述调谐电容充电;S401: Generate and output a charging control signal through a digital controller to turn on the first switch and start charging the tuning capacitor;

S402:在对所述调谐电容充电的过程中,通过数字控制器对时钟周期tCK进行计数,得到时钟周期的实际个数值N0S402: During the process of charging the tuning capacitor, the digital controller counts the clock cycle t CK to obtain the actual value N 0 of the clock cycle;

S403:当数字控制器的输入端接收到的信号由低电平变为高电平时,比较实际个数值N0与预设个数值NS,并根据比较结果生成调谐控制信号;S403: When the signal received by the input terminal of the digital controller changes from low level to high level, compare the actual number N 0 with the preset number N S , and generate a tuning control signal according to the comparison result;

即调谐电容的电压值Vcap达到基准电压Vref时,充电结束。That is, when the voltage value V cap of the tuning capacitor reaches the reference voltage V ref , charging ends.

S404:通过上述调谐控制端输出所述调谐控制信号,以调节所述调谐电容的电容值,使所述调谐单元的时间常数等于所述电阻电容滤波器的理想时间常数;S404: Output the tuning control signal through the tuning control terminal to adjust the capacitance value of the tuning capacitor, so that the time constant of the tuning unit is equal to the ideal time constant of the resistor-capacitor filter;

S405:根据实际个数值N0等于预设个数值NS时的调谐控制信号,生成并输出滤波器控制信号,以调节所述电阻电容滤波器的电容值,使所述电阻电容滤波器的实际时间常数等于所述理想时间常数。S405: According to the tuning control signal when the actual number N0 is equal to the preset number NS , generate and output a filter control signal to adjust the capacitance value of the resistor-capacitor filter, so that the actual value of the resistor-capacitor filter The time constant is equal to the ideal time constant.

其中,上述方法实施例中,基于上文公式一,预设个数值NS根据所述时钟周期tCK、理想时间常数和基准电压Vref确定。通过调节增大基准电压Vref,可延长充电时间T,从而减小校准误差。具体的,针对上文实施例二所述的通过第一分压电阻R1和第二分压电阻R2提供基准电压的电路结构,可通过增大阻值比R2/R1,来延长充电时间T,达到减小校准误差的目的。Wherein, in the above method embodiment, based on the above formula 1, the preset number N S is determined according to the clock cycle t CK , the ideal time constant and the reference voltage V ref . By adjusting and increasing the reference voltage V ref , the charging time T can be extended, thereby reducing the calibration error. Specifically, for the circuit structure in which the reference voltage is provided by the first voltage dividing resistor R1 and the second voltage dividing resistor R2 described in the second embodiment above, the charging time T can be extended by increasing the resistance value ratio R2/R1, To achieve the purpose of reducing the calibration error.

本领域普通技术人员可以理解实现上述实施例方法中的全部或部分流程,是可以通过计算机程序来指令相关的硬件来完成,所述的程序可存储于一计算机可读取存储介质中,所述程序在执行时,可包括如上述各方法的实施例的流程。其中,所述的存储介质可为磁碟、光盘、只读存储记忆体(Read-Only Memory,ROM)或随机存储记忆体(Random Access Memory,RAM)等。Those of ordinary skill in the art can understand that all or part of the processes in the methods of the above embodiments can be implemented through computer programs to instruct related hardware, and the programs can be stored in a computer-readable storage medium. When the program is executed, it may include the processes of the embodiments of the above-mentioned methods. Wherein, the storage medium may be a magnetic disk, an optical disk, a read-only memory (Read-Only Memory, ROM) or a random access memory (Random Access Memory, RAM), etc.

对所公开的实施例的上述说明,使本领域专业技术人员能够实现或使用本申请。对这些实施例的多种修改对本领域的专业技术人员来说将是显而易见的,本文中所定义的一般原理可以在不脱离本申请的精神或范围的情况下,在其它实施例中实现。因此,本申请将不会被限制于本文所示的这些实施例,而是要符合与本文所公开的原理和新颖特点相一致的最宽的范围。The above description of the disclosed embodiments is provided to enable any person skilled in the art to make or use the present application. Various modifications to these embodiments will be readily apparent to those skilled in the art, and the general principles defined herein may be implemented in other embodiments without departing from the spirit or scope of the application. Therefore, the present application will not be limited to the embodiments shown herein, but is to be accorded the widest scope consistent with the principles and novel features disclosed herein.

Claims (6)

1.一种电阻电容滤波器校准电路,其特征在于,包括调谐单元、比较器和数字控制器;1. A resistor-capacitor filter calibration circuit, characterized in that, includes a tuning unit, a comparator and a digital controller; 所述调谐单元包括所述调谐电阻、调谐电容、第一开关管和第二开关管,所述调谐电阻和调谐电容串联,所述调谐电阻通过所述第一开关管与电源连接,所述调谐电容与所述第二开关管并联,并共同接地;其中,所述调谐电阻的阻值与电阻电容滤波器的阻值相同;The tuning unit includes the tuning resistor, the tuning capacitor, the first switching tube and the second switching tube, the tuning resistor and the tuning capacitor are connected in series, the tuning resistor is connected to the power supply through the first switching tube, and the tuning The capacitor is connected in parallel with the second switch tube, and is grounded together; wherein, the resistance value of the tuning resistor is the same as that of the resistor-capacitor filter; 所述比较器的正向端与所述调谐电阻和调谐电容的公共端连接;所述比较器的反向端接入预设的基准电压;所述比较器的输出端与所述数字控制器的输入端连接;The positive terminal of the comparator is connected to the common terminal of the tuning resistor and the tuning capacitor; the negative terminal of the comparator is connected to a preset reference voltage; the output terminal of the comparator is connected to the digital controller The input terminal connection; 所述数字控制器的滤波器控制端与所述电阻电容滤波器连接;所述数字控制器的充电控制端与所述第一开关管连接;所述数字控制器的放电控制端与所述第二开关管连接;所述数字控制器的调谐控制端与所述调谐电容连接;The filter control terminal of the digital controller is connected to the resistor-capacitor filter; the charging control terminal of the digital controller is connected to the first switch tube; the discharge control terminal of the digital controller is connected to the first switching tube. The two switch tubes are connected; the tuning control terminal of the digital controller is connected to the tuning capacitor; 所述数字控制器用于控制所述调谐电容的充电过程,记录所述调谐电容两端的电压由零上升至所述基准电压所占用的时钟周期的实际个数值;比较所述实际个数值与预设个数值,并根据比较结果生成调谐控制信号;通过所述调谐控制端输出调谐控制信号,以调节所述调谐电容的电容值;根据所述调谐控制信号生成并通过所述滤波器控制端输出滤波器控制信号,以调节所述电阻电容滤波器的电容值。The digital controller is used to control the charging process of the tuning capacitor, record the actual number of clock cycles taken for the voltage across the tuning capacitor to rise from zero to the reference voltage; compare the actual number with the preset value, and generate a tuning control signal according to the comparison result; output the tuning control signal through the tuning control terminal to adjust the capacitance value of the tuning capacitor; generate according to the tuning control signal and output the filter through the filter control terminal The controller control signal to adjust the capacitance value of the resistor capacitor filter. 2.根据权利要求1所述的电路,其特征在于,还包括第一分压电阻和第二分压电阻:所述第一分压电阻和第二分压电阻串联接于所述电源和地电位之间,所述第一分压电阻和第二分压电阻的公共端与所述比较器的反向端连接;所述第一分压电阻和第二分压电阻的公共端的电压作为所述基准电压。2. The circuit according to claim 1, further comprising a first voltage dividing resistor and a second voltage dividing resistor: the first voltage dividing resistor and the second voltage dividing resistor are connected in series to the power supply and ground Between potentials, the common terminal of the first voltage dividing resistor and the second voltage dividing resistor is connected to the reverse terminal of the comparator; the voltage of the common terminal of the first voltage dividing resistor and the second voltage dividing resistor is used as the the reference voltage. 3.根据权利要求1或2所述的电路,其特征在于,所述调谐电容包括至少两个分流电容,每个分流电容相互并联,至少一个并联支路中串联有电容开关;3. The circuit according to claim 1 or 2, wherein the tuning capacitor comprises at least two shunt capacitors, each shunt capacitor is connected in parallel, and at least one parallel branch is connected in series with a capacitor switch; 所述数字控制器通过所述调谐控制信号控制所述电容开关的闭合/断开,以调节所述调谐电容的电容值。The digital controller controls the on/off of the capacitor switch through the tuning control signal, so as to adjust the capacitance value of the tuning capacitor. 4.一种电阻电容滤波器校准方法,其特征在于,基于一种一种电阻电容滤波器校准电路;4. A method for calibrating a resistor-capacitor filter, characterized in that, based on a calibration circuit for a resistor-capacitor filter; 所述电路包括调谐单元、比较器和数字控制器;所述调谐单元包括调谐电阻、调谐电容、第一开关管和第二开关管,所述调谐电阻和调谐电容串联,所述调谐电阻通过所述第一开关管与电源连接,所述调谐电容与所述第二开关管并联,并共同接地;所述比较器的正向端与所述调谐电阻和调谐电容的公共端连接;所述比较器的反向端接入预设的基准电压;所述比较器的输出端与所述数字控制器的输入端连接;所述数字控制器的滤波器控制端与所述电阻电容滤波器连接;所述数字控制器的充电控制端与所述第一开关管连接;所述数字控制器的放电控制端与所述第二开关管连接;所述数字控制器的调谐控制端与所述调谐电容连接;The circuit includes a tuning unit, a comparator and a digital controller; the tuning unit includes a tuning resistor, a tuning capacitor, a first switch tube and a second switch tube, the tuning resistor and the tuning capacitor are connected in series, and the tuning resistor passes through the The first switching tube is connected to the power supply, the tuning capacitor is connected in parallel with the second switching tube, and are commonly grounded; the forward terminal of the comparator is connected to the common terminal of the tuning resistor and the tuning capacitor; the comparison The inverting end of the comparator is connected to a preset reference voltage; the output end of the comparator is connected to the input end of the digital controller; the filter control end of the digital controller is connected to the resistor-capacitor filter; The charge control terminal of the digital controller is connected to the first switch tube; the discharge control terminal of the digital controller is connected to the second switch tube; the tuning control terminal of the digital controller is connected to the tuning capacitor connect; 所述方法包括:The methods include: 所述数字控制器生成并输出充电控制信号,使所述第一开关管导通,开始对所述调谐电容充电;The digital controller generates and outputs a charging control signal to turn on the first switch tube and start charging the tuning capacitor; 在对所述调谐电容充电的过程中,所述数字控制器对时钟周期进行计数,得到时钟周期的实际个数值;In the process of charging the tuning capacitor, the digital controller counts clock cycles to obtain the actual number of clock cycles; 当所述数字控制器的输入端接收到的信号由低电平变为高电平时,比较所述实际个数值与预设个数值,并根据比较结果生成调谐控制信号;When the signal received by the input terminal of the digital controller changes from low level to high level, compare the actual number with the preset number, and generate a tuning control signal according to the comparison result; 通过所述调谐控制端输出所述调谐控制信号,以调节所述调谐电容的电容值,使所述调谐单元的时间常数等于所述电阻电容滤波器的理想时间常数;Outputting the tuning control signal through the tuning control terminal to adjust the capacitance value of the tuning capacitor so that the time constant of the tuning unit is equal to the ideal time constant of the resistor-capacitor filter; 根据所述实际个数值等于所述预设个数值时的调谐控制信号,生成并输出滤波器控制信号,以调节所述电阻电容滤波器的电容值,使所述电阻电容滤波器的实际时间常数等于所述理想时间常数。According to the tuning control signal when the actual number is equal to the preset number, a filter control signal is generated and output to adjust the capacitance value of the resistor-capacitor filter so that the actual time constant of the resistor-capacitor filter equal to the ideal time constant. 5.根据权利要求4所述的方法,其特征在于,所述电路还包括第一分压电阻和第二分压电阻:所述第一分压电阻和第二分压电阻串联接于所述电源和地电位之间,所述第一分压电阻和第二分压电阻的公共端与所述比较器的反向端连接;所述第一分压电阻和第二分压电阻的公共端的电压作为所述基准电压;5. The method according to claim 4, wherein the circuit further comprises a first voltage dividing resistor and a second voltage dividing resistor: the first voltage dividing resistor and the second voltage dividing resistor are connected in series to the Between the power supply and the ground potential, the common end of the first voltage dividing resistor and the second voltage dividing resistor is connected to the reverse end of the comparator; the common end of the first voltage dividing resistor and the second voltage dividing resistor voltage as the reference voltage; 所述方法还包括通过调节所述第一分压电阻和第二分压电阻的阻值比改变所述基准电压。The method further includes changing the reference voltage by adjusting a resistance ratio of the first voltage dividing resistor and the second voltage dividing resistor. 6.根据权利要求4或5所述的方法,其特征在于,所述预设个数值根据所述时钟周期、理想时间常数和基准电压确定。6. The method according to claim 4 or 5, wherein the preset number of values is determined according to the clock period, ideal time constant and reference voltage.
CN2013102190608A 2013-06-04 2013-06-04 Resistor-capacitor filter calibrating circuit Pending CN103259532A (en)

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Application publication date: 20130821