CN102693965B - 封装堆迭结构 - Google Patents
封装堆迭结构 Download PDFInfo
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- CN102693965B CN102693965B CN201110172866.7A CN201110172866A CN102693965B CN 102693965 B CN102693965 B CN 102693965B CN 201110172866 A CN201110172866 A CN 201110172866A CN 102693965 B CN102693965 B CN 102693965B
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- carrier
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- 229910052751 metal Inorganic materials 0.000 claims description 6
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- BQCADISMDOOEFD-UHFFFAOYSA-N Silver Chemical compound [Ag] BQCADISMDOOEFD-UHFFFAOYSA-N 0.000 claims description 2
- 239000004332 silver Substances 0.000 claims description 2
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- 229910000679 solder Inorganic materials 0.000 claims 1
- 239000000084 colloidal system Substances 0.000 abstract description 18
- 238000005538 encapsulation Methods 0.000 description 34
- 238000010438 heat treatment Methods 0.000 description 33
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- 230000008878 coupling Effects 0.000 description 14
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- ATJFFYVFTNAWJD-UHFFFAOYSA-N Tin Chemical compound [Sn] ATJFFYVFTNAWJD-UHFFFAOYSA-N 0.000 description 3
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- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 description 1
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- 239000004411 aluminium Substances 0.000 description 1
- 229910052782 aluminium Inorganic materials 0.000 description 1
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 description 1
- 239000010949 copper Substances 0.000 description 1
- 229910052802 copper Inorganic materials 0.000 description 1
- PCHJSUWPFVWCPO-UHFFFAOYSA-N gold Chemical compound [Au] PCHJSUWPFVWCPO-UHFFFAOYSA-N 0.000 description 1
- 239000010931 gold Substances 0.000 description 1
- 229910052737 gold Inorganic materials 0.000 description 1
- 238000002955 isolation Methods 0.000 description 1
- 239000007769 metal material Substances 0.000 description 1
- 238000004064 recycling Methods 0.000 description 1
- 229910052710 silicon Inorganic materials 0.000 description 1
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- 125000006850 spacer group Chemical group 0.000 description 1
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Abstract
一种封装堆迭结构,包括第一封装结构、多个凸块以及第二封装结构。第一封装结构包括载板、芯片、散热板与封装胶体。芯片配置于载板上,且通过导线与载板电性连接。散热板包括支撑部分与连接部分。散热板的表面上具有线路层。支撑部分位于芯片上方,而连接部分分别位于支撑部分的相对二侧。散热板覆盖芯片与导线,且通过连接部分上的线路层电性连接至载板。封装胶体包覆芯片、导线、部分散热板与部分载板。凸块配置于支撑部分上。第二封装结构配置于第一封装结构上,并通过凸块与第一封装结构电性连接。
Description
技术领域
本发明是有关于一种封装堆迭结构,且特别是有关于一种具有较佳散热及重配置缐路的封装堆迭结构(Package On Package structure)。
背景技术
随着科技日新月异,集成电路(integrated circuits,IC)元件已广泛地应用于我们日常生活当中。一般而言,集成电路的生产主要分为三个阶段:硅晶圆的制造、集成电路的制作及集成电路的封装。在目前的封装结构中,堆迭式封装(package onpackage,POP)为一种常见的封装型态。
如图4所示,传统的堆迭式封装通常是由堆迭的芯片封装结构40、42所构成。芯片封装结构40包括载板400、芯片402、隔离层(spacer)404、重配置线路板(re-layout board)406与封装胶体414。芯片402通过黏着层408固定至载板400上。隔离层404与重配置线路板406依序配置于芯片402上。芯片402通过导线410与载板400电性连接。重配置线路板406通过导线412与载板400电性连接。封装胶体414包覆部分载板400、芯片402、隔离层404、导线410与412以及部分重配置线路板406。芯片封装结构42包括载板416、芯片418与封装胶体420。芯片418通过黏着层422固定至载板416上,且通过导线424与载板416电性连接。封装胶体420包覆部分载板416、芯片418与导线424。此外,芯片封装结构42堆迭于芯片封装结构40上,且通过凸块426与芯片封装结构40的重配置线路板406电性连接。如此一来,芯片封装结构42可经由凸块426、重配置线路板406与导线412而电性连接至载板400。另外,芯片封装结构40还包括凸块428,使得封装堆迭结构40可通过凸块428电性连接至其他外部元件。
然而,在上述的堆迭式封装结构中,由于重配置线路板406配置于芯片402与隔离层404上方,使得导线412必须具有较长的长度,且因此容易造成导线412坍塌(collapse)。此外,上述的堆迭式封装结构亦容易产生散热不佳的问题。
此外,由于重配置线路板406是通过隔离层404设置于芯片402上,以供水平承载重配置线路板406及芯片封装结构42,整体的构件不仅较为繁多,且于充填封装胶体420时,由于胶体流动而易使重配置线路板406倾斜不平,进而影响产品的可靠度。
发明内容
有鉴于此,本发明的目的就是在提供一种封装堆迭结构,其同时具有较佳的散热及重配置缐路。
本发明提出一种封装堆迭结构,其包括第一封装结构、多个凸块以及第二封装结构。第一封装结构包括第一载板、第一芯片、散热板以及第一封装胶体。第一芯片配置于第一载板上,且通过多条第一导线与第一载板电性连接。散热板包括支撑部分与连接部分。散热板的表面上具有线路层。支撑部分位于第一芯片上方,而连接部分分别位于支撑部分的相对二侧。散热板覆盖第一芯片与第一导线,且通过连接部分上的线路层电性连接至第一载板。第一封装胶体包覆第一芯片、第一导线、部分散热板与部分第一载板。凸块配置于支撑部分上。第二封装结构配置于第一封装结构上,并通过凸块与第一封装结构电性连接。
依照本发明实施例所述的封装堆迭结构,上述的散热板例如具有上表面以及与上表面相对的下表面,其中上表面上具有线路层,而凸块与线路层电性连接,且第一封装结构还可以包括多条第二导线,而位于连接部分上的线路层通过第二导线与第一载板电性连接。
依照本发明实施例所述的封装堆迭结构,还可以包括黏着层,其配置于连接部分与第一载板之间。
依照本发明实施例所述的芯片封装结构,上述的黏着层例如为导电材料,而此导电材料选自于焊锡、银胶与异方性导电胶之一。
依照本发明实施例所述的封装堆迭结构,上述的黏着层例如为绝缘材料,而此绝缘材料选自于环氧树脂、两阶段性胶材(B-Stage)、非导电胶(non-conductive paste,NCP)与非导电膜(non-conductive film,NCF)之一。
依照本发明实施例所述的封装堆迭结构,上述的散热板例如由金属核心层与绝缘层构成。绝缘层配置于金属核心层的表面上,且线路层配置于绝缘层上。
依照本发明实施例所述的封装堆迭结构,上述的散热板例如具有上表面以及与上表面相对的下表面,其中下表面上具有线路层,且散热板中具有多个导通孔,而凸块通过导通孔与线路层电性连接,且散热板通过位于连接部分上的线路层与第一载板电性连接。
依照本发明实施例所述的封装堆迭结构,上述的导通孔的外周缘与散热板之间例如配置有绝缘层。
依照本发明实施例所述的封装堆迭结构,上述的第二封装结构包括第二载板、第二芯片以及第二封装胶体。第二载板通过凸块与第一封装结构电性连接。第二芯片配置于第二载板上,且通过多条第二导线与第二载板电性连接。第二封装胶体包覆第二芯片、第二导线与部分第二载板。
依照本发明实施例所述的封装堆迭结构,上述的第一载板例如具有正面、背面以及穿孔。第一芯片配置于第一载板的正面,且第一导线通过穿孔伸出并电性连接于第一载板的背面。
在本发明中,由于散热板具有线路层并经由线路层与载板电性连接,且散热板与芯片电性分离,因此散热板可以取代先前技术中的隔离层与重配置线路板而同时具有稳固承载位于上方的封装结构以及散热的功效,使得本发明的封装堆迭结构能够具有较佳的散热效果。
为让本发明的上述特征和优点能更明显易懂,下文特举实施例,并配合附图,作详细说明如下。
附图说明
图1为依照本发明的第一实施例所绘示的封装堆迭结构的剖面示意图。
图2为依照本发明的第二实施例所绘示的封装堆迭结构的剖面示意图。
图3为依照本发明的第三实施例所绘示的封装堆迭结构的剖面示意图。
图4为传统一种堆迭式封装的剖面示意图。
【主要元件符号说明】
10、20、30:封装堆迭结构
40、42:芯片封装结构
100、100’、100”:第一封装结构
102、102’、202、400、416:载板
102a、202a:正面
102b、202b:背面
103a、103b、104a、203a、203b、204a:接垫
104、204、402、418:芯片
106、106’:散热板
106a:上表面
106b:下表面
107a:支撑部分
107b:连接部分
108、206、414、420:封装胶体
110、118、208、410、412、424:导线
112、120、210、408、422:黏着层
114、300、426、428:凸块
116、116’:线路层
122:导通孔
124:绝缘层
126:穿孔
200:第二封装结构
404:隔离层
406:重配置线路板
具体实施方式
图1为依照本发明的第一实施例所绘示的封装堆迭结构的剖面示意图。请参照图1,封装堆迭结构10包括第一封装结构100、第二封装结构200以及凸块300。第一封装结构100包括载板102、芯片104、散热板106以及封装胶体108。第二封装结构200包括载板202、芯片204以及封装胶体206。
在第一封装结构100中,芯片104配置于载板102的正面102a上。载板102例如为线路板。芯片104具有接垫104a,载板102具有接垫103a,且通过导线110使芯片104的接垫104a与载板102的接垫103a电性连接。在本实施例中,芯片104与载板102之间配置有黏着层112,以将芯片104固定于载板102上。此外,载板102的背面102b具有接垫103b。多个凸块114与接垫103b电性连接,使得封装堆迭结构10可通过凸块114电性连接至其他外部元件。
散热板106包括支撑部分107a与连接部分107b。支撑部分107a位于芯片104上方,而连接部分107b分别位于支撑部分107a的相对二侧,且芯片104与导线110位于这些连接部分107b之间,使得散热板106覆盖芯片104与导线110,且与二者电性隔离。在本实施例中,散热板106具有上表面106a以及与上表面106a相对的下表面106b。此外,散热板106具有位于上表面106a上的线路层116,且位于连接部分107b上的线路层116通过导线118与载板102的接垫103a电性连接。在一实施例中,散热板106例如由金属核心层与配置于金属核心层的表面上的绝缘层构成,而线路层116配置于绝缘层上。
此外,黏着层120配置于连接部分107b与载板102之间。在一实施例中,黏着层120为绝缘材料,其可选自于环氧树脂、两阶段性胶材、非导电胶与非导电膜之一。在另一实施例中,黏着层120也可以是导电材料,其可选自于焊锡、银胶与异方性导电胶之一。
封装胶体108包覆芯片104、导线110、部分载板102与部分散热板106,且封装胶体108暴露出散热板106的支撑部分107a顶面。
与第一封装结构100类似,在第二封装结构200中,芯片204配置于载板202的正面202a上。载板202例如为线路板。芯片204具有接垫204a,载板202具有接垫203a,且通过导线208使芯片204的接垫204a与载板202的接垫203a电性连接。在本实施例中,芯片204与载板202之间配置有黏着层210,以将芯片204固定于载板202上。此外,载板202的背面202b具有接垫203b。封装胶体206包覆芯片204、导线208与部分载板202。
凸块300配置于第一封装结构100中的散热板106的支撑部分107a上。第二封装结构200配置于第一封装结构200上方,并通过凸块300使接垫203b与支撑部分107a上的线路层116电性连接。
在本实施例中,由于散热板106上具有线路层116并通过线路层116使第二封装结构200与载板102电性连接,因此散热板106可以取代先前技术中的隔离层与重配置线路板而同时具有承载第二封装结构200以及散热的功效。此外,由于重配置线路(线路层116)可由散热板106的连接部份107b延伸,明显减少了打线长度,以及避免过长的打线于封装时塌陷、偏移等,使得封装堆迭结构10能够不仅具有较佳的散热功效,同时也具有重配置缐路、以及稳固支撑第二封装结构200与减少打线长度的效果。
图2为依照本发明的第二实施例所绘示的封装堆迭结构的剖面示意图。在图1与图2中,相似的元件将以相似的标号表示。请参照图2,封装堆迭结构20与封装堆迭结构10的差异在于散热板的结构。进一步说,在第一封装结构100’中,散热板106’具有位于下表面106b上的线路层116’,且散热板106’中具有多个导通孔122。导通孔122的材料例如为金、银、铜、铝等导电金属材料,且导通孔122与线路层116’电性连接。导通孔122的外周缘与散热板106’之间配置有绝缘层124。凸块300通过导通孔122与线路层116’电性连接,并通过位于连接部分107b上的线路层116’电性连接至载板102。较佳地,连接部分107b与载板102之间可配置有黏着层120。黏着层120可为导电材料,其可选自于焊锡、银胶与异方性导电胶之一,因此不需要再利用导线118电性连接至载板102。
图3为依照本发明的第三实施例所绘示的封装堆迭结构的剖面示意图。在图1与图3中,相似的元件将以相似的标号表示。请参照图3,封装堆迭结构30与封装堆迭结构10的差异在于载板的结构与芯片的配置方式。进一步说,在第一封装结构100”中,载板102’具有穿孔126。芯片104配置于载板102’的正面102a上。穿孔126暴露出接垫104a,导线110通过穿孔126伸出并电性连接于载板102’的接垫103b。
同样地,图2中所揭示的散热板106’以及散热板106’与第二封装结构200及载板102的接合方式亦可适用于如图3所示的载板102’与芯片104的配置型态,于此不另行说明。
虽然本发明已以实施例揭露如上,然其并非用以限定本发明,任何所属技术领域中具有通常知识者,在不脱离本发明的精神和范围内,当可作些许的更动与润饰,因此本发明的保护范围当以权利要求所界定的为准。
Claims (10)
1.一种封装堆迭结构,包括:
一第一封装结构,包括:
一第一载板;
一第一芯片,配置于该第一载板上,且通过多条第一导线与该第一载板电性连接;
一散热板,包括支撑部分与连接部分,且该散热板的表面上具有一线路层,其中该支撑部分位于该第一芯片上方,而该些连接部分分别位于该支撑部分的相对二侧并朝向该第一载板延伸,使该散热板覆盖该第一芯片与该些第一导线,且通过该些连接部分上的该线路层电性连接至该第一载板;以及
一第一封装胶体,包覆该第一芯片、该些第一导线、部分该散热板与部分该第一载板;
多个凸块,配置于该支撑部分上;以及
一第二封装结构,配置于该第一封装结构上,并通过该些凸块与该第一封装结构电性连接。
2.如权利要求1所述的封装堆迭结构,其特征在于,该散热板具有一上表面以及与该上表面相对的一下表面,其中该上表面上具有该线路层,而该些凸块与该线路层电性连接,且该第一封装结构更包括多条第二导线,而位于该些连接部分上的该线路层通过该些第二导线与该第一载板电性连接。
3.如权利要求2所述的封装堆迭结构,其特征在于,更包括一黏着层,配置于该些连接部分与该第一载板之间。
4.如权利要求3所述的封装堆迭结构,其特征在于,该黏着层为一导电材料,该导电材料选自于焊锡、银胶与异方性导电胶之一。
5.如权利要求3所述的封装堆迭结构,其特征在于,该黏着层为一绝缘材料,该绝缘材料选自于环氧树脂、两阶段性胶材、非导电胶与非导电膜之一。
6.如权利要求1所述的封装堆迭结构,其特征在于,该散热板由一金属核心层与一绝缘层构成,该绝缘层配置于该金属核心层的表面上,且该线路层配置于该绝缘层上。
7.如权利要求1所述的封装堆迭结构,其特征在于,该散热板具有一上表面以及与该上表面相对的一下表面,其中该下表面上具有该线路层,且该散热板中具有多个导通孔,而该些凸块通过该些导通孔与该线路层电性连接,且该散热板通过位于该些连接部分上的该线路层与该第一载板电性连接。
8.如权利要求7所述的封装堆迭结构,其特征在于,该些导通孔的外周缘与散热板之间配置有一绝缘层。
9.如权利要求1所述的封装堆迭结构,其特征在于,该第二封装结构,包括:
一第二载板,通过该些凸块与该第一封装结构电性连接;
一第二芯片,配置于该第二载板上,且通过多条第二导线与该第二载板电性连接;以及
一第二封装胶体,包覆该第二芯片、该些第二导线与部分该第二载板。
10.如权利要求1所述的封装堆迭结构,其特征在于,该第一载板具有一正面、一背面以及一穿孔,该第一芯片配置于该第一载板的该正面,且该些第一导线通过该穿孔伸出并电性连接于该第一载板的该背面。
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US20120241935A1 (en) | 2012-09-27 |
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