CN102544365A - Resistance random access memory and manufacturing method thereof - Google Patents

Abstract

The invention relates to a resistive memory and a manufacturing method thereof. The resistive memory includes a plurality of resistive memory cells; each resistive memory cell includes a substrate (101), and bottom electrodes sequentially deposited on the substrate (101) (102), a resistive variable layer (103) and an upper electrode (104) having a needle-like protrusion (1041). The present invention uses an upper electrode with a protrusion etched into a needle point to concentrate the electric field near the electrode tip, so that the conductive channel is generated near the needle tip, and the on-off position of the conductive channel is relatively fixed, which can reduce the resistance of the resistive memory. The operating voltage and improve the consistency of its high and low resistance distribution.

Description

Resistive memory and manufacturing method thereof

technical field

The invention belongs to the technical field of semiconductor integrated circuits and its manufacture, and in particular relates to a resistive variable memory and its manufacturing method.

Background technique

The so-called "resistive variable memory (RRAM)" is a new type of non-volatile memory that uses resistance changes to achieve high speed (<5ns), low operating voltage (<1V) operation, and has the advantages of high storage density and easy integration. . RRAM devices generally have an electrode-insulator-electrode structure, that is, a layer of dielectric film material with resistive properties is added between two layers of electrodes. These resistive materials are generally transition metal oxides, and common ones include NiO, TiO ₂ , HfO ₂ , ZrO ₂ , WO ₃ , Ta ₂ O ₅ and so on. The working mode of the RRAM device is to use an external voltage to control the resistance value of the resistive material to switch between high and low resistance states, so as to realize data writing and erasing.

The result of the traditional resistive variable memory is a typical sandwich structure: adding a layer of resistive variable material to the parallel capacitor plate. In this way, the formation of conductive channels in the resistive variable layer will be relatively random.

According to physical principles, the electric field will be concentrated at the tip of the conductor. The characteristics of the RRAM are mainly determined by the conductive channel controlled by the electric field. The characteristics of the RRAM can be better controlled when needle-tip electrodes are used.

Contents of the invention

(1) Technical problems to be solved

The object of the present invention is to provide a resistive variable memory and its manufacturing method, so that the on-off position of the conductive channel is relatively fixed, the working voltage of the resistive variable memory is reduced, and the consistency of its high and low resistance value distribution is improved.

(2) Technical solution

In order to solve the above technical problems, the present invention provides a resistive memory, which includes a plurality of resistive memory cells; each resistive memory cell includes a substrate, a bottom electrode sequentially deposited on the substrate, a resistive layer, and a pinpoint The upper electrode of the protrusion.

Preferably, the substrate is but not limited to: a silicon substrate, a glass substrate or a flexible substrate.

Preferably, the bottom electrode is but not limited to: platinum, titanium, copper, aluminum, titanium nitride, nickel, tungsten or doped silicon.

Preferably, the upper electrode is but not limited to: platinum, titanium, copper, aluminum, titanium nitride, nickel, tungsten or doped silicon.

Preferably, the resistive switch layer is, but not limited to: hafnium oxide, titanium oxide, zirconium oxide, zinc oxide, tungsten oxide or tantalum oxide or combinations thereof.

Preferably, the thickness of the resistive layer is 1 nm-1000 nm.

The present invention also provides a method for manufacturing a resistive variable memory, comprising the steps of:

S1: Deposit a conductive material on the substrate using a deposition method, and perform photolithography and etching to form a bottom electrode;

S2: On the substrate not covered by the bottom electrode and on the bottom electrode, directly deposit a metal oxide dielectric or deposit metal by a deposition method and anneal in oxygen to form one or more layers of mixed metal oxide materials, and Perform planarization treatment to form a resistive layer;

S3: using photolithography and anisotropic etching process to form needle-shaped grooves on the resistive layer;

S4: using a deposition method to deposit a conductive material in the groove, and then polishing the metal electrode to form a needle-shaped electrode;

S5: Deposit a conductive material on the resistive variable layer and the needle-shaped electrode by using a deposition method, and perform photolithography and etching to form an upper electrode.

Preferably, the deposition method includes physical vapor deposition (PVD), chemical vapor deposition (CVD) and atomic layer deposition (ALD).

Preferably, the needle point-shaped groove comprises a tapered groove.

Preferably, the thickness of the resistive layer is 1 nm-1000 nm.

(3) Beneficial effects

The present invention uses an upper electrode with a needle-shaped protrusion to concentrate the electric field near the tip of the electrode, so that the conductive channel is generated near the needle tip, and the on-off position of the conductive channel is relatively fixed, which can reduce the resistance of the resistive memory. The operating voltage and improve the consistency of its high and low resistance distribution.

Description of drawings

Fig. 1 is a schematic structural diagram of a resistive memory cell in the present invention;

2 is a schematic cross-sectional view of the resistive memory structure of the present invention;

Fig. 3 is a flow chart of the manufacturing method of the resistive variable memory of the present invention;

4 is a cross-sectional view of forming a bottom electrode and a resistive switch layer in the method for manufacturing a resistive variable memory according to the present invention;

5 is a cross-sectional view of etching a resistive layer and forming an upper electrode in the manufacturing method of a resistive memory according to the present invention.

Detailed ways

The specific implementation manners of the present invention will be further described in detail below in conjunction with the accompanying drawings and embodiments. The following examples serve to illustrate the present invention, but do not limit the scope of the present invention.

As shown in Figures 1-2, the resistive memory according to the present invention includes a plurality of resistive memory cells; each resistive memory cell includes a substrate 101, a bottom electrode 102 sequentially deposited on the substrate 101, a resistive memory cell layer 103 and an upper electrode 104 having needle-like protrusions 1041 .

The substrate 101 is preferably a silicon substrate, and may also be glass or some flexible substrates. The bottom electrode 102 and the top electrode 104 are conductive materials such as platinum, titanium, copper, aluminum, titanium nitride, nickel, tungsten, and doped silicon. The resistive switch layer 103 can be made of metal oxide materials such as hafnium oxide, titanium oxide, zirconium oxide, zinc oxide, tungsten oxide, tantalum oxide, or a combination thereof, and the thickness can be 1 nm-1000 nm.

As shown in FIG. 3 , the manufacturing method of the resistive variable memory according to the present invention includes the steps: S1: using a deposition method to deposit a conductive material on the substrate, and performing photolithography and etching to form a bottom electrode; S2: On the substrate covered by the bottom electrode and on the bottom electrode, deposit a metal oxide medium directly or deposit metal and anneal in oxygen to form one or more layers of mixed metal oxide materials, and perform planarization treatment. Forming a resistive variable layer; S3: using photolithography and anisotropic etching process to form needle-shaped grooves on the resistive variable layer; S4: using a deposition method to deposit conductive materials in the grooves, and then polishing metal electrodes, Forming a needle-shaped electrode; S5: Depositing a conductive material on the resistive layer and the needle-shaped electrode using a deposition method, and performing photolithography and etching to form an upper electrode.

A specific embodiment of the manufacturing method of the resistive memory is shown in Figure 4-5, including the following steps:

Referring to FIG. 4 , resistive memory cells are generally formed on a silicon substrate 1 .

On the silicon wafer substrate 1, use physical vapor deposition (PVD), chemical vapor deposition (CVD) or atomic layer deposition (ALD) to deposit platinum, titanium, copper, aluminum, titanium nitride, nickel, tungsten, doped silicon and other conductive materials, and perform photolithography and etching to form the bottom electrode 2 whose cross section is shown in FIG. 4 .

On the silicon wafer substrate 1 not covered by the bottom electrode and on the bottom electrode 2, use physical vapor deposition (PVD), chemical vapor deposition (CVD) or atomic layer deposition (ALD) to directly deposit metal oxide dielectric or deposit Metal and annealed in oxygen (the annealing temperature can be from 200 degrees Celsius to 1500 degrees Celsius, the specific temperature is related to the material) to form one or more layers of mixed metals such as hafnium oxide, titanium oxide, zirconium oxide, zinc oxide, tungsten oxide, and tantalum oxide The thickness of the oxide material can be 1-1000 nm, and it is planarized to form the resistive variable layer 3 .

Referring to Fig. 5, use photolithography and anisotropic etching process on the resistive layer 3 to form a tapered groove 4 as shown in the figure. After photoetching out the small hole pattern, the etchant can be nitric acid or organic acid compound The resistive variable layer is etched by methods such as conventional wet etching or plasma etching, and the etching time is related to the reaction rate and the thickness of the resistive variable layer.

On the resistive layer 3, platinum, titanium, copper, aluminum, titanium nitride, nickel, tungsten, doped silicon, etc. are deposited using physical vapor deposition (PVD), chemical vapor deposition (CVD) or atomic layer deposition (ALD). conductive material, and then use the damascene process (CMP) to polish the metal electrode to form the needle tip electrode 4 as shown in the figure.

Physical vapor deposition (PVD) is used to deposit conductive materials such as titanium, copper, aluminum, etc. on the resistive layer 3 and the tip electrode 4, and then photolithography and etching are performed to form the upper electrode with the tip electrode 4 as shown in the figure. 5.

The above is only a preferred embodiment of the present invention, it should be pointed out that for those of ordinary skill in the art, without departing from the technical principle of the present invention, some improvements and replacements can also be made, these improvements and replacements It should also be regarded as the protection scope of the present invention.

Claims (10)

1. A resistive memory, characterized in that it comprises a plurality of resistive memory cells; each resistive memory cell comprises a substrate (101), a bottom electrode (102) deposited sequentially on the substrate (101), a resistive memory cell A variable layer (103) and an upper electrode (104) with needle-like protrusions (1041). 2. The resistive variable memory according to claim 1, characterized in that, the substrate (101) is but not limited to: a silicon substrate, a glass substrate or a flexible substrate. 3. The RRAM according to claim 1, wherein the bottom electrode (102) is but not limited to: platinum, titanium, copper, aluminum, titanium nitride, nickel, tungsten or doped silicon. 4. The RRAM according to claim 1, wherein the upper electrode (104) is but not limited to: platinum, titanium, copper, aluminum, titanium nitride, nickel, tungsten or doped silicon. 5. The resistive variable memory according to claim 1, characterized in that, the resistive variable layer (103) is but not limited to: hafnium oxide, titanium oxide, zirconium oxide, zinc oxide, tungsten oxide or tantalum oxide or their combination. 6. The resistive variable memory according to claim 1, characterized in that, the thickness of the resistive variable layer (103) is 1nm-1000nm. 7. A method for manufacturing a resistive variable memory, comprising the steps of: S1: Deposit a conductive material on the substrate using a deposition method, and perform photolithography and etching to form a bottom electrode; S2: On the substrate not covered by the bottom electrode and on the bottom electrode, directly deposit a metal oxide dielectric or deposit metal by a deposition method and anneal in oxygen to form one or more layers of mixed metal oxide materials, and Perform planarization treatment to form a resistive layer; S3: using photolithography and anisotropic etching process to form needle-shaped grooves on the resistive layer; S4: using a deposition method to deposit a conductive material in the groove, and then polishing the metal electrode to form a needle-shaped electrode; S5: Deposit a conductive material on the resistive variable layer and the needle-shaped electrode by using a deposition method, and perform photolithography and etching to form an upper electrode. 8. The method of claim 7, wherein the deposition method comprises physical vapor deposition (PVD), chemical vapor deposition (CVD) and atomic layer deposition (ALD). 9. The method of claim 7, wherein the needle point-shaped recess comprises a tapered recess. 10. The method according to claim 7, characterized in that, the thickness of the resistive layer is 1 nm-1000 nm.

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