CN102386165A - 芯片封装件及其制造方法 - Google Patents
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Abstract
本发明公开了一种芯片封装件及其制造方法。所述芯片封装件包括:绝缘基板;布线,形成在绝缘基板的一侧上;芯片,设置在绝缘基板的所述一侧上并与布线隔开;包封层,包封布线和芯片,其中,布线包括被阻挡件隔开的第一部分和第二部分,第一部分和第二部分通过设置在绝缘基板的所述一侧上并跨过阻挡件的键合线电连接。根据本发明的芯片封装件无需钻孔和增加层数来完成布线的布局,从而可以降低制造难度和制造成本。
Description
技术领域
本发明涉及一种芯片封装件及该芯片封装件的制造方法。
背景技术
随着电子元件的小型化、轻量化和多功能化,对半导体芯片封装的要求越来越高。
图1是示出传统的芯片封装件的剖视图。
如图1所示,传统的芯片封装件10包括:绝缘基板11,绝缘基板11上形成有布线;芯片12,通过粘附层16设置在绝缘基板11上;包封层13,包封布线和芯片12。芯片12具有输入输出端15,输入输出端15通过引线14与布线电连接。
在上述结构中,当形成在绝缘基板11上的布线17a遇到阻挡件(例如,另一布线17b)时,需要在绝缘基板11中形成连接孔18,以通过填充在连接孔18中的导电料和形成在绝缘基板11另一表面上的布线17a’将被另一布线17b阻断的两段布线17a连接到一起,从而实现两段布线17a的电连接。
在布线和阻挡件较多的情况下,需要增加层数和连接孔的数量来完成布线的布局。因此,增大了制造难度和制造成本。
发明内容
本发明的目的在于克服现有技术的不足,而提供一种新型的芯片封装件及其制造方法。
本发明的一方面提供了一种芯片封装件,所述芯片封装件包括:绝缘基板;布线,形成在绝缘基板的一侧上;芯片,设置在绝缘基板的所述一侧上并与布线隔开;包封层,包封布线和芯片,其中,布线包括被阻挡件隔开的第一部分和第二部分,第一部分和第二部分通过设置在绝缘基板的所述一侧上并跨过阻挡件的键合线电连接。
所述阻挡件可以是形成在绝缘基板的所述一侧上的另一布线。
所述阻挡件可以是所述芯片,所述芯片可以是倒装芯片。
所述芯片封装件还包括设置在所述芯片的背对绝缘基板的表面上的绝缘膜。
所述键合线可以为金线、铜线或铝线。
本发明的另一方面提供了一种芯片封装件的制造方法,所述芯片封装件的制造方法包括以下步骤:准备绝缘基板;在绝缘基板的一侧上形成布线,布线包括将被阻挡件隔开的第一部分和第二部分;在绝缘基板的所述一侧上设置与布线隔开的芯片;通过设置在绝缘基板的所述一侧上并跨过阻挡件的键合线将第一部分和第二部分电连接;利用包封材料包封布线和芯片。
所述制造方法还可以包括:在绝缘基板的所述一侧上形成另一布线作为所述阻挡件。
所述阻挡件可以是所述芯片,所述芯片可以是倒装芯片。
所述制造方法还可以包括:在所述倒装芯片的背对绝缘基板的表面上设置绝缘膜。
所述制造方法还可以包括:通过电镀或开防焊来处理布线的将要与所述键合线连接的部位。
所述键合线可以为金线、铜线或铝线。
根据本发明的芯片封装件使用键合线将被阻挡件阻断的布线连接,因此,无需钻孔和增加层数来完成布线的布局,从而可以降低制造难度和制造成本。
附图说明
通过结合附图进行的示例性实施例的以下描述,本发明的这些和/或其他方面和优点将变得清楚和更易于理解,其中:
图1是示出传统的芯片封装件的剖视图;
图2是示出根据本发明示例性实施例的芯片封装件的剖视图;
图3是示出根据本发明示例性实施例的芯片封装件的布线被阻断后的连接方式的示意图;
图4是示出根据本发明另一示例性实施例的芯片封装件的剖视图;
图5A至图5D是示出根据本发明示例性实施例的芯片封装件的制造方法的剖视图。
具体实施方式
下面将参照附图来详细地描述本发明的示例性实施例。
图2是示出根据本发明示例性实施例的芯片封装件的剖视图,图3是示出根据本发明示例性实施例的芯片封装件的布线被阻断后的连接方式的示意图。如图2所示,根据示例性实施例的芯片封装件20可以包括绝缘基板21、芯片22和包封层23。
绝缘基板21可以由诸如BT树脂等的各种绝缘材料以任意的形状形成。绝缘基板21上形成有诸如布线27a和27b的各种布线,以便于各种电路连接。
芯片22可以通过粘附层26固定在绝缘基板21上。芯片22可以具有输入输出端25,输入输出端25可以通过引线24与布线电连接,从而实现芯片22与绝缘基板21上的电路之间的电通信。图2中示出了一个芯片22,但本发明不限于此,多个芯片22可以固定在绝缘基板21上。
包封层23可以形成在绝缘基板21的安装有芯片22的表面上,以包封芯片22、引线24和各种布线,从而保护它们不受外部环境影响。包封层23可以由诸如环氧树脂等的绝缘材料形成。
如图2和图3所示,在根据本发明示例性实施例的芯片封装件20中,在两条布线27a和27b彼此相遇时,或者可以说,在布线27a被另一条布线27b阻断时,可以通过跨过布线27b的键合线28将被布线27b阻断的两段布线27a电连接,从而实现电连接并防止布线27a与布线27b之间的电短路。这里,键合线28可以为金线、铜线和铝线等。
根据本发明的示例性实施例,使用键合线28将被另一布线27b阻断的两段布线27a连接,无需钻孔和增加层数来完成两段布线27a的电连接,从而可以降低制造难度和制造成本。
图4是示出根据本发明另一示例性实施例的芯片封装件的剖视图。如图4所示,根据本发明另一示例性实施例的芯片封装件30可以包括绝缘基板31、芯片32和包封层33。
如上所述,绝缘基板31可以由诸如BT树脂等的各种绝缘材料以任意的形状形成。绝缘基板31上形成有诸如布线37的各种布线,以便于各种电路连接。包封层33可以形成在绝缘基板31的安装有芯片32的表面上,以包封芯片32和各种布线,从而保护它们不受外部环境影响。包封层33可以由诸如环氧树脂等的绝缘材料形成。
在该示例性实施例中,芯片32为倒装芯片。如图4所示,根据本发明的示例性实施例,在布线37遇到倒装芯片32而被倒装芯片32阻断成两段时,通过跨过倒装芯片32的键合线38将两段布线37电连接。倒装芯片32上设置有绝缘膜39以防止键合线38与倒装芯片32接触而损坏倒装芯片32。如上所述,键合线38可以为金线、铜线和铝线等。
根据本发明的示例性实施例,使用键合线38将被倒装芯片32阻断的两段布线37连接,无需钻孔和增加层数来完成两段布线37的电连接,从而可以降低制造难度和制造成本。
图5A至图5D是示出根据本发明示例性实施例的芯片封装件的制造方法的剖视图。下面将参照图5A至图5D描述根据本发明示例性实施例的芯片封装件的制造方法。
首先,如图5A所示,准备绝缘基板51并在绝缘基板51上形成布线。其中,部分布线被阻挡件断开,例如,布线57a被布线57b阻断成两段。这里,在形成布线之后可以通过电镀或开防焊处理布线的将与键合线连接的位置以便于键合线连接。例如,可以通过电镀和开防焊处理布线57a的将与键合线连接的位置。
接下来,如图5B所示,在绝缘基板51上设置芯片52。这里,可以通过粘附层56将芯片52粘附到绝缘基板51的预设位置上。芯片52具有输入输出端55。
接下来,如图5C所示,通过引线54将输入输出端55与布线连接,并通过跨过阻挡件的键合线58将被所述阻挡件阻断的布线电连接,例如,通过跨过布线57b的键合线58将被布线57b阻断的布线57a电连接。例如,可以通过热压焊、超声楔焊等的焊接工艺将键合线58与布线57a进行焊接,从而实现电连接。这里,键合线58可以为金线,铜线和铝线。
最后,如图5D所示,利用由包封材料形成的包封层53包封各种布线和芯片52,从而完成芯片封装件。
在制造如图4所示的倒装芯片封装件时,如果布线遇到的阻挡件为倒装芯片,则可首先在倒装芯片上设置薄膜,然后通过键合线跨过倒装芯片将被倒装芯片阻断的布线电连接。
通过对本发明的芯片封装件以及其制造方法的示例性实施例的以上描述可以看出,根据本发明示例性实施例的芯片封装件使用键合线将被阻挡件(例如,布线和/或倒装芯片)阻断的布线连接,因此,无需钻孔和增加层数来完成布线的布局,从而可以降低制造难度和制造成本。
Claims (11)
1.一种芯片封装件,包括:
绝缘基板;
布线,形成在绝缘基板的一侧上;
芯片,设置在绝缘基板的所述一侧上并与布线隔开;
包封层,包封布线和芯片,
其中,布线包括被阻挡件隔开的第一部分和第二部分,第一部分和第二部分通过设置在绝缘基板的所述一侧上并跨过阻挡件的键合线电连接。
2.如权利要求1所述的芯片封装件,其特征在于,所述阻挡件是形成在绝缘基板的所述一侧上的另一布线。
3.如权利要求1所述的芯片封装件,其特征在于,所述阻挡件是所述芯片,所述芯片是倒装芯片。
4.如权利要求3所述的芯片封装件,其特征在于,所述芯片封装件还包括设置在所述芯片的背对绝缘基板的表面上的绝缘膜。
5.如权利要求1所述的芯片封装件,其特征在于,所述键合线为金线、铜线或铝线。
6.一种芯片封装件的制造方法,包括以下步骤:
准备绝缘基板;
在绝缘基板的一侧上形成布线,布线包括将被阻挡件隔开的第一部分和第二部分;
在绝缘基板的所述一侧上设置与布线隔开的芯片;
通过设置在绝缘基板的所述一侧上并跨过阻挡件的键合线将第一部分和第二部分电连接;
利用包封材料包封布线和芯片。
7.如权利要求6所述的制造方法,其特征在于,所述制造方法还包括:在绝缘基板的所述一侧上形成另一布线作为所述阻挡件。
8.如权利要求6所述的制造方法,其特征在于,所述阻挡件是所述芯片,所述芯片是倒装芯片。
9.如权利要求8所述的制造方法,其特征在于,所述制造方法还包括:在所述倒装芯片的背对绝缘基板的表面上设置绝缘膜。
10.如权利要求6所述的制造方法,其特征在于,所述制造方法还包括:通过电镀或开防焊来处理布线的将要与所述键合线连接的部位。
11.如权利要求6所述的制造方法,其特征在于,所述键合线为金线、铜线或铝线。
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CN1551351A (zh) * | 2003-04-08 | 2004-12-01 | ���ǵ�����ʽ���� | 半导体多芯片封装和制备方法 |
CN2684375Y (zh) * | 2003-08-25 | 2005-03-09 | 威盛电子股份有限公司 | 芯片封装结构 |
CN101131991A (zh) * | 2006-08-23 | 2008-02-27 | 南茂科技股份有限公司 | 减厚的多晶片堆叠封装构造 |
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2011
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Patent Citations (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US6812552B2 (en) * | 2002-04-29 | 2004-11-02 | Advanced Interconnect Technologies Limited | Partially patterned lead frames and methods of making and using the same in semiconductor packaging |
CN1551351A (zh) * | 2003-04-08 | 2004-12-01 | ���ǵ�����ʽ���� | 半导体多芯片封装和制备方法 |
CN2684375Y (zh) * | 2003-08-25 | 2005-03-09 | 威盛电子股份有限公司 | 芯片封装结构 |
CN101131991A (zh) * | 2006-08-23 | 2008-02-27 | 南茂科技股份有限公司 | 减厚的多晶片堆叠封装构造 |
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