CN102043083B - Giant magnetoresistance array current sensor - Google Patents

Abstract

A giant magnetoresistive array intelligent current sensor, comprising a giant magnetoresistance chip sub-board array (1), a circular PCB motherboard (2), an 8-channel amplifier circuit (3), an 8-channel sample-and-hold and A/D conversion circuit (4 ), FPGA signal processing circuit (5); giant magnetoresistance chip sub-board array (1) is made of giant magnetoresistance chip AA005-02 and two bar-shaped alnico permanent magnets, and described permanent magnet is placed in giant At both ends of the magnetoresistance chip AA005-02, the magnetization direction of the permanent magnet is consistent with the magnetic sensitivity direction of the giant magnetoresistance chip AA005-02; 8 giant magnetoresistance chip sub-board arrays are installed on the annular PCB motherboard (2), The voltage signal output by the giant magnetoresistive chip is input into the 8-channel voltage amplifier circuit (3), after being amplified, it enters the 8-channel sampling and holding and A/D conversion circuit (4), and the analog voltage signal is converted into a digital signal, and then process the 8-way digital signal through the FPGA processing circuit (5).

Description

A giant magnetoresistive array current sensor

technical field

The invention relates to an intelligent sensor, in particular to a giant magnetoresistance array current measuring sensor.

Background technique

In order to improve energy utilization efficiency and apply renewable energy access, the current power grid is gradually developing towards a flexible smart grid characterized by intelligent control, management and analysis, which requires various sensors to monitor the current of grid lines, Real-time monitoring of parameters such as voltage, temperature and power equipment operation.

Among them, the real-time accurate detection of current is one of the important tasks in the measurement of many electrical parameters. In the more than 100 years of power system development, traditional current transformers have played a pivotal role in current detection and relay protection. In connection with the construction of digital substations, traditional current transformers are increasingly exposed to many shortcomings, such as: 1. The volume is getting larger and larger, which wastes too much electrical material, which increases the cost and is not easy to install; 2. There are two 3. Lack of digital interface and intelligent analysis function, it is difficult to adapt to the development needs of smart grid.

In order to make up for the shortcomings of traditional current transformers, researchers at home and abroad have studied various new electronic current transformers in the past ten years. The research hotspots mainly focus on Rogowski coil current transformers, bulk optical current transformers and pure optical fiber current transformers. The method of measuring current with Rogowski coil is a relatively mature technology at present, the accuracy can reach above 0.2 level, and large-scale production and application have already begun. However, because the Rogowski coil measures current according to Faraday's law of electromagnetic induction, it can only be used for the measurement of alternating current and pulse current, and it is helpless for the measurement of direct current. The pure optical current transformer is the most attractive type of current transformer, and its principle is based on the Faraday rotation optical effect. In terms of structure, optical current transformers can be divided into block and pure optical current transformers. The advantage of pure optical fiber current transformer is that it is simple in structure, and one optical fiber can realize two functions of sensing and communication at the same time, but due to the great influence of temperature and mechanical deformation, its stability and accuracy are still difficult to guarantee; block optical current transformer It is proposed to make up for the shortcomings of pure optical fiber current transformers. Compared with optical fibers, block glass has a small temperature coefficient, strong mechanical properties, and better measurement results, but block glass is not easy to work. In fact, whether it is a block or a pure fiber optic current transformer, high cost is a common shortcoming. Because of the need for a stable light source and optical signal processing equipment, the cost of these devices is unacceptable for most companies.

Magneto-sensitive devices are components that are sensitive to magnetic field strength. At present, they are mainly divided into several types such as Hall, anisotropic magnetoresistance, and giant magnetoresistance effect. The use of magnetoresistive devices to measure the magnetic field to achieve indirect current measurement makes up for the defect that Rogowski coils cannot measure DC; at the same time, the mass production of magneto-sensitive devices makes their cost low and their relatively stable performance makes them widely used.

Magneto-resistance and Hall elements are mostly used in the current-measuring sensors of the magneto-sensitive device array. Due to the small linear range of general magnetoresistance and Hall elements, it is suitable for the measurement of small and medium currents. Giant magnetoresistance is a research hotspot in the field of materials in recent years. Compared with other magnetic sensitive devices, giant magnetoresistance has higher sensitivity, better temperature stability, and wider linear range. At present, only the AA series produced by the NVE company in the United States is relatively stable in the commercial analog giant magnetoresistance magnetic chips, but the output of the giant magnetoresistance is unipolar regardless of whether the direction of the magnetic field is positive or negative.

Contents of the invention

The purpose of the present invention is to overcome the shortcomings of the existing Rogowski coil electronic current transformer, and propose a sensor that uses a giant magnetoresistive array to measure current, so as to realize the function of AC and DC simultaneous measurement, and can complete the digital transmission and storage of information.

In order to achieve the above object, the technical scheme adopted in the present invention is as follows:

The present invention provides a bias magnetic field by installing permanent magnets at both ends of the giant magnetoresistance chip. When the giant magnetoresistance chip is powered on, the bias magnetic field outputs a bias voltage. When placed on the magnetic field, the output voltage of the giant magnetoresistive chip is a voltage generated by superimposing a magnetic field generated by the measured current on the basis of the original bias voltage, and the bias voltage is subtracted by the subsequent signal processing circuit. A bipolar output voltage is obtained, that is, the output has positive and negative voltages. Because the giant magnetoresistive chip measures the magnetic field, both DC current and AC current will generate a magnetic field, so by measuring the magnetic field, both DC and AC can be measured, that is, it has the function of AC and DC simultaneous measurement.

The invention comprises a giant magnetoresistive chip sub-board array, a PCB motherboard, an 8-channel voltage amplifier circuit, an 8-channel sampling and holding and A/D conversion circuit, and an FPGA processing circuit. The giant magnetoresistance chip sub-board array is composed of 8 giant magnetoresistance sub-boards. Each sub-board consists of a giant magnetoresistance chip AA005-02 and two strip-shaped AlNiCo permanent magnets. The two permanent magnets are respectively placed at both ends of the giant magnetoresistance chip AA005-02. The magnetic direction is consistent with the magnetic sensitivity direction of the giant magnetoresistive chip AA005-02. Eight giant magnetoresistive chip sub-board arrays are evenly installed on the ring-shaped PCB motherboard with the same radius and equal angle. The voltage signal output by the giant magnetoresistive chip is input into the 8-channel voltage amplifier circuit. After being amplified, it enters the 8-channel sampling and holding and A/D conversion circuit. Digital signals are processed in parallel.

The sub-board of the giant magnetoresistive chip of the present invention is composed of AA005-02 of NVE Company and two strip-shaped cast AlNiCo LNGT18 permanent magnets. The magnetization direction is along the thickness direction, that is, the magnetization direction is perpendicular to the length and width. flat. In order to provide a bias magnetic field for the giant magnetoresistive chip, two bar-shaped permanent magnets are placed at both ends of the chip according to the same magnetic pole direction, and the specific distance can be adjusted according to the size of the bias field provided.

The annular PCB mother board of the present invention is used for installing and fixing the giant magnetoresistive chip sub-board, and the measured current bus passes through the inner circle.

The voltage amplifier circuit of the present invention is composed of two four-channel rail-to-rail amplifiers LTC6085. It is used to receive the voltage output signal of the sub-board array of the giant magnetoresistive chip.

The sampling and holding and A/D conversion circuit of the present invention is composed of a MAX155, which is used to synchronously collect the voltage output signal of the front amplifier circuit, and send the converted digital signal to the rear FPGA processor in a parallel output mode.

FPGA signal processing circuit of the present invention is made up of a slice of Cyclone III/EP3C10E144.

The voltage signal output by the sub-board array of the giant magnetoresistive chip is input into the voltage amplifier circuit, and the amplified voltage signal enters the sampling and holding and A/D conversion circuit, and the analog voltage signal is converted into a digital signal, and then each digital signal Enter the FPGA signal processing circuit in parallel, and finally complete the measurement and calculation of the bus current according to the space-based discrete Fourier transform.

Compared with the prior art, the present invention has the following advantages:

1) The giant magnetoresistive chip sub-board with bias field added by the present invention realizes the bipolar output of the output signal, that is, the output signal has positive and negative, so that the measurement of positive and negative magnetic fields can be realized;

2) The giant magnetoresistive chip array proposed by the present invention realizes the function of simultaneous measurement of AC and DC, and cooperates with a certain algorithm to weaken the magnetic field interference generated by parallel current-through wires in space;

3) In the present invention, FPGA is adopted as the signal processing unit, and a parallel processing mode is realized for multi-channel sensor signals, which completely breaks through the instruction processing of traditional MCU, DSP, etc., and improves the real-time performance of detection.

Description of drawings

The present invention will be further described below in conjunction with the accompanying drawings and specific embodiments.

Figure 1 is a block diagram of the structure and principle of the giant magnetoresistive array current sensor;

Figure 2 is the distribution diagram of the magnetic lines of force when the distance between two bar-shaped permanent magnets is 6mm;

The magnetic field intensity amplitude value and each component value diagram of each point on the longitudinal axis of symmetry of the permanent magnet of Fig. 3;

Fig. 4 Schematic diagram of the sub-board structure of the giant magnetoresistive chip;

Fig. 5 is an assembly drawing of the giant magnetoresistive chip sub-board array on the annular PCB motherboard;

Figure 6 is a connection diagram of 8 giant magnetoresistive chip sub-boards and voltage amplifier LTC6085;

Figure 7 is a connection diagram of the voltage amplifier LTC6085 and the sampling and holding and A/D converter MAX155;

Fig. 8 is a connection diagram of sampling and holding and A/D converter MAX155 and FPGA processor EP3C10.

Detailed ways

Fig. 1 is a block diagram of the principle structure of the present invention. As shown in FIG. 1 , the present invention includes: giant magnetoresistive chip sub-board array 1 , annular PCB motherboard 2 , 8-channel voltage amplifier circuit 3 , 8-channel sampling and holding and A/D conversion circuit 4 , and FPGA processing circuit 5 . The GMR chip sub-board array 1 is composed of 8 GMR sub-boards. Each sub-board is composed of a giant magnetoresistance chip AA005-02 and two bar-shaped AlNiCo permanent magnets. The two bar-shaped permanent magnets are respectively placed at both ends of the giant magnetoresistance chip AA005-02. The direction is consistent with the magnetic sensitivity direction of giant magnetoresistive chip AA005-02. The 8 giant magnetoresistive sub-boards are evenly distributed on the ring-shaped PCB motherboard 2 with the same radius and equal angle. After the output voltage signal is amplified by the 8-channel voltage amplifier circuit 3, it enters the 8-channel sample-hold and A The /D conversion circuit 4 realizes the conversion of analog signals and digital signals. The converted digital signal enters the FPGA processing circuit 5 to complete the measurement and calculation of the bus current.

The giant magnetoresistance chip sub-board array 1 is composed of 8 giant magnetoresistance chip daughter boards, and the 8 giant magnetoresistance chip daughter boards are welded on the annular PCB motherboard 2 with the same radius and angle to form The sensing part of the giant magnetoresistive array smart current sensor is shown in Fig. 5 .

The annular motherboard 2 of this embodiment is composed of a PCB with an inner radius of r=9cm and an outer radius of D=11cm.

The 8-channel voltage amplifier circuit 3 is composed of two amplifiers LTC6085. The two amplifiers are connected in parallel. Except for the parallel connection of the power supply and ground terminals, other pin terminals are not connected. As shown in Figure 6, the V+ terminals of the eight giant magnetoresistive chips are uniformly connected to +5V voltage, and the V- terminals are uniformly grounded. The Out+ terminal of the No. 1 GMR chip is connected to the +INA terminal of the first amplifier LTC6085, the Out+ terminal of the No. 2 GMR chip is connected to the +INB terminal of the first amplifier LTC6085, and the Out+ terminal of the No. 3 GMR chip Connect to the +INC terminal of the first amplifier LTC6085, and the Out+ terminal of the No. 4 giant magnetoresistive chip is connected to the +IND terminal of the first amplifier LTC6085. The Out-terminal of the No. 1 giant magnetoresistive chip is connected to the -INA terminal of the first amplifier LTC6085, the Out-terminal of the No. 2 giant magnetoresistive chip is connected to the -INB terminal of the first amplifier LTC6085, and the No. The Out-terminal is connected to the -INC terminal of the first amplifier LTC6085, and the Out-terminal of the No. 4 giant magnetoresistive chip is connected to the -IND terminal of the first amplifier LTC6085. The Out+ terminal of the No. 5 GMR chip is connected to the +INA terminal of the second amplifier LTC6085, the Out+ terminal of the No. 6 GMR chip is connected to the +INB terminal of the second amplifier LTC6085, and the Out+ terminal of the No. 7 GMR chip Connect to the +INC terminal of the second amplifier LTC6085, the Out+ terminal of the No. 8 giant magnetoresistive chip is connected to the +IND terminal of the second amplifier LTC6085; the Out- terminal of the No. , the Out-terminal of the No. 6 GMR chip is connected to the -INB terminal of the second amplifier LTC6085, the Out-terminal of the No. 7 GMR chip is connected to the -INC of the second amplifier LTC6085, and the No. 8 GMR chip The Out- terminal is connected to the -IND terminal of the second amplifier LTC6085.

The 8-channel sampling and holding and A/D conversion circuit 4 is composed of a chip MAX155. The analog signals output by the two LTC6085 amplifiers are sampled and quantized by the chip MAX155 and become digital signals. As shown in Figure 7, the V+ terminal of the first and second two amplifiers LTC6085 is connected to +5V voltage, and the V- terminal is connected to -5V voltage. The OUTA end of the first amplifier LTC6085 is connected to the AINO end of the MAX155, the OUTB end of the first amplifier LTC6085 is connected to the AIN1 end of the MAX155, the OUTC end of the first amplifier LTC6085 is connected to the AIN2 end of the MAX155, and the OUTD end of the first amplifier LTC6085 is connected to to AIN3 of MAX155; OUTA of the second amplifier LTC6085 is connected to AIN4 of MAX155; OUTB of the second amplifier LTC6085 is connected to AIN5 of MAX155; OUTC of the second amplifier LTC6085 is connected to AIN6 of MAX155; The OUTD end of the amplifier LTC6085 is connected to the AIN7 end of the MAX155.

Described FPGA processing circuit 5 is made up of EP3C10E144 of cyclone III series, receives the digital signal from sampling and holding and A/D conversion circuit 4. The D0/A0 terminal of MAX155 is connected to the IO of FPGA, the DIFFIO_B9p terminal, the D1/A1 terminal of MAX155 are connected to the IO of FPGA, the DIFFIO_B9n terminal, the D2/A2 terminal of MAX155 are connected to the IO of FPGA, the DIFFIO_B10p terminal, and the D3/PD of MAX155 DIFFIO_B11p, D4/INH of MAX155 are connected to FPGA IO, DIFFIO_B11n, D5/BIP of MAX155 are connected to FPGA IO, DIFFIO_B12p, D6/DIFF of MAX155 are connected to FPGA IO, DIFFIO_B12n terminal, D7/ALL terminal of MAX155 are connected to IO, DIFFIO_B15p terminal. VDD of MAX155 is connected to +5V, Vss is connected to -5V, DGND and AGND are grounded, REFIN and REFOUT are connected together and grounded through capacitor C. As shown in Figure 8.

The giant magnetoresistance chip sub-board array adopts on-board sensing technology, and consists of 8 giant magnetoresistance chip sub-boards distributed on the ring-shaped PCB motherboard at an equal angle of 45 degrees. When the invention works, the measured wire passes through the geometric center of the inner circle of the annular PCB mother board. Since the AA005-02 is a unipolar output magnetic field strength measurement chip (that is, under the action of an alternating magnetic field, its output only changes in one direction), when the magnetic field is an alternating magnetic field, the output of the AA005-02 The voltage can only be a unipolar output voltage. Therefore, in the present invention, bar-shaped permanent magnets are placed at both ends of the giant magnetoresistance chip to provide a constant bias magnetic field, and the magnetization direction is parallel to the direction of the sensitive axis of the giant magnetoresistance chip. When the magnetic field generated by the measured current is superimposed on the giant magnetoresistive chip AA005-02, the voltage generated by it will be superimposed on the initial bias voltage. At this time, the output variation voltage of the giant magnetoresistive chip is the variation based on the bias voltage. The bias voltage is subtracted in the subsequent FPGA processing circuit 5 to obtain the bipolar output characteristics of the giant magnetoresistive chip. The geometrical dimensions of the bar-shaped permanent magnet in the present invention are: length: 6mm, width: 1.5mm, thickness: 1mm, and the magnetization direction is along the thickness direction. The distance between the two magnets is at least greater than the length of the giant magnetoresistive chip, and the specific value can be adjusted according to the required bias field strength.

The inner radius of the annular PCB motherboard 2 is r=9cm, the outer radius is D=11cm, and the distance between the installation point and the center point of the motherboard is L=10cm. There are altogether 8 sub-board installation points on the ring-shaped PCB motherboard 2, which are arranged in an equiangular distribution on the ring surface of the motherboard.

The 8-channel voltage amplifier circuit 3 is composed of two four-channel rail-to-rail amplifiers LTC6085, and the 8 outputs of the giant magnetoresistive chip sub-board array are all connected to the LTC6085 in a differential manner. Because the signal is transmitted from the sensing part to the signal processing part on the PCB, parasitic capacitance and inductance will inevitably be generated on the wire, which will generate an additional voltage at the input of the amplifier - the common mode voltage. In order to minimize the interference of common mode voltage, all must be connected as differential mode input.

The output of the amplifier is directly MAX1554. MAX155 is an 8-channel 8-bit analog-to-digital converter integrating synchronous sample-hold and A/D conversion functions. The number of conversion bits can be freely selected according to the measurement accuracy requirements. Synchronous sampling ensures the phase synchronization of the 8-channel analog voltage, which is the basis for the FPGA processing circuit to optimize the measurement algorithm. The output of MAX155 is a parallel 8-bit digital signal, so it can be directly connected to any 8 I/O ports of FPGA. It should be noted that whether the physical electrical signals of the two match. If they do not match, level conversion is required.

The FPGA processing circuit adopts Cyclone series chips of ALTERA Company, which mainly completes signal processing. According to the function, it can be divided into four parts: channel allocation, preprocessing of A/D conversion data (offset elimination, temperature and hysteresis compensation, etc.), measurement algorithm optimization (spatial Fourier change) and output control module (digital and analog output).

Claims (5)

1. giant magnetoresistance array current sensor is characterized in that: described sensor by giant magnetoresistance chip daughter board array (1), ring-shaped P CB motherboard (2), 8 channel amplifier circuit (3), 8 channel sample keep and A/D change-over circuit (4), FPGA signal processing circuit (5) constitute; Giant magnetoresistance chip daughter board array (1) adopts sensing technology on the plate; Constitute by 8 giant magnetoresistance daughter boards; Each giant magnetoresistance daughter board is made up of the Al-Ni-Co permanent magnet of a slice giant magnetoresistance chip AA005-02 and two bar shapeds; Two strip permanent magnets place the two ends of giant magnetoresistance chip AA005-02 respectively, and the permanent magnet magnetizing direction is consistent with the magnetosensitive sense direction of giant magnetoresistance chip AA005-02; Giant magnetoresistance chip daughter board array is installed on the ring-shaped P CB motherboard (2) with 45 degree equal angles, and tested lead passes from the interior geometry of the circle center of ring-shaped P CB motherboard; The voltage signal of described giant magnetoresistance chip daughter board array (1) output is input in the 8 channel voltage amplifier circuits (3); After amplifying; Getting into 8 channel sample keeps and A/D change-over circuit (4); The voltage signal of simulation is transformed into digital signal, passes through FPGA treatment circuit (5) again 8 way word signals are handled.

2. giant magnetoresistance array current sensor as claimed in claim 1 is characterized in that, described 8 channel amplifier circuit (3) are made up of two LTC6085; The Out+ end of first giant magnetoresistance chip in the giant magnetoresistance chip daughter board array (1) is connected to first LTC6085's+the INA end; The Out-end is connected to first LTC6085's-the INA end; The Out+ end of second giant magnetoresistance chip is connected to first LTC6085's+the INB end; The Out-end is connected to first LTC6085's-the INB end; The Out+ end of the 3rd giant magnetoresistance chip is connected to first LTC6085's+the INC end; The Out-end is connected to first LTC6085's-the INC end; The Out+ end of the 4th giant magnetoresistance chip is connected to first LTC6085's+the IND end; The Out-end is connected to first LTC6085's-the IND end; The Out+ end of the 5th giant magnetoresistance chip is connected to second LTC6085's+the INA end; The Out-end is connected to second LTC6085's-the INA end; The Out+ end of the 6th giant magnetoresistance chip is connected to second LTC6085's+the INB end; The Out-end is connected to second LTC6085's-the INB end; The Out+ end of the 7th giant magnetoresistance chip is connected to second LTC6085's+the INC end; The Out-end is connected to second LTC6085's-the INC end; The Out+ end of the 8th giant magnetoresistance chip is connected to second LTC6085's+the IND end; The Out-end is connected to second LTC6085's-the IND end.

3. giant magnetoresistance array current sensor as claimed in claim 2 is characterized in that, described 8 channel sample keep and A/D change-over circuit (4) is made up of a slice MAX155; The OUTA of first amplifier chip LTC6085 terminates at the AIN0 end of MAX155, and OUTB terminates at the AIN1 end of MAX155, and OUTC terminates at the AIN2 end of MAX155, and OUTD terminates at the AIN3 end of MAX155; The OUTA of second amplifier chip LTC6085 terminates at the AIN4 end of MAX155, and OUTB terminates at the AIN5 end of MAX155, and OUTC terminates at the AIN6 end of MAX155, and OUTD terminates at the AIN7 end of MAX155.

4. giant magnetoresistance array current sensor as claimed in claim 3 is characterized in that described FPGA signal processing circuit (5) is made up of a slice Cyclone III/EP3C10E144, is used for accepting the digital signal of MAX155 output; The D0/A0 of MAX155 is connected to the IO:DIFFIO_B9p of EP3C10E144; D1/A1 is connected to the IO:DIFFIO_B9n of EP3C10E144; D2/A2 is connected to the IO:DIFFIO_B10p of EP3C10E144; D3/A3 is connected to the IO:DIFFIO_B11p of EP3C10E144, and D4/INH is connected to the IO:DIFFIO_B11n of EP3C10E144, and D5/BIP is connected to the IO:DIFFIO_B12p of EP3C10E144; D6/DIFF is connected to the IO:DIFFIO_B12n of EP3C10E144, and D7/ALL is connected to the IO:DIFFIO_B15p of EP3C10E144.

5. one kind is adopted the described giant magnetoresistance array current of claim 1 sensor measurement method of current; It is characterized in that; By described permanent magnet a bias magnetic field is provided, when giant magnetoresistance chip daughter board array (1) when powering on, described bias magnetic field output offset voltage; The magnetic field superposition that produces when tested bus current is on bias magnetic field the time; The output voltage of giant magnetoresistance chip daughter board array (1) is the voltage that is produced by the magnetic field of tested bus current generation that on the basis of former bias voltage, superposeed; Through described FPGA signal processing circuit bias voltage is reduced; Just obtain the voltage of a bipolar output, this voltage for produce by tested bus current magnetic field produced.

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