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CN101707316B - 电感和电容耦合平衡的接线盒 - Google Patents

电感和电容耦合平衡的接线盒 Download PDF

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CN101707316B
CN101707316B CN2009102615832A CN200910261583A CN101707316B CN 101707316 B CN101707316 B CN 101707316B CN 2009102615832 A CN2009102615832 A CN 2009102615832A CN 200910261583 A CN200910261583 A CN 200910261583A CN 101707316 B CN101707316 B CN 101707316B
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pcb
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CN101707316A (zh
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J·E·卡弗尼
S·莱斯尼亚克
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Panduit Corp
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    • H—ELECTRICITY
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    • H01R—ELECTRICALLY-CONDUCTIVE CONNECTIONS; STRUCTURAL ASSOCIATIONS OF A PLURALITY OF MUTUALLY-INSULATED ELECTRICAL CONNECTING ELEMENTS; COUPLING DEVICES; CURRENT COLLECTORS
    • H01R4/00—Electrically-conductive connections between two or more conductive members in direct contact, i.e. touching one another; Means for effecting or maintaining such contact; Electrically-conductive connections having two or more spaced connecting locations for conductors and using contact members penetrating insulation
    • H01R4/24—Connections using contact members penetrating or cutting insulation or cable strands
    • H01R4/2416—Connections using contact members penetrating or cutting insulation or cable strands the contact members having insulation-cutting edges, e.g. of tuning fork type
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01R—ELECTRICALLY-CONDUCTIVE CONNECTIONS; STRUCTURAL ASSOCIATIONS OF A PLURALITY OF MUTUALLY-INSULATED ELECTRICAL CONNECTING ELEMENTS; COUPLING DEVICES; CURRENT COLLECTORS
    • H01R13/00—Details of coupling devices of the kinds covered by groups H01R12/70 or H01R24/00 - H01R33/00
    • H01R13/646—Details of coupling devices of the kinds covered by groups H01R12/70 or H01R24/00 - H01R33/00 specially adapted for high-frequency, e.g. structures providing an impedance match or phase match
    • H01R13/6461—Means for preventing cross-talk
    • H01R13/6464—Means for preventing cross-talk by adding capacitive elements
    • H01R13/6466—Means for preventing cross-talk by adding capacitive elements on substrates, e.g. printed circuit boards [PCB]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
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    • H01R13/00—Details of coupling devices of the kinds covered by groups H01R12/70 or H01R24/00 - H01R33/00
    • H01R13/646—Details of coupling devices of the kinds covered by groups H01R12/70 or H01R24/00 - H01R33/00 specially adapted for high-frequency, e.g. structures providing an impedance match or phase match
    • H01R13/6461—Means for preventing cross-talk
    • H01R13/6467—Means for preventing cross-talk by cross-over of signal conductors
    • H01R13/6469—Means for preventing cross-talk by cross-over of signal conductors on substrates
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    • H01—ELECTRIC ELEMENTS
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    • H01R13/00—Details of coupling devices of the kinds covered by groups H01R12/70 or H01R24/00 - H01R33/00
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    • H01R24/00—Two-part coupling devices, or either of their cooperating parts, characterised by their overall structure
    • H01R24/60—Contacts spaced along planar side wall transverse to longitudinal axis of engagement
    • H01R24/62—Sliding engagements with one side only, e.g. modular jack coupling devices
    • H01R24/64—Sliding engagements with one side only, e.g. modular jack coupling devices for high frequency, e.g. RJ 45
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    • H01R13/00—Details of coupling devices of the kinds covered by groups H01R12/70 or H01R24/00 - H01R33/00
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    • H01R4/00—Electrically-conductive connections between two or more conductive members in direct contact, i.e. touching one another; Means for effecting or maintaining such contact; Electrically-conductive connections having two or more spaced connecting locations for conductors and using contact members penetrating insulation
    • H01R4/24—Connections using contact members penetrating or cutting insulation or cable strands
    • H01R4/2416—Connections using contact members penetrating or cutting insulation or cable strands the contact members having insulation-cutting edges, e.g. of tuning fork type
    • H01R4/242—Connections using contact members penetrating or cutting insulation or cable strands the contact members having insulation-cutting edges, e.g. of tuning fork type the contact members being plates having a single slot
    • H01R4/2425—Flat plates, e.g. multi-layered flat plates
    • H01R4/2429—Flat plates, e.g. multi-layered flat plates mounted in an insulating base
    • H01R4/2433—Flat plates, e.g. multi-layered flat plates mounted in an insulating base one part of the base being movable to push the cable into the slot
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    • H05K1/16—Printed circuits incorporating printed electric components, e.g. printed resistor, capacitor, inductor
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    • H05K1/16—Printed circuits incorporating printed electric components, e.g. printed resistor, capacitor, inductor
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    • H05K2201/09—Shape and layout
    • H05K2201/09209—Shape and layout details of conductors
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    • H05K2201/09—Shape and layout
    • H05K2201/09209—Shape and layout details of conductors
    • H05K2201/09654—Shape and layout details of conductors covering at least two types of conductors provided for in H05K2201/09218 - H05K2201/095
    • H05K2201/09672—Superposed layout, i.e. in different planes
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    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/10—Details of components or other objects attached to or integrated in a printed circuit board
    • H05K2201/10007—Types of components
    • H05K2201/10189—Non-printed connector
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
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    • Y10S439/00—Electrical connectors
    • Y10S439/941—Crosstalk suppression
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
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    • Y10T29/49—Method of mechanical manufacture
    • Y10T29/49002—Electrical device making
    • Y10T29/49117—Conductor or circuit manufacturing
    • Y10T29/49194—Assembling elongated conductors, e.g., splicing, etc.
    • Y10T29/49201—Assembling elongated conductors, e.g., splicing, etc. with overlapping orienting
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    • Y10T29/49117—Conductor or circuit manufacturing
    • Y10T29/49194—Assembling elongated conductors, e.g., splicing, etc.
    • Y10T29/49201—Assembling elongated conductors, e.g., splicing, etc. with overlapping orienting
    • Y10T29/49202—Assembling elongated conductors, e.g., splicing, etc. with overlapping orienting including oppositely facing end orienting
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    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
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    • Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
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    • Y10T29/49—Method of mechanical manufacture
    • Y10T29/49002—Electrical device making
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  • Physics & Mathematics (AREA)
  • Electromagnetism (AREA)
  • Details Of Connecting Devices For Male And Female Coupling (AREA)
  • Coupling Device And Connection With Printed Circuit (AREA)
  • Manufacturing Of Electrical Connectors (AREA)

Abstract

一种网络电缆插座包括一种用于平衡电感和电容耦合的印刷电路板或PCB(b)。使用PCB容许不需要大量地增加制造成本而形成紧凑的迹线路径。通过包括在每条迹线上的、由中性区域分离的、两截然不同的电感区域，实现设计PCB迹线模式的自由度的显著的增加，在PCB迹线模式中，一对电感区域共同地在数量和相位角上抵消由标准插头和插座触头引起的电感耦合。此外，使用两截然不同的电感区域提供更多关于用于电容耦合平衡的电容性板的位置以及接线端和绝缘层剥落触头的位置的自由。虽然电容耦合的数量由平行于载流迹线的电容性板的长度决定，但是该方法容许独立地平衡电容耦合与电感耦合。

Description

电感和电容耦合平衡的接线盒
本发明专利申请是国际申请号为PCT/US2004/042626，国际申请日为2004年12月17日，进入中国国家阶段的申请号为200480040842.4，名称为“电感和电容耦合平衡的接线盒”的发明专利申请的分案申请。
相关申请的参照
该申请要求于2003年12月22日提交的、标题为“电感和电容耦合平衡的接线盒”的、代理人参考号LCB447、美国临时申请第60/531756号的优先权，参照了它的全部内容以及其中引用的所有材料。此外，该申请参照了于1997年9月2日提交的、标题为“具有延时信号补偿功能的接线盒”的美国专利5997358的全部内容以及其中引用的所有材料。
技术领域
本发明一般地涉及一种接线盒，特别地涉及一种具有改进的电感和电容耦合平衡特征的接线盒。
背景技术
一直以来，人们希望通过最小化特定部件或整个系统中的串话来改进其电气性能。当网络电感和电容串话部件在数量上都减少时，近端串话(NEXT)和远端串话(FEXT)都会减弱。
最小化引起串话的电感部件的过去的尝试，在某些情况下，包括改变接线盒触头的长度和方位，提供抵消在插头或接线盒中其他地方在先存在的电感耦合的电感耦合。然而，要求生产具有特定长度和方位的触头的制造过程成本较高。此外，这样的触头相对来说已经很长，这使得在高频时引起过多的相变。此外，在这样的触头之间的电感易于过度地变化。此外或者替代这样的触头设计，利用在印刷电路板(PCB)上的线对之间的相位抵消耦合来最小化串话的过去的尝试主要利用电容耦合。因而，平衡电感和电容耦合而因此最小化串话的较佳方式可以得到。
发明内容
本发明的接线盒和印刷电路板(PCB)用PCB上的迹线提供电感平衡功能。它是复合式的，因为它利用电感平衡迹线来提供电容平衡功能。根据实现以紧凑接线盒为预期结果的能力和成本，这比以前的设计提供许多有利条件。它还提供了更多的设计适应性和改进的性能。
在本发明的某些较佳的实施例中，提供一种用于接收合适地配置的、端接四根双绞线的标准插头的插座。此插座包括PCB，PCB具有伸出其前侧而配合插头的八根触头，伸出其后侧的八根绝缘层剥离触头(IDC)，以及嵌入连接相应接线端和IDC(编号1-8，便于引用)的印刷电路板的八根迹线。PCB上的四条迹线选择性地在其不同区域规定路线，创建由一相对地无耦合的中性区域分离的两截然不同的耦合区域。产生的耦合改进了插座和插头的结合的3、6对和4、5对的总体性能。
对此，根据本发明的一个方面，提供了一种用于端接包括多根导线的网络电缆的插座接线盒，其中第一对导线包括第一和第二导线，第二对导线则包括第三和第四导线，所述插座接线盒包括：印刷电路板，所述印刷电路板具有分别提供给所述第一、第二、第三和第四导线的第一、第二、第三和第四电气迹线，每条电气迹线通过两个由中性区域分离的电感耦合区域，其中所述中性区域不会有任何特意地产生在迹线对之间的电感耦合，所述迹线在补偿和串话区域一起靠拢，以至于引起在特定的迹线对之间的电感耦合，其中所述两个电感耦合区域包括补偿区域和串话区域，所述补偿区域提供所述第二与第三电气迹线之间以及所述第一与第四电气迹线之间的电感耦合，并且所述串话区域提供所述第二与第四电气迹线之间以及所述第一与第三电气迹线之间的电感耦合。
根据本发明的另一个方面，提供了一种用于减小在网络电缆中的多根导线之间的串话的方法，所述第一对导线包括第一和第二导线，并且所述第二对导线包括第三和第四导线，所述方法包括：在位于插座接线盒内的印刷电路板上提供两个电感耦合区域，位于所述PCB上的第一、第二、第三和第四电气迹线通过所述电感耦合区域电感耦合，所述第一、第二、第三和第四电气迹线分别提供给所述第一、第二、第三和第四导线；以及用位于所述PCB上的一中性区域分离所述两个电感耦合区域，其中所述中性区域不会有任何特意地产生在迹线对之间的电感耦合；其中，所述两个电感耦合区域包括补偿区域，所述补偿区域提供所述第二与第三电气迹线之间以及所述第一与第四电气迹线之间的电感耦合，并且所述两个电感耦合区域包括串话区域，所述串话区域提供所述第二与第四电气迹线之间以及所述第一与第三电气迹线之间的电感耦合，所述方法还包括使所述迹线在补偿和串话区域一起靠拢，以至于引起在特定的迹线对之间的电感耦合。
附图说明
图1是根据本发明的实施例的插座的前右上分解透视图；
图2是图1的插座的后右上透视图；
图3是处于装配形式的图1的插座的正视图；
图4是沿图3中的A-A线的图3的插座的剖视图；
图5是沿图3中的B-B线的图3的插座的剖视图；
图6是带有协作的插头的图1的插座的正视图；
图7是沿图6中的C-C线的图6的插座的剖视图；
图8是根据本发明的实施例的印刷电路板的载流迹线的布置的示意性正视图；
图9a是沿图8中的A-A线的图8的印刷电路板的示意性剖视图；
图9b是沿图8中的C-C线的图8的印刷电路板的示意性剖视图；
图9c是沿图8中的E-E线的图8的印刷电路板的示意性剖视图；
图10是图8的印刷电路板的示意性正视图，显示电感区域分割和电感矢量原点位置；
图11是示意性的矢量图，显示根据本发明的较佳实施例的电感数量和相位角；
图12a和图12b显示了电容性板添加到在图8中所示的PCB的载流迹线的部分；
图13是在图8中显示的带有附加的电容性板的PCB的布局的示意性正视图；
图14a，图14b和图14c是沿图13中的A-A，B-B和C-C线的图13的PCB的示意性剖视图；
图15a和15b是插座的透视图，除了电缆接线端盖已经用永久穿孔块替代(用于穿孔电缆接线端方法)，该插座与图1中说明的插座相同。
图16a和16b是图14的插座的分解透视图；
图17是沿图16中的A-A线的图16的插座的剖视图；
图18是图6的插座的触头和触头架的侧视图；
图19是图18的一个外侧触头的可替换的设计的透视图；
图20a和图20b是图19的触头的示意图；
图21是图1的包括导线对间隔器的插座的后部的后视分解透视图；
图22是图1的包括导线对间隔器的插座的后部的前视分解透视图；
图23是图1的插座的后部中安装的导线对间隔器的侧剖视图；
图24是包括导线对间隔器的插座的屏蔽的变型的后部的后视分解透视图；
图25是从包括导线对间隔器的插座的屏蔽的变型的后部的前视的分解视图；
图26是图1的插座的屏蔽的变型的后部中安装的导线对间隔器的侧剖视图；
图27是图1的插座的屏蔽的变型的透视图；
图28是图27的插座的分解视图；
图29a和图29b是用于图27的插座的接地盖的可替换的设计的透视图；
图30a和图30b是图29的接地盖的后视图和侧视图；
图31是用于图27的屏蔽的插座的“屏蔽的接线板”的前透视图；
图32是图31的“屏蔽的接线板”的后部透视图；
图33是图31的“屏蔽的接线板”的分解透视图；
图34a和图34b是图31的“屏蔽的接线板”的侧面剖视图；
具体实施方式
图1-7显示了可以利用根据本发明的耦合平衡电路板的接线盒。从分解视图(图1和图2)的前面向后看，有主外壳1以及用于支撑在其上的八个触头3的触头托架2。触头较佳地从PCB4的前面以通过孔的方式与之接合，八个IDC 5以同样的方式从后面与之接合。较佳地带有一对导轨7的后部外壳6包括用于IDC的通道，接线盖12可以较佳地包括用于分离在其中的单独的接线对的四分导线对间隔器10。在这个区域未屏蔽的双绞线通常具有不同数量的扭转，扭转的数量取决于人工安装过程。在这个区域的屏蔽的双绞线通常具有可变数量的屏蔽，这取决于人工安装过程。间隔器消除了在这个区域中的线对之间的串话耦合。间隔器10可以包括安装柱11，安装柱用于把间隔器安装在接线盒内，比如插入锁眼槽9中。插销8可以用于装配后部外壳6和接线盖12。
图8和图9显示了PCB迹线，PCB迹线在相应编号的触头孔和IDC孔之间，其中显示了在补偿区域(图9a)、中性区域(图9b)以及串话区域(图9c)中的特定迹线的剖面布局。由于这些剖面的迹线设计，电感耦合在补偿区域和串话区域内的特定的线对之间特意地产生，而中性区域通常没有特意地产生的耦合。
图10概略地显示了迹线长度区域分割和/或中点，建立用于计算网络电感耦合(矢量加法基于特定电感耦合区域的数量和相位角)的电感矢量的原点。图11是示意性的矢量图，显示了所示的特定插座的实施例的为零的电感耦合的数量和相位角。
使用PCB提供电感平衡比某些传统的电感平衡技术(例如触头方位)更好，这是因为在PCB的线路是紧凑的而且不会导致大量地增加制造成本而以较低的成本获得。此外，在补偿区域处一定数量(当路径平行时的路径长度)的电感特意地生成，抵消从接线盒的插头或其他部分产生的预定电感，因为相位的改变在高频时仅使用单一的补偿区域是无效的。本发明的接线盒利用美国专利第5997358号的方法考虑相位的改变。本申请参考了美国专利第5997358号的全部内容。通过包括两截然不同的区域(用中性区域将其分开)，实现了在PCB板上设计迹线模式的自由度的显著增加，所以电感耦合区域对共同地从数量和相位角上抵消由标准插头和插座触头引起的电感耦合。
在本发明的较佳的实施例中，电气路径可以从插头伸出，穿过在插头触点和PCB上的触头通孔之间的触头的部分，沿着迹线的预补偿部分，进入迹线的补偿区域，进入迹线的中性区域，进入迹线的串话区域，以及进入相应的IDC。特定的迹线在补偿和串话区域一起靠拢，以至于引起在这些区域中的特定迹线对之间的电感耦合，而预补偿区域和中性区域通常全无任何特意地产生的、在迹线对之间的电感耦合。不同迹线部分的长度受到设计条件的影响，但是通常选择在不同区域内提供不同的路径长度，所以由补偿和串话区域提供的电感耦合和他们的位置结合，通常抵消在插头和插座触头中的电感耦合。
尽管在设计该系统时有几个自由度，但特别地在两电感区域(补偿区域和串话区域)之间的中性区域的包含物，产生设计通孔位置和PCB上的迹线路径的相当多的自由度，因此提供了更多的适合接线端和IDC可以定位在PCB上的自由。还提供在PCB上产生电容的更多的选择，所以也用于电容平衡功能。
如图10中所示的较佳的实施例，在此讲解的印刷电路板设计具有在标号3、6对和标号4、5对之间的电感耦合的三个区域。其中有补偿区域(区域b)和串话区域(区域c)，以及这些耦合的数量可以通过区域的长度调节。其中还有中性区域，中性区域具有线对之间最小的耦合，而且它的长度可以调节。
图11是该实施例的矢量模拟。
图11中的矢量模拟如下：
矢量a：插头的串话与插座触头的串话，并且它们的相位相对补偿区域的中心(电感耦合中心)变化。
矢量b：印刷电路板补偿区域的补偿，即矢量b，完全有效地位于该区域的中心。
矢量c：为IDC的串话而调节的印刷电路板串话区域的串话，即矢量c，完全有效地处于该区域的中心，并且它们的相位相对补偿区域的中心变化。
由于b&c之间的距离和环境引起的相变等于由a&b之间的距离和环境引起的相变。如图11所示，根据该设计，ab＝bc，向量a的长度等于向量c的长度，在500MHz的无功频率时，向量a的垂直分量加上向量c的垂直分量等于向量b的长度。如图11示意性地说明，该理想的结果可以通过依靠调节中性区域的长度以及依靠调节矢量b&c的数量来独立地调节bc而获得。
带有如图13所示的PCB的、如图1所示的插座的设计目标是补偿6号标准插头的3，6对和4，5对之间的、由电感和电容耦合引起的串话。
在PCB上的载流迹线提供在补偿和串话区域的电容耦合，电容耦合与迹线提供的电感耦合相似，只不过需要额外的电容耦合。这通过选择性地添加在如图12-14所示的载流迹线的上方或下方的电容性板提供。
图12a和图12b显示了电容性板添加到如图8所示的PCB的载流迹线的部分的设计。
图13是添加了电容性板的如图8所示的PCB的布局的示意性正视图。
图14是沿图13中A-A线的图13的PCB的示意性剖视图。
该设计提供相对紧凑的PCB表面形状。它利用载流迹线提供在补偿和串话区域中都需要的电感和电容耦合。
每处电容耦合的位置由载流迹线和相关的电容性板之间的连接位置控制。每处电容耦合的数量由平行于载流迹线的电容性板的长度决定。
电容耦合矢量原点位置大约就是电感耦合矢量的原点位置，但是电感耦合与电容耦合是独立地被平衡的。
标准插头的耦合做如下计算：
电感耦合：1.428nH
电容耦合：.936pF
插座PCB设计的设计参数目标是：
区域        区域长度  电感耦合   电容耦合
补偿区域    .297″    3.09nH     1.812pF
中性区域    .250″    0          0
串话区域    .176″    1.830nH    1.046pF
矢量角度AB＝矢量角度BC＝32.36°
该设计通过模拟和计算确定，是样机设计的基础。为了调整样机，NEXT dB比频率的图表应该得出。首先，中性区域的长度应该变化，直到Null(-dB)最大化。假定矢量a的数量等于矢量b的数量，这使得ab等于bc。然后，补偿区域的数量应该变化，直到无功频率为500MHz。如果补偿区域的长度改变而使其数量变化，中性区域的长度必定也变化，使＜ab等于＜bc。应该明白由PCB提供的串话和补偿将是电感耦合和电容耦合的结合，以及理想的结合将匹配标准插头与插座触头的结合。
在此讲解的方法也可适用于其他对的结合。该技术方法的陈述可用于获得最适宜的阻抗以及使每对平衡到中性。
相同的PCB也将容纳用于如图15-17所示的用于穿孔接线端设计的IDC。
图15a和图15b是与如图1所示的插座相似的插座的透视图，但是接线盖已经由穿孔块13取代。
主外壳1与图1所示的插座实质上是相同的。
图16a和图16b是如图15a和图15b所示的插座的分解透视图。
IDC 14的柄与图1的插座的IDC的柄一样，但是，IDC叶片15的位置和方位已经改变。以这样的方式，较佳的IDC叶片位置和方位根据接线盖和带有公共PCB的穿孔块获得。
图17是沿图16中的A-A线的图16的插座的剖视图。
图18显示了插座触头16和触头架17的一个实施例。在触头架装配到插座外壳中之前和之后，触头和触头架的结构保持触头处于触头架中。在这个实施例中，所有奇数编号的插座触头16o具有一种独特的形状。偶数编号的插座触头16e具有另一种独特的形状，以及所有的触头具有独特的截面尺寸，由从已安装的插头到印刷电路板的相对短的导电通路，提供所需的接触力，而没有接触引起的永久变形。
另外，触头架17包含一辐射式的支架18，支架18在每个触头16下，减少在每个触头中的应力集中。
触头形状在接触插头的段16中相对地水平，从而由于容许标准插头的尺寸变化而最小化接触力的变化。
触头宽度与触头厚度的比率大约是1.8∶1。该技术矩形触头的典型情况的比率是1.3∶1。触头20的自由端受到支撑。
如果一六触头插头安装在带有上述触头的插座中，一号触头和八号触头将会损坏。为了防止这样的情况发生，在图1中的突出键21包括在插座外壳中，处于一号触头和八号触头的位置，这将防止六触头插头的安装。
在图19中所示的另一个实施例中，触头22有一可替换的设计，方便六触头插头的安装，而没有触头会损坏。触头22安装在1号和8号触头的位置。这样的触头设计包括一独特的“安全别针”圈23，“安全别针”圈23以电气的方式接触自身，触头在标号24处接近“安全别针”圈23，提供在机构灵活地结合的插头和PCB之间的短导电通路。
图20a和图20b是图19的触头的示意图。“安全别针”圈23限制在触头架17中，按照箭头所示的方向扭弯，确保在标号24处电气接触，提供电流通路26。
图19的触头22设计来最小化从插头到印刷电路板的导电通路的长度，并且使得六触头插头能安装在八触头插座中。
如图21-26中所示，有一导线对间隔器10，它在工厂中安装在插座里。在野外，电缆安装在接线盖12中，然后接线盖压入插座后部6的开口28中，端接电缆并且将导线对间隔器在邻接电缆端头处定位。
如图23所示，导线对间隔器10提供在已安装的电缆的端头附近的区域28中的线对之间的电气保护。这样的电缆部分通常没有将每对导线恰当地扭转，和/或没有给每线对恰当的屏蔽。
导线对间隔器因此减少了串话的数量和变化。
当安装好接线盖，在导线对间隔器10的端头30和已安装的电缆外壳之间有一空间29，该空间29方便了在电缆外壳和IDC之间的线对的必要的重定向。
图21-23显示了图1的未屏蔽的插座的后部。
图24-26显示了图1的插座的屏蔽的变型的后部。
在屏蔽的变型中的不同在于用图26所示的屏蔽的接线盖31替换了接线盖12，接线盖31包括如图23-26所示的塑料部分32和如图26所示的金属部分33。
图27是图1的插座的屏蔽的变型34的透视图。
图28是图27的插座的分解视图，显示了屏蔽35，主外壳1，后部外壳6，导线对间隔器10和屏蔽的接线盖31。
图29a和图29b是屏蔽的接线盖31的金属部分33的可替换的设计的透视图。
图30a和图30b是接线盖31的金属部分33的后视图和侧视图。
屏蔽的变型的设计消除了在野外安装屏蔽的要求。当电缆安装在接线盖中，电缆屏蔽连接到接线盖的金属部分。
当接线盖安装在插座本体内，接线盖31的金属部分33连接到插座保护层
这样的应变消除/接地盖组件提供一种装置，此装置使屏蔽的电缆在插座中紧固，以及使已安装的电缆的保护层电气地连接到插座的保护层。这种设计可容纳大范围的电缆直径。
应变消除/接地盖组件的安装：
1.按照下面的说明步骤来准备电缆：
-去掉外壳，1.5″-2″
-将编织物向后折叠在外壳上-缠绕物超出外壳
-每盖/导体方位(比如568B)定位一对
2.导线对馈送通过接地盖并定向，在每根线将进入线槽时去掉屏蔽箔，将线弯曲90°，插入线槽中，然后切断。
3.接线盖组件定位在插座外壳的后面，并用一安装工具或钳子压入(没有显示)。
4.弹簧夹完全地与钳子或同样的工具结合，确保在电缆的编织物和接地盖之间良好地接触。
5.通过夹子/接地盖从电缆/编织物到在外壳屏蔽上的弹簧片接地。
图31是“屏蔽的接线板”36的前透视图，“屏蔽的接线板”36与图27中所示的屏蔽的插座一起使用。
图32是在图31中所示的接线板36的后透视图。
图33是接线板36的后分解透视图。
该部件包括金属框架37，塑料插入件38，带有接地指状物40的弹簧金属接地片39以及将接地片39放在网络接地41之上的机构。
图34a是接线板36的侧剖视图。
图34b是当典型的屏蔽的插座26安装有在位置41处压向插座屏蔽35的接地指状物40时接线板36的侧剖视图。

Claims (3)

1.一种用于减小在网络电缆中的多根导线之间的串话的方法，所述方法包括：
使用在插座接线盒内的印刷电路板上的第一、第二、第三和第四电气迹线，在数量和相位上抵消在所述插座接线盒内的导线与插头内的导线之间的串话，所述第一、第二、第三和第四电气迹线穿过补偿区域、串话区域和中性区域；
在位于所述补偿区域内的第二与第三电气迹线之间和第一与第四电气迹线之间提供电感耦合，所述电感耦合是通过使所述迹线彼此之间以比在所述串话区域或中性区域中相应的迹线之间的距离更靠拢的距离相互平行地延伸来形成的；
在位于所述串话区域内的第二与第四电气迹线之间和第一与第三电气迹线之间提供电感耦合，所述电感耦合是通过使所述迹线彼此之间以比在所述补偿区域或中性区域中相应的迹线之间的距离更靠拢的距离相互平行地延伸来形成的；
在所述补偿区域与所述串话区域之间提供所述中性区域，所述中性区域不会有任何特意地产生在迹线对之间的电感耦合。
2.如权利要求1所述的方法，其特征在于，在所述迹线之间提供电感耦合包括使所述迹线一起靠拢，以便在所述迹线之间产生电感耦合。
3.如权利要求1所述的方法，其特征在于，还包括用一导电间隔器分离在所述插座接线盒内的网络电缆导线，以便减少所述导线之间的串话。
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JP2007522610A (ja) 2007-08-09
ATE408253T1 (de) 2008-09-15
US20140256190A1 (en) 2014-09-11
EP1704624B1 (en) 2008-09-10
EP1704624A1 (en) 2006-09-27
CN100588047C (zh) 2010-02-03
CN101707316A (zh) 2010-05-12
CN1906816A (zh) 2007-01-31
US7726018B2 (en) 2010-06-01
JP5013877B2 (ja) 2012-08-29
JP2012146678A (ja) 2012-08-02
US20150229078A1 (en) 2015-08-13
US9287635B2 (en) 2016-03-15
US7182649B2 (en) 2007-02-27
DE602004016564D1 (de) 2008-10-23
US8715013B2 (en) 2014-05-06
US20120282818A1 (en) 2012-11-08
EP1981130A2 (en) 2008-10-15
US20100223786A1 (en) 2010-09-09
EP1981130A3 (en) 2010-11-03
US9011181B2 (en) 2015-04-21
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US20070123112A1 (en) 2007-05-31
WO2005064755A1 (en) 2005-07-14

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