CN101237182A - A method for forming the standard voltage of under-voltage lock circuit and its circuit - Google Patents

Abstract

The invention discloses an under-voltage lockout circuit of a voltage reference self-produced. The method for forming the voltage reference to compare with a sampling voltage comprises the steps of: providing a basic current supply in a power return circuit; forming a first branch circuit and a second branch circuit which are in parallel, wherein each branch circuit comprises at least one triode which is used to form a current with a positive temperature coefficient; connecting the base electrode of a first triode with the base electrode of a second triode to output the reference voltage; providing an error amplifier for clamping which is connected astride between the first branch circuit and the second branch circuit to obtain a first node and a second node in equal potential; providing a compensation resistance which is used for the reference voltage to enable the basic current with the positive temperature coefficient outputted by the parallel branches produce a voltage drop on the compensation resistance in proportion to the temperature. Due to the temperature compensation on the voltage reference self-produced, the stability of locking a threshold voltage and a lag is ensured.

Description

A kind of method and this circuit that is formed for the reference voltage of undervoltage lockout circuit

Technical field

The present invention relates to undervoltage lockout circuit, relate in particular to a kind of method and undervoltage lockout circuit thereof that is formed for the reference voltage of comparing with the power supply sampled voltage.

Background technology

In the managing chip of DC-DC power supply, stablizing of voltage is particularly important, therefore the reliability and the fail safe that need improve power supply at the integrated undervoltage lockout circuit of chip internal.For other integrated circuit, for improving the reliability and stability of circuit, undervoltage lockout circuit is equally very important.

The essence of undervoltage lockout circuit is exactly by comparing the sampled voltage of a reference voltage and power supply, exporting a control signal simultaneously.The basic principle figure of traditional undervoltage lockout circuit as shown in Figure 1.Circuit comprises a voltage sampling circuit; One comparator; One output buffer and a feedback loop.Vcc is a supply voltage to be detected, and resistance R 2, R3 and R4 form the pressure sampling circuit of Vcc, realizes the sampling to Vcc.Nmos switch pipe MN1 and resistance R 1 formed comparator, the VTH of sampled voltage Vref and MN1 compared, and the output comparative result.Reverser INV1 and INV2 form buffer circuits, can carry out shaping and buffering to the output waveform of comparator, improve the load capacity of circuit.PMOS switching tube MP1 constitutes positive feedback loop, can realize the lag function of circuit, prevents that circuit from vibrating near the threshold value of Vcc, increases the stability of system.Therefore, the size of adjustment resistance R 2, R3 and R4 can realize the Vcc under-voltage protection of different threshold values and amount of hysteresis.

, compare with VTH then to supply voltage VBAT sampling by resistance R 2, R3 and R4, judge whether to have reached lock threshold voltage VBAT (th).

$\mathrm{VBAT}\left(\mathrm{th}\right)=\mathrm{Vref}(1+\frac{R3}{R4})---\left(4\right)$

The discharge path that VREF, R3 and R4 can realize exporting when supply voltage drops to lock threshold voltage VCON semaphore lock VBAT rationally is set, and the shutoff system stops the power supply overdischarge simultaneously.In order to prevent that noise jamming from making near comparator upset back and forth lock threshold voltage, produce harmonic oscillation, comparator should have certain sluggishness.

The reference voltage V REF that traditional undervoltage lockout circuit produced will follow variation of temperature and change, and the bias current I1 that is produced will change along with supply voltage VBAT, and more serious drift built-in sluggishly takes place in that considers that influence that transistor parameter is subjected to temperature and parasitic parameter makes comparator, directly cause the lock threshold voltage drift, thereby can not strictly control the operating voltage range of power supply.

If the VBAT excursion of correspondence was enough little when we wished the control signal output of under-voltage locking at various temperatures, we just need one and change enough little reference voltage in whole temperature ranges.

Summary of the invention

Technical problem to be solved by this invention is to propose a kind of method and undervoltage lockout circuit that forms reference voltage, utilizes a band gap reference forming stable benchmark voltage, so by with supply voltage relatively export a stable control signal.

A kind of method that is formed for the reference voltage of undervoltage lockout circuit of the present invention is included in a base current source is provided in the electric power loop; Form two first and second branch roads parallel with one another, wherein this each branch road comprises a triode at least, is used to form the electric current with positive temperature coefficient; The base stage of first and second triodes is linked to each other, be used to export this reference voltage; Provide one to be used for clamped error amplifier, be connected across respectively between this first and second branch road, be used to obtain first and second nodes that two electromotive forces equate; One compensating resistance that is used for this reference voltage is provided, makes the base current with positive temperature coefficient of this parallel branch output on this compensating resistance, produce and the proportional voltage drop of temperature.

A kind of undervoltage lockout circuit of the present invention comprises: a supply voltage sample circuit is used for the variation of tracking power supply voltage; One comparator is used for sampled voltage is compared with a reference voltage;

One output buffer is used for the output waveform of this comparator is carried out shaping and buffering, to improve the load capacity of circuit, with a feedback loop, be used for increasing stability, it is characterized in that, this undervoltage lockout circuit also comprises a reference voltage output circuit, comprises the base current output circuit; First and second branch roads parallel with one another, wherein this first branch road comprises first triode at least; One is used for clamped error amplifier, is connected across respectively between this first and second branch road, is used to obtain first and second nodes that two electromotive forces equate, wherein, the continuous back of the base stage of this first and second triode is as the output of this reference voltage; A compensating resistance that is used to compensate this reference voltage makes this base current source respectively through first branch road of parallel connection and second branch road and this compensating resistance ground connection.

According to an aspect of the present invention, owing to utilized bandgap voltage reference,, guaranteed that lock threshold voltage and amount of hysteresis are stable by this is carried out temperature-compensating from producing reference voltage from producing reference voltage.

According to a further aspect in the invention, bandgap voltage reference of the present invention has also produced a bias current with independent of power voltage simultaneously, makes the frequency of oscillator in the undervoltage lockout circuit of the present invention not with the variation of supply voltage.

Description of drawings

By description, will make that technique scheme of the present invention and other advantage are apparent below in conjunction with accompanying drawing to preferred embodiment of the present invention.

Fig. 1 shows a kind of undervoltage lockout circuit of prior art;

Fig. 2 is the method that is formed for sampled voltage reference voltage relatively of the present invention;

Fig. 3 A is an embodiment of undervoltage lockout circuit of the present invention, and wherein base current provides by current mirror circuit;

Fig. 3 B is the reference voltage temperature curve of Fig. 3 A illustrated embodiment;

Fig. 4 A is another embodiment of undervoltage lockout circuit of the present invention, wherein the reference voltage that is produced is carried out temperature-compensating;

Fig. 4 B is the temperature curve to reference voltage that lock-in circuit of the present invention produces;

Fig. 4 C shows the variation schematic diagram of undervoltage lockout circuit voltage amount of hysteresis of the present invention;

Fig. 5 is another embodiment with reference voltage generating circuit of curvature compensation function of the present invention;

Fig. 6 be the reference voltage generating circuit with curvature compensation function of the present invention another embodiment.

Embodiment

Hereinafter will describe method of the present invention and circuit in detail.

Consult Fig. 2, at first, the present invention need provide a reference current source, as step S10.

Secondly,, above-mentioned electric current is offered the branch road of two parallel connections, wherein, in these two branch roads, have a triode respectively, produce electric current with the pressure reduction on the PN junction that utilizes them with positive temperature coefficient at step S12.Specifically, the present invention connects the output of back as reference voltage with the base stage of two triodes, as step S14.

Simultaneously, at step S16, the present invention need utilize one to be connected across two error amplifiers between the branch road to guarantee the electromotive force node that can obtain to equate on two branch roads.

In order to make the formed reference voltage of the present invention obtain Temperature Compensation, make that the reference voltage amount of varying with temperature of the present invention is as far as possible little, at step S18, the present invention also provides compensating resistance, make the electric current with positive temperature coefficient of mirror triode output on this resistance, produce the voltage of a compensation, to remedy the loss that this reference voltage produces with the rising of temperature.

Fig. 3 A adopts said method of the present invention and a preferred embodiment forming, and undervoltage lockout circuit 100 comprises: the voltage sampling circuit of being made up of resistance R 1, R2 and R3 110, wherein formation sampled voltage output end vo ut on resistance R 3; One reference voltage output circuit 120; A under-voltage decision circuitry 130 is exported a control signal with the result who compares with reference voltage according to this sampled voltage; One output buffer 140 and a feedback loop 150.

According to the present invention, the Vout voltage of voltage sampling circuit 110 outputs satisfies the following relationship formula:

$\mathrm{Vout}=\frac{R3}{R2+R3}\mathrm{VBAT}$ Formula (2)

Therefore, this sampled voltage can be used to follow the variation of supply voltage VBAT.

According to a preferred embodiment of the present invention, reference voltage output circuit be utilize two mutually the CMOS pipe MP3 and the MP4 of coupling form mirror image circuits, produce one constant, not with the bias current Ib of mains voltage variations to guarantee the circuit operate as normal.Simultaneously, the present invention utilizes the error amplifier of an imaginary short to be connected across and obtains node P02 and the P03 that electromotive force equates between this mirror image circuit.Insert a resistive element R therein in the node (P03) ₅Insert a triode Q2 with a triode Q1 with in another node P02.So, resulting reference current Ib has positive temperature coefficient in this reference voltage output circuit 120, as shown in the formula:

$\mathrm{Ib}=\frac{\mathrm{\Δbe}}{R5}=\frac{V_T\ln N}{R5}$ Formula (3)

Wherein N is the area ratio of triode Q1 and Q2 emitter.

Specifically, the present invention is with triode Q1 and node P01 after Q2 links to each other, as the output of reference voltage.Importantly, for making this reference voltage be compensated, the present invention provides a compensating resistance R4 at the output of parallel branch.Like this, undervoltage lockout circuit of the present invention 100 satisfies relational expression from the reference voltage V (P01) that produce:

V (P01)=VBE1+Ib (R5+2R4) formula (4)

Wherein VEB1 has negative temperature coefficient, and Ib has positive temperature coefficient, and as seen, by introducing resistance R 4, reference voltage V (P01) has obtained efficient temperature compensation (shown in Fig. 3 B).

More particularly, the present invention links to each other sampled voltage output end vo ut with reference voltage output end P01 node.

In order to make the present invention in bigger temperature range, reference voltage V (P01) varies with temperature can be as far as possible little.The present invention has utilized NPN triode Qcom to form a diode syndeton, oppositely inserts between node P02 and P01, to make full use of the characteristic that the diode reverse saturation current is the responsive to temperature function, that is:

$I_{\mathrm{SS}}=\frac{\mathrm{qA}{\stackrel{\‾}{D}}_n{n_i}^2}{Q_B}$ Formula (5)

I wherein _SSBe the PN junction reverse saturation current; Q is an electron charge; A is the PN junction sectional area;

Be electronics average diffusion constant; n _iIntrinsic carrier concentration for silicon; QB is the foreign atom number in the unit are in the PN junction.The temperature rising can make silicon intrinsic excitation intensity enhancing, makes n _iAdd with temperature, make reverse saturation current ISS simultaneously with n _i ²Increase, under certain process conditions

, QB is positive real constant, establishes ${\mathrm{<figure-callout\; id="1"\; label="k"\; filenames="S2008100578656E00031.png,S2008100578656E00041.png"\; state="\{\{state\}\}">k</figure-callout>}}_1=\frac{q{\stackrel{\&OverBar;}{D}}_n}{Q_B}$ , then formula (5) can be write as:

$I_{\mathrm{SS}}=\frac{\mathrm{qA}{\stackrel{\&OverBar;}{D}}_n{n_i}^2}{Q_B}=k_{1}A{n_i}^2$ Formula (6)

Intrinsic carrier density is:

$n_i=\sqrt{N_c{N}_v}\exp (-E_i/2\mathrm{KT})=4.82\&times;{10}^{15}{\left(\frac{m{*}_{p}m{*}_{\mathrm{<figure-callout\; id="2"\; label="n\; m"\; filenames="S2008100578656E00041.png,S2008100578656E00051.png"\; state="\{\{state\}\}">n</figure-callout>}}}{{m^{}}_{}}\right)}^{3/4}{T}^{3/2}\exp (-\frac{E_g}{2k_{0}T})$ Formula (7)

M* wherein _p, m* _nBe respectively top of valence band hole effective mass and conduction band bottom electron effective mass; M0 is the electron inertia quality; Eg is an energy gap; K0 is a Boltzmann constant.If positive constant

${\mathrm{<figure-callout\; id="2"\; label="k"\; filenames="S2008100578656E00041.png,S2008100578656E00051.png"\; state="\{\{state\}\}">k</figure-callout>}}_2=4.82\&times;{10}^{15}{\left(\frac{m{*}_{p}m{*}_{\mathrm{<figure-callout\; id="2"\; label="n\; m"\; filenames="S2008100578656E00041.png,S2008100578656E00051.png"\; state="\{\{state\}\}">n</figure-callout>}}}{{m^{}}_{}}\right)}^{3/4}$ , then:

${{\mathrm{<figure-callout\; id="2"\; label="n\; i"\; filenames="S2008100578656E00041.png,S2008100578656E00051.png"\; state="\{\{state\}\}">n</figure-callout>}}_i}^2={\&lsqb;k_2{T}^{3/2}\exp (-\frac{E_g}{2k_{0}T})\&rsqb;}^2={{\mathrm{<figure-callout\; id="2"\; label="k"\; filenames="S2008100578656E00041.png,S2008100578656E00051.png"\; state="\{\{state\}\}">k</figure-callout>}}^2}_2{T}^3\exp (-\frac{E_g}{k_{0}T})$ Formula (8)

$I_{\mathrm{SS}}=k_1\mathrm{<figure-callout\; id="2"\; label="A\; k"\; filenames="S2008100578656E00041.png,S2008100578656E00051.png"\; state="\{\{state\}\}">A</figure-callout>}{k_{}}^{}{{}_2}^2{T}^3\exp (-\frac{E_g}{k_{0}T})$ Formula (9)

D1 reverse saturation current I _SSFlow through the simultaneously base stage of Q1 and Q2 behind Q1 and Q2, can be exaggerated β simultaneously ₁And β ₂Be collector current doubly.Use principle of stacking to obtain:

$\mathrm{VREF}=2\frac{\mathrm{kT}}{q}\frac{R4}{R5}\ln N+{\mathrm{<figure-callout\; id="1"\; label="V\; BE"\; filenames="S2008100578656E00031.png,S2008100578656E00041.png"\; state="\{\{state\}\}">V</figure-callout>}}_{\mathrm{BE}}+({\mathrm{<figure-callout\; id="1"\; label="I\; ss"\; filenames="S2008100578656E00031.png,S2008100578656E00041.png"\; state="\{\{state\}\}">I</figure-callout>}}_{\mathrm{ss}}{\mathrm{\&beta;}}_1+I_{\mathrm{<figure-callout\; id="2"\; label="ss"\; filenames="S2008100578656E00041.png,S2008100578656E00051.png"\; state="\{\{state\}\}">ss</figure-callout>}2}{\mathrm{\&beta;}}_2)R4$ Formula (10)

I wherein _SS=I _SS1+ I _SS2If I _SS1=(1-k ₃) I _SS, I _SS2=k ₃I _SS(0＜k ₃＜1)

So, the expression formula through the reference voltage after the temperature-compensating is:

$\mathrm{VREF}=2\frac{\mathrm{kT}}{q}\frac{R4}{R5}\ln N+{\mathrm{<figure-callout\; id="1"\; label="V\; BE"\; filenames="S2008100578656E00031.png,S2008100578656E00041.png"\; state="\{\{state\}\}">V</figure-callout>}}_{\mathrm{BE}}+\&lsqb;1-k_3{\mathrm{\&beta;}}_1+k_3{\mathrm{\&beta;}}_2\&rsqb;R4k_{1}A{{\mathrm{<figure-callout\; id="2"\; label="k"\; filenames="S2008100578656E00041.png,S2008100578656E00051.png"\; state="\{\{state\}\}">k</figure-callout>}}_2}^2{T}^3\exp (-\frac{E_g}{k_{0}T})$ Formula (11)

K wherein ₁, k ₂Be positive real constant, 0＜k ₃＜1.

As seen, after temperature raises, the diode reverse saturation current will be injected into Q1, and the base stage V of Q2 (P01) is exaggerated the back and measures in the compensation that forms the reference voltage reduction on the R4, and the reference voltage when having suppressed high temperature reduces, and consults Fig. 4 B.

Under-voltage decision circuitry 130 is made up of CMOS pipe M1, M2, M5 and M8.CMOS pipe M5 and M8 as second level input can be equal to a difference input, with this CMOS pipe M5 and opposite polarity CMOS pipe M1 of M8 and M2, form second level load current mirror, join with this CMOS pipe (M5 and M8) respectively.Therefore, on the one hand because the clamper that the M3 diode connects, P03 will follow the VBAT change in voltage, the P03 level will be higher than the P02 level when supply voltage VBAT is higher than lock threshold voltage VBAT (th), so VCON exports high level, represent not under-voltage, when supply voltage is lower than lock threshold voltage VBAT (th), the VCON output low level.Lock threshold voltage VBAT (th) can be by adjusting R1, and R2 changes.On the other hand, because the performance of this CMOS pipe M5 and the CMOS pipe M3 and the M4 of this base current output circuit are complementary, therefore, CMOS pipe M5 can be used for this base current of mirror image (Ib).

Specifically, lock-in circuit of the present invention also comprises the output branch road of an electric current, promptly utilizes the bias current that produces among CMOS pipe (M6) mirror image M3, with one of the further output current Ib 1 with independent of power voltage.

More particularly, lock-in circuit of the present invention is the current Ib 2 of one of output and independent of power voltage further, is by CMOS pipe (M7), is used for the electric current that mirror image CMOS manages M1.

Sluggish circuit 150P type field COMS pipe M9 and resistance R 1 formation of producing.When power supply was not under-voltage, V (P03) was a high level, and M9 opens, and R1 is by short circuit, and the line lock threshold voltage is:

$\mathrm{VBAT}(\mathrm{th}\_\mathrm{down})=(1+\frac{R2}{R3})V\left(P01\right)$ Formula (12)

Otherwise R1 is not by short circuit, and the electric power starting threshold voltage is:

$\mathrm{VBAT}(\mathrm{th}\_\mathrm{up})=(1+\frac{\mathrm{<figure-callout\; id="2"\; label="R"\; filenames="S2008100578656E00041.png,S2008100578656E00051.png"\; state="\{\{state\}\}">R</figure-callout>}2+R1}{R3})V\left(P01\right)$ Formula (13)

(12) formula and (13) formula show that threshold voltage when supply voltage is locked will be lower than the threshold voltage when opening, and the difference of the two is voltage amount of hysteresis Vhyster, that is:

$V_{\mathrm{hyster}}=\mathrm{VBAT}\left(\mathrm{th}2\right)+\mathrm{VBAT}\left(\mathrm{th}1\right)=\frac{R1}{R3}V\left(P01\right)$ Formula (14)

As seen, this amount of hysteresis is only relevant with resistance ratio with reference voltage V (P01), and the present invention is described, and to have guaranteed that amount of hysteresis varies with temperature enough little through the reference voltage of temperature-compensating with the irrelevant resistance ratio of technology, consults Fig. 4 C.

In another preferred embodiment of the present invention, base current can also utilize a triode Q3 to provide, because triode can produce stable emitter---collector current, consults Fig. 5.Insert the branch road of two parallel connections at the emitter of triode Q3, one of them comprises triode Q1 and resistance R 3, and another branch road is triode Q2 and resistance R 4.Then, the node P03 after the base stage of triode Q1 and Q2 is linked to each other is as the output of reference voltage V ref; Utilize error amplifier OPAMP to guarantee that node P01 and P02 electromotive force equate.At last, utilize compensating resistance R1 to compensate the loss that Vref produces with stable rising again.

Because the imaginary short of error amplifier input stage makes P01=P02, then resistance R 3 is identical with the voltage drop on the R4, as following relational expression:

I ₁* R ₃=I ₂* R ₄Formula (15)

Simultaneously the base voltage of Q1 and Q2 is at same current potential, so

$\mathrm{\&Delta;}{V}_{\mathrm{BE}}=V_{\mathrm{BE}1}-{\mathrm{<figure-callout\; id="2"\; label="V\; BE"\; filenames="S2008100578656E00041.png,S2008100578656E00051.png"\; state="\{\{state\}\}">V</figure-callout>}}_{\mathrm{BE}}=\frac{\mathrm{kT}}{q}\&times;\ln \frac{I1\&times;I_{\mathrm{SS}2}}{I2\&times;{\mathrm{<figure-callout\; id="1"\; label="I\; SS"\; filenames="S2008100578656E00031.png,S2008100578656E00041.png"\; state="\{\{state\}\}">I</figure-callout>}}_{\mathrm{SS}}}=\frac{\mathrm{kT}}{q}\&times;\ln N=I_2\&times;{\mathrm{<figure-callout\; id="2"\; label="R"\; filenames="S2008100578656E00041.png,S2008100578656E00051.png"\; state="\{\{state\}\}">R</figure-callout>}}_2$ Formula (16)

N is the ratio that flows through the current density of Q1 and Q2.Reference voltage V _REFFor:

$V_{\mathrm{REF}}=\mathrm{<figure-callout\; id="1"\; label="R"\; filenames="S2008100578656E00031.png,S2008100578656E00041.png"\; state="\{\{state\}\}">R</figure-callout>}1\&times;(I_1+I_2)+V_{\mathrm{BE}1}=2\frac{\mathrm{kT}}{q}\frac{R1}{\mathrm{<figure-callout\; id="2"\; label="R"\; filenames="S2008100578656E00041.png,S2008100578656E00051.png"\; state="\{\{state\}\}">R</figure-callout>}2}\ln N+{\mathrm{<figure-callout\; id="1"\; label="V\; BE"\; filenames="S2008100578656E00031.png,S2008100578656E00041.png"\; state="\{\{state\}\}">V</figure-callout>}}_{\mathrm{BE}}$ Formula (17)

Specifically, the output P03 that the present invention has utilized diode D1 oppositely to insert at P01 node and reference voltage comes standard of compensation voltage to effectively utilize its reverse saturation current.

Another preferred embodiment of the present invention as shown in Figure 6, different is, between the node P04 that compensation diode D1 of the present invention can also oppositely insert two parallel branches and the output P03 of reference voltage.

Certainly; the present invention also can have other various embodiments; under the situation that does not deviate from spirit of the present invention and essence thereof; being familiar with those of ordinary skill in the art ought can make various corresponding changes and distortion according to the present invention, but these corresponding changes and distortion all should belong to the protection range of the appended claim of the present invention.

Claims (21)

1, a kind of method that is formed for the reference voltage of undervoltage lockout circuit comprises

A base current source is provided in electric power loop;

Form two first and second branch roads parallel with one another, wherein this each branch road comprises a triode at least, is used to form the electric current with positive temperature coefficient;

The base stage of first and second triodes is linked to each other, be used to export this reference voltage;

Provide one to be used for clamped error amplifier, be connected across respectively between this first and second branch road, be used to obtain first and second nodes that two electromotive forces equate;

One compensating resistance that is used for this reference voltage is provided, makes the base current with positive temperature coefficient of this parallel branch output on this compensating resistance, produce and the proportional voltage drop of temperature.

2, method according to claim 1 is characterized in that, provides the step in a base current source to comprise in electric power loop

Provide a triode that joins with voltage source, to obtain a stable electric current when this triode normally.

3, method according to claim 2 is characterized in that, this method also comprises

In first branch road and second branch road, be connected first resistive element and second resistive element respectively, be used for obtaining the electromotive force that equates at this first and second node.

4, method according to claim 3 is characterized in that, this method also comprises

A curvature compensation element is provided, oppositely inserts between the base stage of this first node and two triodes.

5, method according to claim 3 is characterized in that, this method also comprises

A curvature compensation element is provided, oppositely inserts between the base stage of the sys node of this first and second branch road and two triodes.

6, method according to claim 1 is characterized in that, provides the step in a base current source to comprise in electric power loop

In electric power loop, provide the CMOS pipe of two Performance Match to form current mirroring circuit.

7, method according to claim 6 is characterized in that, this method also comprises

A curvature compensation element is provided, oppositely inserts between the base stage of this first node and two triodes.

According to claim 4,5 or 7 described methods, it is characterized in that 8, the positive input of this error amplifier is connected with this first node.

9, method according to claim 8 is characterized in that, this method also comprises

In this second branch road, insert one and regulate resistive element.

10, a kind of undervoltage lockout circuit comprises:

One supply voltage sample circuit is used for the variation of tracking power supply voltage;

One comparator is used for sampled voltage is compared with a reference voltage;

One output buffer is used for the output waveform of this comparator is carried out shaping and buffering, with the load capacity that improves circuit and

One feedback loop is used for increasing stability, it is characterized in that this undervoltage lockout circuit also comprises

One reference voltage output circuit comprises

The base current output circuit;

First and second branch roads parallel with one another, wherein this first branch road comprises first triode at least;

One is used for clamped error amplifier, is connected across respectively between this first and second branch road, is used to obtain first and second nodes that two electromotive forces equate, wherein, the continuous back of the base stage of this first and second triode is as the output of this reference voltage;

A compensating resistance that is used to compensate this reference voltage makes this base current source respectively through first branch road of parallel connection and second branch road and this compensating resistance ground connection.

11, undervoltage lockout circuit according to claim 10 is characterized in that, this base current output circuit comprises a triode that is connected with power supply, and wherein the collector loop of this triode inserts this first branch road and second branch road respectively.

12, undervoltage lockout circuit according to claim 11 is characterized in that, comprises first resistive element and second resistive element in first branch road and second branch road respectively, is used for obtaining equal electromotive force at this first and second node.

13, undervoltage lockout circuit according to claim 12 is characterized in that, also comprises a curvature compensation element, oppositely inserts between the base stage of this first node and two triodes.

14, undervoltage lockout circuit according to claim 12 is characterized in that, also comprises a curvature compensation element, oppositely inserts between the base stage of the sys node of this first and second branch road and two triodes.

15, undervoltage lockout circuit according to claim 10 is characterized in that, the base current output circuit is one to form a current mirror circuit with stable bias current (Ib) by the CMOS of two Performance Match pipe (M3 and M4).

16, undervoltage lockout circuit according to claim 15 is characterized in that, also comprises a curvature compensation element (Qcom), oppositely inserts between the base stage of this first node and two triodes.

According to claim 13,14 or 16 described undervoltage lockout circuits, it is characterized in that 17, the positive input of this error amplifier is connected with this first node (P01).

18, undervoltage lockout circuit according to claim 16 is characterized in that, the output of this supply voltage sample circuit links to each other with the output of this reference voltage.

According to claim 15 or 16 described undervoltage lockout circuits, it is characterized in that 19, this lock-in circuit also comprises one first output branch road, is provided with

The one CMOS pipe (M6) that joins with power supply, the CMOS pipe (M3 and M4) of performance and this base current output circuit is complementary, and is used for this base current of mirror image (Ib) output current (Ib1) afterwards.

20, according to claim 15 or 16 described undervoltage lockout circuits, it is characterized in that described comparator comprises

Two CMOS pipes (M5 and M8) as second level input join with power supply respectively, and wherein this CMOS manages (M5), and the CMOS pipe (M3 and M4) of performance and this base current output circuit is complementary, and is used for this base current of mirror image (Ib);

Form the CMOS pipe (M1 and M2) of second level load current mirror, join with this CMOS pipe (M5 and M8) respectively, and opposite with this CMOS pipe (M5 and M8) polarity.

21, undervoltage lockout circuit according to claim 20 is characterized in that, this lock-in circuit also comprises one first output branch road, is provided with

One CMOS manages (M7), and the CMOS pipe (M1 and M2) of performance and load current mirror is complementary, and is used for this base current of mirror image (Ib) back output Ib2.

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