CN105739588A - Temperature compensating circuit and method for AMR magnetic switch circuit - Google Patents
Temperature compensating circuit and method for AMR magnetic switch circuit Download PDFInfo
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- CN105739588A CN105739588A CN201610064978.3A CN201610064978A CN105739588A CN 105739588 A CN105739588 A CN 105739588A CN 201610064978 A CN201610064978 A CN 201610064978A CN 105739588 A CN105739588 A CN 105739588A
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- G05—CONTROLLING; REGULATING
- G05F—SYSTEMS FOR REGULATING ELECTRIC OR MAGNETIC VARIABLES
- G05F1/00—Automatic systems in which deviations of an electric quantity from one or more predetermined values are detected at the output of the system and fed back to a device within the system to restore the detected quantity to its predetermined value or values, i.e. retroactive systems
- G05F1/10—Regulating voltage or current
- G05F1/46—Regulating voltage or current wherein the variable actually regulated by the final control device is DC
- G05F1/56—Regulating voltage or current wherein the variable actually regulated by the final control device is DC using semiconductor devices in series with the load as final control devices
- G05F1/565—Regulating voltage or current wherein the variable actually regulated by the final control device is DC using semiconductor devices in series with the load as final control devices sensing a condition of the system or its load in addition to means responsive to deviations in the output of the system, e.g. current, voltage, power factor
- G05F1/567—Regulating voltage or current wherein the variable actually regulated by the final control device is DC using semiconductor devices in series with the load as final control devices sensing a condition of the system or its load in addition to means responsive to deviations in the output of the system, e.g. current, voltage, power factor for temperature compensation
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Abstract
The invention discloses a temperature compensating circuit and method for an AMR magnetic switch circuit.The temperature compensating circuit comprises a first voltage generation module and a second voltage generation module; the first voltage generation module is used for generating a first voltage for determination of an AMR bias voltage; the first voltage is a reference voltage generated by a band-gap reference circuit; the second voltage generation module is used for generating a second voltage for determination of a comparator threshold voltage; the second voltage is a reference voltage with a negative temperature coefficient, that is, when the temperature rises, the second voltage drops.According to the temperature compensating circuit and method for the AMR magnetic switch circuit, by compensating for the temperature drift of an AMR element, the temperature characteristic of a magnetic switch tipping point is improved, and magnetic parameters of the magnetic switch tipping point are made to keep good uniformity within a broad temperature range.The temperature compensating circuit is realized by adding a simple bypass to the traditional band-gap reference circuit to generate a reference current with a negative temperature coefficient; the realization method is simple, and the area and power of the added circuit are small.
Description
Technical field
The invention belongs to AMR magnetic switch technical field, relate to a kind of AMR magnetic switch circuit, particularly relate to the temperature-compensation circuit of a kind of AMR magnetic switch circuit；Meanwhile, the invention still further relates to the temperature compensation of a kind of AMR magnetic switch circuit.
Background technology
Anisotropic magnetic resistance element (AnisotropicMagneto-Resistive is called for short AMR) is the important magnetic sensor element for detecting magnetic field.It is widely used in automobile, Industry Control, household electrical appliances, in communication apparatus, is used for detecting the information such as speed, angle, position.Compared with traditional Hall effect element, AMR has the good characteristics such as low in energy consumption, sensitivity is high.But the temperature drift of AMR self is relatively larger.Its sensitivity can reduce with the rising of temperature, and typical temperature coefficient can reach-3000ppm/K to-4000ppm/K.If the temperature drift of AMR element is not compensated, the characteristic of sensor can be produced significant impact by it.
Fig. 1 shows favour stone (Wheatstonebridge) electric bridge being made up of 4 AMR element.Its operation principle is after being loaded with certain bias voltage VBIAS, its differential voltage output VOUT=VP-VN, can change with the intensity of externally-applied magnetic field.By detecting the size of VOUT, it is possible to the power of external magnetic field detected.
Fig. 2 shows that a kind of existing application AMR detects the magnetic switch circuit of external magnetic field output low and high level.Not having external magnetic field to be, it exports a fixing high level.When there being external magnetic field, the differential voltage VOUT that AMR bridge is produced by it is judged by comparator after amplifying, and when VOUT reaches certain threshold value VREF, circuit is by output low level.In this circuit, the bias voltage VBIAS of AMR and the threshold voltage VREF of comparator is fixing, so when variations in temperature causes AMR exporting change, the upset point (namely export by high step-down or uprised corresponding magnetic field intensity by low) of magnetic switch will change with temperature.This is the situation needing to be avoided in its application.
In view of this, nowadays in the urgent need to designing a kind of new AMR magnetic switch circuit, in order to overcome the drawbacks described above that existing AMR magnetic switch circuit exists.
Summary of the invention
The technical problem to be solved is: provide the temperature-compensation circuit of a kind of AMR magnetic switch circuit, can improve the temperature characterisitic of magnetic switch upset point so that it is magnetic parameter keeps good concordance in wide temperature range.
Additionally, the present invention also provides for the temperature compensation of a kind of AMR magnetic switch circuit, the temperature characterisitic of magnetic switch upset point can be improved so that it is magnetic parameter keeps good concordance in wide temperature range.
For solving above-mentioned technical problem, the present invention adopts the following technical scheme that
The temperature-compensation circuit of a kind of AMR magnetic switch circuit, described temperature-compensation circuit includes: the first voltage generation module, the second voltage generation module；
Described first voltage generation module determines the first voltage Vbg of AMR bias voltage in order to generate；The reference voltage that first voltage Vbg is produced by band-gap reference circuit, it does not change with the change of supply voltage or temperature；
Described second voltage generation module determines the second voltage of comparator threshold voltage in order to generate；Second voltage Vpt is a reference voltage with negative temperature coefficient, and namely when temperature is raised, the second voltage Vpt can decline；When the temperature coefficient of the second voltage Vpt and the temperature coefficient of AMR are equal, owing to the output of AMR and the threshold value of comparator vary with temperature simultaneously, the upset point of magnetic switch will not change with temperature, thus carrying out temperature-compensating；
Described temperature-compensation circuit specifically includes the first NMOS tube M1, the second NMOS tube M2, the 3rd PMOS M3, the 4th PMOS M4, the 5th PMOS M5, the 6th NMOS tube M6, the 7th PMOS M7, the 8th PMOS M8, the first audion Q1, the second audion Q2, the first resistance R1, the second resistance R2, the 3rd resistance R3, the 4th resistance R4, the 5th resistance R5, the 6th resistance R6, the 7th resistance Rbg；
Supply voltage VDD connects the source electrode of the source electrode of described 7th PMOS M7, the source electrode of the 5th PMOS M5, the source electrode of the 3rd PMOS M3, the source electrode of the 4th PMOS M4, the 8th PMOS M8 respectively；
The drain electrode of described 7th PMOS M7 connects first end of the 5th resistance R5, and second end of the 5th resistance R5 connects first end of the 6th resistance R6, the second end ground connection of the 6th resistance R6；The second voltage Vpt is formed between 5th resistance R5, the 6th resistance R6；
The grid of described 7th PMOS M7 connects the drain electrode of the grid of the 5th PMOS M5, the drain electrode of the 5th PMOS M5, the 6th NMOS tube M6, and the source electrode of the 6th NMOS tube M6 passes through the 4th resistance R4 ground connection；The grid of the 6th NMOS tube M6 connects the first NMOS tube M1；
The grid of described 3rd PMOS M3 connects the drain electrode of the grid of the 4th PMOS M4, the 3rd PMOS M3；The drain electrode of the 3rd PMOS M3 connects the drain electrode of the first NMOS tube M1；The source electrode of the first NMOS tube M1 connects the colelctor electrode of first end of the second resistance R2, the first audion Q1；The base stage of the first audion Q1 connects the colelctor electrode of the first audion Q1, the grounded emitter of the first audion Q1；
The drain electrode of described 4th PMOS M4 connects the grid of the drain electrode of the second NMOS tube M2, the grid of the second NMOS tube M2, the first NMOS tube M1；The source electrode of the second NMOS tube M2 connects first end of first end of the first resistance R1, the 3rd resistance R3；The second end ground connection of the 3rd resistance R3, second end of the first resistance R1 connects the base stage of the colelctor electrode of the second audion Q2, the second audion Q2, the grounded emitter of the second audion Q2；
The grid of described 8th PMOS M8 connects first end of drain electrode connection the 7th resistance Rbg of the 4th PMOS M4, the 8th PMOS M8, the second end ground connection of the 7th resistance Rbg；The first voltage Vbg is formed between the drain electrode of the 8th PMOS M8, the 7th resistance Rbg；
By the electric current of the second resistance R2, there is negative temperature coefficient, by the electric current of the first audion Q1, there is positive temperature coefficient, when the two cancels each other, they and electric current there is zero-temperature coefficient, this electric current becomes output reference current Ibg by the first current mirror, and the first current mirror includes M3 and M8；
By selecting the 4th suitable resistance R4 resistance to make the electric current flowing through the 6th NMOS tube M6 and the first NMOS tube M1 equal, then the source voltage of the 6th NMOS tube M6 is equal to the Vbg of the first audion Q1, owing to Vbg has negative temperature coefficient, the electric current now by the 4th resistance R4 is also provided with negative temperature coefficient；Then obtaining output reference current Ipt again through the second current mirror, the second current mirror includes M5 and M7, and it has negative temperature coefficient too；Want to make the temperature coefficient of Ipt reach consistent with the temperature coefficient of AMR, the Aspect Ratio of the 6th NMOS tube M6 and the first NMOS tube M1 and the resistance ratio of the 4th resistance R4 and the first resistance R1 are finely tuned.
The temperature-compensation circuit of a kind of AMR magnetic switch circuit, described temperature-compensation circuit includes: the first voltage generation module, the second voltage generation module；
Described first voltage generation module determines the first voltage Vbg of AMR bias voltage in order to generate；The reference voltage that first voltage Vbg is produced by band-gap reference circuit；
Described second voltage generation module determines the second voltage of comparator threshold voltage in order to generate；Second voltage Vpt is a reference voltage with negative temperature coefficient, and namely when temperature is raised, the second voltage Vpt declines.
As a preferred embodiment of the present invention, the first voltage Vbg that described first voltage generation module generates does not change with the change of supply voltage or temperature.
As a preferred embodiment of the present invention, when the temperature coefficient of the second voltage Vpt and the temperature coefficient of AMR are equal, owing to the output of AMR and the threshold value of comparator vary with temperature simultaneously, the upset point of magnetic switch will not change with temperature, thus carrying out temperature-compensating.
As a preferred embodiment of the present invention, described temperature-compensation circuit specifically includes the first NMOS tube M1, the second NMOS tube M2, the 3rd PMOS M3, the 4th PMOS M4, the 5th PMOS M5, the 6th NMOS tube M6, the 7th PMOS M7, the 8th PMOS M8, the first audion Q1, the second audion Q2, the first resistance R1, the second resistance R2, the 3rd resistance R3, the 4th resistance R4, the 5th resistance R5, the 6th resistance R6, the 7th resistance Rbg；
Supply voltage VDD connects the source electrode of the source electrode of described 7th PMOS M7, the source electrode of the 5th PMOS M5, the source electrode of the 3rd PMOS M3, the source electrode of the 4th PMOS M4, the 8th PMOS M8 respectively；
The drain electrode of described 7th PMOS M7 connects first end of the 5th resistance R5, and second end of the 5th resistance R5 connects first end of the 6th resistance R6, the second end ground connection of the 6th resistance R6；The second voltage Vpt is formed between 5th resistance R5, the 6th resistance R6；
The grid of described 7th PMOS M7 connects the drain electrode of the grid of the 5th PMOS M5, the drain electrode of the 5th PMOS M5, the 6th NMOS tube M6, and the source electrode of the 6th NMOS tube M6 passes through the 4th resistance R4 ground connection；The grid of the 6th NMOS tube M6 connects the first NMOS tube M1；
The grid of described 3rd PMOS M3 connects the drain electrode of the grid of the 4th PMOS M4, the 3rd PMOS M3；The drain electrode of the 3rd PMOS M3 connects the drain electrode of the first NMOS tube M1；The source electrode of the first NMOS tube M1 connects the colelctor electrode of first end of the second resistance R2, the first audion Q1；The base stage of the first audion Q1 connects the colelctor electrode of the first audion Q1, the grounded emitter of the first audion Q1；
The drain electrode of described 4th PMOS M4 connects the grid of the drain electrode of the second NMOS tube M2, the grid of the second NMOS tube M2, the first NMOS tube M1；The source electrode of the second NMOS tube M2 connects first end of first end of the first resistance R1, the 3rd resistance R3；The second end ground connection of the 3rd resistance R3, second end of the first resistance R1 connects the base stage of the colelctor electrode of the second audion Q2, the second audion Q2, the grounded emitter of the second audion Q2；
The grid of described 8th PMOS M8 connects first end of drain electrode connection the 7th resistance Rbg of the 4th PMOS M4, the 8th PMOS M8, the second end ground connection of the 7th resistance Rbg；The first voltage Vbg is formed between the drain electrode of the 8th PMOS M8, the 7th resistance Rbg.
A kind of temperature compensation of AMR magnetic switch circuit, described temperature compensation includes:
First voltage generation module generates the first voltage Vbg determining AMR bias voltage；The reference voltage that first voltage Vbg is produced by band-gap reference circuit；
Second voltage generation module generates the second voltage determining comparator threshold voltage；Second voltage Vpt is a reference voltage with negative temperature coefficient, and namely when temperature is raised, the second voltage Vpt declines.
As a preferred embodiment of the present invention, the first voltage Vbg that described first voltage generation module generates does not change with the change of supply voltage or temperature.
As a preferred embodiment of the present invention, when the temperature coefficient of the second voltage Vpt and the temperature coefficient of AMR are equal, owing to the output of AMR and the threshold value of comparator vary with temperature simultaneously, the upset point of magnetic switch will not change with temperature, thus carrying out temperature-compensating.
As a preferred embodiment of the present invention, described temperature compensation is realized by temperature-compensation circuit；Temperature-compensation circuit specifically includes the first NMOS tube M1, the second NMOS tube M2, the 3rd PMOS M3, the 4th PMOS M4, the 5th PMOS M5, the 6th NMOS tube M6, the 7th PMOS M7, the 8th PMOS M8, the first audion Q1, the second audion Q2, the first resistance R1, the second resistance R2, the 3rd resistance R3, the 4th resistance R4, the 5th resistance R5, the 6th resistance R6, the 7th resistance Rbg；
Supply voltage VDD connects the source electrode of the source electrode of described 7th PMOS M7, the source electrode of the 5th PMOS M5, the source electrode of the 3rd PMOS M3, the source electrode of the 4th PMOS M4, the 8th PMOS M8 respectively；
The drain electrode of described 7th PMOS M7 connects first end of the 5th resistance R5, and second end of the 5th resistance R5 connects first end of the 6th resistance R6, the second end ground connection of the 6th resistance R6；The second voltage Vpt is formed between 5th resistance R5, the 6th resistance R6；
The grid of described 7th PMOS M7 connects the drain electrode of the grid of the 5th PMOS M5, the drain electrode of the 5th PMOS M5, the 6th NMOS tube M6, and the source electrode of the 6th NMOS tube M6 passes through the 4th resistance R4 ground connection；The grid of the 6th NMOS tube M6 connects the first NMOS tube M1；
The grid of described 3rd PMOS M3 connects the drain electrode of the grid of the 4th PMOS M4, the 3rd PMOS M3；The drain electrode of the 3rd PMOS M3 connects the drain electrode of the first NMOS tube M1；The source electrode of the first NMOS tube M1 connects the colelctor electrode of first end of the second resistance R2, the first audion Q1；The base stage of the first audion Q1 connects the colelctor electrode of the first audion Q1, the grounded emitter of the first audion Q1；
The drain electrode of described 4th PMOS M4 connects the grid of the drain electrode of the second NMOS tube M2, the grid of the second NMOS tube M2, the first NMOS tube M1；The source electrode of the second NMOS tube M2 connects first end of first end of the first resistance R1, the 3rd resistance R3；The second end ground connection of the 3rd resistance R3, second end of the first resistance R1 connects the base stage of the colelctor electrode of the second audion Q2, the second audion Q2, the grounded emitter of the second audion Q2；
The grid of described 8th PMOS M8 connects first end of drain electrode connection the 7th resistance Rbg of the 4th PMOS M4, the 8th PMOS M8, the second end ground connection of the 7th resistance Rbg；The first voltage Vbg is formed between the drain electrode of the 8th PMOS M8, the 7th resistance Rbg.
As a preferred embodiment of the present invention, by the electric current of the second resistance R2, there is negative temperature coefficient, by the electric current of the first audion Q1, there is positive temperature coefficient, when the two cancels each other, they and electric current there is zero-temperature coefficient, this electric current becomes output reference current Ibg by the first current mirror, and the first current mirror includes M3 and M8；
By selecting the 4th suitable resistance R4 resistance to make the electric current flowing through the 6th NMOS tube M6 and the first NMOS tube M1 equal, then the source voltage of the 6th NMOS tube M6 is equal to the Vbg of the first audion Q1, owing to Vbg has negative temperature coefficient, the electric current now by the 4th resistance R4 is also provided with negative temperature coefficient；Then obtaining output reference current Ipt again through the second current mirror, the second current mirror includes M5 and M7, and it has negative temperature coefficient too；Want to make the temperature coefficient of Ipt reach consistent with the temperature coefficient of AMR, the Aspect Ratio of the 6th NMOS tube M6 and the first NMOS tube M1 and the resistance ratio of the 4th resistance R4 and the first resistance R1 are finely tuned.
The beneficial effects of the present invention is: the temperature-compensation circuit of the AMR magnetic switch circuit that the present invention proposes and compensation method, by the temperature drift of AMR element is compensated, improve the temperature characterisitic of magnetic switch upset point so that it is magnetic parameter keeps good concordance in wide temperature range.The circuit realiration of temperature-compensating is to increase the reference current that a simple bypass produces to have negative temperature coefficient on traditional band-gap reference circuit.Realizing method simple, circuit area and the power of increase are only small.
Accompanying drawing explanation
Fig. 1: the Wheatstone bridge schematic diagram being made up of AMR element.
Fig. 2: common AMR magnetic switch circuit block diagram.
Fig. 3: the circuit block diagram of the AMR magnetic switch with temperature-compensating.
Fig. 4: add the band-gap reference circuit figure of PTAT output.
Detailed description of the invention
The preferred embodiments of the present invention are described in detail below in conjunction with accompanying drawing.
Embodiment one
Referring to Fig. 3, Fig. 4, present invention is disclosed the temperature-compensation circuit of a kind of AMR magnetic switch circuit, described temperature-compensation circuit includes: the first voltage generation module, the second voltage generation module.
Described first voltage generation module determines the first voltage Vbg of AMR bias voltage in order to generate；The reference voltage that first voltage Vbg is produced by band-gap reference circuit, it does not change with the change of supply voltage or temperature.
Described second voltage generation module determines the second voltage of comparator threshold voltage in order to generate；Second voltage Vpt is a reference voltage with negative temperature coefficient, and namely when temperature is raised, the second voltage Vpt can decline.When the temperature coefficient of the second voltage Vpt and the temperature coefficient of AMR are equal, owing to the output of AMR and the threshold value of comparator vary with temperature simultaneously, the upset point of magnetic switch will not change with temperature, thus carrying out temperature-compensating.
Referring to Fig. 4, described temperature-compensation circuit specifically includes the first NMOS tube M1, the second NMOS tube M2, the 3rd PMOS M3, the 4th PMOS M4, the 5th PMOS M5, the 6th NMOS tube M6, the 7th PMOS M7, the 8th PMOS M8, the first audion Q1, the second audion Q2, the first resistance R1, the second resistance R2, the 3rd resistance R3, the 4th resistance R4, the 5th resistance R5, the 6th resistance R6, the 7th resistance Rbg.
Supply voltage VDD connects the source electrode of the source electrode of described 7th PMOS M7, the source electrode of the 5th PMOS M5, the source electrode of the 3rd PMOS M3, the source electrode of the 4th PMOS M4, the 8th PMOS M8 respectively.
The drain electrode of described 7th PMOS M7 connects first end of the 5th resistance R5, and second end of the 5th resistance R5 connects first end of the 6th resistance R6, the second end ground connection of the 6th resistance R6；The second voltage Vpt is formed between 5th resistance R5, the 6th resistance R6.
The grid of described 7th PMOS M7 connects the drain electrode of the grid of the 5th PMOS M5, the drain electrode of the 5th PMOS M5, the 6th NMOS tube M6, and the source electrode of the 6th NMOS tube M6 passes through the 4th resistance R4 ground connection；The grid of the 6th NMOS tube M6 connects the first NMOS tube M1.
The grid of described 3rd PMOS M3 connects the drain electrode of the grid of the 4th PMOS M4, the 3rd PMOS M3；The drain electrode of the 3rd PMOS M3 connects the drain electrode of the first NMOS tube M1；The source electrode of the first NMOS tube M1 connects the colelctor electrode of first end of the second resistance R2, the first audion Q1；The base stage of the first audion Q1 connects the colelctor electrode of the first audion Q1, the grounded emitter of the first audion Q1.
The drain electrode of described 4th PMOS M4 connects the grid of the drain electrode of the second NMOS tube M2, the grid of the second NMOS tube M2, the first NMOS tube M1；The source electrode of the second NMOS tube M2 connects first end of first end of the first resistance R1, the 3rd resistance R3；The second end ground connection of the 3rd resistance R3, second end of the first resistance R1 connects the base stage of the colelctor electrode of the second audion Q2, the second audion Q2, the grounded emitter of the second audion Q2.
The grid of described 8th PMOS M8 connects first end of drain electrode connection the 7th resistance Rbg of the 4th PMOS M4, the 8th PMOS M8, the second end ground connection of the 7th resistance Rbg；The first voltage Vbg is formed between the drain electrode of the 8th PMOS M8, the 7th resistance Rbg.
By the electric current of the second resistance R2, there is negative temperature coefficient, by the electric current of the first audion Q1, there is positive temperature coefficient, when the two cancels each other, they and electric current there is zero-temperature coefficient, this electric current becomes output reference current Ibg by the first current mirror, and the first current mirror includes M3 and M8.
By selecting the 4th suitable resistance R4 resistance to make the electric current flowing through the 6th NMOS tube M6 and the first NMOS tube M1 equal, then the source voltage of the 6th NMOS tube M6 is equal to the Vbg of the first audion Q1, owing to Vbg has negative temperature coefficient, the electric current now by the 4th resistance R4 is also provided with negative temperature coefficient；Then obtaining output reference current Ipt again through the second current mirror, the second current mirror includes M5 and M7, and it has negative temperature coefficient too；Want to make the temperature coefficient of Ipt reach consistent with the temperature coefficient of AMR, the Aspect Ratio of the 6th NMOS tube M6 and the first NMOS tube M1 and the resistance ratio of the 4th resistance R4 and the first resistance R1 are finely tuned.
The present invention also discloses the temperature compensation of a kind of AMR magnetic switch circuit, and described temperature compensation includes:
First voltage generation module generates the first voltage Vbg determining AMR bias voltage；The reference voltage that first voltage Vbg is produced by band-gap reference circuit.The first voltage Vbg that described first voltage generation module generates does not change with the change of supply voltage or temperature.
Second voltage generation module generates the second voltage determining comparator threshold voltage；Second voltage Vpt is a reference voltage with negative temperature coefficient, and namely when temperature is raised, the second voltage Vpt can decline.When the temperature coefficient of the second voltage Vpt and the temperature coefficient of AMR are equal, owing to the output of AMR and the threshold value of comparator vary with temperature simultaneously, the upset point of magnetic switch will not change with temperature, thus carrying out temperature-compensating.
Described temperature compensation compensates circuit realiration by said temperature.Refer to Fig. 3, present invention is disclosed and a kind of the temperature drift of AMR can be done the circuit engineering compensated.In this circuit, the bias voltage of AMR is determined by Vbg, and the threshold voltage of comparator is determined by Vpt.Vbg is the reference voltage produced by band-gap reference circuit, and it does not change with the change of supply voltage or temperature.Vpt is a reference voltage with negative temperature coefficient, say, that when temperature is raised, Vpt can decline.When the temperature coefficient of Vpt and the temperature coefficient of AMR are equal, owing to the output of AMR and the threshold value of comparator vary with temperature simultaneously, the upset point of magnetic switch will not change with temperature, and serve the effect of temperature-compensating.
Fig. 4 discloses a kind of method producing Vbg and Vpt based on traditional band-gap reference circuit.The circuit of its right one side of something is traditional band-gap reference circuit.Basic functional principle is: have negative temperature coefficient by the electric current of R2, by the electric current of Q1, there is positive temperature coefficient, when the two cancels each other, they and electric current there is zero-temperature coefficient, this electric current by current mirror (M3 and M8) become output reference current Ibg.So the temperature coefficient of Ibg is also zero.In order to obtain the reference current with negative temperature coefficient, add now a bypass being made up of M6 and R4.Its operation principle is: by selecting suitable R4 resistance to make the electric current flowing through M6 and M1 equal, then the source voltage of M6 is equal to the Vbg of audion Q1, and owing to Vbg has negative temperature coefficient, the electric current now by R4 is also provided with negative temperature coefficient.Then obtaining output reference current Ipt again through current mirror M5 and M7, it has negative temperature coefficient too.Want to make the temperature coefficient of Ipt reach consistent with the temperature coefficient of AMR, it is possible to the Aspect Ratio of M6 and M1 and the resistance ratio of R4 and R1 are finely tuned.
Embodiment two
The temperature-compensation circuit of a kind of AMR magnetic switch circuit, described temperature-compensation circuit includes: the first voltage generation module, the second voltage generation module.
Described first voltage generation module determines the first voltage Vbg of AMR bias voltage in order to generate；The reference voltage that first voltage Vbg is produced by band-gap reference circuit；The first voltage Vbg that described first voltage generation module generates does not change with the change of supply voltage or temperature.
Described second voltage generation module determines the second voltage of comparator threshold voltage in order to generate；Second voltage Vpt is a reference voltage with negative temperature coefficient, and namely when temperature is raised, the second voltage Vpt can decline.When the temperature coefficient of the second voltage Vpt and the temperature coefficient of AMR are equal, owing to the output of AMR and the threshold value of comparator vary with temperature simultaneously, the upset point of magnetic switch will not change with temperature, thus carrying out temperature-compensating.
In sum, the temperature-compensation circuit of AMR magnetic switch circuit that the present invention proposes and compensation method, by the temperature drift of AMR element is compensated, improve the temperature characterisitic of magnetic switch upset point so that it is magnetic parameter keeps good concordance in wide temperature range.The circuit realiration of temperature-compensating is to increase the reference current that a simple bypass produces to have negative temperature coefficient on traditional band-gap reference circuit.Realizing method simple, circuit area and the power of increase are only small.
Here description of the invention and application is illustrative, is not wishing to limit the scope of the invention in above-described embodiment.The deformation of embodiments disclosed herein and change are possible, for those skilled in the art embodiment replace and the various parts of equivalence are known.It should be appreciated by the person skilled in the art that when without departing from the spirit of the present invention or substitutive characteristics, the present invention can in other forms, structure, layout, ratio, and realize with other assembly, material and parts.When without departing from the scope of the invention and spirit, it is possible to embodiments disclosed herein is carried out other deformation and changes.
Claims (10)
1. the temperature-compensation circuit of an AMR magnetic switch circuit, it is characterised in that described temperature-compensation circuit includes: the first voltage generation module, the second voltage generation module；
Described first voltage generation module determines the first voltage Vbg of AMR bias voltage in order to generate；The reference voltage that first voltage Vbg is produced by band-gap reference circuit, it does not change with the change of supply voltage or temperature；
Described second voltage generation module determines the second voltage of comparator threshold voltage in order to generate；Second voltage Vpt is a reference voltage with negative temperature coefficient, and namely when temperature is raised, the second voltage Vpt can decline；When the temperature coefficient of the second voltage Vpt and the temperature coefficient of AMR are equal, owing to the output of AMR and the threshold value of comparator vary with temperature simultaneously, the upset point of magnetic switch will not change with temperature, thus carrying out temperature-compensating；
Described temperature-compensation circuit specifically includes the first NMOS tube M1, the second NMOS tube M2, the 3rd PMOS M3, the 4th PMOS M4, the 5th PMOS M5, the 6th NMOS tube M6, the 7th PMOS M7, the 8th PMOS M8, the first audion Q1, the second audion Q2, the first resistance R1, the second resistance R2, the 3rd resistance R3, the 4th resistance R4, the 5th resistance R5, the 6th resistance R6, the 7th resistance Rbg；
Supply voltage VDD connects the source electrode of the source electrode of described 7th PMOS M7, the source electrode of the 5th PMOS M5, the source electrode of the 3rd PMOS M3, the source electrode of the 4th PMOS M4, the 8th PMOS M8 respectively；
The drain electrode of described 7th PMOS M7 connects first end of the 5th resistance R5, and second end of the 5th resistance R5 connects first end of the 6th resistance R6, the second end ground connection of the 6th resistance R6；The second voltage Vpt is formed between 5th resistance R5, the 6th resistance R6；
The grid of described 7th PMOS M7 connects the drain electrode of the grid of the 5th PMOS M5, the drain electrode of the 5th PMOS M5, the 6th NMOS tube M6, and the source electrode of the 6th NMOS tube M6 passes through the 4th resistance R4 ground connection；The grid of the 6th NMOS tube M6 connects the first NMOS tube M1；
The grid of described 3rd PMOS M3 connects the drain electrode of the grid of the 4th PMOS M4, the 3rd PMOS M3；The drain electrode of the 3rd PMOS M3 connects the drain electrode of the first NMOS tube M1；The source electrode of the first NMOS tube M1 connects the colelctor electrode of first end of the second resistance R2, the first audion Q1；The base stage of the first audion Q1 connects the colelctor electrode of the first audion Q1, the grounded emitter of the first audion Q1；
The drain electrode of described 4th PMOS M4 connects the grid of the drain electrode of the second NMOS tube M2, the grid of the second NMOS tube M2, the first NMOS tube M1；The source electrode of the second NMOS tube M2 connects first end of first end of the first resistance R1, the 3rd resistance R3；The second end ground connection of the 3rd resistance R3, second end of the first resistance R1 connects the base stage of the colelctor electrode of the second audion Q2, the second audion Q2, the grounded emitter of the second audion Q2；
The grid of described 8th PMOS M8 connects first end of drain electrode connection the 7th resistance Rbg of the 4th PMOS M4, the 8th PMOS M8, the second end ground connection of the 7th resistance Rbg；The first voltage Vbg is formed between the drain electrode of the 8th PMOS M8, the 7th resistance Rbg；
By the electric current of the second resistance R2, there is negative temperature coefficient, by the electric current of the first audion Q1, there is positive temperature coefficient, when the two cancels each other, they and electric current there is zero-temperature coefficient, this electric current becomes output reference current Ibg by the first current mirror, and the first current mirror includes M3 and M8；
By selecting the 4th suitable resistance R4 resistance to make the electric current flowing through the 6th NMOS tube M6 and the first NMOS tube M1 equal, then the source voltage of the 6th NMOS tube M6 is equal to the Vbg of the first audion Q1, owing to Vbg has negative temperature coefficient, the electric current now by the 4th resistance R4 is also provided with negative temperature coefficient；Then obtaining output reference current Ipt again through the second current mirror, the second current mirror includes M5 and M7, and it has negative temperature coefficient too；Want to make the temperature coefficient of Ipt reach consistent with the temperature coefficient of AMR, the Aspect Ratio of the 6th NMOS tube M6 and the first NMOS tube M1 and the resistance ratio of the 4th resistance R4 and the first resistance R1 are finely tuned.
2. the temperature-compensation circuit of an AMR magnetic switch circuit, it is characterised in that described temperature-compensation circuit includes: the first voltage generation module, the second voltage generation module；
Described first voltage generation module determines the first voltage Vbg of AMR bias voltage in order to generate；The reference voltage that first voltage Vbg is produced by band-gap reference circuit；
Described second voltage generation module determines the second voltage of comparator threshold voltage in order to generate；Second voltage Vpt is a reference voltage with negative temperature coefficient, and namely when temperature is raised, the second voltage Vpt declines.
3. the temperature-compensation circuit of AMR magnetic switch circuit according to claim 2, it is characterised in that:
The first voltage Vbg that described first voltage generation module generates does not change with the change of supply voltage or temperature.
4. the temperature-compensation circuit of AMR magnetic switch circuit according to claim 2, it is characterised in that:
When the temperature coefficient of the second voltage Vpt and the temperature coefficient of AMR are equal, owing to the output of AMR and the threshold value of comparator vary with temperature simultaneously, the upset point of magnetic switch will not change with temperature, thus carrying out temperature-compensating.
5. the temperature-compensation circuit of AMR magnetic switch circuit according to claim 2, it is characterised in that:
Described temperature-compensation circuit specifically includes the first NMOS tube M1, the second NMOS tube M2, the 3rd PMOS M3, the 4th PMOS M4, the 5th PMOS M5, the 6th NMOS tube M6, the 7th PMOS M7, the 8th PMOS M8, the first audion Q1, the second audion Q2, the first resistance R1, the second resistance R2, the 3rd resistance R3, the 4th resistance R4, the 5th resistance R5, the 6th resistance R6, the 7th resistance Rbg；
Supply voltage VDD connects the source electrode of the source electrode of described 7th PMOS M7, the source electrode of the 5th PMOS M5, the source electrode of the 3rd PMOS M3, the source electrode of the 4th PMOS M4, the 8th PMOS M8 respectively；
The drain electrode of described 7th PMOS M7 connects first end of the 5th resistance R5, and second end of the 5th resistance R5 connects first end of the 6th resistance R6, the second end ground connection of the 6th resistance R6；The second voltage Vpt is formed between 5th resistance R5, the 6th resistance R6；
The grid of described 7th PMOS M7 connects the drain electrode of the grid of the 5th PMOS M5, the drain electrode of the 5th PMOS M5, the 6th NMOS tube M6, and the source electrode of the 6th NMOS tube M6 passes through the 4th resistance R4 ground connection；The grid of the 6th NMOS tube M6 connects the first NMOS tube M1；
The grid of described 3rd PMOS M3 connects the drain electrode of the grid of the 4th PMOS M4, the 3rd PMOS M3；The drain electrode of the 3rd PMOS M3 connects the drain electrode of the first NMOS tube M1；The source electrode of the first NMOS tube M1 connects the colelctor electrode of first end of the second resistance R2, the first audion Q1；The base stage of the first audion Q1 connects the colelctor electrode of the first audion Q1, the grounded emitter of the first audion Q1；
The drain electrode of described 4th PMOS M4 connects the grid of the drain electrode of the second NMOS tube M2, the grid of the second NMOS tube M2, the first NMOS tube M1；The source electrode of the second NMOS tube M2 connects first end of first end of the first resistance R1, the 3rd resistance R3；The second end ground connection of the 3rd resistance R3, second end of the first resistance R1 connects the base stage of the colelctor electrode of the second audion Q2, the second audion Q2, the grounded emitter of the second audion Q2；
The grid of described 8th PMOS M8 connects first end of drain electrode connection the 7th resistance Rbg of the 4th PMOS M4, the 8th PMOS M8, the second end ground connection of the 7th resistance Rbg；The first voltage Vbg is formed between the drain electrode of the 8th PMOS M8, the 7th resistance Rbg.
6. the temperature compensation of an AMR magnetic switch circuit, it is characterised in that described temperature compensation includes:
First voltage generation module generates the first voltage Vbg determining AMR bias voltage；The reference voltage that first voltage Vbg is produced by band-gap reference circuit；
Second voltage generation module generates the second voltage determining comparator threshold voltage；Second voltage Vpt is a reference voltage with negative temperature coefficient, and namely when temperature is raised, the second voltage Vpt declines.
7. the temperature compensation of AMR magnetic switch circuit according to claim 6, it is characterised in that:
The first voltage Vbg that described first voltage generation module generates does not change with the change of supply voltage or temperature.
8. the temperature compensation of AMR magnetic switch circuit according to claim 6, it is characterised in that:
When the temperature coefficient of the second voltage Vpt and the temperature coefficient of AMR are equal, owing to the output of AMR and the threshold value of comparator vary with temperature simultaneously, the upset point of magnetic switch will not change with temperature, thus carrying out temperature-compensating.
9. the temperature compensation of AMR magnetic switch circuit according to claim 6, it is characterised in that:
Described temperature compensation is realized by temperature-compensation circuit；Temperature-compensation circuit specifically includes the first NMOS tube M1, the second NMOS tube M2, the 3rd PMOS M3, the 4th PMOS M4, the 5th PMOS M5, the 6th NMOS tube M6, the 7th PMOS M7, the 8th PMOS M8, the first audion Q1, the second audion Q2, the first resistance R1, the second resistance R2, the 3rd resistance R3, the 4th resistance R4, the 5th resistance R5, the 6th resistance R6, the 7th resistance Rbg；
Supply voltage VDD connects the source electrode of the source electrode of described 7th PMOS M7, the source electrode of the 5th PMOS M5, the source electrode of the 3rd PMOS M3, the source electrode of the 4th PMOS M4, the 8th PMOS M8 respectively；
The drain electrode of described 7th PMOS M7 connects first end of the 5th resistance R5, and second end of the 5th resistance R5 connects first end of the 6th resistance R6, the second end ground connection of the 6th resistance R6；The second voltage Vpt is formed between 5th resistance R5, the 6th resistance R6；
The grid of described 7th PMOS M7 connects the drain electrode of the grid of the 5th PMOS M5, the drain electrode of the 5th PMOS M5, the 6th NMOS tube M6, and the source electrode of the 6th NMOS tube M6 passes through the 4th resistance R4 ground connection；The grid of the 6th NMOS tube M6 connects the first NMOS tube M1；
The grid of described 3rd PMOS M3 connects the drain electrode of the grid of the 4th PMOS M4, the 3rd PMOS M3；The drain electrode of the 3rd PMOS M3 connects the drain electrode of the first NMOS tube M1；The source electrode of the first NMOS tube M1 connects the colelctor electrode of first end of the second resistance R2, the first audion Q1；The base stage of the first audion Q1 connects the colelctor electrode of the first audion Q1, the grounded emitter of the first audion Q1；
The drain electrode of described 4th PMOS M4 connects the grid of the drain electrode of the second NMOS tube M2, the grid of the second NMOS tube M2, the first NMOS tube M1；The source electrode of the second NMOS tube M2 connects first end of first end of the first resistance R1, the 3rd resistance R3；The second end ground connection of the 3rd resistance R3, second end of the first resistance R1 connects the base stage of the colelctor electrode of the second audion Q2, the second audion Q2, the grounded emitter of the second audion Q2；
The grid of described 8th PMOS M8 connects first end of drain electrode connection the 7th resistance Rbg of the 4th PMOS M4, the 8th PMOS M8, the second end ground connection of the 7th resistance Rbg；The first voltage Vbg is formed between the drain electrode of the 8th PMOS M8, the 7th resistance Rbg.
10. the temperature compensation of AMR magnetic switch circuit according to claim 9, it is characterised in that:
By the electric current of the second resistance R2, there is negative temperature coefficient, by the electric current of the first audion Q1, there is positive temperature coefficient, when the two cancels each other, they and electric current there is zero-temperature coefficient, this electric current becomes output reference current Ibg by the first current mirror, and the first current mirror includes M3 and M8；
By selecting the 4th suitable resistance R4 resistance to make the electric current flowing through the 6th NMOS tube M6 and the first NMOS tube M1 equal, then the source voltage of the 6th NMOS tube M6 is equal to the Vbg of the first audion Q1, owing to Vbg has negative temperature coefficient, the electric current now by the 4th resistance R4 is also provided with negative temperature coefficient；Then obtaining output reference current Ipt again through the second current mirror, the second current mirror includes M5 and M7, and it has negative temperature coefficient too；Want to make the temperature coefficient of Ipt reach consistent with the temperature coefficient of AMR, the Aspect Ratio of the 6th NMOS tube M6 and the first NMOS tube M1 and the resistance ratio of the 4th resistance R4 and the first resistance R1 are finely tuned.
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| CN110987028A (en) * | 2019-11-22 | 2020-04-10 | 珠海格力电器股份有限公司 | Temperature compensation system and compensation method of magnetic encoder |
| CN112764448A (en) * | 2019-11-05 | 2021-05-07 | 台达电子工业股份有限公司 | Over-temperature compensation control circuit |
| CN113411074A (en) * | 2021-07-13 | 2021-09-17 | 上海艾为电子技术股份有限公司 | Hall sensor switch and electronic equipment |
| TWI832306B (en) * | 2021-09-14 | 2024-02-11 | 華邦電子股份有限公司 | Temperature compensation circuit and semiconductor integrated circuit using the same |
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| CN105739588B (en) | 2017-10-27 |
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