CN107066006B - Novel band gap reference circuit structure - Google Patents

Abstract

The invention provides a novel bandgap reference circuit structure, including a bias module, a positive temperature coefficient current generation module, a negative temperature coefficient current generation module, and a current summation module, wherein the positive temperature coefficient current generation module includes: access to the first current The first transistor connected to the first branch of the first current mirror, the second transistor connected to the second branch of the first current mirror, the first NMOS transistor connected to the first branch of the first current mirror, and the second transistor connected to the first current mirror The second NMOS transistor of the branch; the gate of the first NMOS transistor is connected to the emitter of the first transistor, and the gate of the second NMOS transistor is connected to the emitter of the second transistor; the drain of the second NMOS transistor is connected to the first The first branch of the two current mirrors, the drain of the first NMOS transistor is connected to the second branch of the second current mirror, and the positive temperature coefficient current is generated from the second branch of the second current mirror. The novel bandgap reference circuit structure provided by the invention can meet the requirements of low power supply voltage, low input and output, low power consumption and small occupied layout.

Description

A New Bandgap Reference Circuit Structure

technical field

The invention relates to the technical field of analog circuits, in particular to a novel bandgap reference circuit structure.

Background technique

The reference circuit can provide a relatively stable voltage and current when the temperature and power supply voltage change, and is an integral part of many digital and analog circuits. Because the bandgap reference has advantages in terms of temperature characteristics, supply voltage suppression, power consumption, and compatibility with CMOS processes, the bandgap reference is widely used in analog-to-digital converters (ADCs), digital-to-analog converters (DACs) , low dropout linear regulator (LDO), memory, power management and other CMOS process integrated circuits.

Bandgap references have both voltage-mode and current-mode structures. The classic structure of the voltage mode is to obtain a temperature-independent reference voltage by adding a positive temperature coefficient voltage and a negative temperature coefficient voltage, but the voltage mode structure cannot meet the requirements of low voltage. The classic structure of the current mode is to use the sum of a positive temperature coefficient current and a negative temperature coefficient current to realize a temperature-independent current, and then convert it into a voltage through a resistor. The current mode structure can work in low power supply voltage mode.

However, with the continuous advancement of CMOS technology, the feature size is getting smaller and the power supply voltage is also decreasing in a certain proportion. The voltage mode structure cannot meet the low voltage requirements, and the current mode cannot meet the low input and output requirements. At the same time, to meet the requirements of different applications, the traditional bandgap reference circuit uses an operational amplifier, which consumes a certain amount of power consumption and layout area. Therefore, it is urgent to design a bandgap reference circuit structure different from the traditional bandgap reference circuit, that is, a new type of bandgap reference circuit structure that can meet the requirements of low power supply voltage, low input and output, and occupy a small layout and low power consumption. .

Contents of the invention

The novel bandgap reference circuit structure provided by the invention can address the deficiencies of existing voltage-mode and current-mode bandgap reference circuits, meet the working environment of low power supply voltage and low input and output, and occupy less layout area and consume less power.

The present invention provides a novel bandgap reference circuit structure, including: a bias module, used to provide the transistor bias voltage in the bandgap reference circuit; a positive temperature coefficient current generation module, used to generate a positive correlation with temperature Current; a negative temperature coefficient current generation module, used to generate a current that is negatively correlated with temperature; a current summation module, used to sum the current that is positively correlated with temperature and the current that is negatively correlated with temperature ; It is characterized in that the positive temperature coefficient current generation module includes: a first transistor connected to the first branch of the first current mirror, a second transistor connected to the second branch of the first current mirror, connected to the first A first NMOS transistor of the first branch of a current mirror, and a second NMOS transistor connected to the second branch of the first current mirror; the collector of the first transistor, the collector of the second transistor, the first The emitter of the NMOS transistor and the emitter of the second NMOS transistor are commonly connected to the common ground; the gate of the first NMOS transistor is connected to the emitter of the first transistor, and the gate of the second NMOS transistor is connected to the emitter of the first transistor. The emitters of the second transistors are connected; the drain of the second NMOS transistor is connected to the first branch of the second current mirror, and the drain of the first NMOS transistor is connected to the second branch of the second current mirror, The positive temperature coefficient current is generated from the second branch of the second current mirror.

Optionally, the negative temperature coefficient current generation module includes a third NMOS transistor, a fourth NMOS transistor and a first resistor, and the source of the fourth NMOS transistor and one end of the first resistor are connected to the common ground terminal , the gate of the fourth NMOS transistor and the other end of the first resistor are connected to the source of the third NMOS transistor, the drain of the fourth NMOS transistor is connected to the gate of the third NMOS transistor The drain of the third NMOS transistor is connected to the first branch of the third current mirror, and the negative temperature coefficient current is generated from the first branch of the third current mirror.

Optionally, the above current summing module includes the third current mirror, the fourth current mirror and a second resistor, the first branch of the fourth current mirror is connected to the second branch of the second current mirror, and the second The second branch of the four current mirrors and the second branch of the third current mirror are connected to one end of the second resistor, the other end of the second resistor is connected to the common ground, and the two ends of the second resistor generate Bandgap Reference Voltage.

Optionally, the above-mentioned first current mirror, second current mirror, third current mirror and fourth current mirror are connected to the common working voltage terminal.

Optionally, the first current mirror, the second current mirror, the third current mirror, and the fourth current mirror include cascode PMOS transistors.

Optionally, the above-mentioned first transistor and the second transistor are bipolar transistors.

Optionally, the above-mentioned first transistor and the second transistor are field effect transistors.

Optionally, the above bias module includes a bias resistor.

Optionally, the value of the above bias resistor is adjustable.

Optionally, the above bias module further includes a plurality of transistors, one end of the bias resistor is connected to the common working voltage end, and the other end is connected to the common ground end through a current mirror formed by the plurality of transistors.

The novel bandgap reference circuit structure provided by the embodiment of the present invention directly utilizes the difference in the V _BE of the transistor under different current biases, and realizes the PTAT current by controlling the different currents generated by the gate voltage of the MOS transistor with different V _BE voltages, and at the same time The threshold voltage V _TH of the MOS tube is used to act on the resistor to generate a current with a negative temperature coefficient, and finally the bandgap reference voltage is realized through the current and the resistor. The invention combines two ways of enlarging the resistance area to reduce the current and utilizing the low current characteristics of the transistor in the sub-threshold region, and adopts the non-op-amp structure, which not only meets the requirements of low power supply voltage and low input and output, but also meets the requirements of low power consumption. , Small footprint requirements.

Description of drawings

Fig. 1 is the schematic diagram of voltage mode bandgap reference circuit structure in the prior art;

Fig. 2 is the schematic diagram of current mode bandgap reference circuit structure in the prior art;

Fig. 3 is a schematic structural diagram of a novel bandgap reference circuit according to an embodiment of the present invention;

FIG. 4 is a schematic diagram of a simulation result of a novel bandgap reference circuit structure according to an embodiment of the present invention.

Detailed ways

In order to make the purpose, technical solutions and advantages of the embodiments of the present invention clearer, the technical solutions in the embodiments of the present invention will be clearly and completely described below in conjunction with the drawings in the embodiments of the present invention. Obviously, the described embodiments It is only some embodiments of the present invention, but not all embodiments. Based on the embodiments of the present invention, all other embodiments obtained by persons of ordinary skill in the art without making creative efforts belong to the protection scope of the present invention.

FIG. 1 shows a schematic diagram of a voltage-mode bandgap reference circuit structure in the prior art. As shown in the figure, a temperature-independent reference voltage can be obtained by adding a positive temperature coefficient voltage and a negative temperature coefficient voltage. Connected to AVDD is a cascode PMOS. Typically, the source of M1 is connected to AVDD, the gate of M1 is connected to the gates of M2, M3, and M4, and the drain of M1 is connected to the source of M3; The source of M2 is connected to AVDD, the gate of M2 is connected to the gates of M1, M3, and M4, the drain of M2 is connected to the source of M4; the source of M3 is connected to the drain of M1, and the gate of M3 It is connected to the gates of M1, M2 and M4, the drain of M3 is connected to the resistor R1; the source of M4 is connected to the drain of M2, the gate of M4 is connected to the gates of M1, M2 and M3, and the drain of M4 Connect to resistor R2. It is used as a current mirror to provide a mirror current, so that the currents of the two branches where the resistor R1 and the resistor R2 are located are equal. In particular, the drain terminals of M3 and M4 are respectively connected to resistors R1 and R2. Among them, the resistor R1 and the resistor R2 are respectively connected to the non-inverting input and the inverting input of the operational amplifier OPA, that is, the X and Y terminals are respectively connected to the two input terminals of the operational amplifier OPA, and the output terminals are connected to M1, M2, M3 and M4 to form On one gate of the current mirror, the feedback of the loop is formed, and the positive feedback is smaller than the negative feedback, so that the voltages at the two ends of X and Y are equal, and the emitter junction voltage V _BE of the two transistors passing through Q1 and Q2 is different. A voltage drop of ΔV _BE is generated on R3, and since ΔV _BE is positively correlated with temperature, a current proportional to absolute temperature (ProportionalTo Absolute Temperature, PTAT) is generated.

FIG. 2 shows a schematic diagram of a current mode bandgap reference circuit structure in the prior art. As shown in the figure, a temperature-independent current can be achieved by summing a positive temperature coefficient current and a negative temperature coefficient current, and a corresponding voltage can be obtained across the resistor through a resistor. Connected to AVDD is a cascode PMOS. Typically, the source of M1 is connected to AVDD, the gate of M1 is connected to the gates of M2, M3, and M4, and the drain of M1 is connected to the source of M3; The source of M2 is connected to AVDD, the gate of M2 is connected to the gates of M1, M3, and M4, the drain of M2 is connected to the source of M4; the source of M3 is connected to the drain of M1, and the gate of M3 It is connected to the gates of M1, M2, and M4, and the drain of M3 is connected to an input terminal of the operational amplifier OPA; the source of M4 is connected to the drain of M2, and the gate of M4 is connected to the gates of M1, M2, and M3. , The source of M4 is connected to the other input terminal of the operational amplifier OPA. Specifically, the drains of M3 and M4 are respectively connected to the non-inverting input and inverting input of the operational amplifier OPA, that is, the X and Y terminals are respectively connected to the two input terminals of the operational amplifier OPA, and the output terminals of the operational amplifier OPA are connected to M1 and M2. , M3 and M4 formed on a grid of the current mirror. The resistor R3 is connected to one input terminal of the operational amplifier OPA connected to the transistor M3, Q1 is also connected to the input terminal through the resistor R1, and the resistor R2 and the emitter of the transistor Q2 are connected to the other input terminal of the operational amplifier OPA connected to the M4. Typically, the voltages of terminals X and Y connected to the input terminal of the operational amplifier are equal to V _BE2 . At this time, the current (Proportional ToAbsolute Temperature, PTAT) that is positively correlated with temperature is I ₁ =ΔV _BE /R ₁ , and the current that is negatively correlated with temperature (Complementary ToAbsolute Temperature, CTAT) is I ₃ =V _BE2 /R ₃ . By summing I ₁ and I ₃ , a current with zero temperature drift is obtained. Typically, the zero temperature drift current is mirrored to another branch through a current mirror, and then converted into the required voltage through a resistor. The current mode bandgap reference circuit structure in the prior art can realize low voltage output, and can also work in a low power supply voltage mode.

In the prior art, the voltage-mode structure of the bandgap reference cannot meet the requirements of low voltage, and the current mode cannot meet the requirements of low power consumption. The input terminals are equal and made a difference to generate ΔV _BE , then the PTAT current and voltage are generated through the resistor, and finally added to V _BE to achieve zero temperature drift voltage.

The present invention directly utilizes the difference in V _BE , first controls the gate voltage of the MOS tube through different V _BE voltages, thereby generating different currents, and realizes the PTAT current through the difference of the currents; The threshold voltage V _TH acts on the resistor to generate a negative temperature coefficient current; finally, add the PTAT and CTAT currents and act on the resistor to realize the bandgap reference voltage. The present invention is different from the traditional bandgap reference circuit, starting from the reverse of the traditional bandgap reference circuit, directly using the characteristics of the MOS tube to generate PTAT current and CTAT current, and adopting no op-amp structure to realize the low voltage and low input and output The bandgap reference circuit not only meets the requirements of low voltage but also meets the requirements of low power consumption.

In the present invention, a temperature-independent voltage is obtained by summing a voltage or current that is positively correlated with temperature and another voltage or current that is negatively correlated with temperature. Typically, the positively correlated physical quantity is generated by ΔV _BE , and the negatively correlated physical quantity is generated by V _BE or NMOS _VTH . Through combination, different bandgap reference circuit structures can be obtained.

FIG. 3 shows the structure of a novel bandgap reference circuit provided by an embodiment of the present invention. An embodiment of the present invention directly uses the difference in V _BE of Q1 and Q2 to directly control the gate voltage of the NMOS transistor, thereby generating different currents.

As shown in FIG. 3 , an embodiment of the present invention provides a positive temperature coefficient current generation module. The emitter of the transistor Q1 is connected to the drain of the PMOS transistor M6 and the gate of the NMOS transistor M10, and the emitter of the transistor Q2 is connected to the drain of the PMOS transistor M5 and the gate of the NMOS transistor M9. Wherein, the emitter junction voltage of the transistor Q2 is equal to the gate-source voltage of the NMOS transistor M9, and the emitter junction voltage of the transistor Q1 is equal to the gate-source voltage of the NMOS transistor M10, that is, V _GS9 =V _BE2 , V _GS10 =V _BE1 . According to the current formula in the saturation region of the NMOS tube:

Among them, μ is the mobility rate of electrons, C _ox is the capacitance of the gate oxide layer per unit area, W/L is the width-to-length ratio of the NMOS conductive channel, and V _GS -V _TH is the overdrive voltage.

And the related term ΔV _BE which is proportional to the temperature is obtained through the current difference, which can be further obtained:

According to the above formula, the difference in transistor threshold voltage V _TH of Q1 and Q2 can be regarded as no difference within a certain limit. Since V _BE1 , V _BE2 , and V _TH all have a negative correlation with temperature, as long as V _BE1 , V _BE2 , and V _TH and temperature meet the conditions A positive temperature-dependent current PTAT can be generated.

Further, an embodiment of the present invention provides a negative temperature coefficient current generating module. Since the threshold voltage V _TH of the NMOS tube = V _TH0 -κT, κ>0 is the temperature coefficient of V _TH , so the negative temperature-related current through the V _TH of the NMOS can be generated in a negative correlation with the temperature. In particular, in the embodiment of the present invention, the current CTAT which is negatively correlated with temperature can be realized by V _GS16 /R ₂ . Among them, since the current formula in the saturation region of the NMOS transistor is:

The gate-source voltage of the NMOS transistor can be determined by calculate.

In particular, one embodiment of the present invention provides a current summing module. Specifically, the current mirror composed of M7 and M8 copies the current generated by the V _BE2 control of Q2, and M10 generates the current controlled by V _BE1 of Q1. Through the current competition between M10 and M8, M11 generates the current difference between the two, That is, the PTAT current. In addition, the current mirror composed of M11 and M12 replicates the PTAT current on the branch of M12, and the current mirror composed of M13 and M14 replicates the current of M15 on the branch of M13. Since the current of M15 is i _D15 =V _GS16 /R ₂ , where V _GS16 is the gate-source voltage of M16, that is, the CTAT current that is negatively correlated with temperature. Thus, the two currents of PTAT and CTAT are superimposed on the resistor _R1 to generate the required temperature-independent voltage.

FIG. 4 shows the simulation results of the novel bandgap reference circuit structure of an embodiment of the present invention. As shown in the figure, when the temperature changes between -40 and 140°C, the voltage measured at the V _ref point in Figure 3 varies between about 1.194V-1.202V, reaching the reference circuit used to provide relatively stable expected function and effect of the voltage.

The novel bandgap reference circuit structure provided by the embodiment of the present invention can be distinguished from the traditional bandgap reference circuit, starting from the reverse of the traditional bandgap reference circuit. Firstly, the gate voltage of the NMOS transistor is directly controlled by the difference in the V _BE voltage of the emitter junction of the transistor, thereby generating different currents, and a positive correlation item with the temperature is generated through the current difference; secondly, the embodiment of the present invention can directly pass the NMOS The effect of V _TH on the resistance produces a current term that is negatively correlated with temperature. Finally, the two currents of PTAT and CTAT are superimposed by means of a current mirror, and the required temperature-independent voltage can be obtained on the resistance.

The new bandgap reference circuit structure provided by the embodiment of the present invention combines two methods of increasing the resistance area to reduce the current and utilizing the low current characteristics of the transistor in the sub-threshold region, and adopts a structure without an op amp, which can greatly reduce the current and layout Area, release the restriction on the minimum value of the power supply voltage caused by the resistance of the voltage mode structure, and meet the actual needs of low power supply voltage, low input and output, and low power consumption.

The above is only a specific embodiment of the present invention, but the scope of protection of the present invention is not limited thereto. Anyone skilled in the art can easily think of changes or substitutions within the technical scope disclosed in the present invention. All should be covered within the protection scope of the present invention. Therefore, the protection scope of the present invention should be determined by the protection scope of the claims.

Claims (10)

1. A novel bandgap reference circuit structure, comprising: a bias module, configured to provide a transistor bias voltage in the bandgap reference circuit; A positive temperature coefficient current generating module, used to generate a current that is positively correlated with temperature; A negative temperature coefficient current generating module, used to generate a current that is negatively correlated with temperature; A current summing module, configured to sum the current that is positively correlated with temperature and the current that is negatively correlated with temperature; It is characterized in that the positive temperature coefficient current generation module includes: a first transistor connected to the first branch of the first current mirror, a second transistor connected to the second branch of the first current mirror, connected to the first The first NMOS transistor of the first branch of the current mirror, and the second NMOS transistor connected to the second branch of the first current mirror; the collector of the first transistor, the collector of the second transistor, the first NMOS The source of the transistor and the source of the second NMOS transistor are commonly connected to the common ground; the gate of the first NMOS transistor is connected to the emitter of the first transistor, and the gate of the second NMOS transistor is connected to the emitter of the first transistor. The emitter of the second transistor is connected; the drain of the second NMOS transistor is connected to the first branch of the second current mirror, and the drain of the first NMOS transistor is connected to the second branch of the second current mirror, so The positive temperature coefficient current is generated from the second branch of the second current mirror; the base of the first transistor and the base of the second transistor are commonly connected to the common working voltage terminal. 2. The novel bandgap reference circuit structure according to claim 1, wherein the negative temperature coefficient current generating module comprises a third NMOS transistor, a fourth NMOS transistor and a first resistor, and the fourth NMOS transistor The source and one end of the first resistor are connected to the common ground terminal, the gate of the fourth NMOS transistor and the other end of the first resistor are connected to the source of the third NMOS transistor, and the The drain of the fourth NMOS transistor is connected to the gate of the third NMOS transistor, the drain of the third NMOS transistor is connected to the first branch of the third current mirror, and the negative temperature coefficient current is drawn from the first branch of the third NMOS transistor. The first branch of the three current mirrors is generated. 3. The novel bandgap reference circuit structure according to claim 2, wherein the current summing module comprises the third current mirror, a fourth current mirror and a second resistor, and the fourth current mirror is the first One branch is connected to the second branch of the second current mirror, the second branch of the fourth current mirror and the second branch of the third current mirror are connected to one end of the second resistor, and the other end of the second resistor One end is connected to the common ground end, and a bandgap reference voltage is generated at both ends of the second resistor. 4. The novel bandgap reference circuit structure according to claim 3, wherein the first current mirror, the second current mirror, the third current mirror, and the fourth current mirror are connected to a common working voltage terminal. 5. The novel bandgap reference circuit structure according to claim 3, wherein the first current mirror, the second current mirror, the third current mirror, and the fourth current mirror comprise cascode PMOS transistors. 6. The novel bandgap reference circuit structure according to claim 1, wherein the first transistor and the second transistor are bipolar transistors. 7. The novel bandgap reference circuit structure according to claim 1, wherein the first transistor and the second transistor are field effect transistors. 8. The novel bandgap reference circuit structure according to claim 1, wherein the bias module comprises a bias resistor. 9. The novel bandgap reference circuit structure according to claim 8, characterized in that the value of the bias resistor is adjustable. 10. The novel bandgap reference circuit structure according to claim 8, wherein the bias module further comprises a plurality of transistors, one end of the bias resistor is connected to the common working voltage end, and the other end is passed through A current mirror formed by the plurality of transistors is connected to the common ground.