CN100461984C - Circuit Assembly Structure - Google Patents

Abstract

A circuit assembly structure is applied to the contraposition joint of circuits on two different substrates. The circuit assembly structure includes: a first substrate is provided with a plurality of first circuit pins, a first alignment mark and a second alignment mark are arranged on the same side of the first circuit pins, and a second substrate is provided with a plurality of second circuit pins and a light-transmitting area arranged on one side of the second circuit pins. When the first substrate is jointed with the second substrate, if the edge of the light-transmitting area is positioned between the first alignment mark and the second alignment mark and the first alignment mark is positioned outside the light-transmitting area, the first circuit pins contact the second circuit pins. The invention has the advantages of improving the precision of the alignment inspection of the fine pitch bonding process, improving the flexibility of the wiring design on the glass substrate, increasing the designable space of the circuit and having the effect of double inspection.

Description

Circuit Assembly Structure

technical field

The present invention relates to a circuit assembly structure, in particular to a circuit assembly structure applied to a display.

Background technique

Displays are generally constructed using technologies such as Tape Automated Bonding (TAB) or Chip On Glass (COG). Compared with the tape-and-reel die-bonding technology, the number of flexible circuit boards and printed circuit boards used in the die-glass bonding technology is small, which can reduce costs.

In order to further reduce the number of flexible circuit boards and the number of layers of printed circuit boards to achieve greater cost-effectiveness, products using grain glass bonding technology usually also use wiring on the glass substrate (WiringOn Array, WOA) directly Cascade the driver chips together. In the series-connected driving chips, the data and control signals can be transmitted to other serially connected driving chips only after being sent to the first driving chip. Different from the general method of sending data and control signals to each driver chip separately, the flexible circuit board connected to the panel only needs to provide data and control signals to the first driver chip and power signals to each driver chip, but does not require individual Provide data and control signals to each driver chip, so the number of traces on the flexible circuit board and the area of the circuit board can be reduced, and the price can be reduced. Since the driver chips are connected in series with the wires on the glass substrate, the design of the printed circuit board can be simplified, the number of layers can be reduced, and the price is low.

Since the gate driver chip (Gate Driver) has fewer signal types and requires a relatively smaller number of contacts, it is easier to match the serial connection design in the layout of the panel peripheral wiring (layout) and pad layout. Recently, under the requirement of cost reduction, trying to connect source driver chips (Source Driver) in series has become the development direction of panel manufacturers. However, due to the many types of signals in the source driver chip, the design flexibility of the panel wiring is reduced under the limitation of the size of the flip chip; Fixtures, etc., add to the difficulty of design. Therefore, how to improve the wiring design on the glass substrate and save the material cost of the panel circuit has always been the goal of peripheral design efforts.

Please refer to FIG. 1A for an existing display. The panel 10 has an active area 11 , and a plurality of source drivers 12 and a plurality of gate drivers 13 are disposed around the active area 11 . The source driver 12 and the gate driver 13 transmit signals to the printed circuit boards 17a and 17b respectively through the flexible circuit board 20 . As shown in FIG. 1B, the area 14 between the adjacent two source drivers 12a: 12b that are not connected in series in the panel 10 has only some spare patterns 16 (dummy patterns) and a pair of bit structures 15, and the bit structure 15 provides The panel 10 and the flexible circuit board 20 are used for circuit assembly.

As shown in FIG. 1C , the alignment structure 15 includes a pair of alignment marks 151 (alignment mark). When the panel 10 is bonded to the flexible circuit board 20 , the flexible circuit board 20 uses a light-transmitting area 21 to perform an alignment check with the alignment mark 151 of the panel 10 . When the alignment mark 151 is just inside the transparent area 21 , the circuit lead 121 of the source driver 12 is aligned with the circuit lead 22 on the flexible circuit board 20 . As shown in FIG. 1D , as long as the transparent area 21 is staggered from the alignment mark 151 , it means that the circuit pins 121 are staggered from the circuit pins, but the degree of staggering cannot be ascertained.

It can be seen from the wiring design in the figure that the edge of each panel 10 must have alignment marks 151 required for the bonding process. Since these alignment marks 151 are located between two driving elements and their positions are limited by the manufacturing process requirements and cannot be changed arbitrarily, so that the space at both ends of the circuit pins of the driving elements cannot be effectively used for circuit design, especially not It is a pity that the requirement of a large number of source driver contacts also limits the design of traces on the glass substrate.

Contents of the invention

The object of the present invention is to provide a circuit assembly structure, in which the wiring pattern at the interval between two drivers is designed as a part of the alignment structure so as to take into account the design of the wiring on the glass substrate and improve the accuracy of alignment and bonding during circuit assembly.

The circuit assembly structure of the present invention is used for alignment bonding of circuits on two different substrates, such as the bonding of a display panel and a flexible circuit board.

The present invention provides a circuit assembly structure, comprising: a first substrate with a plurality of first circuit pins, and a first alignment mark and a second alignment mark arranged on these first circuit pins the same side; and a second substrate with a plurality of second circuit pins and a light-transmitting area disposed on one side of the second circuit pins. When the first substrate overlaps the second substrate, if the edge of the light-transmitting area is located between the first alignment mark and the second alignment mark, and the first alignment mark is located outside the light-transmitting area, then these The first circuit pins contact the second circuit pins.

The present invention also provides a circuit assembly structure, comprising: a first substrate; a plurality of driving elements arranged in series on the first substrate, and each driving element has a plurality of first circuit pins; A first alignment mark, formed between two adjacent driving elements; a second alignment mark, arranged between the two adjacent driving elements on the first substrate; and a second substrate , which has a plurality of second circuit pins and a light-transmitting area arranged on one side of the second circuit pins, when the first substrate overlaps the second substrate, if the If the edge of the light-transmitting area is located between the two alignment marks, and the first alignment mark is located outside the light-transmitting area, then the first circuit pin contacts the second circuit pin.

The above-mentioned first alignment mark can be a conductive pattern, a circuit trace or a number mark, such as a chip ID or a glass plate ID. For an active display panel, when the first alignment mark and the second alignment mark are formed between two adjacent driving elements, the distance between the alignment mark and its surrounding wiring pattern is used as another criterion for checking the alignment accuracy of the joint. In order to achieve the double check effect of checking whether the alignment and the alignment error are within the allowable range. In addition, using the bonding area space between the two driving elements to design the wiring can also improve the flexibility of the wiring design on the glass substrate.

Description of drawings

Figure 1A is an existing display;

Fig. 1B is an enlarged view of the junction of the two plates in Fig. 1A;

Figure 1C is an enlarged view of the alignment structure in Figure 1B;

FIG. 1D is a state of the existing alignment structure when it is misaligned;

Fig. 2 is the circuit assembly structure of the present invention;

3A is an alignment state of the circuit assembly structure of the present invention;

FIG. 3B is the alignment state limit of the circuit assembly structure of the present invention;

3C is a misaligned state of the circuit assembly structure of the present invention;

FIG. 4 is an embodiment in which circuit traces are used as the first alignment mark;

Fig. 5 is the embodiment that is marked as the first alignment mark with numbering;

Fig. 6 is the pad structure connected with the first circuit pin;

FIG. 7A is a liquid crystal display having a circuit assembly structure of the present invention;

FIG. 7B is an enlarged view of the junction between the liquid crystal panel and the flexible printed circuit board in FIG. 7A .

Description of main component symbols

panel 10 active area 11 source driver 12, 12a, 12b

Circuit Pin 121 Gate Driver 13 Spacer 14 Alignment Structure 15

Alignment mark 151 Spare pattern 16 Printed circuit board 17a, 17b

Flexible circuit board 20 Light-transmitting area 21 Circuit pin 22

Circuit assembly structure 30 first substrate 31 first circuit pin 311

Alignment reference mark 312 Uncovered area 313 Second substrate 32

Second circuit pin 321 Light-transmitting area 322 Edge line 323

First alignment mark 33 Second alignment mark 34 Conductive pattern 35

Outer Short Loop 36 Number Marker 37 Spare Pin 38 Solder Pad 39

First conductive layer 391 Insulation layer 392 Through hole 3921

Second conductive layer 393 Thin film transistor 40 Driver chip 50

Liquid crystal display 70 LCD panel 71 Source driver 711

Source Driver 711a Source Driver 711b Gate Driver 712

Conductive trace 714 Flexible circuit board 72 Printed circuit board 73 Joint 74

Detailed ways

The circuit assembly structure of the present invention is described in detail below in conjunction with the accompanying drawings, and the preferred embodiments are listed as follows:

Please refer to FIG. 2 , which shows the circuit assembly structure of the present invention. The circuit assembly structure 30 is respectively located on a first substrate 31 and a second substrate 32 . The first substrate 31 has a plurality of first circuit pins 311 , and has a first alignment mark 33 and a second alignment mark 34 disposed on the same side of the first circuit pins 311 . The second substrate 32 has a plurality of second circuit pins 321 and a light-transmitting area 322 disposed on one side of the second circuit pins 321 . When the first substrate 31 overlaps the second substrate 32, if the edge of the light-transmitting region 322 is within the distance D between the first alignment mark 33 and the second alignment mark 34, and the first alignment mark 33 Located outside the transparent area 322 , the first circuit pins 311 contact the second circuit pins 321 .

The above-mentioned circuit assembly structure is located at the junction of the two boards, and can be applied to electronic devices such as displays with a circuit board overlapping structure or a circuit board and panel overlapping structure, so as to improve alignment accuracy when circuit pins are bonded. In the present invention, the first substrate 31 may be a liquid crystal panel or an organic electroluminescence panel with a thin film transistor array, and the first circuit pin 311 may be connected to a driving chip on the panel. The second substrate 32 can be a flexible substrate, such as a flexible printed circuit board. The light-transmitting area 322 can be an open area without wiring as shown in FIG. 2 , or can be formed by drawing only an edge line on the transparent second substrate 32 , or by drilling holes in the second substrate 32 . The first alignment mark 33 and the second alignment mark 34 can be opaque structures of any shape, but an appropriate distance D should be reserved between them as the allowable translation range of the edge line of the light-transmissive area. The first alignment mark 33 can be a conductive pattern, a circuit trace or a numbered mark, which will be described individually in the following embodiments.

Please refer to FIGS. 3A-3C , which use the conductive pattern as an embodiment of the first alignment mark 33 , and illustrate the alignment method of the structure of the present invention. The conductive pattern 35 on the first substrate 31 covers the side area of the first circuit pin 311 and is connected to the first circuit pin 311 , but leaves an uncovered area 313 . A circular second alignment mark 34 is disposed in the uncovered area 313 and has a distance D from the conductive pattern 35 . The light-transmitting area 322 on the second substrate 32 is also circular, and is designed to match the shape of the second alignment mark 34. In a preferred embodiment, its diameter is slightly larger than that of the circular second alignment mark 34, and less than the width of the uncovered area.

As shown in FIG. 3A, when the second substrate 32 overlaps the first substrate 31, if the edge line 323 of the light-transmitting region 322 is located in the center of the distance D between the conductive pattern 35 and the second alignment mark 34, it means The first circuit pin 311 is just aligned with the second circuit pin 321 . As shown in FIG. 3B, if the edge line 323 of the light-transmitting region 322 is located at the junction of the conductive pattern 35 and the uncovered region 313, it means that the first circuit pin 311 is not completely aligned with the second circuit pin 321, but it is still possible. within the accepted error range. As shown in FIG. 3C, if the edge line 323 of the light-transmitting region 322 exceeds the junction of the conductive pattern 35 and the uncovered region 313, and enters the covered region of the conductive pattern 35, it means that the first circuit pin 311 has completely deviated from the second pin. The circuit pins 321 are not in contact with each other, or although a small part is in contact, it does not meet the requirements of manufacturing quality.

3A-3C illustrate a circuit alignment assembly method. First, an anisotropic conductive film (ACF) is pre-attached on a plurality of first circuit pins 311, and a pair of alignment reference marks 312 can be used for attachment. as an aid. When the second substrate 32 overlaps with the first substrate 31, check the extent to which the edge line 323 of the light-transmitting region 322 falls within the distance D between the conductive pattern 35 and the second alignment mark 34 to determine the corresponding first alignment mark 34. Whether the circuit pin 311 and the second circuit pin 321 are aligned with each other. If it is adjusted to the situation of FIG. 3A , the first circuit pin 311 and the second circuit pin 321 are bonded together through the anisotropic conductive film by thermal compression. Compared with Figures 1C-1D, the prior art can only judge whether the circuit pins are aligned, but the present invention can further set the allowable range of the alignment error with the width of the distance D, so it has a double check (double check) Effect.

Please refer to FIG. 4 , an embodiment in which the circuit trace is used as the first alignment mark 33 . The side of the first circuit pin 311 can be the wiring of any circuit, such as the outer short loop 36 (Outer Short Ring, OSR) shown in FIG. 4 to prevent Electro-Static Discharge damage. The second alignment mark 34 is located between the outer short loop 36 and the first circuit pin 311 , and is separated from the outer short loop 36 by a distance D for alignment inspection.

Please refer to FIG. 5 , a numbered mark, such as a cutting piece number or a glass plate number, is an embodiment of the first alignment mark 33 . The second alignment mark 34 can be disposed between the number mark 37 of the first substrate 31 and a spare lead (dummy leads) 38 , and is separated from the number mark 37 by a distance D for alignment inspection.

In all the above-mentioned embodiments, the first alignment mark 33 and the second alignment mark 34 can be made of metal materials such as aluminum, molybdenum, chromium and alloys thereof. The distance D between the first alignment mark 33 and the second alignment mark 34 may be 50 μm to 150 μm, preferably 100 μm. The second alignment mark 34 can be a circular mark with a diameter of 150 μm to 250 μm suitable for being fabricated between the first circuit pin 311 and the first alignment mark 33 . At this time, the transparent area 34 is defined as a circular area with a diameter of 250 μm to 350 μm to be larger than the area of the second alignment mark. Therefore, when the first substrate 31 and the second substrate 32 are aligned, the allowable error is plus or minus 50 μm.

Please refer to FIG. 6 , which is a pad structure connected to the first circuit pin. When there are other circuit components on the first substrate 31, usually a solder pad 39 is used to connect the first circuit pin 311 and these circuit components to provide electrical signals from the second substrate 32 to the first substrate 31. The structure of the pad 39 includes a first conductive layer 391 formed on the first substrate 31 and contacting the first circuit pin 311, an insulating layer 392 is located on the first conductive layer 391, and has A through hole 3921 and a second conductive layer 393 are in contact with the first conductive layer 391 through the through hole 3921 . The other end of the first conductive layer 391 is connected to a thin film transistor 40, and the second conductive layer 393 is connected to a driver chip 50, which may be a source driver chip or a gate driver chip.

Please refer to FIG. 7A , taking a liquid crystal display as an example to illustrate the application of the circuit assembly structure of the present invention. The liquid crystal display 70 includes a liquid crystal panel 71 connected to a printed circuit board 73 via a flexible circuit board 72 . The liquid crystal panel 71 has a plurality of serially connected drive elements, including a serially connected source driver chip 711 and a serially connected gate driver chip 712 . Taking the source driver chip 711 as an example, referring to FIG. 7B and FIG. 3A at the same time, it is directly assembled on the glass substrate by the method of grain glass bonding, and then connected in series with the wires (WOA) on the glass substrate, and extends multiple a first circuit pin 311. The flexible printed circuit board 72 has a plurality of second circuit pins 321 and a light-transmitting area 322 disposed on one side of the second circuit pins 321 .

FIG. 7B is an enlarged view of the joint portion 74 between the liquid crystal panel 71 and the flexible circuit board 72 . The conductive pattern 35 and the second alignment mark 34 are fabricated between two adjacent source driver chips 711a and 711b. When the bonding area (bonding pad) of the liquid crystal panel 71 overlaps the flexible printed circuit board 72, the edge of the light-transmitting area 322 is placed between the conductive pattern 35 and the second alignment mark 34, and the conductive pattern 35 is positioned at the light-transmissive Outside the area 322, the first circuit pin 311 can be aligned with the second circuit pin 321 in this way.

Comparing FIG. 7B with FIG. 1B, it shows that the conductive pattern 35 is a new wiring design on the glass substrate, which has an open part to avoid the second alignment mark 34, so that the side space of the bonding area can also be used. It is used to design various circuits, such as the conductive circuit 714 connecting the driver chips 711a and 711b in series. In this way, the compatibility of existing manufacturing processes, alignment accuracy and cost reduction can be improved.

When the present invention is compared with the prior art, it has the following characteristics and advantages:

1. No need to change existing machines such as bonding tools, speeding up the introduction of new designs for module segments and improving process compatibility.

2. Improve the accuracy of alignment inspection in fine pitch bonding process.

3. Improve the flexibility of the wiring design on the glass substrate and increase the design space of the wiring.

4. Under the condition that the second alignment mark is fixed, the joint area space between the two driving elements can be used for the design of the wiring on the glass substrate at the same time.

5. Use the distance between the alignment mark and its surrounding wiring as another way to check the accuracy of the bonding alignment

6. It has the effect of double checking.

The above detailed description is a specific description of the preferred embodiments of the present invention, but the above embodiments are not intended to limit the protection scope of the present invention, and all equivalent implementations or changes that do not depart from the technical spirit of the present invention should be included in this case within the scope of protection.

Claims (18)

1. A circuit assembly structure, characterized in that, comprising: A first substrate having a plurality of first circuit pins; a first alignment mark, disposed on the first substrate, and located on one side of the first circuit pin; a second alignment mark, disposed on the first substrate, and located on the same side of the first circuit pin as the first alignment mark; and A second substrate, having a plurality of second circuit pins and a light-transmitting area disposed on one side of the second circuit pins, When the first substrate overlaps the second substrate, if the edge of the light-transmitting area is located between the two alignment marks, and the first alignment mark is located outside the light-transmitting area , the first circuit pin contacts the second circuit pin. 2. The circuit assembly structure according to claim 1, wherein the first alignment mark is a conductive pattern. 3. The circuit assembly structure according to claim 2, wherein the first alignment mark is connected to the first circuit pin. 4. The circuit assembly structure according to claim 1, wherein a thin film transistor array is disposed on the first substrate. 5. The circuit assembly structure according to claim 1, wherein the first circuit pin is connected to a driver chip. 6 . The circuit assembly structure according to claim 1 , wherein the distance between the first alignment mark and the second alignment mark is 50 μm to 150 μm. 7. The circuit assembly structure according to claim 1, wherein the material of the first alignment mark and the second alignment mark is a combination of aluminum, molybdenum, chromium and their alloys. 8 . The circuit assembly structure according to claim 1 , wherein the second alignment mark is a circular mark with a diameter of 150 μm to 250 μm. 9 . The circuit assembly structure according to claim 1 , wherein the transparent region is a circular region with a diameter of 250 μm to 350 μm. 10. The circuit assembly structure according to claim 1, wherein the second substrate is a flexible substrate. 11. A circuit assembly structure according to claim 1, wherein the first circuit pin is connected to a welding pad, and the structure of the welding pad comprises: a first conductive layer contacting the first circuit pin; an insulating layer located on the first conductive layer and having a through hole; and A second conductive layer is in contact with the first conductive layer through the through hole. 12. The circuit assembly structure according to claim 1, wherein the first alignment mark is a numbered mark. 13. The circuit assembly structure according to claim 1, wherein the first alignment mark is a trace of an arbitrary circuit. 14. A circuit assembly structure, characterized in that it comprises: a first substrate; A plurality of driving elements are arranged in series on the first substrate, and each driving element has a plurality of first circuit pins; A first alignment mark, formed between two adjacent driving elements; a second alignment mark, disposed between the two adjacent driving elements on the first substrate; and A second substrate, having a plurality of second circuit pins and a light-transmitting area disposed on one side of the second circuit pins, When the first substrate overlaps the second substrate, if the edge of the light-transmitting area is located between the two alignment marks, and the first alignment mark is located outside the light-transmitting area , the first circuit pin contacts the second circuit pin. 15. The circuit assembly structure according to claim 14, wherein the driving element is a source driving chip. 16. The circuit assembly structure according to claim 14, wherein the driving element is a gate driving chip. 17. The circuit assembly structure according to claim 14, wherein the area of the light-transmitting region is larger than the area of the second alignment mark. 18. The circuit assembly structure according to claim 14, wherein the first alignment mark is a conductive pattern connecting the two adjacent driving elements.

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