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CN100433314C - 半导体器件及其制造方法 - Google Patents

半导体器件及其制造方法 Download PDF

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Publication number
CN100433314C
CN100433314C CNB2006100054859A CN200610005485A CN100433314C CN 100433314 C CN100433314 C CN 100433314C CN B2006100054859 A CNB2006100054859 A CN B2006100054859A CN 200610005485 A CN200610005485 A CN 200610005485A CN 100433314 C CN100433314 C CN 100433314C
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Prior art keywords
solder
metal
carbon
sintered body
semiconductor device
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Expired - Fee Related
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CNB2006100054859A
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CN1893038A (zh
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玉川道昭
南泽正荣
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Fujitsu Semiconductor Ltd
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Fujitsu Ltd
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Abstract

本发明提供一种具有高可靠性和优异散热性的半导体器件,以及以低成本制造该半导体器件的方法。通过含焊料碳构件结合半导体元件与作为散热构件的壳体,该含焊料碳构件具有如下结构:在含焊料碳烧结体的表面上形成外焊料层,该含焊料碳烧结体通过使用焊料浸渍碳烧结体而形成。通过将所述烧结体用于半导体元件与壳体之间的连接,可消除半导体元件发热过程中的热应力,同时保证高散热性。通过使用廉价焊料浸渍烧结体,可紧密结合烧结体与外焊料层。通过外焊料层,可紧密结合半导体元件与壳体。因此,可以低成本实现具有高可靠性和优异散热性的半导体器件。

Description

半导体器件及其制造方法
技术领域
本发明涉及一种半导体器件及其制造方法,特别是涉及具有半导体元件及散发该半导体元件产生的热的散热构件的半导体器件。本发明还涉及该半导体器件的制造方法。
背景技术
近年来,半导体器件包含的半导体元件的发展趋势是高集成度及高速度。与该发展趋势相对应,元件在工作过程中发热量也趋于增加。但是,发热量的增加是能够机械或电阻碍传导的因素,因此易于导致半导体器件的可靠性的下降。因而,必须有效地使半导体元件产生的热散发到半导体器件之外。为促进散热,现有技术也提出一些具有适当的散热构件的半导体器件。
例如,提出一种半导体器件,其中半导体元件倒装式地安装于电路基板上,然后使由陶瓷或金属构成的散热构件通过由金属(例如焊料、铜(Cu)或金(Au))构成的层结合至该半导体元件(参见例如日本特开2001-127218号公报)。因此,通过利用导热性优异的金属将半导体元件与散热构件结合,试图改善半导体器件的散热。
此外,近年来,根据高导热性、导电性、热膨胀特性及机械强度,人们试图将碳材料用于半导体器件,所述碳材料例如是主要由碳构成的烧结体(参见例如日本特开平06-321649号公报)。
但是,当将散热构件用于半导体器件以促进散热时,产生如下问题。
例如,在通过由金属(例如焊料)构成的层结合半导体元件与散热构件的情况下,由于金属层与主要由半导体材料(例如硅(Si))构成的半导体元件之间的热膨胀系数差别较大,所以在发热过程中的应力集中会造成在金属层中产生缺陷,或损坏半导体元件。因此,从性能或散热角度看,难以保证高可靠性。同样,在使用尺寸较大的半导体元件的情况下,或在散热构件与金属层之间的热膨胀系数差别较大的情况下,也难以保证高可靠性。
此外,在利用银(Ag)浆取代金属(例如焊料)来连接半导体元件与散热构件的情况下,银(Ag)浆具有消除热应力的功能,因为其较软。但是,银浆的热导率低于金属(例如焊料)。因此,仍有散热的问题。
此外,在使用主要由碳构成的烧结体(称为“碳烧结体”)结合半导体元件与散热构件的情况下,期望该碳烧结体发挥消除热应力的功能或高导热性功能。但是,即使在半导体元件与散热构件之间仅设置碳烧结体,碳烧结体也难以连接半导体元件与散热构件。因此,必须使烧结体的表面金属化。金属化工艺的实例包括使用金属溅射碳烧结体表面以在其表面上形成金属层的方法,或在烧结体的表面上形成适当的由焊料金属构成的层的方法,此焊料金属用于钎焊半导体元件与散热构件。
但是,按照使用金属溅射碳烧结体表面以在其表面上形成金属层的方法,金属仅积聚于碳烧结体的表面上。因此,碳烧结体与金属之间的结合强度较低。从而,该方法易于导致半导体器件的可靠性下降。此外,在制作较厚的金属层的膜方面或在提高碳烧结体与金属之间的结合强度方面,在碳烧结体的表面上形成焊料金属层的方法有效。另一方面,该方法的问题在于,由于焊料金属较为昂贵,所以增加了半导体器件的制造成本。
发明内容
鉴于前述问题,本发明的一个目的是提供一种能够以低成本形成且具有高可靠性和优异散热性能的半导体器件。
本发明的另一目的是提供所述半导体器件的制造方法。
为实现上述目的,按照本发明的一个方案,提供一种半导体器件,其具有半导体元件和散热构件,该散热构件散发由半导体元件所产生的热。在半导体器件中,通过含金属碳构件结合半导体元件与散热构件,该含金属碳构件通过使用包含金属的碳材料而形成,且该含金属碳构件的结构为:在包含该金属的碳材料的两侧上均形成有金属层,且所述金属层由焊料构成。
按照本发明的另一方案,提供一种半导体器件的制造方法,该半导体器件具有半导体元件和散热构件,散热构件散发由半导体元件所产生的热。该方法包括如下步骤:使用包含金属的碳材料形成含金属碳构件,在该步骤中,在包含该金属的碳材料的两侧上均形成金属层,从而形成该含金属碳构件,并且所述金属层由焊料构成;在安装于基板上的半导体元件上设置该含金属碳构件;在设置于该半导体元件上的含金属碳构件上设置散热构件;以及通过该含金属碳构件结合该半导体元件与该散热构件。
按照本发明的再一方案,提供一种结合构件,用于构件之间的结合,该结合构件的结构为:在包含金属的碳材料的两侧上均形成有金属层,且所述金属层由焊料构成。
本发明的有益技术效果在于:通过将碳材料用于半导体元件与散热构件之间的连接,可保证高散热性,并可以避免在半导体元件发热过程中产生应力集中。此外,通过使金属包含在含金属碳构件的碳材料中,即使在碳材料的表面上形成由较廉价的金属构成的层,也可紧密结合碳材料与金属层,并可以紧密结合半导体元件与散热构件。因此,可以低成本实现具有高可靠性及优异散热性的半导体器件。
从以下结合附图的详细说明中,将更清楚本发明的上述及其它目的、特征及优点,附图以示例的方式示出本发明的优选实施例。
附图说明
图1为示出按照本发明的第一实施例的半导体器件的主要部分的示意剖视图。
图2示出含焊料碳构件的形成流程的实例。
图3示出含焊料碳构件的形成流程的另一实例。
图4示出按照本发明的第一实施例的半导体器件的形成流程的实例。
图5为示出传统半导体器件的主要部分的示意剖视图。
图6为示出按照本发明的第二实施例的半导体器件的主要部分的示意剖视图。
具体实施方式
以使用焊料作为含金属碳构件的金属的情况为例,以下将参照附图详细说明本发明的优选实施例。此处用于金属(例如焊料)的术语“含”指包含一定量的金属的情况。该术语不包括仅包含杂质形式的少量金属的情况。
首先将说明第一实施例。
图1为示出按照本发明的第一实施例的半导体器件的主要部分的示意剖面图。
按照本发明第一实施例的半导体器件1具有如下结构:半导体元件4通过焊料凸点3倒装式地安装于电路基板2上。在电路基板2与半导体元件4之间,填充底部填充材料5以提高二者之间的连接强度。含焊料碳构件6结合至半导体元件4的表面侧,该表面侧与在电路基板2上的安装表面相反,该含焊料碳构件6通过使用包含预定量焊料的多孔碳材料(例如碳烧结体)构成。此外,在含焊料碳材料6中,箱形壳体7结合至与半导体元件4相反的表面侧。壳体7的作用为保护半导体元件4不受外部冲击或污染的影响,还起到散热构件的作用,将半导体元件4运行过程中产生的热散发至半导体器件1的外部。此处,壳体7结合至含焊料碳构件6,并且利用树脂8将壳体7的开口端结合至电路基板2。此外,在电路基板2上安装焊球9,用于将电路基板2安装于另一电路基板上。
此处,电路基板2可采用陶瓷基板或树脂基板。共晶焊料(Sn/37Pb)或锡银焊料(Sn/3Ag)可用作焊料凸点3或焊球9。添加至焊料符号的原子符号前面的数字代表该原子的含量(以下同上)。多种半导体元件可用作半导体元件4。通常,经常使用尺寸达到约25mm的半导体元件。如上所述的一个或两个或多个半导体元件4安装于电路基板2上。图1示出仅1个半导体元件4安装于电路基板2上的情况。环氧热固性树脂可用作底部填充材料5或树脂8。按照半导体元件4的类型(尺寸或发热量),出于壳体7的导热性的主要考虑,壳体7可使用金属或陶瓷以及碳材料(例如碳纳米管)。
此外,设置于半导体元件4与壳体7之间的含焊料碳构件6具有如下结构:在含焊料碳烧结体6a的各表面上形成有焊料层(称为“外焊料层”)6b和6c,其中该含焊料碳烧结体6a是通过将预定量的焊料结合入碳烧结体(例如石墨板)中而形成的。在半导体器件1中,半导体元件4结合至外焊料层6b,该外焊料层6b形成于含焊料碳构件6的一表面侧上。此外,壳体7结合至外焊料层6c,该外焊料层6c形成于含焊料碳构件6的另一表面侧上。
将构成含焊料碳构件6的含焊料碳烧结体6a以及外焊料层6b和6c的厚度分别设定为约300μm。根据所使用的半导体元件4的类型,适当设定含焊料碳烧结体6a以及外焊料层6b和6c的厚度。
对于结合入含焊料碳烧结体6a的焊料而言,除Sn/3Ag或Sn/2.5Ag/0.5Cu之外,可使用主要由Sn构成的焊料,例如Sn/37Pb或包含铋(Bi)的所谓低熔点焊料。根据焊料的熔化温度或所使用的半导体元件4的类型,适当设定含焊料碳烧结体6a所用的焊料的成分。含焊料碳烧结体6a的焊料含量依据所结合的焊料的成分而定。所述含量(重量百分比)为例如5-20%,优选8-12%。与焊料含量较低的情况相比,含焊料碳烧结体6a的焊料含量越高,其弹性模量趋于下降更多。因此,具有较高焊料含量的烧结体6a是有效的,尤其是当用作低弹性产品时。
对于用作外焊料层6b和6c的焊料而言,与含焊料碳烧结体6a相同,可使用主要由Sn构成的焊料,例如Sn/3Ag、Sn/2.5Ag/0.5Cu、Sn/37Pb或包含Bi的低熔点焊料。
含焊料碳烧结体6a所包含的焊料的成分与用作外焊料层6a和6c的焊料的成分可彼此相同或不同。
如上所述,在按照第一实施例的半导体器件1中,通过含焊料碳构件6结合半导体元件4与壳体7,其中含焊料碳构件6具有含焊料碳烧结体6a以及外焊料层6b和6c。当含焊料碳构件6与半导体元件4之间以及含焊料碳构件6与壳体7之间直接结合时,使用形成于含焊料碳烧结体6a的外部的外焊料层6b和6c。
通过将由碳烧结体形成的含焊料碳构件6用于半导体元件4与壳体7之间的连接,碳构件6可消除由半导体元件4中产生的热导致的热应力,并且将由半导体元件4所产生的热有效地传输至散热构件。因此,与传统的将金属层用于半导体元件4与壳体7之间的连接的情况相比,可有效避免应力集中。此外,与将Ag浆用于半导体元件4与壳体7之间的连接的情况相比,可有效散热。
此外,含焊料碳构件6具有如下结构:在含焊料碳烧结体6a的各表面上形成有外焊料层6b和6c,其中该含焊料碳烧结体6a是通过将焊料结合入碳烧结体中而形成的。因此,外焊料层6b和6c紧密结合至含焊料碳烧结体6a。因而,可防止在半导体器件1的使用过程中外焊料层6b和6c从含焊料碳烧结体6a的表面上剥落,从而可保证高散热性。此外,含焊料碳构件6可使用主要由较廉价的Sn构成的焊料。因此,与在碳烧结体的表面上形成较昂贵的焊料金属层的传统情况相比,可以低成本形成含焊料碳构件6,这有助于降低半导体器件1的成本。
此外,由于含焊料碳构件6具有如下结构:在含焊料碳烧结体6a的各表面上形成有外焊料层6b和6c,因而可在半导体元件4与壳体7之间获得高结合强度。具体说来,在使用传统Ag浆连接的情况下,由于该材料具有较高的吸湿性,当在潮湿状态下执行随后的回流时,结合界面会发生剥落。相反,由于含焊料碳构件6具有如下结构:在含焊料碳烧结体6a的各表面上形成有外焊料层6b和6c,因而碳构件6具有低吸湿性。因此,可防止结合界面剥落。
接下来,将说明含焊料碳构件6的形成方法。
如上所述,碳构件6的结构为:在含焊料碳烧结体的各表面上进一步形成有焊料层。
此处,可使用传统的公知方法形成用于该含焊料碳构件6的碳烧结体。例如,在此之前已经提出一种方法,该方法通过使用热固性树脂浸渍浆状原材料,然后在非氧化气氛中加压形成并碳化该材料,从而形成薄片状的多孔碳材料(参见例如日本专利No.3008095)。除此方法之外,也可使用任何方法,只要可形成多孔碳烧结体。
但是,在形成碳烧结体时,含焊料碳烧结体6a的焊料含量受碳烧结体的孔隙率的影响较大(如后文所述)。因此,必须在考虑此点的情况下形成烧结体。
为将焊料结合入如此获得的碳烧结体中,可使用例如利用熔融焊料浸渍多孔碳烧结体的方法。
图2示出含焊料碳构件的形成流程的实例。
通过如下程序形成含焊料碳构件6。首先,充分干燥碳烧结体以去除碳烧结体的微孔内的水分(步骤S1)。在干燥之后,将干燥的碳烧结体移至预定腔室,并在该室中执行抽真空以排出该腔室内的气体和水分(步骤S2)。
进而,在保持真空气氛的同时,将碳烧结体浸入温度为熔点或更高的熔融焊料中持续给定的时间(步骤S3)。因此,可使熔融焊料渗入碳烧结体的微孔中。渗入碳烧结体的微孔中的焊料的量主要取决于碳烧结体的孔隙率。也就是说,碳烧结体的孔隙率越高,渗入的熔融焊料的量就越多。另一方面,碳烧结体的孔隙率越低,渗入的熔融焊料的量就越少。最终获得的含焊料碳烧结体6a的焊料含量几乎由渗入碳烧结体的微孔的熔融焊料的量而定。
在将碳烧结体浸入熔融焊料持续给定的时间后,冷却熔融焊料(步骤S4)。此时,在烧结体中,使用焊料浸渍烧结体内的微孔,以及根据焊料的成分或熔化温度将固定厚度的焊料粘附至烧结体的表面。
在冷却之后,从粘附至利用焊料浸渍的碳烧结体的表面的焊料中,去除多余焊料(步骤S5)。此时,允许以固定厚度保留粘附至碳烧结体表面的焊料,而去除除保留焊料之外的焊料。因此,可获得如下结构的含焊料碳构件6:该保留部分用作形成于含焊料碳烧结体6a的表面上的外焊料层6b和6c。
当按照步骤S1至S5所示的工序形成含焊料碳构件6时,可同时形成含焊料碳烧结体6a以及外焊料层6b和6c。
此外,在如上所述的步骤S5中,可去除粘附至碳烧结体表面的全部焊料(直至露出碳烧结体)。在这种情况下,相应地获得如下结构的含焊料碳烧结体6a:在烧结体6a的各表面上还未形成外焊料层6b和6c。
图3示出含焊料碳构件的形成流程的另一实例。
此处,通过如下工序形成含焊料碳构件6。首先以与以上图2所示的形成流程相同的方式,干燥碳烧结体(步骤S10),抽真空(步骤S11),将碳烧结体浸入熔融焊料中(步骤S12)和冷却熔焊料(步骤S13)。进而,去除粘附至利用焊料浸渍的碳烧结体的表面的焊料(步骤S14)。因此,获得含焊料碳烧结体6a。
然后,以如上相同的方式,首先执行抽真空(步骤S15)。在保持真空气氛的同时,将含焊料碳烧结体6a浸入温度为熔点或更高的熔融焊料中(步骤S16)。此时,理想地,使用的焊料的熔点低于浸渍含焊料碳烧结体6a的焊料的熔点。这是因为在本阶段中浸渍含焊料碳烧结体6a的焊料熔化以扩散进入熔融焊料,因此,会降低利用焊料浸渍碳烧结体的作用。
进而,在冷却熔焊料(步骤S17)之后,允许以固定厚度保留粘附至含焊料碳烧结体6a表面的焊料,而去除除保留焊料之外的焊料(步骤S18)。因此,在含焊料碳烧结体6a的表面上形成外焊料层6b和6c。
当按照步骤S10至S18所示的工序形成含焊料碳构件6时,分别形成含焊料碳烧结体6a以及外焊料层6b和6c。因此,浸渍含焊料碳烧结体6a的焊料的成分与构成外焊料层6b和6c的焊料的成分可彼此互换。
当使用如图2和图3所示的上述方法时,可形成含焊料碳构件6。
接下来,将说明使用含焊料碳构件6的半导体器件1的形成方法。
图4示出按照本发明的第一实施例的半导体器件的形成流程的实例。
通过如下工序形成半导体器件1。首先,半导体元件4通过焊料凸点3倒装地安装于电路基板2上,并且半导体元件4与电路基板2彼此连接(步骤S20)。进而,在半导体元件4与电路基板2之间填充底层填充材料5(步骤S21)。
接着,在半导体元件4上设置含焊料碳构件6(步骤S22),然后在含焊料碳构件6上进一步设置壳体7(步骤S23)。在壳体7的开口端与电路基板2之间,涂覆树脂8(步骤S24)。
然后,进行固化及回流(步骤S25)。因此,形成于含焊料碳构件6的各表面上的用作外焊料层6b和6c的焊料熔化,以允许含焊料碳构件6与半导体元件4之间以及含焊料碳构件6与壳体7之间结合。根据用于外焊料层6b和6c的焊料成分(或熔点),结合温度通常约为130℃-250℃。此外,此时通过树脂8的固化也将壳体7与电路基板2结合在一起。
最后,将焊球9安装于电路基板2上(步骤S26)。因此,图1所示的半导体器件1被制成。
这里,说明了使用树脂8结合壳体7的开口端与电路基板2的情况。但是,所述部件之间的结合并不是必需的。在这种情况下,可省略上述步骤S24。
接下来,将说明半导体器件1与传统半导体器件之间的比较结果。这里所用的传统半导体器件的结构为使用焊料或Ag浆结合半导体元件与壳体。
图5为示出传统半导体器件的主要部分的示意剖面图。图5中,以与图1相同的标号表示与图1相同的部件,并省略其详细说明。
除通过由Sn/37Pb构成的焊料层101或Ag浆层102将半导体元件4与壳体7结合在一起之外,图5所示的半导体器件100的构成与图1所示的半导体器件1相同。
表1集中示出与传统半导体器件100所用的焊料层101和Ag浆层102相关、以及与图1所示的半导体器件1所用的含焊料碳构件6相关的热导率及弹性模量,这里含焊料碳构件6通过在内部及外部使用Sn/3Ag焊料而形成。
【表1】
Figure C20061000548500121
从表1可见,Sn/37Pb的热导率为50.7W/m·K,其弹性模量为32GPa。通过捏混(kneading)并固化由树脂和Ag填料形成的Ag浆的热导率为1-2W/m·K,其弹性模量为1GPa。含焊料碳构件6的热导率为80W/m·K或更多,其弹性模量为10GPa。
传统所用的Sn/37Pb和Ag浆分别具有优点和缺点。作为用于半导体元件4与壳体7之间的连接的材料,Sn/37Pb焊料的热导率高。但是,Sn/37Pb焊料的弹性模量高,从应力的角度看为硬质材料,因此,容易发生应力集中。另一方面,Ag浆的弹性模量低,从应力的角度看为软质材料,因此几乎不发生应力集中。但是,Ag浆的热导率低,因此存在散热的问题。
相反,作为用于半导体元件4与壳体7之间连接的材料,含焊料碳烧结体6a在热导率与弹性模量两方面均表现出优异特性。因此,即使与传统器件相比半导体器件1的发热量进一步增加,也可获得高散热性与高可靠性。
接下来,说明第二实施例。
图6为示出按照本发明的第二实施例的半导体器件的主要部分的示意剖面图。图6中,以与图1相同的标号表示与图1相同的部件,并省略其详细说明。
图6所示的半导体器件1a与第一实施例的半导体器件1的不同点在于:作为散热构件的板状壳体7a结合至含焊料碳构件6,含焊料碳构件6结合至半导体元件4,半导体元件4安装于电路基板2上。因而,不需要使用树脂8将壳体7a结合至电路基板2。
与第一实施例的半导体器件1的壳体7相同,根据半导体元件4的类型,出于壳体7a的导热性的主要考虑,壳体7a可使用金属、陶瓷或碳材料(例如碳纳米管)。
第二实施例的半导体器件1a的其它构成及半导体器件1a的形成方法(包括含焊料碳构件6的形成方法)与第一实施例的半导体器件1相同。同样,当使用该板状壳体7a时,可获得与第一实施例的半导体器件1相同的作用。
如上所述,通过经由含焊料碳构件6结合半导体元件4与壳体7或结合半导体元件4与壳体7a,形成第一实施例的半导体器件1或第二实施例的半导体器件1a。从导热性、热膨胀特性及机械强度的角度看使用具有优异性能的多孔碳烧结体,形成具有如下结构的碳构件6:在通过使用焊料浸渍多孔碳烧结体而形成的碳烧结体6a的各表面上,进一步设置外焊料层6b和6c。因此,在含焊料碳构件6中,使用较廉价的焊料紧密结合含焊料碳烧结体6a与外焊料层6b以及紧密结合含焊料碳烧结体6a与外焊料层6c。同时,含焊料碳构件6通过外焊料层6b和6c紧密结合至半导体元件4和壳体7或结合至半导体元件4和壳体7a。因此,可有效抑制半导体元件4的运行过程中可能产生的应力集中以防止连接或半导体元件4的损坏,并可有效散发半导体元件4所产生的热。因而,可以低成本地实现具有高可靠性和优异散热性的半导体器件1和1a。
以仅将焊料用作含金属碳构件的情况为例,进行上述说明。此外,也可以使用除焊料之外的金属,例如Cu或Au。在这种情况下,可使用Cu或Au浸渍碳烧结体,以在碳烧结体表面上形成由Cu或Au构成的金属层。此外,可使用焊料浸渍碳烧结体,以在碳烧结体表面上形成由Cu或Au构成的金属层。此外,可使用Cu或Au浸渍碳烧结体,以在碳烧结体表面上形成焊料层。并且当使用除焊料之外的金属(例如如上所述的Cu或Au)时,可以如以上相同的方式使用在适当阶段熔化的Cu或Au。在这种情况下,可使用熔化的Cu或Au浸渍碳烧结体,或可在碳烧结体的表面上形成层。当在碳烧结体表面上形成由Cu或Au构成的金属层时,通过例如热压进行结合。
此外,上述焊料成分为实例。当然,也可以使用不同于上述实例的成分。
在本发明中,通过含金属碳构件结合半导体元件与散热构件,其中含金属碳构件通过使用包含金属的碳材料而形成。通过将碳材料用于半导体元件与散热构件之间的连接,可保证高散热性,并可以避免在半导体元件发热过程中产生应力集中。此外,通过使金属包含在含金属碳构件的碳材料中,即使在碳材料的表面上形成由较廉价的金属构成的层,也可紧密结合碳材料与金属层,并可以紧密结合半导体元件与散热构件。因此,可以低成本实现具有高可靠性及优异散热性的半导体器件。
前述说明仅可视为本发明原理的例示。此外,由于本领域的技术人员将容易地想到大量修改及改变,因此不希望将本发明限制于所示出并说明的确切构造及应用,因而,可以认为所有适当的修改及其等同特征均落入如所附权利要求及其等同方案所限定的本发明的范围内。

Claims (16)

1.一种半导体器件,包括:
半导体元件;和
散热构件,该散热构件散发由该半导体元件所产生的热,其中:
该半导体元件与该散热构件通过含金属碳构件结合,该含金属碳构件通过使用包含金属的碳材料形成,且该含金属碳构件的结构为:在包含该金属的碳材料的两侧上均形成有金属层,且所述金属层由焊料构成。
2.根据权利要求1所述的半导体器件,其中该金属为焊料。
3.根据权利要求2所述的半导体器件,其中该焊料主要由Sn构成。
4.根据权利要求1所述的半导体器件,其中:
该碳材料为主要由碳构成的多孔烧结体。
5.根据权利要求1所述的半导体器件,其中:
该半导体元件和该散热构件通过该金属层结合至该含金属碳构件。
6.根据权利要求1所述的半导体器件,其中:
该金属层由与该碳材料包含的金属相同的金属构成。
7.根据权利要求1所述的半导体器件,其中:
该金属层由与该碳材料包含的金属不同的金属构成。
8.根据权利要求1所述的半导体器件,其中:
该散热构件由金属、陶瓷或碳构成。
9.根据权利要求1所述的半导体器件,其中:
该半导体元件倒装地安装于电路基板上。
10.根据权利要求9所述的半导体器件,其中:
该电路基板为陶瓷基板或树脂基板。
11.一种半导体器件的制造方法,该半导体器件具有半导体元件和散热构件,该散热构件散发由该半导体元件所产生的热,该方法包括如下步骤:
使用包含金属的碳材料形成含金属碳构件,在该步骤中,在包含该金属的碳材料的两侧上均形成金属层,从而形成该含金属碳构件,并且所述金属层由焊料构成;
在安装于基板上的该半导体元件上设置该含金属碳构件;
在设置于该半导体元件上的含金属碳构件上设置该散热构件;以及
通过该含金属碳构件结合该半导体元件与该散热构件。
12.根据权利要求11所述的制造方法,其中:
在使用包含该金属的碳材料形成该含金属碳构件的步骤中,
使用该金属浸渍该碳材料,以形成包含该金属的碳材料;以及
使用包含该金属的碳材料形成该含金属碳构件。
13.根据权利要求11所述的制造方法,其中该金属为焊料。
14.根据权利要求11所述的制造方法,其中:
在该碳材料的表面上形成该金属层的步骤中,
当形成包含该金属的碳材料时形成该金属层。
15.根据权利要求11所述的制造方法,其中:
当在该碳材料的表面上形成该金属层时,在形成包含该金属的碳材料之后形成该金属层。
16.一种结合构件,用于构件之间的结合,该结合构件的结构为:在包含金属的碳材料的两侧上均形成有金属层,且所述金属层由焊料构成。
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Families Citing this family (11)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7180174B2 (en) * 2003-12-30 2007-02-20 Intel Corporation Nanotube modified solder thermal intermediate structure, systems, and methods
JP4992461B2 (ja) * 2007-02-21 2012-08-08 富士通株式会社 電子回路装置及び電子回路装置モジュール
KR101422249B1 (ko) * 2007-03-09 2014-08-13 삼성전자주식회사 소자 방열 장치
US9418831B2 (en) * 2007-07-30 2016-08-16 Planar Semiconductor, Inc. Method for precision cleaning and drying flat objects
JP5431793B2 (ja) * 2009-05-29 2014-03-05 新光電気工業株式会社 放熱部品、電子部品装置及び電子部品装置の製造方法
DE102014014473C5 (de) * 2014-09-27 2022-10-27 Audi Ag Verfahren zum Herstellen einer Halbleiteranordnung sowie entsprechende Halbleiteranordnung
JP6524461B2 (ja) * 2014-10-11 2019-06-05 国立大学法人京都大学 放熱構造体
US11476399B2 (en) 2017-11-29 2022-10-18 Panasonic Intellectual Property Management Co., Ltd. Jointing material, fabrication method for semiconductor device using the jointing material, and semiconductor device
JP7108907B2 (ja) * 2017-11-29 2022-07-29 パナソニックIpマネジメント株式会社 接合材、該接合材を用いた半導体装置の製造方法、及び、半導体装置
JP2020077808A (ja) * 2018-11-09 2020-05-21 株式会社デンソー 半導体部品の放熱構造
CN210325761U (zh) * 2018-12-29 2020-04-14 华为技术有限公司 一种芯片装置及电子设备

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6713863B2 (en) * 2000-01-24 2004-03-30 Shinko Electric Industries Co., Ltd. Semiconductor device having a carbon fiber reinforced resin as a heat radiation plate having a concave portion
US20040241447A1 (en) * 2003-05-16 2004-12-02 Hitachi Metals, Ltd. Composite material having high thermal conductivity and low thermal expansion coefficient, and heat-dissipating substrate, and their production methods

Family Cites Families (14)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH10107190A (ja) 1996-10-01 1998-04-24 Tonen Corp 半導体パッケージ
WO1999004430A1 (en) * 1997-07-21 1999-01-28 Aguila Technologies, Inc. Semiconductor flip-chip package and method for the fabrication thereof
EP1363325B1 (en) * 2001-02-22 2013-02-20 NGK Insulators, Ltd. Member for electronic circuit, method for manufacturing the member
JP2003155575A (ja) * 2001-11-16 2003-05-30 Ngk Insulators Ltd 複合材料及びその製造方法
US7316061B2 (en) * 2003-02-03 2008-01-08 Intel Corporation Packaging of integrated circuits with carbon nano-tube arrays to enhance heat dissipation through a thermal interface
US7126228B2 (en) * 2003-04-23 2006-10-24 Micron Technology, Inc. Apparatus for processing semiconductor devices in a singulated form
US6917113B2 (en) * 2003-04-24 2005-07-12 International Business Machines Corporatiion Lead-free alloys for column/ball grid arrays, organic interposers and passive component assembly
US7527090B2 (en) * 2003-06-30 2009-05-05 Intel Corporation Heat dissipating device with preselected designed interface for thermal interface materials
US20050016714A1 (en) * 2003-07-09 2005-01-27 Chung Deborah D.L. Thermal paste for improving thermal contacts
US7253523B2 (en) * 2003-07-29 2007-08-07 Intel Corporation Reworkable thermal interface material
US7180174B2 (en) * 2003-12-30 2007-02-20 Intel Corporation Nanotube modified solder thermal intermediate structure, systems, and methods
JP2005194393A (ja) * 2004-01-07 2005-07-21 Hitachi Chem Co Ltd 回路接続用接着フィルム及び回路接続構造体
CN100377340C (zh) * 2004-08-11 2008-03-26 鸿富锦精密工业(深圳)有限公司 散热模组及其制备方法
JP3905100B2 (ja) * 2004-08-13 2007-04-18 株式会社東芝 半導体装置とその製造方法

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6713863B2 (en) * 2000-01-24 2004-03-30 Shinko Electric Industries Co., Ltd. Semiconductor device having a carbon fiber reinforced resin as a heat radiation plate having a concave portion
US20040241447A1 (en) * 2003-05-16 2004-12-02 Hitachi Metals, Ltd. Composite material having high thermal conductivity and low thermal expansion coefficient, and heat-dissipating substrate, and their production methods

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Address after: Japan's Kanagawa Prefecture Yokohama

Patentee after: FUJITSU MICROELECTRONICS Ltd.

Address before: Tokyo, Japan

Patentee before: Fujitsu Microelectronics Ltd.

C17 Cessation of patent right
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Granted publication date: 20081112

Termination date: 20120116